Apple macbook pro 13 a1708 X502MLB catz 820 00840 a

III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE THE POSESSOR AGREES TO THE FOLLOWING: THE INFORMATION CONTAINED HEREIN IS THE NOTICE OF PROPRI

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合肥怡飞苹果维修qq：82669515 qq群： 241000

DESIGN: X502/MLB_CATZ

DOCUMENTS / BOARDS / ASSEMBLIES

LAST CHANGE: Tue Aug 9 17:02:57 2016

45 44 43 42 41

Power Sensors High Side SMBus Connections

SMC Project Support

PAULM PAULM PAULM

06/15/2015 06/15/2015

06/15/2015 PAULM

PAULM

Power Sensors Load Side

71 70 69 66

55

53 52 51

CPU IMVP VCC & VCCSA VReg CPU VCC Cntl PBUS Supply & Battery Charger DC-IN & BATTERY CONNECTORS JACK TRANSLATORS

54

72

84

80 79

65 64 63 62

61

PMIC 1.2V 1.0V 0.6V 81

82 Power FETs

LCD Backlight Driver RAIL DESENSE CAPS PMIC VCCPCH VCCIO 1.8V

Chipset Support 1 22

20

18 19

18 17 16

LPDDR3 VREF Margining 20

CPU/PCH Merged XDP 19

PCH SPI/UART/GPIO

Chipset Support 2 16

6

8 9 10

6 7 8 9 10

PAULM PAULM PAULM PAULM PAULM

CPU & PCH Grounds CPU Core Decoupling

CPU & PCH Power 7

06/15/2015 06/15/2015 06/15/2015 06/15/2015

46 47 48 50

58 61 62 63 64

AHAAGE AHAAGE AHAAGE

03/23/2016 09/22/2015 03/23/2016

PAULM PAULM

06/15/2015 06/15/2015

Thermal Sensors

49

51 50 48 40 39

USB-C SUPPORT 2 38

37 35 33

35 34 33

31

USB-C CONNECTOR B USB-C CONNECTOR A

WIFI/BT MODULE WIFI/BT Module Support

32 31

29 28

30 29 28 27 26

USB-C PORT CONTROLLER A USB-C PORT CONTROLLER B

USB-C HIGH SPEED 1

30 USB-C SUPPORT

USB-C HIGH SPEED 2

LAST_MODIFICATION=Tue Aug 9 17:03:06 2016

1 2 3 4 5

PAULM PAULM PAULM

06/15/2015 06/15/2015

CPU GFX

PD Parts BOM Configuration BOM Configuration Table of Contents

06/15/2015

27 26 25 24 23

25 24 23 22

LPDDR3 DRAM Channel B (32-63) LPDDR3 DRAM Channel A (00-31)

LPDDR3 DRAM Termination

21

LPDDR3 DRAM Channel B (00-31) LPDDR3 DRAM Channel A (32-63)

MICHKLEE 500

104 103 73

72

=LAST SCHEMATIC PAGE=

FCT, ICT PROPERTIES

X502-EXP PAULM

12/03/2015 06/15/2015 06/23/2015

Memory Signal Swaps 71

Power Aliases 102

100 99 86 85

70 69 68 67

NC_ AND NO_TEST SIGNALS DEVELOPMENT ONLY

78

76 74 59

58 57 56

VR - 5V S4, 3.3V S5 IMVP VCCSA

PMIC IC & Power Control

GT IMVP VCCGT

60

77 VR - OPC (EDRAM)

73 15

14 13 12 11

15 14 13 12 11

PCH Power Management

PCH Decoupling CPU GT Decoupling PCH Audio/LPC/SPI/SMBus PCH PCIE/USB/CLKS

SCHEM,MLB-CATZ,X502

051-02265

2016-08-10 0006782329

PROPRIETARY PROPERTY OF APPLE INC.

REVISION

ECNREV DESCRIPTION OF REVISION

DRAWING TITLE

2 ALL CAPACITANCE VALUES ARE IN MICROFARADS

3 ALL CRYSTALS & OSCILLATOR VALUES ARE IN HERTZ

BRANCH

B

II NOT TO REPRODUCE OR COPY IT

1 ALL RESISTANCE VALUES ARE IN OHMS, 0.1 WATT +/- 5%

III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE THE POSESSOR AGREES TO THE FOLLOWING:

THE INFORMATION CONTAINED HEREIN IS THE

NOTICE OF PROPRIETARY PROPERTY:

Apple Inc.

DATE SYNC

CONTENTS CSA

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TBT ROM

EFI ROM

MICRON

(BOOT CODE: 0002.08.07) (BOOT CODE: 0002.08.08)

(BOOT CODE: 0002.08.07)

WIFI ROM

DESIGN: X502/MLB_CATZ LAST CHANGE: Thu Aug 4 21:00:42 2016

BT_ROM:PVTCRITICAL

341S00397 1 IC,BT ROM (V53) PROTO0,X502 U3770

IC,BT ROM (V53) PROTO0,X502 U37701

SMC:PVTCRITICAL

341S00662 1 IC,SMC-B1,EXT (V2.36F58) PVT,X502 U5000

ALT_CMN ALL MACRONIX

335S0959 335S00006

BOOTROM:PROTO1CRITICAL

341S00452 1 IC,EFI (V0093) PROTO 0,X502 U6100

338S1231 1 IC,SMC12,40MHZ/50DMIPS MCU,7X7,168BGA U5000 CRITICAL SMC:BLANK

1 IC,SMC-B1,EXT (V2.35A4) PROTO 1,X502 U5000 CRITICAL SMC:PROTO1341S00429

IC,EFI (V0143) EVT,X502 U61001

SMC:PROTO2CRITICAL

341S00517 1 IC,SMC-B1,EXT (V2.35A51) PROTO 2,X502 U5000

SMC:EVTCRITICAL

341S00562 1 IC,SMC-B1,EXT (V2.36A2) EVT,X502 U5000

SMC:PREDVTCRITICAL

341S00611 1 IC,SMC-B1,EXT (V2.36A33) PRE-DVT,X502 U5000

BOOTROM:BLANKCRITICAL

335S0959 1 IC,SPI SERIAL FLASH,64M BITS,3V,CSP,QE=1 U6100

TBT_AR:C1_PRQCRITICAL

338S00254 1 IC,TBT,ALPINE RIDGE,SLLSM,PRQ,C1,CSP337 U2800

TBT_AR:C1_QSCRITICAL

338S00249 1 IC,TBT,ALPINE RIDGE,QT5S,QS,C1,CSP337 U2800

ACE:B0CRITICAL

353S00807 2 IC,CD3215,ACE,B0,USB PWR SWITCH,BGA96 U3100,U3200

ACE:B0_BCRITICAL

353S00887 2 IC,CD3215,ACE,B0,USB PWR SW,BLNK,BGA96 U3100,U3200

WIRELESS:USICRITICAL

339S0251 1 MODULE,WIFI/BT,STELLA CIDRE,USI,LGA80 U3700

WIRELESS:MURATACRITICAL

339S0250 1 MODULE,WIFI/BT,STELLA CIDRE,MUR,LGA80 U3700

CPU_SKL:2_2_QS_2.3CRITICAL

337S00168 1 CPU,SKYU,QJ8N,D0,QS,2/2,2.3,15W,BGA1356 U0500

CPU_SKL:2_3_SQS_1G8CRITICAL

337S00219 1 CPU,SKYU,QK2T,K1,SQS,1.8,15W,.95,BGA1356 U0500

ACE:B0_2CRITICAL

353S00888 2 IC,CD3215,ACE,B0,USB PWR SW,OTP=2,BGA96 U3100,U3200

CPU_SKL:2_3_ES0_BTCRITICAL

337S00150 1 CPU,SKYU,QJ58,J0,ES0,2/3,1.6,28W,BGA1356 U0500

BT_ROM:X261CRITICAL

341S00196 1 IC,BT ROM (V53) DVT,X261 U3770

CPU_SKL:VTT_INTERPOSERCRITICAL

998-04195 1 INTERPOSER,VTT ADAPTER,SKL-U,BGA1356 U0500

ALT_CMN ALL ALTERNATE

335S0956 335S00145

WIFI-ROM:MURATA-ETSICRITICAL

341S00608 1 WIFI ROM (P175) PRE-DVT,WW2,X502 U3780

WIFI-ROM:USI-ETSICRITICAL

341S00637 1 WIFI ROM (P177) USI-WW2,X502 U3780

WIFI-ROM:MURATA-INDCRITICAL

341S00610 1 WIFI ROM (P175) PRE-DVT,IND,X502 U3780

WIFI-ROM:MURATA-FCCCRITICAL

341S00607 1 WIFI ROM (P175) PRE-DVT,WW1,X502 U3780

WIFI-ROM:BLANKCRITICAL

335S0956 1 IC,MEMORY,EEPROM,4K,1.7V-5.5V,UDFN8 U3780

WIFI-ROM:MURATA-APACCRITICAL

341S00609 1 WIFI ROM (P175) PRE-DVT,WW3,X502 U3780TBT_AR:B1_PRQ_TRAY

CRITICAL998-04160 1 IC,TBT,ALP-RIDGE DP,SLL44-TRAY,B1,CSP337 U2800

TBT_AR:C0_QSCRITICAL

338S00229 1 IC,TBT,ALPINE RIDGE,QSTY,QS,C0,CSP337 U2800

WIFI-ROM:USI-INDCRITICAL

341S00639 1 WIFI ROM (P177) USI-IND,X502 U3780

WIFI-ROM:USI-APACCRITICAL

WIFI-ROM:USI-FCCCRITICAL

TBT_AR:B1_PRQCRITICAL

338S00176 1 IC,TBT,ALPN-RIDGE DP,SLL43-T&R,B1,CSP337 U2800

TBT_AR:B1_QSCRITICAL

338S00160 1 IC,TBT,ALPINE RIDGE DP,QSJV,B1,6X6MM,BGA96 U2800

ACE:A1CRITICAL

353S00660 2 IC,CD3215,ACE,A1,USB PWR SWITCH,BGA96 U3100,U3200

ACE:A0CRITICAL

353S00422 2 IC,CD3215,USB PWR SWITCH,A0,6X6MM,BGA96 U3100,U3200

CPU_SKL:2_3_PRQ_2G0CRITICAL

337S00239 1 CPU,SKY,SR2JM,K1,PRQ,2.0,15W,BGA1356 U0500

ACE:B0_3CRITICAL

353S00926 2 IC,CD3215,ACE,B03,USB PWR SW,BLNK,BGA96 U3100,U3200

ACE:C0CRITICAL

353S00961 2 IC,CD3215,ACE,C00,USB PWR SW,BLNK,BGA96 U3100,U3200

CRITICAL337S00220 1 CPU,SKYU,QKBY,K1,SQS,2.2,15W,1.05,BG1356 U0500 CPU_SKL:2_3_SQS_2G2

337S00222 1 CPU,SKYU,QK33,K1,SQS,2.0,15W,1.0,BG1356 U0500

CRITICAL337S00149 1 CPU,SKYU,QJ57,J0,ES0,2/3,1.6,15W,BGA1356 U0500 CPU_SKL:2_3_ES0_GD

CPU_SKL:2_2_QS_2.6CRITICAL

337S00170 1 CPU,SKYU,QJ8K,D0,QS,2/2,2.6,15W,BGA1356 U0500

CPU_SKL:BASECRITICAL

998-00235 1 IC,CPU,SKL-ULT,2+3E,42X24MM,BGA1356 U0500

337S00233 1 CPU,SKYU,QK32,K1,SQS,2.4,15W,BGA1356 U0500

CPU_SKL:2_3_PRQ_1G8CRITICAL

337S00232 1 CPU,SKY,SR2JC,K1,PRQ,1.8,15W,BGA1356 U0500

CPU_SKL:2_3_PRQ_2G4337S00234 1 CPU,SKYU,SR2JL,K1,PRQ,2.4,15W,BGA1356 U0500 CRITICAL

341S00334 1 IC,SMC-B1,EXT (V2.31A18) POC,X502 U5000 CRITICAL SMC:POC

SMC:DVTCRITICAL

341S00633 1 IC,SMC-B1,EXT (V2.36A48) DVT,X502 U5000

341S00389 1 IC,EFI (V0072) PROTO 0,X502 U6100

AR_ROM:EVTCRITICAL

341S00559 1 IC,NVM (V16.8) EVT,X502 U2890

AR_ROM:PROTO2CRITICAL

341S00512 1 IC,NVM (VB1-10.11-E2.6.3) PROTO 2,X502 U2890

AR_ROM:PROTO1CRITICAL

341S00451 1 IC,NVM / AR (V0.8.15.E1) PROTO 1,X502 U2890

AR_ROM:PREDVTCRITICAL

341S00606 1 IC,NVM (V1.5) PRE-DVT,X502 U2890

AR_ROM:DVTCRITICAL

341S00628 1 IC, NVM (V3.8), DVT, X502 U2890

AR_ROM:PVTCRITICAL

341S00661 1 IC, NVM (VTBD), PVT, X502 U2890

341S00513 1 IC,EFI (V0114) PROTO 2,X502 U6100

IC,EFI (V0130) PROTO 2.2,X502 CRITICAL BOOTROM:PROTO2_2

AR_ROM:BLANKCRITICAL

335S00133 1 IC,SPI SERIAL FLASH,8MBITS,3.0V,USON8 U2890

TABLE_ALT_ITEM

CRITICALPART NUMBER QTY DESCRIPTION REFERENCE DES BOM OPTION

II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

BRANCH REVISION

DRAWING NUMBER SIZE

D

R

SHEET PAGE TITLE

B

Apple Inc.

TABLE_ALT_ITEM TABLE_ALT_ITEM

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<10100> <01011>

<01010>

<10101>

INVERT TO VALUEMLB VERSION ID STRAPS

Main DRAM SPD Straps

MICRON SAMSUNG

PCH INTERNAL PULL-UPS ARE TO VCCGPPD = 3.3V.

ALT_CMN

ALLALT_CMN

376S1080

R1692 1

117S0006 RES,MF,1/20W/1K OHM,5,0201,SMD BOARD_ID:PROTO2

RES,MF,1/20W/1K OHM,5,0201,SMD 2

117S0006 R1692,R1691 BOARD_ID:EVT

117S0006 1 RES,MF,1/20W/1K OHM,5,0201,SMD R1691 BOARD_ID:PRE_PROTO1

RES,MF,1/20W/1K OHM,5,0201,SMD BOARD_ID:PROTO1 117S0006 2 R1691,R1690

ALLALT_CMN

138S0719

ALT_CMN ALL MULTIPLE

138S0709 138S0864

ALT_CMN ALL CYNTEC

107S00076 107S00044

311S0543 311S00122

311S0508

ALLALT_CMN

353S4471 353S00525

DIODES INCALT_CMN

ALT_CMN ALL KEMET

128S00009 128S00015

RES,MF,1/20W/1K OHM,5,0201,SMD 117S0006 3 R1692,R1691,R1690 BOARD_ID:PREDVT

RES,MF,1/20W/1K OHM,5,0201,SMD

2 R1692,R1690 BOARD_ID:PROTO2_2 117S0006

138S00035 138S00077

TAIYO YUDENALL

DRAM:HYNIX_16GB_1866

3 RES,MF,1/20W,1K OHM,5,0201,SMD R1330,R1331,R1334117S0006

RES,MF,1/20W/1K OHM,5,0201,SMD 117S0006 2 R1693,R1690 BOARD_ID:DVT3

RES,MF,1/20W/1K OHM,5,0201,SMD R1690 BOARD_ID:PROTO0 1

117S0006

BOM Configuration

SYNC_DATE=06/15/2015 SYNC_MASTER=PAULM

BOM_COST_GROUP=NO COST ITEMS

2 117S0006 RES,MF,1/20W/1K OHM,5,0201,SMD R1693,R1691 BOARD_ID:PVT

2 117S0006 RES,MF,1/20W/1K OHM,5,0201,SMD R1693,R1691,R1690 BOARD_ID:PRQ1

TABLE_5_ITEM TABLE_5_ITEM

BRANCH REVISION

DRAWING NUMBER SIZE

D

R

SHEET PAGE TITLE

B

Apple Inc.

PART# QTY DESCRIPTION

TABLE_5_HEAD

BOM OPTION REFERENCE DESIGNATOR(S)

TABLE_5_ITEM

TABLE_ALT_ITEM

TABLE_ALT_ITEM TABLE_ALT_ITEM TABLE_ALT_ITEM

TABLE_ALT_ITEM TABLE_ALT_ITEM TABLE_ALT_ITEM TABLE_ALT_ITEM TABLE_ALT_ITEM TABLE_ALT_ITEM

PART NUMBER ALTERNATE FOR

PART NUMBER

TABLE_5_ITEM

TABLE_ALT_ITEM

TABLE_ALT_ITEM TABLE_ALT_ITEM TABLE_ALT_ITEM TABLE_ALT_ITEM

TABLE_ALT_ITEM

TABLE_ALT_HEAD

COMMENTS:

REF DES BOM OPTION

PART NUMBER ALTERNATE FOR

PART NUMBER

TABLE_ALT_ITEM

TABLE_ALT_ITEM TABLE_ALT_ITEM TABLE_ALT_ITEM TABLE_ALT_ITEM TABLE_ALT_ITEM

TABLE_ALT_ITEM

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LAST CHANGE: Thu Aug 4 21:00:42 2016 DESIGN: X502/MLB_CATZ

SH0460

2.8OD1.2ID-3.0H-SM

2 1

SH0461

SL-2.6X2.0-4.7X4.1

TH-NSP 1

SH0457

2.8OD1.2ID-1.44H-SM

2 1

SH0455

2.8OD1.2ID-1.44H-SM

2 1

SH0453

2.8OD1.2ID-1.44H-SM

2 1

SH0452

2.8OD1.2ID-1.44H-SM

2 1

SH0451

2.8OD1.2ID-1.44H-SM

2 1

DRAWING NUMBER SIZE

D

R

SHEET PAGE TITLE

B

Apple Inc.

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FOR FUTURE PRODUCT PER PDG

5 OF 73

5 OF 500

1.0.0 051-02265

=PP0V95_S0_CPU_VCCIO

=PP3V3_SUS_PCH_VCCPRIM

XDP_USB_EXTD_OC_LXDP_USB_EXTA_OC_L

DP_DDI1_AUXCH_C_N

DP_DDI2_AUXCH_C_PDP_DDI2_AUXCH_C_NDP_DDI1_AUXCH_C_P

XDP_PCH_OBSDATA_B0XDP_PCH_OBSDATA_A3

XDP_USB_EXTB_OC_LXDP_USB_EXTC_OC_LEDP_BKLT_EN

BOM_COST_GROUP=CPU & CHIPSET

1/20W 5%

R0550

201 MF

1/20W 5%

SKL-ULT-2+3E

OMIT_TABLE

U12 U11 H11 G46

F52 F46

F6 E3

D12 C12

C11 C7

B11

AW69 AW68 AW48 AU56

A11

U0500

BGA TBD

SKL-ULT-2+3E

CRITICALOMIT_TABLE

L10 N9 L6 L7 L9 B9

D9 C9 A9 H1 A7

U13

B47 B45 C45 C46

A47 A45 D46 C47

E52

B52

R12 R11

F45 E45

C51 B50 D52 D50

D51 A50 C52 C50

F48 E48

G56 G53 F58 F55

F56 F53 E58 E55

F50 G50

DRAWING NUMBER SIZE

D

R

SHEET PAGE TITLE

B

Apple Inc.

OUT OUT OUT OUT

IN

IN IN IN OUT OUT

IN

BI BI BI BI

BI BI

OUT OUT OUT OUT

IN

OUT OUT OUT OUT

NC

OUT OUT OUT OUT OUT

IN

OUT OUT

OUT

OUT OUT OUT OUT OUT OUT OUT OUT

NC NC NC NC NC NC NC NC

SYM 20 OF 20 SPARE

RSVD RSVD

RSVD

RSVD RSVD

RSVD

RSVD RSVD RSVD

RSVD

RSVD RSVD RSVD RSVD

NC NC NC

NC NC

GPP_E11/USB2_OC2*

GPP_E10/USB2_OC1*

GPP_E9/USB2_OC0*

GPP_E7/CPU_GP1 GPP_E8/SATALED*

DDI1_AUXP DDI2_AUXN DDI2_AUXP

DDI1_AUXN EDP_DISP_UTIL

EDP_AUXN EDP_AUXP

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(IPU)

(IPU) (IPU)

(IPU) (IPU) (IPU)

(IPU) (IPU)

(IPU)

(IPU) (IPU)

CONNECT TO OPC VRS

(IPU) (IPU)

CFG<4> :eDP ENABLE/DISABLE 1 = DISABLED 0 = ENABLED

6 OF 73

6 OF 500

1.0.0 051-02265

PROC_POPIRCOMPPCH_OPIRCOMP

MLB_RAMCFG4XDP_PCH_OBSDATA_D2

=PP1V_S0SW_CPU_VCCSTG

TP_CPU_AY4TP_CPU_BB5

PCH_JTAGXXDP_PCH_TRST_L

XDP_BPM_L<0>

XDP_BPM_L<3>

TP_CPU_RSVD_BA70TP_CPU_RSVD_BA68

BT_TIMESTAMPBT_PWRRST_L

CPU_PECICPU_PROCHOT_R_L

XDP_PCH_TDIXDP_PCH_TDO

CPU_MSM_LCPU_ZVM_L

XDP_CPU_TDIXDP_CPU_TDOXDP_CPU_TCK

TP_CPU_RSVD_AW70TP_CPU_RSVD_AW71

SKL-ULT-2+3E

OMIT_TABLE

AR56

G65 F65

AY71

AT5 AU5

BB5

BB3 AY4

BB69 BB68

BA70 BA68

AW71 AW70

AK13 AK12

K46 K45

J71 J68

F61 F60

E61

E2 E1

D71

D54

D5 D4

D3 D1

C71

C70 C54 C4

C2

BB4

BB2

BA4 BA3

B70

B69

B3 B2

AY3

AY2 AY1

AW1

AL27 AL25

A69

A52

A4 A3

C64 AP56

E8 E60 F66 E66 F63 E63 G70 H69 G71 H70 G68 F70 G69 F71 C67 D68 C68 E70 D67 D65 B67 E68

U0500

BGA TBD

SKL-ULT-2+3E

OMIT_TABLE

C63 A65 C65

B59 C60 A61 D60 B61

H66 H65

A59

H3 V1

AY5 BA5

D63

C56 B54 D55 C55

DRAWING NUMBER SIZE

D

R

SHEET PAGE TITLE

B

Apple Inc.

OUT BI BI

IN

NC

OUT OUT OUT

NC NC

NC

NC NC

NC

NC NC

NC NC NC NC

NC NC

NC

NC NC

OUT

OUT NC

NC NC

NC NC NC NC NC NC NC NC NC NC NC NC

NC OUT

BI BI

IN OUT IN

IN

IN OUT

BI BI

RESERVED SYM 19 OF 20

RSVD RSVD

RSVD_TP RSVD_TP

RSVD RSVD

VSS VSS

RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD

CFG_RCOMP ITP_PMODE

RSVD RSVD

VSS

RSVD_TP RSVD_TP

PROC_SELECT*

RSVD RSVD

RSVD RSVD TP4

RSVD RSVD

RSVD RSVD RSVD

TP6 TP5

RSVD RSVD RSVD RSVD RSVD

RSVD RSVD RSVD

RSVD RSVD RSVD_TP RSVD_TP RSVD_TP RSVD_TP

PROC_TDI PROC_TCK

PROC_TDO PROC_TMS

PCH_JTAG_TDI PCH_JTAG_TDO PCH_JTAG_TMS

PCH_JTAG_TCK PROC_TRST*

PCH_TRST*

JTAGX

PECI CATERR*

GPP_D21/SPI1_IO2 GPP_B3/CPU_GP2 GPP_E1/SATAXPCIE1/SATAGP1

OPCE_RCOMP OPC_RCOMP

BI BI

BI BI BI BI

Trang 7

7 OF 73

7 OF 500

1.0.0051-02265

SKL-ULT-2+3E

OMIT_TABLE

AT13

AU18 AT18 AR18 AP43

AW42 BA42

BA47 BB46

AR21 AR27 BA26 AY30 AR32 AR38 BA34 AY38 AR22 AR25 AY26 BA30 AT32 AT38 AY34 BA38

AN21 AP21 AP22 AN22 AT21 AU21 AU22 AT22 AP25 AN25 AN27 AP27 AU25 AT25 AT27 AU27 BB25 BA25 BA27 BB27 AW25 AY25 AW27 AY27 BB29 BA29 BA31 BB31 AW29 AY29 AW31 AY31 AP30 AR30 AP33 AR33 AT30 AU30 AU33 AT33 AR37 AP37 AP40 AR40 AU37 AT37 AT40 AU40 BB33 BA33 BA35 BB35 AW33 AY33 AW35 AY35 BB37 BA37 BA39 BB39 AW37 AY37 AW39 AY39

AY42 BB42

AP46 AP45

AN46 AN45

AP53 AN55 AP55 AN56

BA46 AY46 AW46 BA44 AY47 BB44 AW44 AY44 AY43 BA43

AN52 AN53 AN48 AN50 AP52 AP48 BB48 BA48 AP50 AY48

AN43

U0500

BGA TBD

AT43 AT45

BB52 BA50

AR60 AR65 BA60 AY64 AG70 AH65 AT70 AM69 AR61 AR66 AY60 BA64 AG69 AH66 AT69 AM70

AU60 AT60 AP61 AN61 AN60 AP60 AU61 AT61 AU65 AT65 AP66 AN66 AN65 AP65 AU66 AT66 AY59 BA59 AY61 BB61 AW59 BB59 AW61 BA61 BB63 BA63 AY65 BA65 AY63 AW63 AW65 BB65 AH69 AH70 AF69 AF71 AH68 AH71 AF68 AF70 AK66 AK67 AF67 AF66 AK64 AK65 AF64 AF65 AU69 AU70 AR69 AR71 AU68 AU71 AR68 AR70 AN71 AN70 AL69 AL70 AN69 AN68 AL68 AL71

AU43 AU45

AT55 AT53

AU55 AU53

AY56 AW56 BB56 BA56

AY50 BB50 AT50 AT48 AY51 AU52 AU50 AT46 AU48 AU46

AY54 BA55 BA54 AW54 AY55 AW52 AY52 BA52 BB54 BA51

DRAWING NUMBER SIZE

D

R

SHEET PAGE TITLE

B

Apple Inc.

OUT

NC NC

NC

NC NC

OUT OUT

NC NC

OUT OUT OUT OUT

OUT OUT

OUT

BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI

BI BI

BI BI BI

BI BI

BI BI BI

BI BI

BI BI BI BI BI

BI BI

BI BI BI BI BI BI

BI BI

BI BI BI BI BI BI BI BI

OUT

OUT OUT OUT OUT OUT OUT OUT OUT OUT

BI

BI BI

BI BI BI

BI BI

BI BI BI BI OUT

OUT OUT OUT OUT OUT OUT OUT OUT OUT

OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT

BI BI BI BI BI BI BI BI

BI BI

BI BI BI BI BI BI

BI BI

BI BI BI BI BI

BI BI

BI BI BI

BI

BI BI

BI

BI BI

BI BI BI

BI BI

BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI

OUT

OUT OUT

OUT OUT OUT OUT

OUT OUT OUT

BI

BI BI

BI BI BI

BI BI

BI

BI BI

BI

Trang 8

CPU_VCCGTSENSE_NCPU_VCCSASENSE_N

CPU_VCCEOPIOSENSE_NCPU_VCCIOSENSE_N

=PP1V_SUS_PCH_VCCCLK4

VCCPRIM_CORE_VID0VCCPRIM_CORE_VID1

CPU & PCH Power

54

201 MF 1/20W 1%

100

2

1R0828

201 MF 1/20W 1%

56

2

1R0827

201MF1/20W1%

PLACE_NEAR=U0500.E32:50.8MM

100

2 1

R0825

201 MF 1/20W 5%

PLACE_NEAR=U0500.AL63:50.8MM

100

2 1

R0823

201 MF 1/20W 5%

PLACE_NEAR=U0500.AC63:50.8MM

100

2 1

R0821

201 MF 1/20W 5%

PLACE_NEAR=U0500.AK62:50.8MM

100

2 1

R0813

201 MF 1/20W 5%

PLACE_NEAR=U0500.J70:50.8MM

100

2 1

R0811

201 MF 1/20W 5%

PLACE_NEAR=U0500.H20:50.8MM

100

2 1

R0804

201 MF 1/20W 5%

PLACE_NEAR=U0500.AM23:50.8MM

100

2 1

SKL-ULT-2+3E

OMIT_TABLE

T20 T19 AF21 AF20 AJ16

AK17

BB14 AK19

V21 V20 AF19 AF18

V19

AJ21 Y18

T1 P18

AK20

AB20 AB19

AB17

AD15 AF16 T16 Y15 Y16 AG15 AK15

P16 P15 N17 N16 N15 L1 K17

AJ19 AJ17 AD18

AD17

A10 L19 N20 L21 K19 A14 AA1

N18

V15 L15 K15

AN13 AN11

BB10 AL1

U0500

72 54 8

BGA TBD

SKL-ULT-2+3E

AL61 J69

AK62 BB66 BB57 AU63 AU58 AM58 AM56 AM53 AM52 AM50 AM48 AL60 AL56 AL53 AL50 AL46 AL43 AK70 AK60 AK58 AK56 AK55 AK53 AK52 AK50 AK48 AK46 AK45 AK43 AK42

Y62 W71 W70 W69 W68 W67 W66 W65 W64 W63 U71 U68 U65 T62

J70

R71 R70 R69 R68 R67 R66 R65 R64 R63 N71 N70

N69 N67 N66 N64 N63 M62 L71 L70 L69 L68 L67 L66 L65 L64 L63 L62 K60 K58 K56 K55 K53 K52 K50 K48 J60 J58 J56 J55 J53 J52 J50 J48 J46 J45 J43 AC71 AC70 AC69 AC68 AC67 AC66 AC65 AC64 AA71 AA70 AA69 AA67 AA66 AA64 AA63 A66 A62 A58 A53 A48

G20 V62

AC63

P62 AB62

AL63 AG62 AE62

E32

H63 G61

K43 K42 K40 K38 K37 K35 K33 J40 J37 J33 J30 G42 G40 G38 G37 G35 G33 G32

G30 AM38 AM37 AM35 AM33 AM32 AL40 AL37 AL33 AK40 AK38 AK37 AK35 AK33 A44 A39 A34 A30

K32 AK32

SKL-ULT-2+3E

OMIT_TABLE

H21 AM22

AM40 BB51 BB47 BB41 BB32 BB23 AU42 AU35 AU28 AU23

A22 A18

H20

K30 K28 K27 K25 K23 J27 J23 J22 G28 G27 G25 G23 AK25 AK23

AL23

K21 K20

AM23

AM42 AM30 AM28 AL42 AL30 AK30 AK28

DRAWING NUMBER SIZE

D

R

SHEET PAGE TITLE

B

Apple Inc.

IN NC

OUT OUT

OUT

NC

OUT

OUT OUT OUT OUT

CPU POWER 4 SYM 15 OF 20

VCCSRAM_1P0 VCCPRIM_3P3 VCCPRIM_1P0 VCCAPLLEBB_1P0

VCCAMPHYPLL_1P0 VCCAMPHYPLL_1P0

VCCSRAM_1P0 VCCSRAM_1P0 VCCSRAM_1P0 VCCSPI VCCHDA VCCDSW_3P3 VCCDSW_3P3 VCCDSW_3P3 VCCPRIM_1P0 VCCPRIM_1P0 VCCAPLL_1P0 VCCMPHYGT_1P0

VCCPRIM_CORE DCPDSW_1P0 VCCMPHYAON_1P0 VCCMPHYAON_1P0 VCCMPHYGT_1P0 VCCMPHYGT_1P0 VCCMPHYGT_1P0 VCCMPHYGT_1P0

VCCPRIM_CORE

VCCPRIM_1P0 VCCPRIM_1P0 VCCPRIM_1P0 VCCPRIM_CORE VCCPRIM_CORE

VCCPGPPA VCCPGPPB VCCPGPPC VCCPGPPD VCCPGPPE VCCPGPPF VCCPGPPG VCCPRIM_3P3 VCCPRIM_1P0 VCCATS_1P8 VCCRTCPRIM_3P3

VCCRTC VCCRTC DCPRTC VCCCLK1 VCCCLK2 VCCCLK3 VCCCLK4 VCCCLK5 VCCCLK6 GPP_B0/CORE_VID0 GPP_B1/CORE_VID1

OUT

SYM 13 OF 20

VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT

VCCGTX VCCGTX VCCGTX VCCGTX VCCGTX VCCGTX VCCGTX VCCGTX VCCGTX VCCGTX VCCGTX VCCGTX VCCGTX VCCGTX VCCGTX VCCGTX VCCGTX VCCGTX VCCGTX VCCGTX VCCGTX VCCGTX VCCGTX VCCGTX VCCGTX VCCGTX VCCGTX VCCGTX VCCGTX VCCGTX_SENSE VSSGTX_SENSE

VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT

VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT

VCCGT

VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT

VCCGT

VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT

VCCGT VCCGT VCCGT

VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT_SENSE VSSGT_SENSE

OUT

OUT OUT

SYM 12 OF 20 CPU POWER 1

VCCSTG VCC

VCC VCC VCC

VIDSOUT VIDSCK VIDALERT*

VSS_SENSE VCC_SENSE

VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC

VCC

VCC VCC VCC

VCC VCC

VCC VCC VCC VCC VCC VCC VCC VCC VCC

VCC VCC

RSVD RSVD VCCOPC VCCOPC VCCOPC VCC_OPC_1P8

VSSOPC_SENSE VCCEOPIO

VCC_OPC_1P8 VCCOPC_SENSE

VCCEOPIO VCCEOPIO_SENSE VSSEOPIO_SENSE

OUT OUT

BI OUT

SYM 14 OF 20 CPU POWER 3

VCCSA_SENSE VSSSA_SENSE VSSIO_SENSE

VCCIO VCCIO VCCIO VCCIO VCCIO VCCIO VCCIO VCCSA VCCSA VCCSA VCCSA VCCSA VCCSA VCCSA VCCSA VCCSA VCCSA VCCSA VCCSA VCCSA VCCSA VCCIO_SENSE

VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ

VDDQC VCCST

VDDQ VDDQ VDDQ

VCCSTG VCCPLL_OC VCCPLL VCCPLL

Trang 9

9 OF 500

051-022651.0.0

9 OF 73

TP_CPU_NCTFVSS_BB70TP_CPU_NCTFVSS_C1TP_CPU_NCTFVSS_BA71

TP_CPU_NCTFVSS_B71TP_CPU_NCTFVSS_BA1

TP_CPU_NCTFVSS_AV1

TP_CPU_NCTFVSS_A5

TP_CPU_NCTFVSS_A70

CPU & PCH Grounds

SYNC_MASTER=PAULM SYNC_DATE=06/15/2015

BGA TBD

SKL-ULT-2+3E

OMIT_TABLE

Y21 Y20 Y19 Y17

W13 W9 W6

V18 V17 V16 U70 U69 U67 U66 U64 U63 U10 T21

T18 T17 T15

T4 T2

R13 R6

P21 P20 P19 P17 N68 N65

N21 N19 N13 N10

N6

L20 L18

L17 L16 L11

L8 L4 L2

K71 K70 K68 K67 K66 K65 K64 K63 K61 K22 K18 K16

J42 J38 J35 J32 J28 J25 J13 J11

J8

H71 H18 H15 G66 G63 G60

G58 G55 G52

G48 G45 G43 G22 G10

G6 G5

F8

U0500

BGA TBD

SKL-ULT-2+3E

OMIT_TABLE

F68

F42 F40

F38 F37 F35 F33 F32 F28 F27 F23 F22 F13

F4

F2

F1 E71 E65

E56 E53 E50 E46 E21 E18 E15 E11

E6

D69 D66 D62

D58 D53 D48 D47 D45 D44 D39 D34 D30 D26 D25 D22 D18 D14 D11 D10

D6

C25 C5

C1 BB70 BB67 BB64 BB60

BB55 BB43 BB38 BB34 BB30 BB26 BB18

BB6

BA71 BA66 BA62

BA57 BA53 BA49

BA45

BA41

BA36 BA32 BA28 BA23

BA18 BA14 BA10

BA6

BA2

BA1 B71 B66 B62 B58 B53 B48 B44 B39 B34 B30 B22 B18 B14 B10 AY66

AW66 AW64 AW62 AW60

AW57 AW55 AW53 AW51 AW49 AW47 AW45 AW43 AW41 AW38 AW36 AW34 AW32 AW30 AW28 AW26 AW23 AW21 AW18 AW16 AW14 AW12 AW10

AW8 AW6

AV71 AV70 AV69 AV68 AV1 AU38 AU32 AU20 AU15 AU10 AT71 AT68 AT63

U0500

BGA TBD

SKL-ULT-2+3E

OMIT_TABLE

AT58 AT56 AT42

AT35 AT28 AT23 AT20

AT4

AT2

AR63 AR58 AR55 AR53 AR52 AR50

AR48 AR46 AR45 AR43 AR42 AR35 AR28 AR23 AR20 AR16 AR15 AR11

AR8 AR5

AP70 AP68 AP63 AP58 AP42 AP38 AP35 AP32 AP28 AP23 AP20 AP18 AP10 AN63 AN58 AN42 AN40 AN38 AN37 AN35 AN33 AN32 AN30 AN28 AN23 AN20

AM71 AM68 AM61 AM60 AM55 AM46 AM45 AM43 AM27 AM25 AM21 AM13

AM8

AL66 AL65

AL64 AL58 AL55 AL52 AL48 AL45

AL38 AL35 AL32 AL28

AL4

AL2

AK69 AK68 AK63 AK27 AK22 AK21 AK18 AK16 AK11

AK8

AJ20 AJ18 AJ15

AJ4

AH67 AH64 AH63

AH13 AH6

AG71 AG21 AG20 AG19 AG18 AG17 AG16 AF63

AF17 AF15 AF10

AF4 AF2

AF1 AE69 AE68 AE67 AE66 AE65 AE64

AD62 AD21 AD20 AD19 AD16 AD13

AD8

AB21 AB18 AB16 AB15

AB8

AA68 AA65 AA4 AA2 A70 A67 A5

DRAWING NUMBER SIZE

D

R

SHEET PAGE TITLE

B

Apple Inc.

GND 3 SYM 18 OF 20

VSS VSS VSS VSS VSS VSS VSS

VSS VSS

VSS VSS VSS

VSS VSS

VSS VSS VSS

VSS VSS

VSS VSS VSS

VSS VSS

VSS VSS VSS

VSS VSS

VSS

VSS VSS VSS

VSS

VSS VSS VSS

VSS

VSS VSS

VSS VSS VSS VSS VSS

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

VSS VSS

VSS VSS VSS VSS

GND2 SYM 17 OF 20

VSS VSS

VSS VSS VSS VSS

VSS VSS

VSS VSS VSS VSS VSS VSS

VSS VSS

VSS VSS VSS

VSS VSS VSS VSS VSS VSS VSS VSS

VSS VSS

VSS VSS VSS

VSS VSS

VSS VSS VSS

VSS VSS

VSS VSS VSS

VSS VSS

VSS VSS VSS

VSS

VSS VSS VSS

VSS VSS VSS VSS

VSS VSS VSS VSS VSS VSS VSS VSS VSS

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

VSS

VSS VSS VSS VSS VSS

VSS VSS VSS VSS

VSS VSS VSS VSS VSS

VSS

VSS VSS

VSS VSS VSS

VSS VSS

SYM 16 OF 20 GND1

VSS VSS

VSS VSS VSS VSS

VSS VSS

VSS VSS VSS

VSS VSS

VSS VSS VSS

VSS VSS

VSS VSS VSS

VSS VSS

VSS VSS VSS

VSS VSS

VSS VSS VSS

VSS VSS

VSS VSS VSS

VSS VSS

VSS VSS VSS VSS VSS VSS VSS VSS

VSS VSS

VSS VSS VSS VSS

VSS VSS

VSS

VSS VSS VSS

VSS VSS

VSS

VSS VSS VSS

VSS VSS

VSS

VSS VSS

VSS VSS VSS VSS

VSS VSS

VSS

VSS VSS

VSS VSS VSS VSS

VSS VSS VSS

VSS VSS

VSS VSS VSS

VSS VSS VSS VSS VSS

VSS VSS

Trang 10

CPU Core Decoupling

0402 X6S 4V 20%

10UF

CRITICALNOSTUFF

2

1 C1094

0201 X6S-CERM 6.3V 20%

1UF

2

1 C10F3

0201 X6S-CERM 6.3V 20%

1UF

2

1 C10F2

0201 X6S-CERM 6.3V 20%

1UF

2

1 C10F1

0201 X6S-CERM 6.3V 20%

1UF

2

1 C10F0

0402 X6S 4V 20%

1UF

2

1 C10D1

0201 X6S-CERM 6.3V 20%

1UF

2

1 C10D2

0201 X6S-CERM 6.3V 20%

1UF

2

1 C10D3

0402 X6S 4V 20%

1UF

2

1 C10D4

0201 X6S-CERM 6.3V 20%

1UF

2

1 C10D5

0201 X6S-CERM 6.3V 20%

1UF

2

1 C10D6

0402 X6S 4V 20%

10UF

CRITICALNOSTUFF

2

1 C1092

0402 X6S 4V 20%

10UF

CRITICALNOSTUFF

2

1 C1093

0402 X6S 4V 20%

1UF

2

1 C1082

0201 X6S-CERM 6.3V 20%

1UF

2

1 C1083

0201 X6S-CERM 6.3V 20%

1UF

2

1 C1084

0201 X6S-CERM 6.3V 20%

1UF

2

1 C1085

0402 X6S 4V 20%

1UF

2

1 C1071

0402 X6S-CERM 2.5V 20%

1UF

2

1 C1055

0201 X6S-CERM 6.3V 20%

1UF

2

1 C1054

0402 X6S-CERM 2.5V 20%

1UF

2

1 C1053

0201 X6S-CERM 6.3V 20%

1UF

2

1 C1052

0402 X6S 4V 20%

20UF

CRITICALNOSTUFF

2

1 C1010

0201 X6S-CERM 6.3V 20%

1UF

2

1 C100I

0201 X6S-CERM 6.3V 20%

1UF

2

1 C100J

0201 X6S-CERM 6.3V 20%

1UF

2

1 C100K

0201 X6S-CERM 6.3V 20%

1UF

2

1 C100L

0201 X6S-CERM 6.3V 20%

1UF

2

1 C100M

0201 X6S-CERM 6.3V 20%

1UF

2

1 C100N

0201 X6S-CERM 6.3V 20%

1UF

2

1 C100O

0201 X6S-CERM 6.3V 20%

1UF

2

1 C100P

0201 X6S-CERM 6.3V 20%

1UF

2

1 C100Q

0201 X6S-CERM 6.3V 20%

1UF

2

1 C100R

0201 X6S-CERM 6.3V 20%

1UF

2

1 C100S

0201 X6S-CERM 6.3V 20%

1UF

2

1 C100T

0201 X6S-CERM 6.3V 20%

1UF

2

1 C100U

0201 X6S-CERM 6.3V 20%

1UF

2

1 C100V

0201 X6S-CERM 6.3V 20%

1UF

2

1 C100W

0201 X6S-CERM 6.3V 20%

1UF

2

1 C100X

0201 X6S-CERM 6.3V 20%

1UF

2

1 C100Y

0201 X6S-CERM 6.3V 20%

1UF

2

1 C100C

0201 X6S-CERM 6.3V 20%

1UF

2

1 C100D

0201 X6S-CERM 6.3V 20%

1UF

2

1 C100E

0201 X6S-CERM 6.3V 20%

1UF

2

1 C100F

0201 X6S-CERM 6.3V 20%

1UF

2

1 C100G

0201 X6S-CERM 6.3V 20%

1UF

2

1 C100H

0201 X6S-CERM 6.3V 20%

1UF

2

1 C1006

0201 X6S-CERM 6.3V 20%

1UF

2

1 C1007

0201 X6S-CERM 6.3V 20%

1UF

2

1 C1008

0201 X6S-CERM 6.3V 20%

1UF

2

1 C1009

0201 X6S-CERM 6.3V 20%

1UF

2

1 C100A

0201 X6S-CERM 6.3V 20%

1UF

2

1 C100B

0201 X6S-CERM 6.3V 20%

1UF

2

1 C1005

0201 X6S-CERM 6.3V 20%

1UF

2

1 C1004

0201 X6S-CERM 6.3V 20%

1UF

2

1 C1003

0201 X6S-CERM 6.3V 20%

1UF

2

1 C1002

0201 X6S-CERM 6.3V 20%

1UF

2

1 C1001

0201 X6S-CERM 6.3V 20%

1UF

2

1 C1000

0402 X6S-CERM 2.5V 20%

20UF

CRITICALNOSTUFF

2

1 C10CA

0402 X6S-CERM 2.5V 20%

20UF

CRITICALNOSTUFF

2

1 C10BA

0402 X6S-CERM 2.5V 20%

20UF

CRITICALNOSTUFF

2

1 C10C6

0402 X6S-CERM 2.5V 20%

20UF

CRITICALNOSTUFF

2

1 C10B6

0402 X6S-CERM 2.5V 20%

20UF

CRITICALNOSTUFF

2

1 C10C7

0402 X6S-CERM 2.5V 20%

20UF

CRITICALNOSTUFF

2

1 C10B7

0402 X6S-CERM 2.5V 20%

20UF

CRITICALNOSTUFF

2

1 C10C8

0402 X6S-CERM 2.5V 20%

20UF

CRITICALNOSTUFF

2

1 C10B8

0402 X6S-CERM 2.5V 20%

20UF

CRITICALNOSTUFF

2

1 C10C9

0402 X6S-CERM 2.5V 20%

20UF

CRITICALNOSTUFF

2

1 C10B9

0402 X6S-CERM 2.5V 20%

20UF

CRITICALNOSTUFF

2

1 C101A

0402 X6S-CERM 2.5V 20%

20UF

CRITICALNOSTUFF

2

1 C101B

0402 X6S-CERM 2.5V 20%

220UF

CRITICALNOSTUFF

3 2

1C10H1

SM-COMBO ELEC 2V 20%

20UF

CRITICALNOSTUFF

2

1 C10C1

0402 X6S-CERM 2.5V 20%

20UF

CRITICALNOSTUFF

2

1 C10C2

0402 X6S-CERM 2.5V 20%

20UF

CRITICALNOSTUFF

2

1 C10C4

0402 X6S-CERM 2.5V 20%

20UF

CRITICALNOSTUFF

2

1 C10B5

0402 X6S-CERM 2.5V 20%

20UF

CRITICALNOSTUFF

2

1 C10B3

0402 X6S-CERM 2.5V 20%

20UF

CRITICALNOSTUFF

2

1 C10B2

0402 X6S-CERM 2.5V 20%

20UF

CRITICALNOSTUFF

2

1 C10B1

0201 X6S-CERM 6.3V 20%

1UF

2

1 C10A0

0201 X6S-CERM 6.3V 20%

1UF

2

1 C10A1

0201 X6S-CERM 6.3V 20%

1UF

2

1 C10A2

0201 X6S-CERM 6.3V 20%

1UF

2

1 C10A3

0201 X6S-CERM 6.3V 20%

1UF

2

1 C10A4

0201 X6S-CERM 6.3V 20%

1UF

2

1 C10A5

0201 X6S-CERM 6.3V 20%

1UF

2

1 C10A6

0402 X6S-CERM 2.5V 20%

20UF

CRITICALNOSTUFF

2

1 C10B0

0402 X6S-CERM 2.5V 20%

20UF

CRITICALNOSTUFF

2

1 C1021

0402 X6S-CERM 2.5V 20%

20UF

CRITICALNOSTUFF

2

1 C1023

0402 X6S-CERM 2.5V 20%

20UF

CRITICALNOSTUFF

2

1 C1027

0402 X6S-CERM 2.5V 20%

20UF

CRITICALNOSTUFF

2

1 C1026

0402 X6S-CERM 2.5V 20%

20UF

CRITICALNOSTUFF

2

1 C1015

0402 X6S-CERM 2.5V 20%

20UF

CRITICALNOSTUFF

2

1 C1016

0402 X6S-CERM 2.5V 20%

20UF

CRITICALNOSTUFF

2

1 C1017

0402 X6S-CERM 2.5V 20%

20UF

CRITICALNOSTUFF

2

1 C1018

0402 X6S-CERM 2.5V 20%

20UF

CRITICALNOSTUFF

2

1 C1019

0402 X6S-CERM 2.5V 20%

20UF

CRITICALNOSTUFF

2

1 C1014

0402 X6S-CERM 2.5V 20%

20UF

CRITICALNOSTUFF

2

1 C1013

0402 X6S-CERM 2.5V 20%

20UF

CRITICALNOSTUFF

2

1 C1012

0402 X6S-CERM 2.5V 20%

20UF

CRITICALNOSTUFF

2

1 C1011

10UF

CRITICALNOSTUFF

DRAWING NUMBER SIZE

D

R

SHEET PAGE TITLE

B

Apple Inc.

Trang 11

1UF

2

1 C110L

0201 X6S-CERM 6.3V 20%

1UF

2

1 C110K

0201 X6S-CERM 6.3V 20%

1UF

2

1 C1105

X6S-CERM 0201 6.3V 20%

1UF

2

1 C110J

0201 X6S-CERM 6.3V 20%

1UF

2

1 C1104

0201 X6S-CERM 6.3V 20%

1UF

2

1 C110I

0201 X6S-CERM 6.3V 20%

1UF

2

1 C1103

0201 X6S-CERM 6.3V 20%

1UF

2

1 C110H

0201 X6S-CERM 6.3V 20%

1UF

2

1 C1102

0201 X6S-CERM 6.3V 20%

1UF

2

1 C110G

0201 X6S-CERM 6.3V 20%

1UF

2

1 C1101

0201 X6S-CERM 6.3V 20%

1UF

2

1 C110F

0201 X6S-CERM 6.3V 20%

1UF

2

1 C1100

0201 X6S-CERM 6.3V 20%

1UF

2

1 C110E

20UF

CRITICALNOSTUFF

2

1 C1157

0402 X6S-CERM 2.5V 20%

20UF

CRITICALNOSTUFF

2

1 C1156

0402 X6S-CERM 2.5V 20%

20UF

CRITICALNOSTUFF

2

1 C1194

0402 X6S-CERM 2.5V 20%

20UF

CRITICALNOSTUFF

2

1 C1195

0402 X6S-CERM 2.5V 20%

20UF

CRITICALNOSTUFF

2

1 C1196

0402 X6S-CERM 2.5V 20%

20UF

CRITICALNOSTUFF

2

1 C1197

0402 X6S-CERM 2.5V 20%

20UF

CRITICALNOSTUFF

2

1 C1198

0402 X6S-CERM 2.5V 20%

20UF

CRITICALNOSTUFF

2

1 C1154

0402 X6S-CERM 2.5V 20%

20UF

CRITICALNOSTUFF

2

1 C1199

0402 X6S-CERM 2.5V 20%

20UF

CRITICALNOSTUFF

2

1 C1155

0402 X6S-CERM 2.5V 20%

20UF

CRITICALNOSTUFF

2

1 C1140

0402 X6S-CERM 2.5V 20%

20UF

CRITICALNOSTUFF

2

1 C1141

0402 X6S-CERM 2.5V 20%

20UF

CRITICALNOSTUFF

2

1 C1132

0402 X6S-CERM 2.5V 20%

20UF

CRITICALNOSTUFF

2

1 C1133

0402 X6S-CERM 2.5V 20%

20UF

CRITICALNOSTUFF

2

1 C1144

0402 X6S-CERM 2.5V 20%

20UF

CRITICALNOSTUFF

2

1 C1134

0402 X6S-CERM 2.5V 20%

20UF

CRITICALNOSTUFF

2

1 C1145

0402 X6S-CERM 2.5V 20%

20UF

CRITICALNOSTUFF

2

1 C1135

0402 X6S-CERM 2.5V 20%

20UF

CRITICALNOSTUFF

2

1 C1138

0402 X6S-CERM 2.5V 20%

20UF

CRITICALNOSTUFF

2

1 C1139

220UF

CRITICALNOSTUFF

3 2

1C1164

20UF

CRITICALNOSTUFF

2

1 C1180

0402 X6S-CERM 2.5V 20%

20UF

CRITICALNOSTUFF

2

1 C1181

0402 X6S-CERM 2.5V 20%

20UF

CRITICALNOSTUFF

2

1 C1182

0402 X6S-CERM 2.5V 20%

20UF

CRITICALNOSTUFF

2

1 C1183

0402 X6S-CERM 2.5V 20%

20UF

CRITICALNOSTUFF

2

1 C1184

0402 X6S-CERM 2.5V 20%

20UF

CRITICALNOSTUFF

2

1 C1185

0402 X6S-CERM 2.5V 20%

20UF

CRITICALNOSTUFF

2

1 C1177

0402 X6S-CERM 2.5V 20%

20UF

CRITICALNOSTUFF

2

1 C1176

0402 X6S-CERM 2.5V 20%

20UF

CRITICALNOSTUFF

2

1 C1175

0402 X6S-CERM 2.5V 20%

20UF

CRITICALNOSTUFF

2

1 C1174

0402 X6S-CERM 2.5V 20%

20UF

CRITICALNOSTUFF

2

1 C1120

0402 X6S-CERM 2.5V 20%

20UF

CRITICALNOSTUFF

2

1 C1121

0402 X6S-CERM 2.5V 20%

20UF

CRITICALNOSTUFF

2

1 C1122

0402 X6S-CERM 2.5V 20%

20UF

CRITICALNOSTUFF

2

1 C1124

0402 X6S-CERM 2.5V 20%

20UF

CRITICALNOSTUFF

2

1 C1129

0402 X6S-CERM 2.5V 20%

20UF

CRITICALNOSTUFF

2

1 C1128

0402 X6S-CERM 2.5V 20%

20UF

CRITICALNOSTUFF

2

1 C1127

0402 X6S-CERM 2.5V 20%

20UF

CRITICALNOSTUFF

2

1 C1126

0402 X6S-CERM 2.5V 20%

20UF

CRITICALNOSTUFF

2

1 C1125

0402 X6S-CERM 2.5V 20%

20UF

CRITICALNOSTUFF

2

1 C1115

0402 X6S-CERM 2.5V 20%

20UF

CRITICALNOSTUFF

2

1 C1117

0402 X6S-CERM 2.5V 20%

20UF

CRITICALNOSTUFF

2

1 C1118

0402 X6S-CERM 2.5V 20%

20UF

CRITICALNOSTUFF

2

1 C1119

0402 X6S-CERM 2.5V 20%

20UF

CRITICALNOSTUFF

2

1 C1114

0402 X6S-CERM 2.5V 20%

20UF

CRITICALNOSTUFF

2

1 C1113

0402 X6S-CERM 2.5V 20%

20UF

CRITICALNOSTUFF

2

1 C1112

0402 X6S-CERM 2.5V 20%

20UF

CRITICALNOSTUFF

2

1 C1111

0402 X6S-CERM 2.5V 20%

20UF

CRITICALNOSTUFF

2

1 C1110

220UF

CRITICALNOSTUFF

3 2

1C1190

CRITICAL

220UF

3 2

1C1163

1UF

2

1 C110V

0201 X6S-CERM 6.3V 20%

1UF

2

1 C110W

0201 X6S-CERM 6.3V 20%

1UF

2

1 C110X

0201 X6S-CERM 6.3V 20%

1UF

2

1 C110U

0201 X6S-CERM 6.3V 20%

1UF

2

1 C110T

0201 X6S-CERM 6.3V 20%

1UF

2

1 C110S

0201 X6S-CERM 6.3V 20%

1UF

2

1 C110D

0201 X6S-CERM 6.3V 20%

1UF

2

1 C110C

0201 X6S-CERM 6.3V 20%

1UF

2

1 C110R

0201 X6S-CERM 6.3V 20%

1UF

2

1 C110Q

0201 X6S-CERM 6.3V 20%

1UF

2

1 C110B

0201 X6S-CERM 6.3V 20%

1UF

2

1 C110A

0201 X6S-CERM 6.3V 20%

1UF

2

1 C110P

0201 X6S-CERM 6.3V 20%

1UF

2

1 C110O

0201 X6S-CERM 6.3V 20%

1UF

2

1 C1109

0201 X6S-CERM 6.3V 20%

1UF

2

1 C1108

0201 X6S-CERM 6.3V 20%

1UF

2

1 C110N

0201 X6S-CERM 6.3V 20%

1UF

2

1 C110M

0201 X6S-CERM 6.3V 20%

1UF

2

1 C1107

0201 X6S-CERM 6.3V 20%

DRAWING NUMBER SIZE

D

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B

Apple Inc.

Trang 12

PCH SIDE RAIL SIDE

FOR FUTURE PRODUCT PER PDG

CPU CIRCUITS GENERATE NOISE AT WIFI BAND FREQUENCIES.

USE SPECIFIC 3PF CAPS FOR BEST FILTERING OF THOSE FREQUNCIES.

12 OF 73

12 OF 500

1.0.0051-02265

PCH Decoupling

0201 X7R 25V BYPASS=U0500.AK20::10MM

1000PF

2

1 C1208

0201 C0G-CERM 25V +/-0.05PF

12PF

2

1 C1264

0201 C0G-CERM 25V +/-0.05PF

1

R1261

0201X7R25V

1

R1260

0201X7R25V 10%

0

NOSTUFF

2 1

R1251

0201 X6S-CERM 6.3V

L1254

0805 POLY-TANT 6.3V 20%

47UF

CRITICALNOSTUFF

L1253

0805 POLY-TANT 6.3V 20%

47UF

CRITICALNOSTUFF

L1252

0805 POLY-TANT 6.3V 20%

47UF

CRITICALNOSTUFF

2

1C1252

0805 POLY-TANT 6.3V 20% BYPASS=U0500.K15::3MM

47UF

CRITICALNOSTUFF

L1250

0201 X6S-CERM 6.3V

20%

BYPASS=U0500.N15::10MM

47UF

CRITICALNOSTUFF

2

1C1203

0201 X6S-CERM 6.3V

1UF

2

1 C1204

0201 X6S-CERM 6.3V

DRAWING NUMBER SIZE

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Apple Inc.

Trang 13

(STRAP)

PCH INTERNAL PULL-UPS ARE TO 3.3V.

IO1 IO0

(STRAP)

(STRAP) (STRAP)

(1.8V)

(STRAP)

(BSSB_DATA_IN)

MEMORY CONFIGURATION STRAPS.

ALL GPP_F* PINS ARE 1.8V ONLY!

13 OF 73

13 OF 500

1.0.0 051-02265

SOC_ALS_UART_D2R

PCH_BSSB_CLK

MLB_RAMCFG3

PCH_UART2_CTS_LLCD_PSR_EN

TBT_X_CIO_PWR_EN

HDA_SDOUT

HDA_BIT_CLKHDA_SYNC

HDA_RST_L

LPC_SERIRQ

TP_SPI_CS2_LSPI_IO<3>

SPI_CLK_R

PU_PCH_RCIN_L

=USBC_TMS_T_SWD_DATA_X

TP_SPI_CS1_LSPI_CS0_R_LSPI_MISO

PCH_DDPC_CTRLDATAMLB_RAMCFG0

PCH_BSSB_DATA

MLB_RAMCFG3MLB_RAMCFG2MLB_RAMCFG1

PCH_DDPB_CTRLDATA

PCH_STRP_TOPBLK_SWP_L

CAMERA_PWR_EN_PCHCAMERA_RESET_L

SOC_ALS_UART_D2R

SOC_ALS_UART_R2D

SOC_ALS_UART_R2DPCH_UART2_CTS_L

PCH_SOC_WDOGSD_RCOMP

PCH_STRP_BSSB_SEL_GPIO

TP_PCH_STRP_TLSCONF

TP_PCH_STRP_ESPI

SMBUS_PCH_CLKSMBUS_PCH_DATA

SML_PCH_0_CLKSML_PCH_0_DATA

LPC_PWRDWN_L

TP_PCH_CLKOUT_LPC1LPC_CLKRUN_L

LCD_PSR_EN

MLB_RAMCFG4MLB_RAMCFG0SPI_MOSI_R

=USBC_TMS_T_SWD_DATA_X

TBT_X_CIO_PWR_EN

SOC_S2R_ACK_LPCH_SOC_DFU_STATUS

=PP3V3_SUS_PCH_VCCSPI

LPC_CLKRUN_LPU_PCH_RCIN_L

RAMCFG4_L,RAMCFG3_L,RAMCFG2_L,RAMCFG1_L,RAMCFG0_LRAMCFG_SLOT

1/20W 5%

R1344

201 MF

1/20W 5%

PLACE_NEAR=U0500.AW9:38MM

201 MF

1/20W 5%

R1342

201 MF

1/20W 5%

R1359

201 MF

1/20W 5%

R1358

201 MF

1/20W 5%

R1356

201 MF

1/20W 5%

R1357

201 MF

1/20W 5%

R1320

201 MF

1/20W 5%

R1322 33 1 2 5% 1/20W MF 201

R1321

201 MF

1/20W 5%

SKL-ULT-2+3E

OMIT_TABLE

AV3 AW3

AU4 AW2

AU1 AU2 AU3 AV2

U4 U3 AD4 AD3 AD2

AD1

V3 W3 W1 W2 R9 R10 R8 R7

AM7

BA11

AY9 AW9 AW11 AY11

BA12 AY12 BB13 BA13 AY13

AW13 G1 G2 G3

1/20W 5%

PLACE_NEAR=U0500.AY22:14MM

R1301

201 MF

1/20W 5%

PLACE_NEAR=U0500.AW22:14MM

R1303

201 MF

1/20W 5%

SKL-ULT-2+3E

OMIT_TABLE

AB7

AW20 AY20

BA22 BB22 AY21 BA21 AW22 AY22

AB13 AB11 AF13 AM3 AM2 AM1 AM4 AN2

AN1

N8 N7

L12 L13 D8

U2 U1

P1 P4

AW5

BA9 BB9

DRAWING NUMBER SIZE

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B

OUT

IN

BI OUT

IN

IN OUT OUT

OUT OUT OUT OUT

IN OUT

NC NC NC

IN IN

OUT BI BI BI BI OUT

OUT

BI OUT

OUT BI BI BI BI

GPP_B23/SML1ALERT*/PCHHOT*

GPP_A4/LAD3/ESPI_IO3 GPP_A5/LFRAME*/ESPI_CS*

GPP_A3/LAD2/ESPI_IO2

GPP_A1/LAD0/ESPI_IO0 GPP_A2/LAD1/ESPI_IO1

GPP_C6/SML1CLK GPP_C7/SML1DATA GPP_C5/SML0ALERT*

GPP_C3/SML0CLK GPP_C4/SML0DATA

GPP_C0/SMBCLK GPP_C1/SMBDATA GPP_C2/SMBALERT*

GPP_A8/CLKRUN*

GPP_A10/CLKOUT_LPC1

SPI0_CS0*

SPI0_MISO SPI0_CLK

SPI0_MOSI SPI0_IO2 SPI0_IO3 SPI0_CS1*

CL_CLK

SPI0_CS2*

GPP_C21/UART2_TXD

GPP_C20/UART2_RXD GPP_D16/ISH_UART0_CTS*/

GPP_C22/UART2_RTS*

GPP_C23/UART2_CTS*

GPP_D15/ISH_UART0_RTS*

CL_DATA CL_RST*

GPP_A0/RCIN*

GPP_A6/SERIRQ

IN BI OUT IN

NC NC

OUT

NC IN

OUT

OUT OUT

AUDIO

SML0BDATA/I2C4B_SDA SML0BCLK/I2C4B_SCL

SDIO/SDXC SYM 7 OF 20

SD_RCOMP GPP_F17/EMMC_DATA4

GPP_A16/SD_1P8_SEL GPP_A17/SD_PWR_EN*/ISH_GP7

GPP_G0/SD_CMD GPP_G1/SD_DATA0

GPP_F22/EMMC_CLK

GPP_F23

GPP_F19/EMMC_DATA6 GPP_F21/EMMC_RCLK GPP_F20/EMMC_DATA7

GPP_F18/EMMC_DATA5 HDA_SDI1/I2S1_RXD

HDA_SDI0/I2S0_RXD HDA_SDO/I2S0_TXD HDA_BLK/I2S0_SCLK HDA_SYNC/I2S0_SFRM

I2S1_TXD I2S1_SFRM GPP_D17/DMIC_CLK1

GPP_E21/DDPC_CTRLDATA GPP_E18/DDPB_CTRLCLK

HDA_RST*/I2S1_SCLK

GPP_E19/DDPB_CTRLDATA GPP_E20/DDPC_CTRLCLK

GPP_D11 GPP_D12 GPP_B14/SPKR GPP_D13/ISH_UART0_RXD/

GPP_D14/ISH_UART0_TXD/

Trang 14

NOTE: PM_SLP_S0_L HAS INTERNAL PULL-UP BEFORE RSMRST_L IS RELEASED.

THE SIGNAL IS DRIVEN HI AFTER RSMRST_L IS RELEASED.

R1400 kept for debug purposes.

PCH_SWD_CLK

SSD_SR_EN_L

PCIE_WAKE_LPCH_PWRBTN_L

PM_SLP_SUS_L

=PP1V_S3_CPU_VCCST

TP_PCH_GPP_F9TP_PCH_GPP_D0SMC_WAKE_SCI_L

SSD_BOOT_L

EMMC_RCOMP

SSD_SR_EN_LTP_PCH_SLP_A_L

PM_SLP_S3_LPM_SLP_S0_L

PCH_PWRBTN_L

PM_BATLOW_LTP_CPU_PWRGD

PM_SLP_S0_L

TP_PCH_GPD7

PCH_HSIO_PWR_ENTP_PCH_LANPHYPC

UPC_I2C_INT_LSOC_S2R_L

CSI2_COMP

TP_PCH_GPP_F10

PCH_SWD_CLKPCH_SWD_IOPCH_BT_ROM_BOOT

PM_RSMRST_LPM_SYSRST_L

PLT_RST_L

PM_SLP_S5_LPM_BATLOW_L

SSD_BOOT_LPCH_SWD_MUX_SEL

PCH Power Management

41

BGA TBD

SKL-ULT-2+3E

OMIT_TABLE

AN3 AP3 AP1 AP2 AP4 AD12 AD11 AF12 AF11 AH12

AH11 M1

AT1 D27

B27 D28 B29 B33 B31 D33 D31 B38 D36 D38 B36

C27 A27 C28 A29 A33 A31 C33 C31 A38 C36 C38 A36

E13 A26 D29 D32 D37

B26 C29 C32 C37

U0500

BGA TBD

SKL-ULT-2+3E

OMIT_TABLE

BB15

B65 B5

B6

AN15 AW15

AY17 A68

AP11 AR13

BA15

AM15

AY15 AU13 BB20

U0500

201 MF 1/20W 5%

2.2K

2

1R1408

201 MF

1/20W 5%

R1446

100K

201 MF

1/20W 5%

2 1

R1445

100K

5% 1/20W MF 201 2

1

R1444NOSTUFF 100K

201 5% 1/20W MF

2 1

R1443

201 MF

1/20W 5%

R1442

MF 201 1/20W

5%

R1458

MF 201 1/20W

5%

R1456

201 MF

1/20W 5%

R1457

MF 201 1/20W

5%

R1454

201 MF

1/20W 5%

R1455

201 MF

1/20W 5%

R1452 10K 5% 1/20W MF 201

2 1

DRAWING NUMBER SIZE

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Apple Inc.

IN

EMMC

CSI-2 SYM 9 OF 20

CSI2_COMP GPP_D0/SPI1_CS*

GPP_F7/I2C3_SCL

CSI2_DN8

CSI2_DP11 CSI2_DN11 CSI2_DP10 CSI2_DN10 CSI2_DP9 CSI2_DN9 CSI2_DP8

CSI2_DP7 CSI2_DN7 CSI2_DP6 CSI2_DN6 CSI2_DP5 CSI2_DN5 CSI2_DP4 CSI2_DN4 CSI2_DP3 CSI2_DN3 CSI2_DP2

CSI2_DN0 CSI2_DP0 CSI2_DN1 CSI2_DP1 CSI2_DN2

EMMC_RCOMP

GPP_F11/I2C5_SCL/ISH_I2C2_SCL

GPP_F12/EMMC_CMD GPP_F13/EMMC_DATA0 GPP_F14/EMMC_DATA1 GPP_F15/EMMC_DATA2 GPP_F16/EMMC_DATA3 GPP_F6/I2C3_SDA GPP_F10/I2C5_SDA/ISH_I2C2_SDA

CSI2_CLKN3 CSI2_CLKP3

CSI2_CLKP2 CSI2_CLKN2

CSI2_CLKN0 CSI2_CLKP0 CSI2_CLKP1 CSI2_CLKN1

GPP_F8/I2C4_SDA GPP_F9/I2C4_SCL

SYSTEM POWER MANAGEMENT SYM 11 OF 20

DSW_PWROK PCH_PWROK

OUT

OUT OUT

BI OUT OUT

IN OUT

NC

OUT IN

NC NC

NC NC NC NC NC NC

NC NC

NC NC NC NC

NC NC NC NC NC NC NC

NC

NC NC NC NC NC NC NC NC

IN OUT

OUT OUT OUT OUT

IN IN

IN

OUT IN

IN

IN IN

OUT

Trang 15

EXT B (LS/FS/HS)

ANY CLKREQ CAN MAP TO ANY CLK.

ANY CLKREQ OR CLK CAN MAP TO ANY PCIE PORT.

UNUSED CLKREQS AND CLKS SHOULD BE DISABLED.

PCIe Port Assignments:

PER SKYLAKE PDG, SKYLAKE PCH EDS.

EXT A (LS/FS/HS)

EXT B (SS)

SSD LANE 3 SSD LANE 1

AirPort

CAMERA

SSD LANE 2 SSD LANE 0

Thunderbolt X lane 2

15 OF 73

15 OF 500

1.0.0 051-02265

USB_EXTA_NUSB_EXTA_P

USB3_EXTB_R2D_C_P

TP_USB3_03_R2DPTP_USB3_04_D2RNTP_USB3_04_D2RP

NC_USB2_07P

NC_USB2_09P

NC_USB2_06PNC_USB2_06N

PCH_DIFFCLK_BIASREF

PCH_SRTCRST_LRTC_RESET_L

USB_CAMERA_DFR_N

NC_USB2_05N

TP_USB3_03_D2RNTP_USB3_03_D2RP

=PP1V_SUS_PCH_VCCAPLL

PCIE_TBT_X_R2D_C_N<0>

PCIE_TBT_X_R2D_C_P<0>

PCIE_AP_D2R_PPCIE_AP_D2R_N

PCIE_TBT_X_D2R_P<3>

PCIE_TBT_X_D2R_N<3>

PCIE_TBT_X_R2D_C_P<2>

XDP_PCH_OBSDATA_D0XDP_PCH_OBSDATA_D1

XDP_PCH_OBSDATA_C3XDP_PCH_OBSDATA_D3

=CAMERA_CLKREQ_LPCIE_CLK100M_CAMERA_P

XDP_PCH_OBSDATA_C2

USB_CAMERA_DFR_P

TP_USB_TESTERP

NC_USB2_05PUSB_EXTB_P

USB3_EXTA_D2R_NUSB3_EXTA_D2R_PUSB3_EXTA_R2D_C_NUSB3_EXTA_R2D_C_P

USB3_EXTB_R2D_C_N

TP_USB3_03_R2DN

PCIE_TBT_X_R2D_C_N<2>

=AP_CLKREQ_LPCIE_CLK100M_AP_P

=TBT_T_CLKREQ_LPCIE_CLK100M_TBT_T_P

=SSD_CLKREQ_L

PCIE_CLK100M_TBT_X_P

XDP_JTAG_ISP_TDIXDP_JTAG_ISP_TCK

PCIE_CAMERA_D2R_N

PCIE_CAMERA_R2D_C_P

PCH_CLK24M_XTALIN

PCH_CLK32K_RTCX2PCH_CLK32K_RTCX1

XDP_CPU_PREQ_LSMC_RUNTIME_SCI_LPCIE_TBT_T_D2R_N<0>

1/20W 5%

SKL-ULT-2+3E

OMIT_TABLE

E35 E37

E42

AN18 AM20 AM18

AM16

AU7 AU8 AT10 AT8 AT7 AR10

BA17

E38 A40 C40 C41 A42 C42

E40 B40 D40 D41 B42 D42

E43 F43

U0500

201 MF 1/20W 1%

20K

2

1R1531

201MF1/20W1%

1UF

2

1 C1531

0201 X6S-CERM6.3V20%

SKL-ULT-2+3E

D15 C15 F10 E10 A15 B15 H10 J10 A13 B13 H6 J6 D13 C13 G8 H8

AH8 AG2 AF9 AH2 AF7 AJ2 AD10 AJ3 AD7 AB10

AH7 AG1 AF8 AH1 AF6 AJ1 AD9 AH3 AD6 AB9

AG4 AG3 AB6

D61 D56 E5 F5

B25 A25 F30 E30 C24 D24 E27 E28

C23 D23 E25 F25 A23 B23 E23 E22 C21 D21 F21 G21 A21 B21 E20 F20 C20 D20 F18 G18 D19 C19 E16 F16 A19 B19 F15 G15 C17 D17 G16 H16 C16 D16 F11 G11 A17 B17 G13 H13

J3 J2 J1 A6

G4

H2 J5 V2

D7 H5 C8 BB11

DRAWING NUMBER SIZE

D

R

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B

IN IN

OUT OUT

IN IN

OUT OUT IN IN OUT OUT IN IN

OUT OUT

IN IN OUT OUT IN IN

OUT IN OUT

OUT IN OUT IN OUT OUT

IN

OUT OUT

OUT IN OUT

IN IN IN IN IN IN

IN IN IN IN

OUT

IN OUT IN

OUT OUT

IN IN

OUT OUT

IN IN OUT

IN OUT IN

OUT OUT

IN IN OUT

IN OUT IN

IN

BI BI

SYM 10 OF 20 CLOCK SIGNALS

CLKOUT_PCIE_P5 GPP_B10/SRCCLKREQ5*

CLKOUT_PCIE_N5

GPP_B8/SRCCLKREQ3*

CLKOUT_PCIE_N4

CLKOUT_PCIE_P3 CLKOUT_PCIE_N3

GPP_B6/SRCCLKREQ1*

CLKOUT_PCIE_N2

CLKOUT_PCIE_N1 CLKOUT_PCIE_P1

CLKOUT_PCIE_N0 GPP_B5/SRCCLKREQ0*

CLKOUT_PCIE_P0

CLKOUT_ITPXDP_N

GPD8/SUSCLK CLKOUT_ITPXDP_P

XTAL24_OUT XTAL24_IN

BI BI

OUT IN IN

OUT

OUT OUT IN IN

IN OUT

PCIE1_RXP/USB3_5_RXP PCIE1_TXN/USB3_5_TXN PCIE1_TXP/USB3_5_TXP PCIE2_RXN/USB3_6_RXN

USB2N_2 USB2P_2 PCIE5_RXN

GPP_E2/SATAXPCIE2/SATAGP2

GPP_D20/DMIC_DATA0

GPP_D18/DMIC_DATA1 GPP_D19/DMIC_CLK0

GPP_E0/SATAXPCIE0/SATAGP0

GPP_D23/I2S_MCLK

GPP_E6/DEVSLP2 GPP_D22/SPI1_IO3

GPP_E4/DEVSLP0 GPP_E3/CPU_GP0 GPP_E5/DEVSLP1

USB2_ID USB2_VBUSSENSE USB2_COMP USB2P_10

USB2P_9 USB2N_10

USB2N_9 USB2P_8

USB2P_7 USB2N_8

USB2N_7 USB2P_6

USB2P_5 USB2N_6

USB2N_5 USB2P_4

USB2P_3 USB2N_4 USB2N_3

USB2P_1 USB2N_1 USB3_4_TXP USB3_4_TXN

USB3_4_RXN USB3_4_RXP

USB3_1_TXP USB3_1_TXN USB3_1_RXP

USB3_1_RXN PCIE1_RXN/USB3_5_RXN

PCIE3_RXP PCIE3_RXN

PCIE4_RXP PCIE4_RXN

PCIE3_TXN PCIE3_TXP

PCIE2_TXP/USB3_6_TXP PCIE2_TXN/USB3_6_TXN PCIE2_RXP/USB3_6_RXP

PCIE4_TXN

PCIE5_RXP PCIE4_TXP

PCIE7_RXN/SATA0_RXN PCIE7_RXP/SATA0_RXP PCIE7_TXN/SATA0_TXN PCIE7_TXP/SATA0_TXP PCIE8_RXN/SATA1A_RXN PCIE8_RXP/SATA1A_RXP PCIE8_TXN/SATA1A_TXN PCIE8_TXP/SATA1A_TXP PCIE9_RXN

PCIE9_RXP PCIE9_TXN PCIE9_TXP PCIE10_RXN PCIE10_RXP PCIE10_TXN PCIE10_TXP PCIE_RCOMPN PCIE_RCOMPP PROC_PRDY*

PROC_PREQ*

GPP_A7/PIRQA*

PCIE12_RXP/SATA2_RXP PCIE12_RXN/SATA2_RXN PCIE11_TXP/SATA1B_TXP

PCIE11_RXN/SATA1B_RXN PCIE11_RXP/SATA1B_RXP PCIE11_TXN/SATA1B_TXN

PCIE12_TXP/SATA2_TXP PCIE12_TXN/SATA2_TXN

PCIE5_TXP PCIE5_TXN

USB3_2_RXN/SSIC_RXN USB3_2_RXP/SSIC_RXP USB3_2_TXN/SSIC_TXN USB3_2_TXP/SSIC_TXP

USB3_3_RXN USB3_3_RXP USB3_3_TXN USB3_3_TXP

Trang 16

TPAD_SPI_CS_LTPAD_SPI_CLKTPAD_SPI_MISOTPAD_SPI_MOSI

AUD_SPI_MISOAUD_SPI_CS_L

MLB_BOARD_ID4

LCD_IRQ_L

PCH_BT_UART_CTS_LSPIROM_USE_MLB

SOC_UART_CTS_L

TP_BT_I2S_SYNC

TBT_T_PLUG_EVENT_LTBT_POC_RESET

SOC_UART_R2DSOC_UART_D2RTBT_T_PLUG_EVENT_LTBT_X_PLUG_EVENT_LPCH_BT_UART_D2RAUD_SPI_MOSI

AUD_SPI_CS_L

AUD_SPI_MOSI

TPAD_SPI_MOSITPAD_SPI_INT_L

TBT_X_PLUG_EVENT_LLCD_IRQ_L

SOC_UART_RTS_L

TP_BT_I2S_R2DTP_BT_I2S_CLKSSD_RESET_L

MLB_BOARD_ID4

MLB_BOARD_ID0

MLB_BOARD_ID3MLB_BOARD_ID2MLB_BOARD_ID1

MLB_BOARD_ID0

TPAD_SPI_IF_ENTPAD_SPI_INT_LAUD_PWR_EN

AUD_PWR_EN

TPAD_SPI_IF_EN

PCH_BT_UART_RTS_LPCH_BT_UART_R2D

TBT_POC_RESET

PCH_BT_UART_CTS_L

TBT_X_DPMUX_SELTBT_T_DPMUX_SEL

PCH_BT_UART_D2R

TP_BT_I2S_D2R

=PP3V3_SUS_PCH_VCCPGPPA

AUD_SPI_CLKAUD_SPI_MISO

TPAD_SPI_MISO

AP_S0IX_WAKE_LAP_S0IX_WAKE_SEL

SOC_UART_CTS_L

SOC_UART_D2RSOC_UART_R2DSOC_UART_RTS_L

=PP3V3_S0_PCH

TPAD_SPI_CS_LTPAD_SPI_CLK

PCH_BT_UART_R2DPCH_BT_UART_RTS_L

AP_S0IX_WAKE_LAP_DEV_WAKE

1/20W 5%

R1674

201 MF

1/20W 5%

R1673

201 MF

1/20W 5%

R1669

201 MF 1/20W 5%

1/20W 5%

R1672

201 MF

1/20W 5%

R1642

201 MF

1/20W 5%

R1641

201 MF

1/20W 5%

R1640

201 MF

1/20W 5%

R1671 100K 1 2 5% 1/20W MF 201

R1668

201 MF

1/20W 5%

R1655

201 MF

1/20W 5%

R1656

201 MF

1/20W 5%

SKL-ULT-2+3E

OMIT_TABLE

AP13

W7 W8

W10 W11 W12 AB12

AH10 AH9

AK10 AK9 AK7 AK6 N12 N11

P3 P2

N2 N1 N3 M4

B7 J4 M3 M2

U9 U8 U6 U7

AB4 AC3 AC2 AC1

AB3 W4 AB2 AB1 AN5 AP5 AN7 AM5 AR7 AP8 AP7 AN8

AW7 AY7 BA7 BB7 BA8 AY8

TABLE_5_ITEM

PART# QTY DESCRIPTION

TABLE_5_HEAD

BOM OPTION REFERENCE DESIGNATOR(S)

TABLE_5_ITEM

BRANCH REVISION

DRAWING NUMBER SIZE

D

R

SHEET PAGE TITLE

B

Apple Inc.

IN

IN BI

OUT OUT

OUT

IN IN

OUT OUT

OUT OUT OUT OUT

OUT IN IN OUT OUT IN IN IN IN OUT IN OUT OUT IN OUT IN OUT OUT OUT IN OUT OUT

GPP_F2/I2S2_TXD GPP_F0/I2S2_SCLK

GPP_C15/UART1_CTS*/ISH_UART1_CTS*

GPP_C14/UART1_RTS*/ISH_UART1_RTS*

GPP_C12/UART1_RXD/ISH_UART1_RXD

GPP_F3/I2S2_RXD GPP_F1/I2S2_SFRM

GPP_C11/UART0_CTS*

GPP_C10/UART0_RTS*

GPP_B21/GSPI1_MISO GPP_B22/GSPI1_MOSI GPP_C8/UART0_RXD

GPP_C18/I2C1_SDA GPP_C17/I2C0_SCL GPP_C16/I2C0_SDA GPP_C9/UART0_TXD

GPP_B19/GSPI1_CS*

GPP_B20/GSPI1_CLK

GPP_B15/GSPI0_CS*

GPP_B16/GSPI0_CLK GPP_B17/GSPI0_MISO GPP_B18/GSPI0_MOSI

GPP_D5/ISH_I2C0_SDA GPP_D6/ISH_I2C0_SCL GPP_D7/ISH_I2C1_SDA GPP_D8/ISH_I2C1_SCL GPP_D1/SPI1_CLK GPP_D2/SPI1_MISO

GPP_F4/I2C2_SDA GPP_F5/I2C2_SCL GPP_G6/SD_CLK

GPP_D9 GPP_G7/SD_WP GPP_D10

GPP_G2/SD_DATA1 GPP_G3/SD_DATA2 GPP_G4/SD_DATA3 GPP_G5/SD_CD*

GPP_A19/ISH_GP1 GPP_A20/ISH_GP2 GPP_A21/ISH_GP3 GPP_A22/ISH_GP4 GPP_A23/ISH_GP5 SX_EXIT_HOLDOFF*/GPP_A12/

GPP_E22 GPP_E23

Trang 17

OBSDATA_D1 OBSDATA_B0

PULL CFG<3> LOW

They are listed here to show their secondary XDP functions and to provide test points for signals that are not used elsewhere.

NEED TO CONNECT TO VCCST, *STG POWER LOGIC

(UNDOCUMENTED STRAP FUNCTION) PULL STRAP LOW WHEN XDP IS PLUGGED IN.

TDO

XDP_PRESENT#

(OD)

OBSDATA_D2 OBSDATA_D3

OBSDATA_B3

support chipset debug.

OBSDATA_A3

OBSFN_B0 OBSFN_B1 OBSDATA_A2

DESIGN: X502/MLB_CATZ

PCH/XDP Signals

PCH XDP Signals

OBSFN_C0

JTAG_ISP (non-TMS) nets are aliased, do not attempt bit-banged JTAG during PCH debug.

USB Overcurrents are aliased, do not cause USB OC# events during PCH debug.

HOOK2

VCC_OBS_CD ITPCLK#/HOOK5

TCK0 TCK1

XDP_PIN_1

NOTE: This is not the standard XDP pinout.

518S0847

OBSDATA_B2 OBSDATA_B1

OBSFN_C1

OBSFN_D1

HOOK1

HOOK3 HOOK0

The PDG puts them on a secondary XDP connector that is only needed in some PCH debugging situation.

OBSDATA_C3 OBSDATA_C2

OBSDATA_C1 OBSDATA_C0

ROUTE IN STAR TOPOLOGY FROM XDP CONNECTOR.

Use with 921-0133 Adapter Flex to

OBSDATA_A1

LAST CHANGE: Thu Aug 4 21:00:42 2016

TRSTn VCC_OBS_AB

17 OF 73

18 OF 500

1.0.0 051-02265

JTAG_ISP_TDI

XDP_PCH_OBSFN_C1

XDP_PCH_OBSDATA_D1XDP_PCH_OBSDATA_D0XDP_PCH_OBSDATA_C1

PM_SYSRST_L

XDP_USB_EXTD_OC_L

MAKE_BASE=TRUE MAKE_BASE=TRUE

XDP_USB_EXTC_OC_LXDP_PCH_OBSDATA_D2XDP_PCH_OBSDATA_C0

USB_EXTD_OC_LXDP_PCH_OBSDATA_D3

XDP_DBRESET_L

XDP_PCH_TDOCPU_CFG<15>

XDP_PCH_TRST_L

ITP_PMODECPU_CFG<14>

XDP_PCH_TDI

=PP1V_SUS_XDP

CPU_CFG<5>

2 1

5%

1/20W MF 201

XDP_STRAP

2 1

DRAWING NUMBER SIZE

D

R

SHEET PAGE TITLE

B

Apple Inc.

IN IN

Y A

NC NC

NC

NC NC

NC NC NC

TP TP TP TP

TP

TP TP TP TP TP TP

OUT

TP

IN IN

IN

OUT

OUT OUT

IN

OUT

IN BI

OUT

IN IN

IN

OUT OUT

IN

OUT

IN IN

IN

Trang 18

359S00006

NOTE: 30 PPM or better required for SKL PCH

H AP_S0IX_WAKE_L (B1)SEL OUTPUT

PCH IPD = 9-50k

L PCIE_WAKE_L (B0)

PCIe Wake Muxing

If high, ME is disabled This allows for full re-flashing of SPI ROM

SMC controls strap enable to allow in-field control of strap setting

PCH uses HDA_SDO as a power-up strap If low, ME functions normally

***** Circuit does not support HDA voltage >3.3V

18 OF 73

VOLTAGE=2.9V

MIN_LINE_WIDTH=0.4000 MIN_NECK_WIDTH=0.1500

19 OF 500

1.0.0 051-02265

PP2V9_SYSCLK

=PPVIO_CAMERA_BT_AP_32CLK

=PPVIOE_PCHCLK

SYSCLK_CLK24M_X1SYSCLK_CLK24M_X2

SPI_DESCRIPTOR_OVERRIDE

HDA_SDOUT_RSPI_DESCRIPTOR_OVERRIDE_L

SYSCLK_CLK24M_SSDSYSCLK_CLK24M_CAMERA

4 3

17

15 5 2 12

16 6 3

7

U1900

0201-1 X5R 6.3V 20%

1

R1900

0201C0G50V5%

10PF

C1907

0201C0G50V5%

DRAWING NUMBER SIZE

D

R

SHEET PAGE TITLE

B

Apple Inc.

IN IN IN IN

SEL

0

VER 1 A

VCC

1 B1

X2 X1

VIOE_24M_C

12M VOUT

GND

OE_12M

32.768K_A

24M_A 24M_B 24M_C

32.768K_B IN

IN

OUT

Trang 19

PROBE POINTS

GREENCLK CLOCK CONNECTIONS.

SERIES R FOR VOLTAGE DIVIDER WHEN PCH IS DRIVING IN L1 SUB-STATE.

NOSTUFF / DELETE TO ALLOW INTERNAL PULL-DOWN FOR BSSB ON USB-SS.

UNUSED GPIO SIGNALS

IFDIM TRIGGERS USING R2055 & R2056 PADS

STUFF PULL-UP TO ENABLE BSSB (DCI) CLK/DI ON GPP_D11, _D12.

(STRAP-OPTION) NOSTUFF / DELETE TO ALLOW INTERNAL PULL-DOWNS TO DISABLE.

UNUSED PCH XDP SIGNALS NEED TEST POINTS.

S3X SSD CONTROL

S3X SSD DOWN

(STRAP-OPTION)

PCH PROJECT DEPENDANT

UNUSED GPIO SIGNALS

ASK DC/DC GROUP FOR DETAILS.

VOLTAGE=3.3V MIN_LINE_WIDTH=0.1000 MIN_NECK_WIDTH=0.0800

VOLTAGE=1V MIN_LINE_WIDTH=0.1000 MIN_NECK_WIDTH=0.0800

20 OF 500

1.0.0 051-02265

SOC_ALS_UART_D2R

=TBT_X_CLKREQ_L

SOC_UART_D2R

PCH_SWD_IOPCH_SWD_MUX_SEL

MAKE_BASE=TRUE PD_LCD_PSR_EN

CAMERA_PWR_EN_PCH

SPKR_ID1SPKR_ID0AUD_SPI_MISOLCD_PSR_EN

PM_PCH_PWROK_BUF

=PP3V3_S0_PCH

MAKE_BASE=TRUE PD_AUD_SPI_CLKSOC_UART_R2D

MAKE_BASE=TRUE

TBT_X_CLKREQ_R_L

SMC_LRESET_LTBT_X_PCI_RESET_LSSD_RESET_L

SOC_ALS_UART_R2D

XDP_BPM_L<3>

MAKE_BASE=TRUE PU_PCH_SWD_IO

MAKE_BASE=TRUE PU_AUD_SPI_MOSIPCH_DDPB_CTRLDATA

MAKE_BASE=TRUE

SYSCLK_CLK24M_PCH

MAKE_BASE=TRUE

SYSCLK_CLK24M_CAMERASYSCLK_CLK24M_SSD

100K

2

1R2041

201 MF 1/20W 5%

1 2

U2040

0201 X5R-CERM10V10%

0

BT_CLK32K:YES

2 1

R2032

34

201MF1/20W5%

R2030

201MF1/20W5%

PLACE_NEAR=C3040.1:1MM NO_XNET_CONNECTION=1

1/20W 5%

R2072

201 MF

1/20W 5%

R2013

201 MF

1/20W 5%

SM 2 1

0

PCH24M:S0SW

2 1

R2066

0201MF1/20W5%

0

PCH24M:SUS

2 1

XW2000

15

201 MF 1/20W 5%

1/20W 5%

R2075 47K 1 2 5% 1/20W MF 201

R2074

201 MF

1/20W 5%

100K

NOSTUFF

2 1

R2056

402 MF-LF 1/16W5%

100K

NOSTUFF

2 1

1/20W 5%

1K 1BSSB_ON_GPIOS2

R2022

201 MF

1/20W 5%

2.2K 1IG_DDI2_EN2

R2021

201 MF

1/20W 5%

2.2K 1IG_DDI1_EN2

R2020

201 MF

1/20W 5%

R2012

201 MF

1/20W 5%

R2010

201 MF

1/20W 5%

DRAWING NUMBER SIZE

D

R

SHEET PAGE TITLE

B

IN OUT

IN IN

IN IN IN

OUT IN

IN

TP

IN IN

OUT IN

IN

OUT IN

OUT

IN

Trang 20

20 OF 73

22 OF 500

PPVREF_S3_MEM_VREFDQ_A

PPVREF_S3_MEM_VREFDQ_B

PPVREF_S3_MEM_VREFCACPU_DIMM_VREFCA

SYNC_DATE=12/03/2015 SYNC_MASTER=X502-EXP

LPDDR3 VREF Margining

201 MF 1/20W 1%

8.2K

2

1R2221

201 MF 1/20W 1%

8.2K

2

1R2241

201MF1/20W1%

1

R2220

201 MF 1/20W 1%

8.2K

2

1R2261

201MF1/20W1%

1

R2240

201MF1/20W1%

1

R2260

201MF1/20W1%

1

R2223

0201 X5R-CERM 6.3V 10%

0.022UF

2

1 C2220

201MF1/20W1%

1

R2243

0201 X5R-CERM 6.3V 10%

0.022UF

2

1 C2240

0201MF1/20W1%

1

R2263

0201 X5R-CERM 6.3V 10%

DRAWING NUMBER SIZE

D

R

SHEET PAGE TITLE

B

Apple Inc.

IN

Trang 21

1 C2380

12PF

5%

25V CERM 0201 2

1 C2381

3PF

+/-0.1PF 25V C0G 0201 2

1 C2383

1.0UF

20%

6.3V X5R 0201-1 2

1 C2313

OMIT_TABLECRITICAL

LPDDR3-1600-32GB

EDFB232A1MA FBGA

B4 B3

J11 H4 J8

U13 U12 U2 U1 T13 T1 B13 B1 A13 A12 A2 A1

R3 K9 C4 D10

D8 P8 G8 L8

L4 L3

K4 K3

J3 J2

C2 D2 E2 E3 F3 M3 N3 N2 P2 R2

U2300

OMIT_TABLECRITICAL

LPDDR3-1600-32GB

EDFB232A1MA FBGA

T12 T6 R6 P12 N6 M12 M6 L9 K10 H10 G9 G6 F12 F6 E6 D12 C6 B12 B6

J4 M4 P3 G4 G3 F4 D3 C3

H2 T5 T4 T3 T2 R5 R4 N5 N4 M5 L6 K2 J12 F5 E5 E4 C5 B5 B2

U11 R12 N12 N8 L12 K11 K8 J10 J9 H11 H9 H8 G12 E12 E8 C12 A11

M2 L2 H3 G2 F2

U9 U8 P6 P5 P4 L5 K12 K6 K5 J6 J5 H12 H6 H5 G5 D6 D5 D4 A9 A8

U10 U6 U5 U4 U3 A10 A6 A5 A4 A3

U2300

0.047UF

10%

6.3V X5R 201 2

1 C2330

1.0UF

20%

6.3V X5R 0201-1 2

1 C2331 CRITICAL

10UF

20%

6.3V CERM 0402 2

1 C2332 CRITICAL

10UF

20%

6.3V CERM 0402 2

1 C2323 CRITICAL

10UF

20%

6.3V CERM 0402 2

1 C2322

1.0UF

20%

6.3V X5R 0201-1 2

1 C2321

1.0UF

20%

6.3V X5R 0201-1 2

1 C2312

1.0UF

20%

6.3V X5R 0201-1 2

1 C2311

1.0UF

20%

6.3V X5R 0201-1 2

1 C2305

0.1UF

10%

16V X5R-CERM 0201 2

1 C2301

1.0UF

20%

6.3V X5R 0201-1 2

1 C2304

1.0UF

20%

6.3V X5R 0201-1 2

1 C2303

0.1UF

10%

16V X5R-CERM 0201 2

10UF

20%

6.3V CERM 0402 2

DRAWING NUMBER SIZE

D

R

SHEET PAGE TITLE

B

Apple Inc.

BI BI

IN

IN IN

BI

IN IN IN IN IN IN IN IN

NC NC NC

BI

BI BI

BI

BI BI

BI

BI BI

BI BI BI

BI BI

BI BI BI

BI BI

BI BI BI BI SYM 1 OF 2

DQ13

CS0*

DM2 DM1 DM0 CS1*

DQ21 CA9

DQS0_T DQS2_T

CA2

ODT

DQS0_C DQS1_C DQ25

CK_C

CA6

CA0 CA1

CA3 CA4 CA5

CKE1

DQ0

DQ10 DQ11 DQ12

DQ14 DQ15 DQ16 DQ17 DQ18 DQ19 DQ2

DQ20

DQ23 DQ24

DQ26 DQ27 DQ28 DQ29 DQ3

DQ30 DQ31

DQ4 DQ5 DQ6 DQ7 DQ8 DQ9

DQS1_T DQS3_T

VREFCA VREFDQ CA7

NU

DQ22 DQ1

NC

ZQ0 ZQ1

Trang 22

BOM_COST_GROUP=DRAM

LPDDR3 DRAM Channel A (32-63)

0201-1 X5R 6.3V 20%

1.0UF

2

1 C2402

0201-1 X5R 6.3V 20%

1.0UF

2

1 C2422

0201 X5R-CERM 16V 10%

0.1UF

2

1 C2401

0201-1 X5R 6.3V 20%

1.0UF

2

1 C2421

0201 X5R-CERM 16V 10%

0.1UF

2

1 C2400

0201-1 X5R 6.3V 20%

1.0UF

2

1 C2420

0402 CERM 6.3V 20%

1.0UF

2

1 C2411

0201-1 X5R 6.3V 20%

1.0UF

2

1 C2410

0201-1 X5R 6.3V 20%

1.0UF

2

1 C2431

0201-1 X5R 6.3V 20%

3PF

2

1 C2480

0201 CERM 25V 5%

12PF

2

1 C2481

0201-1 X5R 6.3V 20%

1.0UF

2

1 C2413

0402 CERM 6.3V 20%

3PF

2

1 C2482

0201 CERM 25V 5%

LPDDR3-1600-32GB

CRITICALOMIT_TABLE

J4 M4 P3 G4 G3 F4 D3 C3

M2 L2 H3 G2 F2

U10 U6 U5 U4 U3 A10 A6 A5 A4 A3

U2400

FBGA EDFB232A1MA

LPDDR3-1600-32GB

CRITICALOMIT_TABLE

B4 B3

J11 H4 J8

U13 U12 U2 U1 T13 T1 B13 B1 A13 A12 A2 A1

R3 K9 C4 D10

D8 P8 G8 L8

L4 L3

K4 K3

J3 J2

C2 D2 E2 E3 F3 M3 N3 N2 P2 R2

U2400

0402 CERM 6.3V 20%

1.0UF

2

1 C2405

0201-1 X5R 6.3V 20%

1.0UF

2

1 C2404

0201-1 X5R 6.3V 20%

1.0UF

2

1 C2403

0402 CERM 6.3V 20%

DRAWING NUMBER SIZE

D

R

SHEET PAGE TITLE

B

Apple Inc.

BI BI

IN IN

BI

NC NC NC

BI

BI BI

BI

BI BI

BI

BI BI

BI BI BI

BI BI

BI BI BI

BI BI

BI BI BI

BI BI

DQ21 CA9

DQS0_T DQS2_T

CA2

ODT

DQS0_C DQS1_C DQ25

CK_C

CA6

CA0 CA1

CA3 CA4 CA5

CKE1

DQ0

DQ10 DQ11 DQ12

DQ20

DQ23 DQ24

DQ30 DQ31

DQS1_T DQS3_T

VREFCA VREFDQ CA7

NU

DQ22 DQ1

NC

ZQ0 ZQ1

BI

IN

BI BI

Trang 23

LPDDR3 DRAM Channel B (00-31)

BOM_COST_GROUP=DRAM

0201-1 X5R 6.3V 20%

1.0UF

2

1 C2502

0201-1 X5R 6.3V 20%

1.0UF

2

1 C2522

0201 X5R-CERM 16V 10%

0.1UF

2

1 C2501

0201-1 X5R 6.3V 20%

1.0UF

2

1 C2521

0201 X5R-CERM 16V 10%

0.1UF

2

1 C2500

0201-1 X5R 6.3V 20%

1.0UF

2

1 C2520

0402 CERM 6.3V 20%

1.0UF

2

1 C2511

0201-1 X5R 6.3V 20%

1.0UF

2

1 C2510

0201-1 X5R 6.3V 20%

1.0UF

2

1 C2531

0201-1 X5R 6.3V 20%

3PF

2

1 C2580

0201 CERM 25V 5%

12PF

2

1 C2581

0201-1 X5R 6.3V 20%

1.0UF

2

1 C2513

0402 CERM 6.3V 20%

12PF

2

1 C2583

FBGA EDFB232A1MA

LPDDR3-1600-32GB

CRITICALOMIT_TABLE

J4 M4 P3 G4 G3 F4 D3 C3

M2 L2 H3 G2 F2

U10 U6 U5 U4 U3 A10 A6 A5 A4 A3

U2500

FBGA EDFB232A1MA

LPDDR3-1600-32GB

CRITICALOMIT_TABLE

B4 B3

J11 H4 J8

U13 U12 U2 U1 T13 T1 B13 B1 A13 A12 A2 A1

R3 K9 C4 D10

D8 P8 G8 L8

L4 L3

K4 K3

J3 J2

C2 D2 E2 E3 F3 M3 N3 N2 P2 R2

U2500

0402 CERM 6.3V 20%

0.047UF

2

1 C2541

201 X5R 6.3V10%

1.0UF

2

1 C2505

0201-1 X5R 6.3V 20%

1.0UF

2

1 C2504

0201-1 X5R 6.3V 20%

1.0UF

2

1 C2503

0402 CERM 6.3V 20%

DRAWING NUMBER SIZE

D

R

SHEET PAGE TITLE

B

Apple Inc.

BI BI

IN IN

BI

NC NC NC

BI

BI BI

BI

BI BI

BI

BI BI

BI BI BI

BI BI

BI BI BI

BI BI

BI BI BI

BI BI

DQ21 CA9

DQS0_T DQS2_T

CA2

ODT

DQS0_C DQS1_C DQ25

CK_C

CA6

CA0 CA1

CA3 CA4 CA5

CKE1

DQ0

DQ10 DQ11 DQ12

DQ20

DQ23 DQ24

DQ30 DQ31

DQS1_T DQS3_T

VREFCA VREFDQ CA7

NU

DQ22 DQ1

NC

ZQ0 ZQ1

BI

IN

BI BI

Trang 24

合肥怡飞苹果维修qq：82669515 qq群： 24100010uF caps are shared between DRAM.

1.0UF

2

1 C2602

0201-1 X5R 6.3V 20%

1.0UF

2

1 C2622

0201 X5R-CERM 16V 10%

0.1UF

2

1 C2601

0201-1 X5R 6.3V 20%

1.0UF

2

1 C2621

0201 X5R-CERM 16V 10%

0.1UF

2

1 C2600

0201-1 X5R 6.3V 20%

1.0UF

2

1 C2620

0402 CERM 6.3V 20%

1.0UF

2

1 C2611

0201-1 X5R 6.3V 20%

1.0UF

2

1 C2610

0201-1 X5R 6.3V 20%

1.0UF

2

1 C2631

0201-1 X5R 6.3V 20%

3PF

2

1 C2680

0201 CERM 25V 5%

12PF

2

1 C2681

0201-1 X5R 6.3V 20%

1.0UF

2

1 C2613

0402 CERM 6.3V 20%

3PF

2

1 C2682

0201 CERM 25V 5%

LPDDR3-1600-32GB

CRITICALOMIT_TABLE

J4 M4 P3 G4 G3 F4 D3 C3

M2 L2 H3 G2 F2

U10 U6 U5 U4 U3 A10 A6 A5 A4 A3

U2600

FBGA EDFB232A1MA

LPDDR3-1600-32GB

CRITICALOMIT_TABLE

B4 B3

J11 H4 J8

U13 U12 U2 U1 T13 T1 B13 B1 A13 A12 A2 A1

R3 K9 C4 D10

D8 P8 G8 L8

L4 L3

K4 K3

J3 J2

C2 D2 E2 E3 F3 M3 N3 N2 P2 R2

U2600

0402 CERM 6.3V 20%

0.047UF

2

1 C2641

201 X5R 6.3V10%

1.0UF

2

1 C2605

0201-1 X5R 6.3V 20%

1.0UF

2

1 C2604

0201-1 X5R 6.3V 20%

1.0UF

2

1 C2603

0402 CERM 6.3V 20%

DRAWING NUMBER SIZE

D

R

SHEET PAGE TITLE

B

Apple Inc.

BI BI

IN IN

BI

NC NC NC

BI

BI BI

BI

BI BI

BI

BI BI

BI BI BI

BI BI

BI BI BI

BI BI

BI BI BI

BI BI

DQ21 CA9

DQS0_T DQS2_T

CA2

ODT

DQS0_C DQS1_C DQ25

CK_C

CA6

CA0 CA1

CA3 CA4 CA5

CKE1

DQ0

DQ10 DQ11 DQ12

DQ20

DQ23 DQ24

DQ30 DQ31

DQS1_T DQS3_T

VREFCA VREFDQ CA7

NU

DQ22 DQ1

NC

ZQ0 ZQ1

BI BI

IN

BI

Trang 25

Intel recommends 68 Ohm for CMD/ADDR, 80 Ohm for CTRL/CKE, 38 Ohm for CLK

25 OF 73

27 OF 500

1.0.0 051-02265

20UF

CRITICALNOSTUFF

2

1 C2721

0402 CERM-X5R 6.3V 20%

20UF

CRITICALNOSTUFF

2

1 C2741

0201 C0G 25V +/-0.1PF

3PF

2

1 C2742

0201 C0G 25V +/-0.1PF

3PF

2

1 C2722

0201 CERM 25V 5%

12PF

2

1 C2731

0201 CERM 25V 5%

12PF

2

1 C2730

201 MF 1/20W

1%

R2715

201 MF 1/20W

1%

R2716

201 MF 1/20W

1%

R2717

201 MF 1/20W

1%

R2718

201 MF 1/20W

1%

R2711

201 MF 1/20W

1%

R2754

201 MF 1/20W

1%

R2714

201 MF 1/20W

1%

2 1

DRAWING NUMBER SIZE

D

R

SHEET PAGE TITLE

B

Apple Inc.

IN IN IN IN

IN

IN IN IN

IN IN IN IN IN IN IN IN IN IN IN IN IN IN IN IN IN IN IN IN IN IN IN IN IN IN IN

IN

IN IN

IN

IN IN IN

IN

IN IN IN

IN IN

IN IN IN IN

IN IN IN

Trang 26

DP_X_SNK1_AUXCH_NDP_X_SNK1_AUXCH_PDP_X_SNK1_ML_N<1>

DP_X_SNK0_ML_P<1>

PCIE_TBT_X_D2R_C_N<2>

=UPC_X_SPI_CS_LUSBC_X_RESET_L

TBT_X_CLKREQ_LPCIE_TBT_X_R2D_N<2>

DP_XA_HPDTBT_XA_LSRX

TBT_XB_USB2_RBIASDP_XB_HPD

TBT_XB_LSRXUSB_UPC_XA_P

JTAG_TBT_TCKJTAG_TBT_X_TMSJTAG_TBT_TDI

DP_X_SNK_RBIAS

=DP_X_SNK1_DDC_DATA

=DP_X_SNK1_DDC_CLKDP_X_SNK1_HPD

DP_XB_AUXCH_C_NUSB_UPC_XB_P

=UPC_X_SPI_MISO

=UPC_X_SPI_MOSITBT_X_XTAL25M_OUTTBT_X_XTAL25M_IN

TBT_X_TEST_ENTBT_X_TEST_PWR_GOOD

TBT_X_RTD3_CIO_PWR_ENPM_SLP_S3_L

=TBT_X_BATLOW_LTBT_X_FORCE_PWR

I2C_TBT_XA_INT_LI2C_TBT_XB_INT_L

DP_X_SNK1_ML_P<2>

PCIE_TBT_X_D2R_C_N<3>

=DP_X_SRC_ML_P<3>

TBT_X_PCIE_BIASPCIE_CLK100M_TBT_X_N

TBT_XB_LSTXTBT_XA_LSTX

DP_XA_AUXCH_N

DP_XB_AUXCH_NDP_XB_AUXCH_P

DP_XB_HPD

TBT_XA_LSRX

DP_XA_AUXCH_P

TBT_XB_LSRXDP_XA_HPD

0.1UF

2 1

C2835

0201 X5R-CERM16V10%

0.1UF

2 1

C2820

0201 X5R-CERM16V10%

0.1UF

2 1

C2821

0201 X5R-CERM16V10%

0.1UF

2 1

C2822

0201 X5R-CERM16V10%

0.1UF

2 1

C2823

0201 X5R-CERM16V10%

0.1UF

2 1

C2825

0201 X5R-CERM16V10%

0.1UF

2 1

C2824

0201 X5R-CERM16V10%

0.1UF

2 1

C2826

0201 X5R-CERM16V10%

0.1UF

2 1

C2827

0201 X5R-CERM16V10%

0.1UF

2 1

C2829

0201 X5R-CERM16V10%

0.1UF

2 1

C2828

0201 X5R-CERM16V10%

0.1UF

2 1

C2831

0201 X5R-CERM16V10%

0.1UF

2 1

C2830

0201 X5R-CERM16V10%

0.1UF

2 1

C2832

0201 X5R-CERM16V10%

0.1UF

2 1

C2833

0201 X5R-CERM16V10%

0.1UF

2 1

C2834

0201 X5R-CERM16V10%

0.1UF

2 1

C2836

0201 X5R-CERM16V10%

0.1UF

2 1

C2838

0201 X5R-CERM16V10%

0.1UF

2 1

C2837

0201 X5R-CERM16V10%

0.1UF

2 1

2.2K

2

1R2837

201 MF 1/20W 5%

2.2K

2

1R2836

201 MF 1/20W 5%

2.2K

2

1R2835

201 MF 1/20W 5%

D23 D22

E18

V4

AB23 AC23

AB5 E1

AC1

W4

Y4 T4

J6

F4

H6

F1 D2 F2 H4 D4 E2 J4

L4

F23 F22

K23 K22

P23 P22

V23 V22

H23 H22

M23 M22

T23 T22

Y23 Y22

V19 T19

N16 AC5

V18

F19

E19 D19

A9 B9 A11 B11

B7 A7

A13 B13

B4 B5 G2

Y16 W16

H19

E20 D20

A17 B17 A19 B19

A15 B15

B21 A21

A5 A4 M4

Y15 W15

D6

AB2

W18 W13

C22 C23

AA1 Y2 Y1 W2 W1 V2 V1 U2 U1

N15 L15

AC4 AB3

AC3 AB4

N6

J2 J1

L2 L1

N2 N1

R2 R1

G1

W19 Y19

Y18

AB21 AC21

AB19 AC19

AB17 AC17

AB15 AC15

Y6

N4 Y8

Y12 W12

AB13 AC13

AB11 AC11

AB9 AC9

AB7 AC7

AA2

R4 Y5

Y11 W11

A23 B23

GND_VOID=TRUE

0.1UF

2 1

C2813

0201 X5R-CERM16V10%

GND_VOID=TRUE

0.1UF

2 1

C2812

29

0201 X5R-CERM16V 10% GND_VOID=TRUE0.1UF

2 1 C2811

0201 X5R-CERM16V 10%

3.3K

2

R2892

201 MF 1/20W 5%

3.3K

2

R2893

201MF1/20W5%

100

2

1R2829

201 MF 1/20W 5%

4.75K

2 1

201 MF 1/20W 5%

402-1 X5R 10V 10%

1UF

2

USON W25Q80DVUXIE

1%

U2800.N6:3.8MM

14K

2 1

R2852

201MF1/20W1%

201 MF 1/20W 5%

DRAWING NUMBER SIZE

D

R

SHEET PAGE TITLE

B

Apple Inc.

IN IN

OUT OUT

PCIE_RX2_P

GPIO_8

PCIE_REFCLK_100_IN_N

PCIE_RBIAS DPSRC_ML0_P

DPSRC_ML3_P PCIE_TX3_N

DPSNK1_ML1_N DPSNK1_ML2_P

PCIE_TX3_P

PCIE_TX2_N PCIE_TX2_P

PCIE_TX1_P PCIE_TX1_N

PCIE_TX0_N PCIE_TX0_P

PCIE_RX3_N

DPSNK0_ML0_P

DPSRC_ML1_P DPSRC_ML0_N

DPSRC_ML2_P

DPSRC_AUX_P DPSRC_ML3_N

DPSRC_HPD DPSRC_AUX_N

DPSRC_RBIAS GPIO_0 GPIO_1 GPIO_2

DPSNK0_ML0_N DPSNK0_ML1_P DPSNK0_ML1_N

DPSNK0_ML3_P DPSNK0_ML3_N

DPSNK0_AUX_N

DPSNK0_DDC_DATA DPSNK0_DDC_CLK

GPIO_5

GPIO_3 GPIO_4

GPIO_6 GPIO_7

POC_GPIO_1 POC_GPIO_0

POC_GPIO_2 POC_GPIO_3 POC_GPIO_4 POC_GPIO_5 POC_GPIO_6

TEST_PWR_GOOD

TEST_EN

XTAL_25_IN XTAL_25_OUT

EE_DI EE_DO

PB_RX1_P EE_CLK

PB_TX1_P PB_RX1_N

PB_TX0_P PB_TX1_N

PB_TX0_N PB_RX0_P

PB_DPSRC_AUX_P

PB_RX0_N

PB_USB2_D_P PB_DPSRC_AUX_N

PB_LSTX PB_USB2_D_N

DPSNK1_ML1_P

DPSNK1_ML2_N DPSNK1_ML3_P DPSNK1_ML3_N DPSNK1_AUX_P DPSNK1_AUX_N DPSNK1_HPD DPSNK1_DDC_CLK DPSNK1_DDC_DATA DPSNK_RBIAS

TDI TMS TCK

RBIAS TDO

PA_TX1_P PA_RX1_N

PA_TX0_P PA_TX1_N

PA_RX0_P PA_TX0_N

PA_DPSRC_AUX_P PA_RX0_N

PA_USB2_D_P PA_DPSRC_AUX_N

PA_LSTX

PB_LSRX PB_DPSRC_HPD

MONDC_SVR PB_USB2_RBIAS

ATEST_P ATEST_N

MONDC_DPSNK_0 MONDC_DPSNK_1 MONDC_DPSRC

PA_LSRX PA_DPSRC_HPD PA_USB2_RBIAS THERMDA

THERMDA PCIE_ATEST

FUSE_VQPS_64 TEST_EDM

MONDC_CIO_0 FUSE_VQPS_128

MONDC_CIO_1

PCIE_RX1_P PCIE_RX1_N

PCIE_REFCLK_100_IN_P

DPSRC_ML2_N DPSRC_ML1_N

IN IN

OUT OUT

IN

BI

BI BI

OUT OUT

IN

OUT

OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT

OUT

IN

VCC

DI(IO0) DO(IO1) CS*

HOLD*(IO3) WP*(IO2) CLK

GND EPAD

OUT OUT

IN IN

IN

IN IN

BI OUT

OUT OUT

IN

OUT IN IN

OUT IN IN IN

IN

NC NC

IN

OUT

IN OUT

OUT

Trang 27

SOURCED BY INTERNAL SWITCH

PRECHARGE RAIL AFTER SX RAIL TURNS ON BUT RESET IS STILL ASSERTED.

2x 10uF outside BGA area

INTERNAL SWITCH

INTERNAL SWITCH SOURCED BY SOURCED BY

ISOLATE GND OF SVR_IND CAPS

INTERNAL SWITCHING VR OUTPUT

CONTROLLER (UPC)

AND GND OF VCC3P3_SVR CAPS (SEE INTEL LAYOUT GUIDELINES)

FROM USB-C PORT

FROM SYSTEM GND IN LAYOUT SOURCED BY INTERNAL SWITCH

WORKAROUND TO LIMIT INRUSH CURRENT AT LVR TURN ON.

27 OF 73

MIN_NECK_WIDTH=0.0600 MIN_LINE_WIDTH=0.2000 VOLTAGE=0.9V

MIN_NECK_WIDTH=0.0600 VOLTAGE=0.9V

MIN_NECK_WIDTH=0.2000 MIN_LINE_WIDTH=0.2000

VOLTAGE=3.3V

SWITCH_NODE=TRUE DIDT=TRUE

MIN_NECK_WIDTH=0.2000 MIN_LINE_WIDTH=0.2000 VOLTAGE=0V

VOLTAGE=3.3V

MIN_LINE_WIDTH=0.1800 MIN_NECK_WIDTH=0.2000 MIN_NECK_WIDTH=0.2000

MIN_LINE_WIDTH=0.1800 VOLTAGE=0.9V

29 OF 500

1.0.0 051-02265

PP0V9_TBT_X_USB

PP3V3_TBT_X_ANA_USB2

PP3V3_TBT_X_SX

WA_P0V9TBTXLVR_DPP3V3_TBT_X_SX

USBC_X_RESET_L

PP0V9_TBT_X_LVRWA_P0V9TBTXLVR_Q

BOM_COST_GROUP=TBT

USB-C HIGH SPEED 2

0201-1 X5R 6.3V 20%

1.0UF

2

1 C2936

0201-1 X5R 6.3V 20%

1.0UF

2

1 C2935

0201-1 X5R 6.3V 20%

1.0UF

2

1 C2934

0201-1X5R6.3V20%

1.0UF

2

1 C2933

0201-1 X5R 6.3V 20%

1.0UF

2

1 C2932

0201-1 X5R 6.3V 20%

2 1

XW2900

0201-1 X5R 6.3V 20%

1.0UF

2

1 C2921

0402 CERM 6.3V 20%

1.0UF

2

1 C2991

0201-1X5R6.3V20%

AC22 AC20 AC18 AC16 AC14 AC12 AC10 AC8 AC6 AB22 AB20 AB18 AB16 AB14 AB12 AB10 AB8 AB6 AA23 AA22 Y20 Y13 Y9 W23 W22 W20 W9 W8 W6 W5 V20 V16 V15 V9 V8 V6 V5 U22 U23 T20 T5 T2 T1 R23

R22 R20 R19 R18 R5 P2 P1 N23 N22 N20 N5 M20 M19 M5 M2 M1 L23 L22 L20 L5 K2 K1 J23 J22 J18 J20 J19 J5 H20 H16 H15 H13 H12 H2 H1 G23 G22 F16 F20 F9 E23 E22 E16 E15 E11 E9 E8 D18 D16 D15 D13 D12 D11 D9 D8 B22 B20 B18 B16 B14 B12 B10 B8 B6 A22 A20 A18 A16 A14 A12 A10 A8 A6

M11 AC2 AB1 T18 T16 T15 T13 T9 T8 T6 N13 N12 N11 N9 N8 M12 L13 J15 J13 J12 J8 H8 H5 F6 F5 E6 E5 E4 D5

H9 F8

B3 A3 A2 R13

J16 L16

R16 R15

J9 F15 F13 F12 F11 E13 E12 M9 L9

M16 M15 M13

H11 J11 H18 F18

T12 T11 M8 L12 L11

R12 R11 R9 R8

N18 M18 L18 N19 L19

M6 L6

V13 V12 V11

B2 B1 A1 D1 C2 C1

U2800

0201-1 X5R 6.3V 20%

1.0UF

2

1 C2914

0201 X5R-CERM 6.3V 20%

2.2UF

2

1 C2981

0201-1 X5R 6.3V 20%

1.0UF

2

1 C2930

0201-1 X5R 6.3V 20%

1.0UF

2

1 C2910

0201-1 X5R 6.3V 20%

1.0UF

2

1 C2911

0201-1 X5R 6.3V 20%

1.0UF

2

1 C2912

0201-1 X5R 6.3V 20%

1.0UF

2

1 C2913

201 MF 1/20W 5%

L2950

0201 CERM 25V 5%

12PF

2

1 C2917

0603 CER-X5R6.3V20%

2 1

L2990

0201 X5R-CERM 10V 10%

0.1UF

2

1 C2980

0201-1 X5R 6.3V 20%

1.0UF

2

1 C2916

0201-1 X5R 6.3V 20%

1.0UF

2

1 C2915

0402 CERM 6.3V20%

1.0UF

2

1 C2984

0201-1 X5R 6.3V 20%

1.0UF

2

1 C2985

0201-1 X5R 6.3V 20%

1.0UF

2

1 C2967

0201-1 X5R 6.3V 20%

1.0UF

2

1 C2964

0201-1 X5R 6.3V 20%

1.0UF

2

1 C2965

0201-1 X5R 6.3V 20%

1.0UF

2

1 C2966

0201-1X5R6.3V20%

DRAWING NUMBER SIZE

D

R

SHEET PAGE TITLE

B

VCC0P9_DP VCC0P9_DP

VCC3P3_SX

VCC0P9_ANA_DPSRC VCC0P9_ANA_DPSRC VCC0P9_ANA_DPSNK

VCC0P9_SVR_ANA VCC0P9_SVR_ANA

VCC0P9_SVR_ANA VCC0P9_SVR VCC0P9_SVR VCC3P3_SVR

VSS_ANA VSS_ANA

VCC0P9_DP

VCC0P9_ANA_DPSNK

VCC0P9_CIO VCC0P9_CIO

VCC0P9_CIO VCC0P9_CIO VCC0P9_USB VCC0P9_USB VCC0P9_ANA_PCIE_2 VCC0P9_ANA_PCIE_2 VCC0P9_ANA_PCIE_2 VCC0P9_ANA_PCIE_1 VCC0P9_PCIE

VCC0P9_PCIE VCC0P9_ANA_DPSNK

VCC0P9_LVR VCC0P9_LVR

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

VCC3P3_S0

VSS_ANA VSS_ANA

VSS_ANA VSS_ANA VSS_ANA VSS_ANA

VSS VSS VSS VSS VSS VSS VSS VSS_ANA VSS_ANA VSS_ANA VSS_ANA VSS_ANA VSS_ANA VSS_ANA VSS_ANA VSS_ANA VSS_ANA VSS_ANA

VSS_ANA VSS_ANA

VSS_ANA VSS_ANA VSS_ANA VSS_ANA VSS_ANA VSS_ANA

VSS_ANA VSS_ANA VSS_ANA VSS_ANA VSS_ANA VSS_ANA VSS_ANA VSS_ANA VSS_ANA VSS_ANA VSS_ANA VSS_ANA

SVR_VSS SVR_VSS SVR_VSS

VSS_ANA VSS_ANA VSS_ANA

SVR_IND SVR_IND

VCC0P9_SVR_SENSE VCC0P9_SVR_ANA VCC0P9_SVR_ANA

VCC3P3_ANA_PCIE VCC3P3_ANA_USB2

VCC0P9_ANA_PCIE_1 VCC0P9_PCIE

VCC0P9_DP

VSS_ANA VSS_ANA VSS_ANA VSS_ANA

VSS_ANA VSS_ANA VSS_ANA VSS_ANA VSS_ANA

VSS_ANA VSS_ANA VSS_ANA

VSS_ANA VSS_ANA

VSS_ANA

VSS_ANA VSS_ANA

SVR_IND VCC3P3_SVR

VCC0P9_LVR

VCC0P9_LVR_SENSE

VSS_ANA

VSS_ANA VSS_ANA

VSS_ANA

GND

VCC

NC NC

Y A

D S

G

Trang 28

XPD JTAG ISOLATION

TBT - MASTER

CONNECT G1/G2 TO CC1/CC2 TO RECEIVE POWER UNDER DB CASE

ACE BUSPOWERZ STRAPPING

ACE DEBUG CONN

CONNECT G1/G2 TO GND TO NOT RECEIVE POWER UNDER DB CASE

ACE RPD STRAPPING

MISC ALIASES

UPC XA - U3100

(WRITE: 0X70 READ: 0X71)

PD WHEN NOT USED

VBUS TO SYS UNDER DB CASE

PU BUSPOWERZ TO LDO_3V3 TO NOT PASS

516S00115

VBUS TO SYS UNDER DB CASE

USES EXT POWER PATH VBUS TO SYS UNDER DB CASE

LAST CHANGE: Fri Aug 5 13:34:33 2016

RIDGE DEBUG CONN

LOCAL BULK CAP

28 OF 73

051-022651.0.0

30 OF 500

VOLTAGE=0V

=I2C_UPC_XB_SCL1

=I2C_UPC_XB_SDA1

=I2C_UPC_XA_SCL1

UPC_XB_SPI_MISOTBT_X_SPI_MOSI

PP0V9_TBT_X_CIOPP0V9_TBT_X_USB

PP0V9_TBT_X_PCIEARKANOID_P7

PCIE_TBT_X_D2R_C_P<3>

UPC_XB_SPI_CLKUPC_XA_SPI_MOSI

TBT_X_SPI_CLK_DBG

TBT_X_CIO_PLUG_EVENT_LDP_X_SNK0_HPD

ARKANOID_P5

TBT_POC_RESETPP3V3_TBT_X_LC

USB_EXTB_P

USB_UPC_PCH_XA_N

MAKE_BASE=TRUE

USB_EXTB_NUSB_UPC_XA_P

NC_USB2_08P

DP_DDI2_AUXCH_C_N

=USB_UPC_XB_PUSB_EXTA_OC_L

MAKE_BASE=TRUE USB_UPC_PCH_XB_N

MAKE_BASE=TRUE USB_UPC_PCH_XB_PUPC_XA_FAULT_L

USBC_XB_CC1USBC_XA_CC1

USBC_XA_USB_TOP_P

TBT_X_XTAL25M_OUT

USB3_EXTA_D2R_PUSB3_EXTA_D2R_N

R3014

0201 MF 1/20W 5%

R3015

0201 MF 1/20W 5%

NO_XNET_CONNECTION=1

2 1

XW3001

201 MF 1/20W 5%

100K

5% 1/20W MF 201 2

201MF1/20W5%

20PF

2 1

C3003

C0G 25V5%

20PF

0201

2 1

201 MF 1/20W 5%

0201 MF 1/20W 5%

1 R3019

201 MF 1/20W 5%

1 R3098

15

201 MF 1/20W 5%

14 13

12 11

10 9

8 7

6 5

4 3

2 1

C3021

0.1UF

10% 16V X5R-CERM

0201

2 1

C3020

PLACE_NEAR=U3100.K5:5MM PLACE_NEAR=U3100.L5:5MM

C3054

0201 X5R 20% 6.3V

2 1

C3056

0201 X5R 20% 6.3V

2 1

C3055X5R 20% 6.3V

0.22UF

0201

2 1

C3053X5R 20% 6.3V

0.22UF

0201

2 1

C3052

0201 X5R 20% 6.3V

0.22UF

2 1

C3051

0201 X5R 20% 6.3V

0.22UF

2 1

C3050

0201 X5R 20% 6.3V

2 1

C3047

0201 X5R 20% 6.3V

2 1

C3046

0201 X5R 20% 6.3V

2 1

C3045

0201 X5R 20% 6.3V

2 1

C3044

0201 X5R 20% 6.3V

0.22UF

2 1

C3043

0201 X5R 20% 6.3V

0.22UF

2 1

C3042

0201 X5R 20% 6.3V

0.22UF

2 1

14 13

12 11

10 9

8 7

6 5

4 3

2 1

F3000

201 MF 1/20W 5%

220UF-35MOHM

CRITICAL

CASE-B2-SM1 2

1C3000

0201 MF 1/20W 5%

1 R3017

0201 MF 1/20W 5%

DRAWING NUMBER SIZE

D

R

SHEET PAGE TITLE

B

TP TP TP TP

BI BI

IN

BI BI

OUT

BI BI

OUT

BI BI

TP

IN

OUT

IN OUT

OUT

OUT OUT OUT

BI BI BI

IN

OUT

OUT BI BI OUT

OUT OUT

BI BI

OUT OUT

IN IN

OUT OUT OUT OUT OUT OUT OUT OUT

OUT OUT OUT OUT OUT OUT OUT

BI

OUT OUT

BI BI

BI

BI BI OUT

IN

Trang 29

PRIMARY ACE USB-C PORT CONTROLLER (UPC)

PRIMARY ONLY PRIMARY ONLY PULL R3109 AND R3108 DOWN TO GND FOR 2ND RIDGE'S ACES

PRESENT FOR GPIO0, GPIO1

USE GPIO3 FOR POWER_GATE_EN

ON DESIGNS WITHOUT AN AUDIO JACK CONNECTOR

USE GPIO2 FOR USB-C ANALOG AUDIO SUPPORT

Add CMC on support page for ridgeless design

PULL R3109 AND R3108 UP TO ACEs LDOs FOR 1ST RIDGE'S ACES

MIN_LINE_WIDTH=0.0180

MIN_NECK_WIDTH=0.2000 VOLTAGE=20V

MIN_NECK_WIDTH=0.2000 MIN_LINE_WIDTH=0.5000 MIN_NECK_WIDTH=0.2000 MIN_LINE_WIDTH=0.5000

31 OF 500

1.0.0 051-02265

=PP3V3_G3H_UPC_XA

UPC_XA_SPI_CS_LUPC_XA_SPI_MISO

I2C_UPC_XA_DBG_CTL_SDA

=I2C_UPC_XA_SDA1I2C_UPC_XA_DBG_CTL_SDA

USBC_XA_CC2USBC_XA_CC1

PP1V1_UPC_XA_LDO_BMC

=PP3V3_UPC_XA_AUX

UPC_XA_FAULT_L

=I2C_UPC_XA_INT2_LUPC_XA_I2C_ADDR

UPC_XA_DBG1UPC_XA_DBG2

=I2C_UPC_XA_SCL1I2C_UPC_XA_DBG_CTL_SCLUPC_XA_HPD_RX

=PPHV_INT_G3H

UPC_XA_RESET

USBC_XA_SBU2USBC_XA_SBU1

USBC_XA_USB_BOT_PUSBC_XA_USB_TOP_NUSBC_XA_USB_TOP_PUSBC_XA_RPD_G2USBC_XA_RPD_G1

UPC_XA_DBG3

UPC_XA_BUSPOWERZTP_UPC_XA_DBG_UART_RX

SYNC_DATE=06/17/2015 SYNC_MASTER=E85-REF

BOM_COST_GROUP=USB-C

USB-C PORT CONTROLLER A

CAP,CER,X5R,0.22UF,20%,6.3V,0201 C3109,C32092

CAP,CER,X5R,0.47UF,10%,6.3V,0201 C3109,C32092

26

0402 CERM 6.3V 20%

2.2UF

2

1 C3104

0402 X5R 35V 10%

1UF

2

1 C3101

0201 CER-X5R25V10%

1 R3108

201 MF 1/20W 5%

220PF

2

1 C3113

0201 C0G 50V 2%

E2 F2

F4 G4

H7

B3

B4 A4 A3

B10 A10

K10 K9

L4 K4

G1 K1 A2

A5 D1

B5 D2

B6 C1

F1

A9

B9 H6

D7 G10 E10 C10 G11 D10 C2 B2

K3 L3 K2 L2

K6 L6 K7 L7

L8 K8

L10 L9 F10

J1 J2

U3100

0201MF1/20W5%

100K

2

1R3111

201 MF 1/20W 5%

100K

2

1R3110

201 MF 1/20W 5%

1 R3105

0402 CERM 6.3V 20%

BRANCH REVISION

DRAWING NUMBER SIZE

D

R

SHEET PAGE TITLE

B

Apple Inc.

OUT IN

NC

BI BI

DEBUG_CTL1

I2C_SDA1 I2C_IRQ1*

I2C_SDA2

LSX_R2P LSX_P2R

C_SBU2 C_SBU1 C_USB_BN

C_USB_TN C_USB_TP RPD_G2 RPD_G1

UART_TX

USB_RP_P

SENSEP SENSEN

UART_RX SWD_CLK SWD_DATA SPI_SSZ

SPI_CLK SPI_MOSI

I2C_SCL2 I2C_IRQ2*

I2C_SCL1 DEBUG_CTL2

BUSPOWERZ

C_CC2 C_CC1

AUX_P AUX_N USB_RP_N

GPIO1 GPIO2

GPIO5 GPIO4 GPIO6

GPIO0

GPIO8 GPIO7

OUT

BI BI

OUT

OUT IN OUT OUT

BI BI

OUT

IN OUT OUT OUT OUT

OUT IN

BI BI

NC

Trang 30

OR FLOAT IF UNUSED VOUT_3V3 FOR RIDGE,

GROUND UPC SPI CONNECT UPC SPI TO ROM

MAX 100uF TOTAL ON RAIL

NC or GND to dissipate heat

CAN GROUND PIN D6 IN PRODUCTION PIN D6 IS UNDOCUMENTED RESET for layout.

Add on

PU to PP3V3_S4 if convenient

FRONT PORT:

TO SMC PULL R3209 AND R3208 UP TO ACEs LDOs FOR 1ST RIDGE'S ACES

REAR PORT:

ON BANSURI DESIGNS USE GPIO2 FOR USB-C ANALOG AUDIO SUPPORT

NEED 0.1%

ON DESIGNS WITHOUT AN AUDIO JACK CONNECTOR

CAP FOR PP_5V0 ON VR PAGE

PRESENT FOR GPIO0, GPIO1TESTPOINTS MUST BE

USE GPIO3 FOR POWER_GATE_EN

MIN_LINE_WIDTH=0.0180 VOLTAGE=3.3V

MIN_NECK_WIDTH=0.2000

MIN_NECK_WIDTH=0.2000 VOLTAGE=20V

MIN_NECK_WIDTH=0.2000 MIN_LINE_WIDTH=0.3500 MIN_NECK_WIDTH=0.2000 MIN_LINE_WIDTH=0.3500

PP3V3_UPC_XB_LDOPP20V_USBC_XB_VBUS_F

=PP3V3_UPC_XB_SX

TP_UPC_XB_DBG_UART_TXUSBC_X_POC_RESET

UPC_XB_BUSPOWERZUPC_XB_FAULT_LDP_XB_HPD

=USBC_XB_RESET_L

TP_UPC_XB_DBG_UART_RXTBT_X_RTD3_CIO_PWR_ENTBT_X_RTD3_USB_PWR_EN

1 R3208

201 MF 1/20W 5%

90-OHM-0.1A

CRITICAL

4

3 2

1UF

2

1 C3201

0201 X5R 6.3V 20%

220PF

2

1 C3213

0201 C0G 50V 2%

E2 F2

F4 G4

H7

B3

B4 A4 A3

B10 A10

K10 K9

L4 K4

G1 K1 A2

A5 D1

B5 D2

B6 C1

F1

A9

B9 H6

D7 G10 E10 C10 G11 D10 C2 B2

K3 L3 K2 L2

K6 L6 K7 L7

L8 K8

L10 L9 F10

J1 J2

U3200

201MF1/20W5%

100K

2

1R3210

201 MF 1/20W 5%

1 R3205

0402 CERM 6.3V 20%

DRAWING NUMBER SIZE

D

R

SHEET PAGE TITLE

B

Apple Inc.

BI BI

OUT

IN

OUT BI BI

IN OUT OUT OUT OUT

NC NC

BI BI

OUT IN OUT OUT

BI

SYM_VER-1

BI BI BI BI

DEBUG_CTL1

I2C_SDA1 I2C_IRQ1*

I2C_SDA2

LSX_R2P LSX_P2R

C_SBU2 C_SBU1 C_USB_BN

C_USB_TN C_USB_TP RPD_G2 RPD_G1

UART_TX

USB_RP_P

SENSEP SENSEN

UART_RX SWD_CLK SWD_DATA SPI_SSZ

SPI_CLK SPI_MOSI

I2C_SCL2 I2C_IRQ2*

I2C_SCL1 DEBUG_CTL2

BUSPOWERZ

C_CC2 C_CC1

AUX_P AUX_N USB_RP_N

GPIO1 GPIO2

GPIO5 GPIO4 GPIO6

GPIO0

GPIO8 GPIO7

OUT BI BI

BI BI

OUT

Trang 31

TBT_TX0

CC2 DP_HPD

LAST CHANGE: Mon Aug 8 12:54:34 2016

(NO LANE REVERSALS ALLOWED.)

514-00062

FOR POR, VERIFY 20% TOLERANCE ON 0.22UF AC COUPLING CAP IS OK

31 OF 73

33 OF 500

1.0.0 051-02265

PP20V_USBC_XA_VBUS PP20V_USBC_XA_VBUS_CONN

USBC_XA_CC1_CONN

USBC_XA_CC2_CONNUSBC_XA_USB_DBG_BOT_N

SAVE_CC2A_BSAVE_CC1A_G

BOM_COST_GROUP=USB-C

USB-C CONNECTOR A

CRITICALTVS DIODE,1LINE,BIDIR,3.5PF,24V,0201

8 3

5 Q3351

NSS60101DMT

WDFN6 1

R3375 0

GND_VOID=TRUE

5% 1/20W MF 0201 2

R3377

1UF

10%

25V X5R 402 2

2 1

R3361

4.02K

1%

1/20W MF

2 1

23 22 19

20 21

25 24

4 5

9 8

1

D3316

OMIT_TABLECRITICAL

5.5V-6.2PF

0201-THICKSTNCL 2

GND_VOID=TRUE 10%

6.3V X5R-CERM

C3373 0.22UF

GND_VOID=TRUE

10% 6.3V X5R-CERM 0201

BRANCH REVISION

DRAWING NUMBER SIZE

D

R

SHEET PAGE TITLE

B

CONN1_VBUS3

CONN1_TX1+

CONN1_TX1-CONN1_VBUS4 CONN1_RFU1

CONN1_D1+

CONN1_CC1

CONN1_D1-CONN1_VBUS5

CONN1_RX2+

CONN1_RX2-SHLD GND

CONN1_VBUS0

CONN1_RX1+

CONN1_RX1-CONN1_CC2 CONN1_RFU2

CONN1_VBUS1

CONN1_D2+

CONN1_D2- CONN1_TX2+

CONN1_TX2-CONN1_VBUS2

BI

BI BI

BI

BI BI

IN IN

OUT OUT

IN IN

Trang 32

(NO LANE REVERSALS ALLOWED.)

ESD DIODES PRESENT)

DP_HPD

BOTTOM CC2 D+/D- SBU2 (RFU2)

DESIGN: X502/MLB_CATZ LAST CHANGE: Fri Aug 5 13:34:33 2016

TBT_TX1

DC PATH TO GND 470K PD PROVIDES (NEEDED EVEN IF

PP20V_USBC_XB_VBUS_CONN

USBC_XB_CC2_CONN

USBC_XB_SBU2

USBC_XB_USB_TOP_PUSBC_XB_USB_BOT_N

USBC_XB_USB_TOP_NUSBC_XB_USB_BOT_P

28 29

17 16

12 13

33 32

1

R3451

201MF1/20W1%

R3450

30

28

201MF1/20W1%

R3460

201MF1/20W5%

DRAWING NUMBER SIZE

D

R

SHEET PAGE TITLE

B

Apple Inc.

SYM 2 OF 2 PORT B

CONN2_RX2+

CONN2_VBUS3 CONN2_RFU1

CONN2_RX2- CONN2_D1+

CONN2_D1-CONN2_CC1 CONN2_VBUS2

CONN2_TX1+

CONN2_TX1-GND

CONN2_RX1+

CONN2_VBUS0

CONN2_RX1-CONN2_RFU2

CONN2_D2+

CONN2_D2-CONN2_CC2 CONN2_VBUS1

CONN2_TX2+

CONN2_TX2-IN IN

BI BI BI

OUT OUT

BI

BI BI IN

Trang 33

TBT T "POC" Power-up Reset

UB601

Output Delay Vth 2.508V nominal

Push-pull 440us +/- 20us

33 OF 73

35 OF 500

1.0.0 051-02265

TBTXPOCRST_SNS TBTXPOCRST_CT

=PP3V3_TBT_X_SXPP3V3_TBT_X_SX

100K

2

1R3505

0201C0G25V5%

1

R3501

0201MF1/20W5%

0

NOSTUFF

2 1

100K

2

1R3502

201 MF 1/20W 1%

DRAWING NUMBER SIZE

D

R

SHEET PAGE TITLE

B

Apple Inc.

ON

S D

GND

IN

IN IN

VCC

CT

SENSE_OUT ENABLE

SENSE

GND

OUT

Trang 34

(GPIO7)(GPIO8)

(GPIO6)(GPIO3)

(GPIO2)(GPIO10)

(GPIO4)(GPIO5)

(GPIO9)

(GPIO11)

(FW changed to BT HOST WAKE)

(FW changed to BT DEVICE WAKE)

37 OF 500

34 OF 73

WLAN_UART_RXWLAN_UART_TXWLAN_ROM_CLKWLAN_ROM_CSSYSCLK_CLK32K_BT_AP

JTAG_WLAN_SEL

RF_G_0_DIPLEXER

PCIE_CLK100M_AP_C_PPCIE_AP_D2R_C_NPCIE_AP_D2R_C_PPCIE_AP_R2D_P

RF_A_0_MATCHRF_0_ANT

RF_G_1_MATCHRF_1_ANT_MATCH_T

RF_G_1_DIPLEXER

WLAN_ROM_MOSI

BT_LOW_PWR_LAP_DEV_WAKE

NC_USB_BTPNC_USB_BTN

AP_PCIE_WAKE_LBT_UART_R2D

AP_RESET_LSMC_WIFI_EVENT_L

RF_G_0_MATCH

TP_JTAG_WLAN_TMSTP_JTAG_WLAN_TRSTJTAG_WLAN_TDITP_JTAG_WLAN_TDO

BT_SPI_MOSI

PCIE_CLK100M_AP_C_N

WLAN_ROM_MOSIWLAN_ROM_CS

PCIE_AP_R2D_N

WLAN_ROM_CLK

=PP3V3_S4_WLAN

WLAN_ROM_ORGWLAN_ROM_MISO

SMC_WIFI_PWR_EN

BT_SPI_MISOBT_SPI_CS_L

BT_UART_RTS_LBT_UART_D2R

12PF

2

1 C3711

0201 CERM 25V 5%

12PF

2

1 C3710

0201 CERM 25V 5%

12PF

2

1 C3709

0201 CERM 25V 5%

U3770

0201 X5R-CERM 10V 10%

0.1UF

2

1 C3770

201MF1/20W5%

100K

2

1R3771

201 MF 1/20W 5%

2

C0G-CERM25V+/-0.1PF2.0PF

R3724

0201 C0G-CERM 25V +/-0.05PF

0.3PF

CRITICALNOSTUFF

2

1 C3725

0201 C0G-CERM25V+/-0.1PF2.0PF

R3725

0201 C0G-CERM 25V +/-0.1PF

R3712

0201 C0G-CERM 25V +/-0.1PF

R3714

0201 C0G-CERM 25V +/-0.1PF

R3723

0201 C0G-CERM25V

R3710

0201 COG-CERM 25V +/-0.05PF

3PF

2

1 C3704

0201 C0G 25V +/-0.1PF

3PF

2

1 C3707

0201 C0G 25V +/-0.1PF

3PF

2

1 C3706

0201 C0G 25V +/-0.1PF

113 112 111 110 109 108 107 106 105 104 103 102 101 100 99 98 97 96 95 94 93 92 91 90 89 88 87 86 85 84 83 82 81 78 75 72 69 67 64 59 57 40 38 37 36 34 33 32 30 29 27 26 24 23

LGA

LBEE5UA1BL-717

CRITICALOMIT_TABLE

60

1

73 74 71 70

77 76

79 80

49 50

55 51 52

53

42 43

41

44 63

45

65 66

62 61 47

17

54 48

46

68

16 3 4

12 13

8 9 56

18 14 7 6

39 28

31 22

U3700

201 MF 1/20W 5%

10K

2

1R3704

201 MF 1/20W 5%

10K

2

1R3703

201MF1/20W5%

3

Q3730

201 MF 1/20W 1%

4.7UF

2

1 C3701

402 X5R 6.3V 20%

DRAWING NUMBER SIZE

D

R

SHEET PAGE TITLE

B

Apple Inc.

IN

IN IN

OUT OUT

OUT IN

VCC

DO(IO1) DI(IO0)

GND

COM

LO HI

OUT

IN

NC NC

(2 OF 2)

THRM_PAD GND

BT_UART_CTS*

BT_UART_RXD BT_UART_TXD

BT_USB_DP BT_USB_DN

WLAN_PCIE_REFCLKP

WLAN_PCIE_TDP0 WLAN_PCIE_TDN0

WLAN_PCIE_CLKREQ WLAN_PCIE_PME

WLAN_PCIE_RDP0 WLAN_PCIE_RDN0 WL_GPIO_9

WL_UART_TX

FAST_RTS_OUT

FAST_UART_RX WL_GPIO_8 FAST_UART_TX

SEC_OUT/JTAG_TDO

HOST_WAKE_BT

BT_GPIO3 5G_CORE1_ANT

2G_CORE1_ANT 5G_CORE0_ANT 2G_CORE0_ANT HSIC_RESUME_FAST_CTS_IN/JTAG_TCK

BT_GPIO5 NC

NC IN

NC

VCC

PAD THRM GND

CS DI

NC ORG DO

SK

D

S G

SYM_VER_2

BI

NC NC

IN OUT

OUT IN OUT IN

NC

NC NC

NC NC IN

IN

Trang 35

WIFI UART ISOLATION

BT UART Isolation

35 OF 73

38 OF 500

051-022651.0.0

PCIE_AP_D2R_NPCIE_AP_D2R_P

PCIE_AP_R2D_C_NPCIE_AP_R2D_C_P

PCIE_CLK100M_AP_CC_P

PCIE_CLK100M_AP_CC_N

PCIE_AP_D2R_CC_NPCIE_AP_D2R_CC_P

PCIE_AP_R2D_CC_NPCIE_AP_R2D_CC_P

PCIE_CLK100M_AP_C_NPCIE_CLK100M_AP_C_P

PCIE_AP_D2R_C_NPCIE_AP_D2R_C_P

PCIE_AP_R2D_NPCIE_AP_R2D_P

WIFI/BT Module Support

0201 CERM 25V 5%

12PF

2

1 C3836

0201 CERM 25V 5%

12PF

2

1 C3832

0201 CERM 25V 5%

12PF

2

1 C3826

0201 C0G 25V +/-0.1PF

3PF

2

1 C3837

0201 C0G 25V +/-0.1PF

3PF

2

1 C3833

0201 C0G 25V +/-0.1PF

3PF

2

1 C3827

0201 CERM 25V 5%

12PF

2

1 C3822

0201 C0G 25V +/-0.1PF

3PF

2

1 C3823

0201 CERM 25V 5%

12PF

2

1 C3834

0201 C0G 25V +/-0.1PF

3PF

2

1 C3835

0201 CERM 25V 5%

12PF

2

1 C3830

0201 C0G 25V +/-0.1PF

3PF

2

1 C3831

0201 CERM 25V 5%

12PF

2

1 C3824

0201 C0G 25V +/-0.1PF

3PF

2

1 C3825

0201 CERM 25V 5%

12PF

2

1 C3820

0201 C0G 25V +/-0.1PF

12PF

2

1 C3896

0201 C0G 25V +/-0.1PF

3PF

2

1 C3897

0201 CERM 25V 5%

12PF

2

1 C3891

0201 C0G 25V +/-0.1PF

25V 5%

100PF

2 1

C3859

0201 C0G

25V 5%

100PF

2 1

C3858

0201 X5R-CERM

16V 10%

0.1UF

2 1

C3853

0201 X5R-CERM

16V 10%

0.1UF

2 1

C3852

0201 X5R-CERM

16V 10%

0.1UF

2 1

C3854

0201 X5R-CERM

16V 10%

0.1UF

2 1

C3857

201MF1/20W5%

7 1

4

5 2

7 1

4

5 2

DRAWING NUMBER SIZE

D

R

SHEET PAGE TITLE

B

Apple Inc.

IN

IN IN

SYM_VER-1

OUT

OUT OUT

IN IN

OUT OUT

IN IN

IN

IN IN

GND

VCC

2OE A2

1OE

Y2

Y1 A1

GND

VCC

2OE A2

1OE

Y2 Y1 A1

Trang 36

PD = 24MHz

PU = 25MHz

36 OF 73

VOLTAGE=0V MIN_NECK_WIDTH=0.1500 MIN_LINE_WIDTH=0.1000 MIN_NECK_WIDTH=0.1500

MIN_NECK_WIDTH=0.1500 MIN_LINE_WIDTH=0.6000 VOLTAGE=0V

39 OF 500

1.0.0 051-02265

GND_CAM_PVSSC

CAM_TEST_MODE

PP1V8_CAM

MIPI_CLK_PMIPI_CLK_N

MIPI_DATA_PMIPI_DATA_N

PCIE_CAMERA_R2D_PPCIE_CAMERA_R2D_N

PCIE_CLK100M_CAMERA_C_PPCIE_CLK100M_CAMERA_C_N

PCIE_CAMERA_D2R_C_PPCIE_CAMERA_D2R_C_N

CLK25M_CAM_CLKPCLK25M_CAM_CLKN

I2C_CAM_SMBDBG_CLKI2C_CAM_SCL

I2C_CAM_SMBDBG_DATI2C_CAM_SDA

TP_CAM_JTAG_TCKTP_CAM_JTAG_TDITP_CAM_JTAG_TDOTP_CAM_JTAG_TMSTP_CAM_JTAG_TRST_LTP_CAM_JTAG_SRST_L

CAMERA_CLKREQ_L

TP_CAM_PCIE_WAKE_LCAMERA_RESET_L

CAM_PWR_SELCAM_DEBUG_RESET_L

CAM_SENSOR_WAKE_LCAMERA_PWR_EN

TP_CAM_GPIO3TP_CAM_RAMCFG2TP_CAM_RAMCFG1TP_CAM_RAMCFG0

TP_CAM_LV_JTAG_TRSTNTP_CAM_LV_JTAG_TMSTP_CAM_LV_JTAG_TDOTP_CAM_LV_JTAG_TDITP_CAM_LV_JTAG_TCKTP_CAM_TEST_MODE2TP_CAM_TEST_MODE1TP_CAM_TEST_MODE0

CAM_XTAL_SELCAM_XTAL_FREQ

TP_CAM_UARTTXD

CAM_TEST_OUT

CAM_UARTRXD

TP_CAM_UARTRTSCAM_UARTCTS

MEM_CAM_CAS_L

MEM_CAM_RAS_LMEM_CAM_WE_L

PP1V8_CAMGND_CAM_PVSSD

A3 D2

B3 B2 C5 A5 B4 B1 C3 B5 F2 F4 F1 F3 D3 E4 E3 C2

C4 C1

L4 J3

H2 G2

H4

K2 L2 K3

R4 P1 L1 R2 J4 P2 P3 N2 P4 M2 M1 M3 N3 M4 L3

K12 M11 R11 B15

L9 L8 L5 L6 F9 F8 F7 F6

J11 F14

G15 F15

K14 K13

N14 M13

J15 J14 J13 H15 H14

N15 M15 M14

L15 L14 L13 L12 K15

R15 P15 P14 N13

M12 G14

D6

C8 D9

C7 C10

D7 L7

N6 N8 N7

N5 G5

N4 K4 G4 D4 A4

E14 E13

D14 D13

J12 M10

C12 C13

H12 R13 E15 G12 N12

B9 C9

A8 B8

R14

B10 A10

B7 A7

P13

P6 P8

R6 R8

P7 R7

D11 D12 F12 E12 F13

C11

R9 C15 R10 D15

N9 N10 N11 P9 P10 P11 P12 R12

L10 L11 K10 K11 J10 H10 H11 G10 G11 F10 F11 E10 E11 A15 B14 C14 B11

U3900

100PF

5%

25V C0G 0201 2

1R3921

100K

5%

1/20W MF 201 2

1R3920

51K

5%

1/20W MF 201 2

1R3976

51K

5%

1/20W MF 201 2

1 C3975

220-OHM-1.4A

0603

2 1

L3904

220-OHM-1.4A

0603

2 1

1 C3931

1.0UF

20%

6.3V X5R 0201-1 2

1 C3930

0.1UF

10%

X5R-CERM 0201 2

1 C3927

100K

5%

1/20W MF

201 2

1

R3990

SM 2 1

XW3901

SM 2 1

2 1

R3912

100K

5%

1/20W MF 201 2

1 C3918

0.1UF

10%

10V X5R-CERM 0201 2

1 C3916

22NH

0402

2 1

1 C3915

4.7UF

20%

6.3V X5R 402 2

2 1

1R3904

100K

5%

1/20W MF 201 2

1 C3910

1.0UF

20%

6.3V X5R 0201-1 2

1 C3921

0.1UF

10%

X5R-CERM 0201 2

1 C3922

1.0UF

20%

6.3V X5R 0201-1 2

1 C3923

0.1UF

10%

X5R-CERM 0201 2

1 C3924

0.1UF

10%

X5R-CERM 0201 2

DRAWING NUMBER SIZE

D

R

SHEET PAGE TITLE

B

Apple Inc.

NC NC NC NC

NC NC NC

NC NC

NC NC NC NC

SYM 2 OF 3

DDR_CS*

DDR_ZQ

DDR_DQ00 DDR_DQ01

DDR_DQ06 DDR_DQ05 DDR_DQ04 DDR_DQ03 DDR_DQ02

DDR_DQ09 DDR_DQ10 DDR_DQ11

DDR_DQ08 DDR_DQ07

DDR_DQ12 DDR_DQ13 DDR_DQ14 DDR_DQ15

DDR_DM1 DDR_DM0

DDR_BA1 DDR_BA0

DDR_AD14 DDR_AD13 DDR_AD12 DDR_AD11 DDR_AD10 DDR_AD09 DDR_AD08 DDR_AD07

DDR_AD05 DDR_AD04 DDR_AD03 DDR_AD02 DDR_AD01 DDR_AD00

DDR_CKE

SYM 3 OF 3

SR_PVSSD

PMU_AVSS PCIE_GND MIPI_AGND

XTAL_AVSS

XTAL_AVDD1P2

VSENSE_D VSENSE_C VDDO18 VDDC

VDD1P8_O VDD1P2_O VDD_3P3A VDD_1P35A SR_VLXD_O SR_VLXC_O SR_VDD_3P3D

SR_VDD_3P3C

OTP_VDD3P3 PLL_VDD1P8 MIPI_AVDD1P8 DDR_AVDD1P8 PCIE_PVDD1P2 PCIE_VDD1P2 DDR_VREF DDR_VDDO_CK

DDR_VDDO DDR_VDDIO

SR_PVSSC

VSSC

SYM 1 OF 3

GPIO_05 GPIO_06 GPIO_07

TEST_MODE

UARTCTS UARTRTS UARTRXD

TEST_OUT UARTTXD

STRAP_XTAL_FREQ STRAP_XTAL_SEL

DEBUG_00 DEBUG_01 DEBUG_02 DEBUG_03 DEBUG_04 DEBUG_05 DEBUG_06 DEBUG_07 DEBUG_08 DEBUG_09 DEBUG_10 DEBUG_11

DEBUG_16

DEBUG_12 DEBUG_13 DEBUG_14 DEBUG_15

GPIO_00 GPIO_01 GPIO_02 GPIO_03 GPIO_04

I2C_DATA_SENSOR I2C_DATA_DBG I2C_CLK_SENSOR I2C_CLK_DBG

XTAL_N XTAL_P

PCIE_TESTN PCIE_TESTP

PCIE_TDN0 PCIE_TDP0

PCIE_REFCLKN PCIE_REFCLKP

PCIE_RDN0 PCIE_RDP0

MIPI_DM1 MIPI_DP1

MIPI_DM0 MIPI_DP0

MIPI_CM_CLK MIPI_CP_CLK

OUT

IN IN

OUT

IN

OUT OUT OUT

BI BI

BI BI BI

IN

BI BI BI BI BI BI BI BI BI BI BI BI BI

OUT OUT

OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT

OUT OUT OUT

OUT OUT

IN IN

OUT OUT

IN IN

OUT

IN

BI OUT

OUT

NC NC

Tiêu đề	Apple Macbook Pro 13 A1708 X502MLB CATZ 820 00840 A
Trường học	Apple Inc.
Thể loại	Engineering Release
Năm xuất bản	2016
Thành phố	Cupertino

Định dạng
Số trang	73
Dung lượng	6,68 MB