apple macbook pro 13 a1278 k24 820 2530

II NOT TO REPRODUCE OR COPY ITIII NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART I TO MAINTAIN THIS DOCUMENT IN CONFIDENCETHE POSESSOR AGREES TO THE FOLLOWING: THE INFORMATION CONTAINED HE

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3 ALL CRYSTALS & OSCILLATOR VALUES ARE IN HERTZ.

1 ALL RESISTANCE VALUES ARE IN OHMS, 0.1 WATT +/- 5%.

III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE

II NOT TO REPRODUCE OR COPY IT

3

B

ECN REV

BRANCH

DRAWING NUMBER

REVISION

SIZED

PROPRIETARY PROPERTY OF APPLE COMPUTER, INC

THE INFORMATION CONTAINED HEREIN IS THE

2 ALL CAPACITANCE VALUES ARE IN MICROFARADS.

PAGE

NOTICE OF PROPRIETARY PROPERTY:

A

C D

B

APPD CK DESCRIPTION OF REVISION

051-7898 C.0.0

35

Right Clutch Connector

04/22/2008YITE

34

DDR3 Support

04/04/2008T18_MLB33

DDR3 SO-DIMM Connector B

05/09/2008BEN

79

12/11/2008YUAN.MA

78

12/11/2008YUAN.MA

77

01/23/2008RAYMOND

76

02/08/2008RAYMOND

75

12/10/2008K19_MLB

58

05/09/2008YUAN.MA

57

04/22/2008YUAN.MA

56

01/18/2008CHANGZHANG

55

03/20/2008YUNWU

54

12/17/2008YUNWU

53

02/04/2008YUNWU

52

04/21/2008BEN

51

05/09/2008CHANGZHANG

50

05/28/2008YUAN.MA

46

01/18/2008YUAN.MA

45

12/04/2008K19_MLB

Date(.csa)

Sync Table of Contents

MCP PCI & LPC

28

27 28 29 30

20

DisplayPort Connector DISPLAYPORT SUPPORT IMVP6 CPU VCore Regulator 1.5V/0.75V DDR3 SUPPLY

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II NOT TO REPRODUCE OR COPY ITIII NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

I TO MAINTAIN THIS DOCUMENT IN CONFIDENCETHE POSESSOR AGREES TO THE FOLLOWING:

3 6

BRANCHREVISION

DRAWING NUMBER SIZE

D

R

SHEETPAGE TITLE

A B C D

PG 56

PG 55HEADPHONE

Audio

AudioCodec

FSB 64-Bit

Prt BSB

PWR

Misc

Port80,serialLPC Conn

PG 34 J4310

J9400

PG 34

FIREWIRE PORTFW643CONN

PG 40

J4710

TRACKPAD/

PG 40 J4720

ConnSATA

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3 6

BRANCHREVISION

DRAWING NUMBER SIZE

D

R

SHEETPAGE TITLE

A B C D

PPVCORE_S0_CPU

PP1V05_ENET_FET

PP5V_S0_FET PP5V_S3_REG

ISL8009

PP5V_S3_REG

VR_ON

(8A MAX CURRENT)

1.05V (S5)

P5VS0_EN Q7940

P3V3S3_EN Q7910

VIN

PM_ENET_EN_L

Q3810

RCDELAY

VOUT ENA

VOUT1

(RT)

FETS

RCDELAY

P5VLTS3_EN DDRREG_EN

CPUVTTS0_PGOOD

P5V_LT_S3_PGOOD

(25A MAX CURRENT)

FETS S3 TO S0

RCDELAY

(12A MAX CURRENT)

U6200

4.5V AUDIOTPS7174S

TPS51125 U7200

TPS622021.5V

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3 6

BRANCHREVISION

DRAWING NUMBER SIZE

D

R

SHEETPAGE TITLE

A B C D

B

BOM OPTIONS BOM NAME

BOM NUMBER

TABLE_BOMGROUP_HEAD

PART NUMBERALTERNATE FORPART NUMBER BOM OPTION REF DES COMMENTS:

TABLE_ALT_HEAD

TABLE_ALT_ITEM

TABLE_ALT_ITEM TABLE_ALT_ITEM TABLE_ALT_ITEM TABLE_ALT_ITEM

TABLE_ALT_ITEM

TABLE_BOMGROUP_ITEM

QTY

SIGNAL(High Speed)

SIGNAL GROUND

GROUND BOTTOM

POWER GROUND

Top 2 3 4 5 6 7

GROUND

SIGNAL

8 9 10 11

DEVELOPMENT BOM

SIGNAL(High Speed) POWER

Bar Code Labels / EEE #’s

337S3769

ALL ALL

337S3704 INTEL P7550 CPU AS ALTERNATE

DEVEL_BOM,BMON_PROD,SMC_DEBUG_YES,XDP,NO_VREFMRGNK24_DEBUG_PROD

K24_DEVEL_PVT

1 PDC,SLB4N,PRQ,2.4,25W,1066,M0,3M,BGAPDC,SLGFG,PRQ,2.53,25W,1066,R0,3M,BGA

CPU_2_66GHZCOMMON,ALTERNATE,K24_MCP,K24_MISC,K24_DEBUG_PROD,K24_PROGPARTS

IC,PSOC+ W/ USB,56 PIN,MLF,CY8C24794

MAGLAYERS AS ALTERNATE ALL

IC,IR CONTROLLER,M97

CPU_2_0GHZ

U1000U1000

104S0023104S0018

ALL DELTA AS ALTERNATE

128S0218128S0093

MAGLAYERS AS ALTERNATE ALL

826-4393 1 LBL,P/N LABEL,PCB,28MM X 6 MM [EEE:6GD] CRITICAL EEE_6GD

K24 MLB DEVELOPMENT BOM

826-4393 1 LBL,P/N LABEL,PCB,28MM X 6 MM [EEE:6G4] CRITICAL EEE_6G4826-4393 1 LBL,P/N LABEL,PCB,28MM X 6 MM [EEE:6GC] CRITICAL EEE_6GC

CPU_2_53GHZLPCPLUS

K24_COMMON,CPU_2_53GHZ,EEE_6GD,KB_BL630-9924

K24_COMMON,CPU_2_26GHZ,EEE_6GC,KB_BL630-9923

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3 6

BRANCHREVISION

DRAWING NUMBER SIZE

D

R

SHEETPAGE TITLE

A B C D

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3 6

BRANCHREVISION

DRAWING NUMBER SIZE

D

R

SHEETPAGE TITLE

A B C D

(NEED 4 TP)

BATT POWER CONN

(NEED 3 TP) (NEED TO ADD 3 GND TP)

SATA ODD CONN

CONN_USB2_BT_N TRUE

MINI_CLKREQ_Q_L TRUE

MINI_RESET_CONN_L

PCIE_MINI_R2D_N TRUE

PCIE_WAKE_L TRUE

SMBUS_SMC_A_S3_SCL TRUE

Z2_KEY_ACT_L TRUE

Z2_RESET TRUE

TRUE Z2_CLKIN

Z2_BOOST_EN TRUE

TRUE Z2_MISO

CONN_USB2_BT_P TRUE

USB_CAMERA_CONN_N TRUE

TRUE PCIE_CLK100M_MINI_CONN_P

TRUE PCIE_MINI_D2R_P TRUE PP5V_S3_BTCAMERA_F

TRUE PCIE_CLK100M_MINI_CONN_N

PCIE_MINI_R2D_P TRUE

PCIE_MINI_D2R_N TRUE

SPKRAMP_SUB_P_OUT TRUE

SPKRAMP_SUB_N_OUT TRUE

SPKRAMP_R_P_OUT TRUE

TRUE ADAPTER_SENSE

LVDS_IG_DDC_CLK TRUE

LVDS_IG_DDC_DATA TRUE

TRUE BI_MIC_SHIELD

PP3V3_S0_LCD_F TRUE

TRUE PP5V_S0

TRUE LVDS_IG_A_DATA_P<1>

PP3V3_LCDVDD_SW_F TRUE

PP5V_WLAN TRUE

LED_RETURN_3 TRUE

WS_KBD10 TRUE

PP18V5_DCIN_FUSE TRUE

FAN_RT_PWM TRUE

PSOC_MOSI TRUE

TRUE Z2_CS_L

BI_MIC_LO TRUE

TRUE FAN_RT_TACH

SPKRAMP_R_N_OUT TRUE

SPKRAMP_L_P_OUT TRUE

SPKRAMP_L_N_OUT TRUE

TRUE WS_KBD8

WS_KBD14 TRUE

TRUE

WS_KBD6 TRUE

WS_KBD7 TRUE

TRUE LVDS_IG_A_DATA_N<2>

WS_KBD9 TRUE

TRUE Z2_HOST_INTN

TRUE Z2_DEBUG3

PP18V5_S3 TRUE

USB_CAMERA_CONN_P TRUE

PP3V3_S3_LDO TRUE

PICKB_L TRUE

PSOC_F_CS_L TRUE

TRUE SMBUS_SMC_A_S3_SCL

TRUE PSOC_SCLK TRUE SMBUS_SMC_A_S3_SDA

SYS_DETECT_L TRUE

TRUE PP3V42_G3H TRUE SMBUS_SMC_BSA_SCL TRUE SMBUS_SMC_BSA_SCL TRUE SMC_BIL_BUTTON_L

SMC_LID_R TRUE

LVDS_IG_A_CLK_F_P TRUE

LVDS_IG_A_CLK_F_N TRUE

LED_RETURN_2 TRUE

LED_RETURN_1 TRUE

MCPTHMSNS_D2_P TRUE

TRUE MCPTHMSNS_D2_N

PPVCORE_S0_CPU TRUE

PPVCORE_S0_MCP TRUE

PP1V05_S0 TRUE

PP0V75_S0 TRUE

PP1V5_S0 TRUE

TRUE PP5V_S0

PP1V8_S0 TRUE

PP1V5_S3 TRUE

PP3V3_S0 TRUE

PP3V3_S3 TRUE

TRUE PP5V_S3

PP1V1R1V05_S5 TRUE

PP3V3_S5 TRUE

PP1V2R1V05_ENET TRUE

PP3V42_G3H TRUE

PPBUS_G3H TRUE

TRUE PP3V3_ENET_PHY

PP3V3_G3_RTC TRUE

PP5V_WLAN TRUE

PP5V_SW_ODD TRUE

PP5V_S0_HDD_FLT TRUE

PP3V3_S5_AVREF_SMC TRUE

PP18V5_S3 TRUE

PP4V5_AUDIO_ANALOG TRUE

PP3V3_S3_LDO TRUE

TRUE PP3V3_LCDVDD_SW_F TRUE

TRUE SMC_PM_G2_EN

PM_SLP_S4_L TRUE

PM_SLP_S3_L TRUE

BATT_POS_F TRUE

SATA_ODD_D2R_C_N TRUE

TRUE

WS_KBD3 TRUE

TRUE WS_KBD2 TRUE WS_KBD1 TRUE PP3V42_G3H TRUE PP3V3_S3

TRUE LED_RETURN_4

LED_RETURN_5

SATA_ODD_R2D_N TRUE

TRUE TP_BKL_SYNC

TRUE WS_KBD12 TRUE

TRUE WS_KBD13

SATA_HDD_R2D_N TRUE

WS_KBD16_NUM TRUE

WS_KBD15_CAP TRUE

TRUE WS_KBD17 TRUE PP5V_S0_HDD_FLT

SATA_HDD_D2R_C_P TRUE

SATA_HDD_D2R_C_N TRUE

TRUE SMBUS_SMC_BSA_SCL TRUE

SATA_ODD_R2D_P TRUE

SATA_ODD_D2R_C_P TRUE

SMC_ODD_DETECT TRUE

SYS_LED_ANODE_R TRUE

TRUE PP5V_S3_IR_R TRUE IR_RX_OUT

TRUE PP5V_SW_ODD

TRUE WS_KBD20 TRUE WS_KBD18

TRUE WS_KBD23

KBDLED_ANODE TRUE

TRUE WS_LEFT_OPTION_KBD TRUE WS_LEFT_SHIFT_KBD TRUE WS_KBD_ONOFF_L TRUE WS_KBD21

TRUE WS_CONTROL_KBD

TRUE WS_KBD19

TRUE WS_KBD22

SATA_HDD_R2D_P TRUE

I378 I377

I376

I375 I374 I372 I371 I370 I369 I368 I366 I365 I364 I363 I362 I361

I360 I358 I357

I356

I355

I353 I352 I351 I350 I349 I348 I347 I346 I344

I343 I342 I341 I340 I339 I338 I337 I336 I335 I333 I332 I331 I330

I329 I328 I327

I296 I295

I294 I293

I292 I291 I290 I289 I288

I287 I285 I284

I283 I282 I281 I280

I279 I278

I276 I275 I274 I272 I271

29C7 75D3

16B6 29C7 6C5 43D2 79D3 6C5 43D2 79D3

48C8 49C3

48C6 48D2

48C8 49C3

48C8 49C1 48C8 49C1 48C8 49C1 48C6 49C3 49C3 49C5 48C8 49C3

29B7 76C3

29C7 75D3

16B6 29C7 75D3 29C7

29C7 75D3

29C7 75D3 16B6 29C7 75D3

55C2 56B2 55B2 56B2 55C2 56B2

58D7

17B3 68C5 17A3 68C5 17B3 68C2 75B3

17B3 68C2 75B3 17B3 68C2 75B3

56C2 57B1 56C2 57B1

68C3 6D3 7D5

17B3 68C2 75B3 6C3 68C2

6C3 29C5

56C2 57B1 47C4

55C2 56A2 55B2 56B2

48C6 48D2

48C2 48C6

48C6 48D2 48C6 48D2 48D2 48C6 17B3 68C2 75B3

48C6 48D2

48D8 49C3

48C8 49C3 6C3 49C1 49D3 29B7 76C3

6C3 49B4 49C3

48D8 49C1 48C8 49C1 6D5 43D2 79D3 48C8 49C1 6D5 43D2 79D3

58A8

6B5 6D3 7D1 6A7 43C5 79D3 6A7 43C5 79D3 40C5 58C4 58C2

68C2 75B3 68C2 75B3 68B3 71B1 68B3 71B1

46B5 80D3 46B5 80D3

7D7 7D7 7C6 6D7 7D5 7B6 7D3 6B5 7D3 7C3 7B3

7B5

6A7 6B5 7D1 7C1 7B5 20C8 21A5 24D4 6D5 29C5 6B7 37D3 6B7 37B6 40D4 41C6 6C5 49C1 49D3

52A5 52D2 52D7

6C5 49B4 49C3 6C7 68C2 6C7 68B2 71C1 40D5 60C5 66D8 20C3 40C5 41A2 66C8 20C3 32B7 35A5 40C5 66D5 70D8

58B8 59A3 58A7

75A3 37C6

68B3 71A1

48C6 48D2 48C6 48D2 6A7 6D3 7D1 6D3 7D3

68B3 71B1 68B3 71B1

6A7 37C6 75A3

48C6 48D2 48D2 48C6 48C6 48D2

75A3 37A5

48C2 48C2 48C2 48D6 37B6

6C3

75A3 37B5 75A3 37B5

6A7 43C5 79D3 79D3 43C5

37C6 75A3 75A3 37C6 40B8 37C7

37A7 37A7 39D4 37A7

6C3 37D3

48C2 48D7 48C2 48D7

48C2 48D7

49A4 49A6 49A4

48B3 48B5 48C2 48C2 48C2 48D7

48B3 48B5 48C2

48C2 48D7 48C2 48D7 75A3

37A5

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3 6

BRANCHREVISION

DRAWING NUMBER SIZE

D

R

SHEETPAGE TITLE

A B C D

B

PEX & SATA AVDD/DVDD aliases

(MCP VCORE AFTER SENSE RES)

(BEFORE HIGH SIDE SENSING RES.)

& CPU VTT SENSING RES.)

=PP3V42_G3H_SMCUSBMUX

=PP3V42_G3H_PWRCTL

=PPVIN_S5_SMCVREF

MAKE_BASE=TRUEMIN_NECK_WIDTH=0.2 mmVOLTAGE=1.5VMIN_LINE_WIDTH=0.6 mmPP1V5_S3

=PP1V0_FW_FWPHY

MAKE_BASE=TRUEMIN_LINE_WIDTH=0.6 MMPP3V3_FW

PP1V1R1V05_S5

MIN_LINE_WIDTH=0.6 MMMAKE_BASE=TRUE

VOLTAGE=1.25VMIN_NECK_WIDTH=0.3 MM

PP18V5_G3H

=PP18V5_DCIN_CONN

MIN_NECK_WIDTH=0.2 mmMAKE_BASE=TRUEVOLTAGE=1.05V

PP3V3_ENET_PHY

VOLTAGE=3.3VMIN_LINE_WIDTH=0.4 MM

=PP1V05_ENET_MCP_RMGT

MAKE_BASE=TRUEMIN_NECK_WIDTH=0.2 MMVOLTAGE=1.05V

=PPVP_FW_PORT1

PPVP_FW

MIN_LINE_WIDTH=0.4 mmVOLTAGE=12.6VMAKE_BASE=TRUE

PP1V5_S0

MAKE_BASE=TRUE

PP0V75_S0

MIN_LINE_WIDTH=0.4 mmVOLTAGE=0.75VMIN_NECK_WIDTH=0.2 mm

VOLTAGE=1.05VMIN_LINE_WIDTH=0.6 MMPPVCORE_S0_MCP

26D7 37B8 67D6

43D3 61B3 43B5

6D3 6B5

29A6 25D8 27D7

48A6 48B5 48C5 48D2 30D7 63D4

37B3 62D8

67B8 37D5 55B7 55C7 55D7 52A8 52D2 54D5 56B6 61C5 49B6 49D7 29C1

67A3 67D4 41B8

37A8 39D7 29C3 38C7 60B8

50B7 20A3

6D3

67D3

69B6 9D5 10C6 11B6 12D6

35C7 6D3

25D3 61D8

67C6

7A8 22D8 22D4 6D3

66A8

20C2 21B3 22B8

43D8

23C7 23D4 6D3 67B6

22B6 20D3 20D8 22A8

62D8 68C5

47C5 52A8 52D2 56D8 57B8 57D3

43D5 43C3 37C7 37D6 12D6 6D3 6D7

34D8

35C7 34B1 36D5 35D4

35B1

36C6

67C8 32D5 67D8 66B3 68C8 6D3

32C5 21B3 22B8

28C4 24B8

32C4 21A3 22D8 65A5

31D2

70D8 36A7

10B6 11B6

52D7

10B5 10D6 11D6 44D8

17A6 23D7 64C2

19B6

44D8 61C8

6D3

66B5 64C8 49A5 42D5

45B8 44B8 35B7 60C6 60C7 60C3 6C3

45B7

59C1

63D5

64C6 62C3 62D4 62D8

19B6 19B6 16A6 16A3

22D2

58C8 58D1 62D1

67D1

15C3 15C7 22C8 66A8

27A4 26A4 67B3

35C5

36C3 60B1

31D7 17D3 17D7 22A5 22B6

65B6 27B3 6D3 6D3

6D3 63B8

63C1

63C7

35C6 65B3 13A2 13B7 21D3 22C8

28C6 58B4

59A8 59C6 59D5 43C5

48B5 48C2 48C3 48C5 58C2 58C4 40D4 41C1 41C7 41D8 41C3 42C7 42C8 42D5 24D8 45B8 58D2

59D8 56B6

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3 6

BRANCHREVISION

DRAWING NUMBER SIZE

D

R

SHEETPAGE TITLE

A B C D

B

QTY

EMI POGO PINS

ABOVE CPU

EMI IO POGO PINS

PCI-E ALIASES HEATSINK STANDOFFS

MLB MOUNTING (TO TOPCASE) SCREW HOLES

1/16W

21

13A7 73C3 9B4

R0940

1

2

MF-LF5%

0

1

R0950 NOSTUFF

402MF-LF5%

1/16W

2

122

R0931

SYNC_MASTER=M97_MLB

SIGNAL ALIAS

MIN_NECK_WIDTH=0.2MMVOLTAGE=0V

MAKE_BASE=TRUE

LVDS_IG_B_DATA_P<3:0>

MAKE_BASE=TRUENC_LVDS_IG_B_DATA_N<3:0>

MAKE_BASE=TRUETP_USB_EXTC_P

USB_MINI_NUSB_MINI_P

TP_GMUX_JTAG_TDO

MAKE_BASE=TRUE

TP_GMUX_JTAG_TDITP_GMUX_JTAG_TMS

GMUX_JTAG_TCK_L

MCP_CLK27M_XTALIN

NC_MCP_CLK27M_XTALOUT

MAKE_BASE=TRUENO_TEST=TRUE

MAKE_BASE=TRUENC_CRT_IG_B_COMP_PBNO_TEST=TRUE

MAKE_BASE=TRUE

MAKE_BASE=TRUENC_CRT_IG_G_Y_Y

TP_MEM_B_A15

MAKE_BASE=TRUEMAKE_BASE=TRUETP_MEM_A_A15

NC_PEG_R2D_C_P<15:0>

=MCP_MII_COL

TP_PEG_CLK100M_P

MAKE_BASE=TRUEMAKE_BASE=TRUETP_PEG_CLK100M_N

NC_LVDS_IG_B_CLK_NNO_TEST=TRUE MAKE_BASE=TRUE

LVDS_IG_B_DATA_N<3:0>

NC_CRT_IG_R_C_PR

MAKE_BASE=TRUETP_PCIE_EXCARD_R2D_C_P

TP_PCIE_EXCARD_PRSNT_L

MAKE_BASE=TRUEMAKE_BASE=TRUETP_EXCARD_CLKREQ_L EXCARD_CLKREQ_L

MAKE_BASE=TRUENC_LVDS_IG_B_DATA_P<3:0>

NO_TEST=TRUE

MAKE_BASE=TRUENC_LVDS_IG_B_CLK_P

NO_TEST=TRUE

MAKE_BASE=TRUETP_PCIE_EXCARD_R2D_C_N PCIE_EXCARD_R2D_C_N

PCIE_EXCARD_R2D_C_P

PCIE_EXCARD_PRSNT_L

PCIE_EXCARD_D2R_P

MAKE_BASE=TRUETP_PCIE_EXCARD_D2R_P

MAKE_BASE=TRUETP_USB_EXTD_P

USB_EXTD_P MAKE_BASE=TRUE

MAKE_BASE=TRUETP_USB_EXCARD_P MAKE_BASE=TRUETP_USB_EXTD_N

USB_EXTD_N

=MCP_MII_RXER

NC_MCP_TV_DAC_RSETNO_TEST=TRUE MAKE_BASE=TRUENC_MCP_TV_DAC_VREFNO_TEST=TRUE MAKE_BASE=TRUEMCP_TV_DAC_RSET

=MCP_BSEL<0:2>

MAKE_BASE=TRUECPU_BSEL<0:2>

GMUX_JTAG_TDIGMUX_JTAG_TDOCPU_PECI_MCP

TP_PCIE_CLK100M_EXCARD_P

MAKE_BASE=TRUE

NC_LVDS_IG_A_DATA_N3NO_TEST=TRUE MAKE_BASE=TRUE

NC_LVDS_IG_A_DATA_P3

NC_CRT_IG_HSYNC

MAKE_BASE=TRUECRT_IG_HSYNC

CRT_IG_B_COMP_PB CRT_IG_G_Y_Y CRT_IG_R_C_PR

MAKE_BASE=TRUE

TP_USB_MINI_P

TP_USB_EXCARD_N

MAKE_BASE=TRUEUSB_EXCARD_P

SMSM

1.4DIA-SHORT-EMI-MLB-M97-M98

OMIT ZS0908

1

SM

OMIT ZS0903

16C3

19D3 19D3

17B3 17B3

16B6

17D6 16B6

17C6

31C6 31C2

16D3 16C3

32C5 17C3

26D5

17C6 17C6

16C3

31C2

20C3 27D5

17D6

17B3

16C6 16B3 16B3 16C6 16B6

35C8 34B2

17C3 17C3 17C3 17C3

19C3

Trang 9

BIBIBIBIBIBIBIBIBIBIBIBIBIBIBI

ININININOUTIN

BIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBI

BIBIBIBIBIBIBIBIBIBIBIBIBIBIBI

OUTOUTOUT

BIBIBIBIBIBIBIBIBIBIBIBI

BIBIBIBI

BI

BIBI

BIBIBIBI

BI

BIBIBIBI

BI

OUT

OUTOUT

OUT

IN

ININININ

IN

ININ

OUT

ININ

INININ

INOUT

BIBIBIBI

BSEL0BSEL1BSEL2

THERMDAPROCHOT*

DBR*

TRST*

TMSTDOTDIPREQ*

LINT1LINT0STPCLK*

BRANCHREVISION

DRAWING NUMBER SIZE

D

R

SHEETPAGE TITLE

A B C D

B

CHANGE CPU FROM SOCKET TO BGA SYMBOL

SYNC FROM T18

CPU JTAG Support

PLACEMENT_NOTE (all 4 resistors):

FSB_BNR_L

FSB_DEFER_LFSB_DRDY_L

FSB_BREQ0_L

CPU_IERR_L

FSB_CPURST_LFSB_RS_L<0>

FSB_RS_L<1>

FSB_RS_L<2>

FSB_TRDY_L

FSB_HIT_LFSB_HITM_L

CPU_PROCHOT_LCPU_THERMD_P

PM_THRMTRIP_L

FSB_CLK_CPU_PFSB_CLK_CPU_N

CPU_PSI_LFSB_CPUSLP_LTP_CPU_TEST7

TP_CPU_TEST6TP_CPU_TEST3

SYNC_DATE=12/12/2007 SYNC_MASTER=T18_MLB

CPU FSB

U1000

N3P5P2P4P1R1

Y2U5W6

A6

U4Y5U1R4T3W2W5Y4J4

U2V4W3AA4AB2

L5L4K5M3J1

H1

M1

V1

A22A21

E2

AD4AD3AD1AC4

G5

F1

C20

E1H5F21

A5

G6E4D20

D21

K3H2K2J3

C1F3F4G3

M4N5V3B2F6D2D22D3

A3D5

AC5AA6AB3

A24B25C7AB5G2

402

U1000

B22B23C21

R26U26AA1Y1

E22F24

J24J23H22F26H23

N22K25P26R23E26

L23L22M23P25P23T24R24L25G22

T25N25

Y22AB24V24V26V23T22U25F23

Y25W22Y23W24AA23AA24AB25

AE24AD24G25

AA21AB22AB21AD20AE22AF23AC25AD21E25

AC22AD23AF22AC23

E23G24

J26

L26

Y26

AE25H26

C23D25C24AF26AF1C3

FCBGA

PENRYN

OMIT

C10141 2

PLACEMENT_NOTE=Place C1014 within 12.7mm of CPU

2402MF-LF

MF-LF

649

402

13C6 73C3

R1093

1 2 1%

13A3 73B3

13A3 73C3

13B3 73B3 13B3 73B3 46D5 80D3

9A6 12B3 73A3 9B6 12B3 73A3 9A6 12B6 73A3

13B6 73C3 13A6 73C3 13A6 73C3 13A6 73C3 12C2 13A3 73C3 13A3 73C3

13B7 41C4 73B3 46D5 80D3

13B6 41D4 62C8 73C3 12B3 24A3

9B6 12B3 73A3

12C6 73A3 12C6 73A3

12C6 73A3 12C6 73A3 13B6 73C3 13B6 73C3

13B6 73C3

13B6 73C3 13B6 73C3 13B6 73C3 13B3 73C3 13B6 73C3 13B6 73C3

13B6 73C3

13C6 73C3

13B6 73D3

13C6 73D3

13D6 73D3

8B2 73C3 8B2 73C3 8B2 73C3

13D6 73D3 13D6 73D3 13D6 73D3 13C3 73D3 13C3 73D3 13C3 73D3 13C3 73D3 13C3 73D3 13C3 73D3 13C3 73D3 13C3 73D3 13C3 73D3 13C3 73D3 13C3 73D3 13D3 73D3 13D3 73D3 13D3 73D3 13D3 73D3 13D3 73D3

13D6 73D3 13D6 73D3 13D6 73D3 13D3 73D3 13D3 73D3 13D3 73D3 13D3 73D3 13D3 73D3 13D3 73D3 13D3 73D3 13D3 73D3 13D3 73D3 13D3 73D3 13D3 73D3 13D3 73D3 13D3 73D3 13D3 73D3 13D3 73D3 13D3 73D3

12C7 13A3 73C3 62C7 13A3 73B3 13A3 73B3 13A3 73B3 13A3 62C7 73B3

13D6 73D3 13D6 73D3 13D6 73D3 13B3 73D3 13B3 73D3 13B3 73D3 13B3 73D3 13B3 73D3 13B3 73D3 13B3 73D3 13B3 73D3 13B3 73D3 13B3 73D3 13B3 73D3 13B3 73D3 13B3 73D3 13D6 73D3 13D6 73D3 13D6 73D3 13C3 73D3 13C3 73D3 13C3 73D3 13C3 73D3 13C3 73D3 13C3 73D3 13C3 73D3 13C3 73D3 13C3 73D3 13C3 73D3 13C3 73D3 13C3 73D3

R10211

2

Place within 12.7mm of CPU

402 MF-LF 1%

R10061

R10051

73B3

7D7 10C6 11B6 12D6

73B3 73B3 73A3 73B3 25B1

73B3

9C6 12B6 73A3

9C6 12B3 73A3

Trang 10

OUTOUT

VCC

VCCP

VCCA

VID0VID1VID2

VID4VID5VID6

BRANCHREVISION

DRAWING NUMBER SIZE

D

R

SHEETPAGE TITLE

A B C D

(CPU CORE POWER)

(CPU INTERNAL PLL POWER 1.5V)(CPU IO POWER 1.05V)

CPU Power & Ground

PLACEMENT_NOTE=Place R1100 within 25.4mm of CPU, no stubs

1/16W1%

100

402MF-LF

T4R25R22R5R2P24P21P6

P3B6

N26N23N4M25M22M5M2L24L21AF2

L6L3K26K4K1J25J22J5

A23

H24H21H6H3G26G23G1G4F25

A19

F2F19F16F13F8F5E24E19A16

E16E14E8E6E3D26D23D19

A14

D13D11D8D4C25C22C2C19

A11

C14C11C8

A25AF21C5

AF19AF16AF13AF11AF8AF6A2AE26AE23

B24

AE16AE11AE8AE4AD25AD22AD16B21

AD13AD11AD8AD2AC24AC21AC19AC16AC14B19

AC11AC8AC6AB26AB23AB19AB13

B16

AB8AB4AA25AA19AA16AA14AA8B13

AA5AA2Y24Y6Y3W26W23W4W1B11

A8A4

AF7

N6N21M21K21J21M6J6

W21V21T6T21R6R21

V6G21

C26B26

AF20AF18AF17AF15AF14AF12AF9AE20AE18B7

AE17AE15AE13AE10AE9AD18AD17AD14A20

AD12AD10AD9AC18AC17AC15AC13AC9

A18

AC7AB7AB20

AB18AB15AB14AB12AB10

A17

AB9AA20AA18AA17AA15AA12AA10AA9AA7A15

F20F18F17F15F14F10F9F7E20A13

E18E17E15E13E10E9E7D18

A12

D15D12D10D9C18C17C15C13C12A10

C10C9B20B18B17B14B12B10B9

A9A7

U1000

62A5 73A3 62A5 73A3 62C7 73A3

PLACEMENT_NOTE=Place R1101 within 25.4mm of CPU, no stubs

1/16W1%

100

402MF-LF2

1R1101

62C7 73A3 62C7 73A3 62C7 73A3 62C7 73A3

7D7 10D6 11D6

7D7 9D5 11B6 12D6

7B6 11B6 7D7 10B5 11D6

Trang 11

3 6

BRANCHREVISION

DRAWING NUMBER SIZE

D

R

SHEETPAGE TITLE

A B C D

REMOVE NO STUFF CAPS C1220 TO C1231

CPU VCore HF and Bulk Decoupling

REMOVE C1244 & C1245

CHANGE C1240-C1243 AND C1260 FROM 128S0241(9 MILLI-OHM) TO 128S0231(6 MILLI-OHM)

4X 330UF 20X 22UF 0805

VCCP (CPU I/O) DECOUPLING

VCCA (CPU AVdd) DECOUPLING

CRITICALPlace on secondary side

3 1 D2T-SM

470UF-4MOHM

2.0V 20%

3 2 1 D2T-SM POLY-TANT 20%

2.0V

470UF-4MOHMCRITICAL

Place on secondary side

D2T-SM 20%

2.0V POLY-TANT

3 2

1

C1241

470UF-4MOHMCRITICAL

Place on secondary side

6.3V60320%

10uF

C125012

PLACEMENT_NOTE=Place C1281 near CPU pin B26

10%

402CERM16V

0.01UF

C12511

2

CRITICALPlace inside socket cavity on secondary side

CERM-X5R6.3V20%

22UF

805

C12181

2

10V402

0.1UF

CERM20%

C12661

2

0.1UF

CERM10V40220%

C12651

210V402

0.1UF

CERM20%

C12641

2C126310V402

0.1UF

CERM20%

1

210V402

0.1UF

CERM20%

C12621

2

805

22UF

20%

6.3VCERM-X5R

C12171

2

805

22UF

20%

6.3VCERM-X5R

C12151

2

805

22UF

20%

6.3VCERM-X5R

C12091

2

805

22UF

20%

6.3VCERM-X5R

C12051

2

10V402

0.1UF

20%

C12611

CERM2

8051

2

22UF

CERM-X5R6.3V20%

22UF

805

C12001

2

805

22UF

20%

6.3VCERM-X5R

C12191

2CERM-X5R

6.3V20%

805

22UFCRITICALPlace inside socket cavity on secondary side

C12111

2

CERM-X5R6.3V20%

805

22UF

C12121

2

22UF

80520%

6.3VCERM-X5R

C12131

2

805

22UF

20%

6.3VCERM-X5R1

2C1201

CERM-X5R6.3V20%

805

C12021

2

22UF

805

22UF

20%

6.3VCERM-X5R

C12071

2

805

22UF

20%

6.3VCERM-X5R

C12031

2

CERM-X5R6.3V20%

22UF

805

C12081

2

CERM-X5R6.3V20%

805

C12141

2

22UF

CERM-X5R6.3V20%

22UF

805

C12161

22UF

805

C12041

2.0V D2T-SM2

PLACEMENT_NOTE=Place C1260 between CPU & NB

POLY-TANT

CRITICAL330UF

22UF

C12061

2

Place inside socket cavity on secondary side

805

7D7 9D5 10C6 12D6

7B6 10B6

7D7 10B5 10D6

Trang 12

BI

BIBI

OUT

IN

BI

ININ

OUT

OUTOUT

BI

BIBI

BIBIBIBI

OUT

IN

OUTOUTOUTOUT

NC

IN

ININ

3 6

BRANCHREVISION

DRAWING NUMBER SIZE

D

R

SHEETPAGE TITLE

A B C D

DBR#/HOOK7

TDO

RESET#/HOOK6HOOK2

OBSDATA_D0OBSDATA_C3

VCC_OBS_CDITPCLK#/HOOK5

Direction of XDP module

OBSDATA_A2OBSDATA_A1

OBSDATA_B0

Use with 920-0620 adapter board to support CPU, MCP debugging

OBSFN_A0OBSFN_A1

OBSDATA_A0

OBSFN_B1

OBSDATA_D2OBSDATA_D3

OBSFN_D0

VCC_OBS_AB

NOTE: This is not the standard XDP pinout.

on even-numbered side of J1300Please avoid any obstructions

Mini-XDP Connector

OBSDATA_C0OBSFN_C0

OBSDATA_A3

TCK0TCK1PWRGD/HOOK0

XDP_DBRESET_L

XDP_TRST_LXDP_TDIXDP_TMS

JTAG_MCP_TMSMCP_DEBUG<2>

XDP_TCKSMBUS_MCP_0_DATAJTAG_MCP_TCKPM_LATRIGGER_L

=PP1V05_S0_CPU

XDP_OBS20

TP_XDP_OBSDATA_B3

XDP_PWRGDTP_XDP_OBSDATA_B2TP_XDP_OBSDATA_B1TP_XDP_OBSFN_B1TP_XDP_OBSFN_B0XDP_BPM_L<2>

XDP_BPM_L<4>

CPU_PWRGD

SMBUS_MCP_0_CLKTP_XDP_OBSDATA_B0XDP_BPM_L<5>

eXtended Debug Port(MiniXDP)

151719

5412

53

LTH-030-01-G-D-NOPEGS

XDP_CONNCRITICAL

J1300F-ST-SM

595755

4143

353937

3133

252729

2123

1397514681014

2016182224263028

3432

384036

42464850

5652

5860

18C4

9C6 24A3

9B6 9C6 73A3 9A6 9C6 73A3

13B3 73B3 13B3 73B3

20B7

18D7 76D3 18D7 76D3 18D7 76D3 18D7 76D3

20B7 20B7

20B7

9C6 73A3 9C6 73A3 9C6 73A3 9C6 73A3

402 MF-LF 5%

1K

R1303PLACEMENT_NOTE=Place close to CPU to minimize stub

XDP

1 2 9D6 13A3 73C3

9A6 9C6 73A3

9C6 73A3 9C5 73A3

C1301

1 2 402 16V

XDP0.1uF

10%

C13001 2 X5R

XDP0.1uF

1/16W

54.9

MF-LF

20C3 43D8 76B3 20C3 43D8 76B3

R1399

1 2 1/16W 5%

XDP

MF-LF 402

1K

9B2 13A3 73C3

7C5

73A3

7D7 9D5 10C6 11B6

Trang 13

OUTBI

BIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBI

BIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBI

BIBIBIBIBIBIBIBIBIBIBI

BIBI

BIBIBIBIBIBIBIBIBI

INBIOUT

OUTOUTOUT

OUTOUTOUTOUTOUT

OUTOUTOUTOUT

OUT

OUTOUTOUTOUT

OUTOUTIN

BIBI

BCLK_IN_N

CPU_A20M#

CPU_NMICPU_INTR

BRANCHREVISION

DRAWING NUMBER SIZE

D

R

SHEETPAGE TITLE

A B C D

B

Loop-back clock for delay matching

(MCP_BSEL<2>)(MCP_BSEL<1>)

FSB_TRDY_L

CPU_PECI_MCPCPU_PROCHOT_L

FSB_CLK_CPU_P

FSB_CLK_ITP_PFSB_CLK_ITP_N

FSB_CLK_MCP_NFSB_CLK_MCP_P

CPU_A20M_LCPU_IGNNE_LCPU_INIT_LCPU_INTRCPU_NMICPU_SMI_LCPU_PWRGDFSB_CPURST_LFSB_CPUSLP_L

CPU_STPCLK_LCPU_DPRSTP_L

FSB_D_L<45>

FSB_D_L<43>

FSB_D_L<38>

CPU_DPSLP_LFSB_DPWR_LMCP_BCLK_VML_COMP_GND

AH27AH28AG27

H38

AC35AC33AC39AA33

AH43

AJ41E41

AG41AC43

AF42AH42AH39

AD40AB42

AH40

M39N37W39T40

M41L36W37U40

AD41

AM32AN33

AN32

AA40AD39

J41N35V35V41

U41Y42

M43H39J40

Y41

H42H43L41H41H40M40N40N41

V42

M42L42J37J38J39N36L38L39L37Y39

R38R37R39P35R35N33N34U37R33W41

W38U34U33U35U36AA35AA38AA34AA36Y40

W34AA37W35T43R41T42T39R42

W42Y43

AM43AM42

F42D42F41

AL32AE40

AA41AD43

AK35AE36

AD42

AB35AE35AE37AC37AE38

AN35AR39AN34AL35AJ34AC34

AN37AL34AL37AJ36AJ35AN36AJ33

AF41

AL33AG33AL39AN38AG34AG37AE33AG39AG35

AM39AM40

AL41AK42

AL43AL42

G42G41

AJ40AK41

U1400BGA(1 OF 11)

MCP79-TOPO-BOMIT

MF-LF 402

402 MF-LF

1/16W 2

1

R1436

MF-LF 402 1%

1/16W

49.9

9C8 73C3 9C8 73C3

9C6 41C4 73B3

9C5 41D4 62C8 73C3 8C4

9B2 62C7 73B3 9C8 73B3 9B2 73B3 9B2 73B3

9B2 12C7 73C3 9B8 73B3

9B8 73C3 9C8 73C3 9D6 73C3 9C8 73C3

9D6 73C3 9D6 73C3

12C3 73B3 9B6 73B3 9B6 73B3

9D6 73C3 9D6 73C3 9D6 73C3

9D6 73C3 9D6 73C3 9D6 73C3 9D6 73C3 9D6 73C3 9D6 73C3 9D8 73D3 9D8 73D3 9D8 73D3

9D8 73D3 9D8 73D3

9C8 73C3 9D8 73D3

9B2 73D3 9B2 73D3 9B2 73D3 9C2 73D3 9C2 73D3 9C2 73D3 9B4 73D3 9B4 73D3 9B4 73D3 9C4 73D3 9C4 73D3 9C4 73D3

9C8 73C3 9C8 73C3 9C8 73C3 9C8 73C3 9C8 73C3 9C8 73C3 9C8 73C3 9C8 73C3 9C8 73C3 9C8 73C3 9C8 73C3 9C8 73C3 9C8 73C3 9C8 73C3 9C8 73C3 9C8 73C3 9D8 73C3 9D8 73D3 9D8 73D3 9D8 73D3 9D8 73D3 9D8 73D3 9D8 73D3 9D8 73D3 9D8 73D3 9D8 73D3 9D8 73D3 9D8 73D3 9D8 73D3 9D8 73D3 9D8 73D3

9B2 73D3 9B2 73D3 9B2 73D3 9B2 73D3 9B2 73D3 9B2 73D3 9B2 73D3 9B2 73D3 9B2 73D3 9C2 73D3 9C2 73D3 9C2 73D3 9C2 73D3 9C2 73D3 9C2 73D3 9C2 73D3 9C2 73D3 9C2 73D3 9C2 73D3 9C2 73D3 9C2 73D3 9C2 73D3 9C2 73D3 9C2 73D3 9C2 73D3 9C2 73D3 9B4 73D3 9B4 73D3 9B4 73D3 9B4 73D3 9B4 73D3 9B4 73D3 9B4 73D3 9B4 73D3 9C4 73D3 9C4 73D3 9C4 73D3 9C4 73D3 9C4 73D3 9C4 73D3 9C4 73D3 9C4 73D3 9C4 73D3 9C4 73D3 9C4 73D3 9C4 73D3 9C4 73D3 9C4 73D3 9C4 73D3 9C4 73D3

9B2 73D3

9D6 12C2 73C3

9C8 73C3

8B1 8B1 8B1

7D7 13A2 21D3 22C8

73C3

73B3 73B3 73B3

73B3 73B3

73B3

Trang 14

0A MEMORY

CONTROL

MCKE0A_1

MODT0A_1MODT0A_0MCS0A_0#

MCS0A_1#

MCLK0A_0_NMCLK0A_0_PMCLK0A_1_NMCLK0A_2_NMCLK0A_1_PMCLK0A_2_P

MA0_0MA0_2MA0_3MA0_4MA0_5

MA0_8MA0_7MA0_9MA0_10MA0_11MA0_13MA0_12MA0_14

MDQS0_1_NMDQS0_2_P

MDQS0_4_P

MDQS0_3_PMDQS0_4_NMDQS0_5_NMDQS0_6_NMDQS0_6_PMDQS0_7_NMDQS0_7_P

MDQM0_2MDQM0_1MDQM0_3MDQM0_4

MDQ0_0MDQM0_7

MDQM0_5MDQ0_1

MDQ0_4MDQ0_3MDQ0_5MDQ0_6

MDQ0_21MDQ0_20

MDQ0_18MDQ0_19

MDQ0_17

MDQ0_25MDQ0_24

MDQ0_22MDQ0_26

MDQ0_35MDQ0_34

MDQ0_32MDQ0_36

MDQ0_33

MDQ0_41

MDQ0_37

MDQ0_40MDQ0_39MDQ0_42

MDQ0_47MDQ0_46

MDQ0_48

MDQ0_61MDQ0_60

MDQ0_58

MDQ0_62MDQ0_63

OUTOUTOUTOUTOUTOUTBI

BIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBI

OUTOUTOUT

OUTOUT

OUTOUTOUT

OUTOUT

OUTOUTOUT

OUTOUT

OUTOUTOUT

OUTOUTOUTOUTOUT

BI

BIBI

BIBIBI

BIBI

BI

BIBI

BI

BIBIBIBIBIBIBIBIBIBIBIBIBIBI

OUTOUTOUT

OUTOUT

OUTOUTOUTOUTOUTOUTOUTOUTOUTOUTOUTOUTOUT

OUTOUTOUT

OUTOUTOUTOUTOUT

MEMORY CONTROL 1A

MDQ1_63

MDQ1_58MDQ1_61

MDQ1_57

MDQ1_53

MDQ1_52

MDQ1_48

MDQ1_46

MDQ1_42MDQ1_41

MDQ1_37MDQ1_39

MDQ1_36MDQ1_35

MDQ1_32MDQ1_34

MDQ1_31MDQ1_30

MDQ1_27MDQ1_29

MDQ1_22

MDQ1_18MDQ1_21

MDQ1_16

MDQ1_11MDQ1_10

MDQ1_7MDQ1_9

MDQ1_3MDQ1_6

MDQ1_2MDQ1_4MDQ1_5

MDQ1_1

MDQM1_6MDQ1_0MDQM1_7

MDQM1_4MDQM1_3

MDQM1_0MDQM1_2

MDQ1_40

MDQS1_7_P

MDQS1_6_NMDQS1_6_PMDQS1_7_N

MDQS1_5_NMDQS1_4_P

MDQS1_3_PMDQS1_4_N

MDQS1_2_P

MDQS1_1_PMDQS1_2_N

MDQS1_1_NMDQS1_0_PMDQS1_0_N

MRAS1#

MCAS1#

MWE1#

MBA1_2MBA1_1

MA1_14MA1_13MA1_12MA1_11MA1_10MA1_9MA1_8MA1_7MA1_6

MA1_4MA1_3MA1_2MA1_1

MCLK1A_2_P

MCLK1A_1_PMCLK1A_2_N

MCLK1A_0_PMCLK1A_1_N

MCS1A_1#

MCS1A_0#

MCLK1A_0_N

MODT1A_1MODT1A_0

MCKE1A_0

BIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBI

BIBIBIBI

BIBIBIBIBIBIBIBIBI

OUTBI

OUTOUTOUTOUTOUT

3 6

BRANCHREVISION

DRAWING NUMBER SIZE

D

R

SHEETPAGE TITLE

A B C D

27C4 74B3 27C2 74B3 27C2 74B3 27B4 74B3 27B5 74B3 27B7 74B3 27B5 74B3

27D4 74B3 27A7 74B3

27C2 74B3 27D4 74B3 27C4 74B3 27D2 74B3 27D2 74B3 27C4 74B3 27C2 74B3 27C2 74B3 27C4 74B3 27C2 74B3 27C2 74B3 27C2 74B3 27C4 74B3 27C4 74B3 27C4 74B3 27C2 74B3 27C4 74B3 27C2 74B3 27C4 74B3 27C4 74B3 27C2 74B3 27C4 74B3 27C2 74B3 27C2 74B3 27C4 74B3 27B4 74B3 27B2 74B3 27C4 74B3 27C2 74B3 27B2 74B3 27B4 74B3 27B5 74B3 27B7 74B3 27B5 74B3 27B7 74B3 27C5 74B3 27B5 74B3 27C7 74B3 27B7 74B3 27B5 74B3 27B7 74B3 27B5 74B3 27B5 74B3 27B5 74B3 27B7 74B3 27B7 74B3

BA16AW16

BB13AY15

AT2AT1AY2AY1BA6BA10AY11BB33BB37BA37BA43AY42AT43

AT5AY7BA11BB34BB38AR42

AW42AT40

AT4AT3AV2AV3

AT41

AR4AR3AU2AU3AY4BB3BC3AW4AW3

AP41

BA3BB2BB5BA5BA8BB4BC4BA7AY8

AN40

BA9BB10BB12AW12BB8BB9AY12BA12BC32AW32

AU40

BA35BA32BB32BA34BC36AW36BA39AY40

AU41

BA36BB36BA38AY39BB40AV42AV41BA40BC40

AR41AP42

BB14

BA42BB42BB22

BA19AY19

AY31BB30

BA15

BB29BB17

BB28AY28BA28BA27BA26BB26BA25

BA29BA14BC28

BB25BA18

U1400(3 OF 11)

OMIT

MCP79-TOPO-B

BGA

27D7 74B3 27D5 74B3 27C5 74B3 27C5 74B3 27C5 74B3 27C7 74C3 27C7 74C3 27C5 74C3

27C5 74B3 27C7 74B3 27C7 74B3 27C5 74B3 27C7 74B3 27C5 74B3 27C7 74B3 27C7 74B3 27C7 74B3 27C5 74B3 27C7 74B3 27C5 74B3

27C7 74B3 27C5 74B3 27C7 74B3

27C7 74B3 27C5 74B3

27B5 74B3 27B7 74B3 27B7 74B3 27B5 74B3 27B5 74B3 27B5 74B3 27B7 74B3 27B7 74B3 27B7 74B3 27B7 74B3 27A5 74B3 27A7 74B3 27B5 74B3 27A7 74B3 27A7 74B3 27A5 74B3 27B5 74B3

27D2 74A3 27C2 74A3 27C4 74A3

27C4 74A3 27C4 74A3 27C2 74A3 27B7 74A3 27B2 74A3 27B7 74A3 27B5 74A3 27B5 74A3

27B7 74A3 27B7 74A3 27A5 74A3 27A5 74A3

26C2 74C3 26D2 74C3 26C4 74C3 26B2 74C3 26C2 74C3 26C4 74C3 26B7 74C3 26B7 74C3

26B5 74C3 26B5 74C3

26B7 74C3 26B7 74C3 26A5 74C3 26A5 74C3

26D7 74D3 26D5 74D3 26C5 74D3 26C5 74D3 26C5 74D3 26C7 74D3 26C7 74D3 26C5 74D3

26C7 74D3 26C7 74D3 26C5 74D3

26C5 74D3 26C7 74D3

26C7 74D3 26C5 74D3 26C7 74D3

26C5 74D3 26C7 74D3

26C7 74D3 26C5 74D3 26C7 74D3

26C7 74D3 26C5 74D3

26D4 74D3 26C2 74D3 26C2 74D3 26D2 74D3 26D2 74D3 26C4 74D3 26C4 74D3 26C4 74D3 26C2 74D3 26C4 74D3 26C2 74D3 26C4 74D3 26C2 74D3 26C2 74D3 26C4 74D3 26B4 74D3 26C2 74D3 26C2 74D3 26B2 74D3 26C4 74D3 26C4 74D3 26B2 74D3 26B4 74D3 26C4 74D3 26C4 74D3 26C4 74D3 26C2 74D3 26C2 74D3 26C2 74D3 26C4 74D3 26C2 74D3 26C7 74D3 26B7 74D3 26B7 74D3 26B5 74D3 26B5 74D3 26C5 74D3 26B7 74D3 26B5 74D3 26B5 74D3 26B5 74D3 26B5 74D3 26B5 74D3 26B7 74D3 26B7 74D3 26B7 74D3 26B7 74D3 26B5 74D3 26B7 74D3 26B5 74D3 26B7 74D3 26B7 74D3 26B5 74D3 26B7 74D3 26B5 74D3 26B5 74D3 26B5 74D3 26A7 74D3 26A7 74D3 26A7 74D3 26B7 74D3 26A5 74D3 26A5 74D3

26D4 74D3

26C4 74D3 26C2 74C3 26B4 74C3 26C2 74C3 26B5 74C3 26B7 74C3 26A7 74C3 26B5 74C3

AR17AV17

AP15AV15

AL10AL11AR8AR9AW8AP13AR13AV25AU30AU29AT35AU35AT39

AN5AR10AN13AN27AW29AR34

AT37AW39

AL8AL9AP9AN9

AV39

AL6AL7AN6AN7AR6AV6AW5AN10AR5

AR37

AU6AV5AU7AU8AW9AP11AW6AY5AU9AV9

AR38

AU11AV13AW13AR11AT11AU13AR26AU25

AV38

AT27AP25AR25AP27AP29AR29AP31AR31

AW38

AV27AN29AV29AN31AU31AV37AW37AT31AV31

AR35AP35

AT15

AW33AV33BA24

BB20BC20

AU23AT23

AP17

AP23AW17

AV21AR22AU21AR21AN21AV19AU19

AR23AU15AW21

AT19AR19

U1400(2 OF 11)

OMIT

MCP79-TOPO-B

BGA

Trang 15

MCLK1B_1_NMCLK1B_0_PMCLK1B_1_PMCLK1B_2_N

MRESET0#

GND55GND56

GND58

GND60GND59

GND61

GND63GND64GND52

GND53GND54GND51GND49GND50GND48GND47

GND44GND45GND43GND42

GND39GND40GND38GND37GND36

GND18GND19GND17GND15GND13GND14

GND10

GND12

GND8GND9GND7GND6

GND2GND3GND4GND1

MEM_COMP_VDDMEM_COMP_GND

MODT0B_0MODT0B_1

MCKE0B_1MCKE0B_0

MCLK0B_0_N

MCS0B_0#

MCS0B_1#

MCLK0B_2_NMCLK0B_1_P

MCLK0B_0_PMCLK0B_1_NMCLK0B_2_P

+V_PLL_XREF_XS

+V_PLL_CORE+V_VPLL

+VDD_MEM1+VDD_MEM2

+VDD_MEM4+VDD_MEM5+VDD_MEM6+VDD_MEM7

+VDD_MEM9+VDD_MEM10+VDD_MEM11

+VDD_MEM14+VDD_MEM15+VDD_MEM16+VDD_MEM17+VDD_MEM18

+VDD_MEM20

+VDD_MEM22+VDD_MEM21

+VDD_MEM29

+VDD_MEM34

+VDD_MEM43

+V_PLL_DP

+VDD_MEM28

+VDD_MEM37+VDD_MEM36+VDD_MEM35

GND21GND22GND23

MEMORY CONTROL 0B MEMORY CONTROL 1B

BRANCHREVISION

DRAWING NUMBER SIZE

D

R

SHEETPAGE TITLE

A B C D

AM31AL30BC25AW24AY26AM23

AY25AU18AM15AY17AV20BC17AW27AU20AM21

AV24AY29AT21AN18AU16AP18AP22AW15

AM19

AR20AR16AV16AP24AN22AP16AT17AN24

AM17T28

T27U28U27

AY32

BC13AY16AN15

AN17

AN41AM41

BA13BC16AR15

AU17

BA41

AY23BA23BA20

AU33

BB24BC24BA21

BA31BA30AN25

AV23

W5V34V10

U22U20U18T9

T6

T38T37T35T34T33

T26T24AK11T20

T10

R5R43R40R36P7P40P4P37P34P33P10

N8N39M9M7M6M38K7H31G32G30

F24D34BC9AY9BC21F28AU10AR36AP30AT25AP12

AM28AK7AH35AG24AF24AE20AB7AB22AA39AA22

U1400BGA

402 MF-LF

2

1

R1610

MF-LF 402 1/16W

40.2

1%

74A3

7B6 15C3 22C8

22B2

Trang 16

PE0_RX2_N

+AVDD0_PEX11+AVDD0_PEX7

+AVDD1_PEX3+AVDD1_PEX2+AVDD1_PEX1+AVDD0_PEX13+AVDD0_PEX10+AVDD0_PEX9+AVDD0_PEX6+AVDD0_PEX5+AVDD0_PEX4+AVDD0_PEX3+AVDD0_PEX2

+V_PLL_PEX+DVDD1_PEX2+DVDD1_PEX1+DVDD0_PEX8+DVDD0_PEX6+DVDD0_PEX5+DVDD0_PEX4+DVDD0_PEX3+DVDD0_PEX2

PE1_TX0_NPE1_TX1_P

PE6_REFCLK_N

PEX_RST0#

PE1_TX0_P

PE5_REFCLK_NPE5_REFCLK_P

PE6_REFCLK_P

PE4_REFCLK_NPE4_REFCLK_PPE3_REFCLK_NPE2_REFCLK_NPE1_REFCLK_N

PE2_REFCLK_P

PE0_REFCLK_N

PE1_REFCLK_P

PE0_TX15_NPE0_TX14_NPE0_TX15_P

PE0_TX13_NPE0_TX14_PPE0_TX12_NPE0_TX12_P

PE0_TX13_PPE0_TX11_NPE0_TX10_NPE0_TX9_NPE0_TX10_PPE0_TX8_NPE0_TX8_P

PE0_TX9_PPE0_TX7_NPE0_TX7_PPE0_TX6_NPE0_TX5_NPE0_TX6_P

PE0_TX4_NPE0_TX5_PPE0_TX3_NPE0_TX3_P

PE0_TX4_PPE0_TX2_NPE0_TX2_PPE0_TX0_N

PE0_TX1_NPE0_TX0_P

PEX_CLK_COMP

PE1_RX3_NPE1_RX3_PPE1_RX2_N

PE1_RX0_NPE1_RX1_P

PE1_RX2_PPE1_RX1_N

PE_WAKE#

PE1_RX0_P

PE0_PRSNT_16#

PE0_RX13_NPE0_RX14_P

PE0_RX15_PPE0_RX14_N

PE0_RX15_N

PE0_RX12_PPE0_RX11_P

PE0_RX13_PPE0_RX11_N

PE0_RX12_NPE0_RX10_N

PE0_RX8_P

PE0_RX9_P

PE0_RX10_PPE0_RX8_N

PE0_RX9_N

PE0_RX5_N

PE0_RX7_PPE0_RX6_N

PE0_RX7_N

PE0_RX3_P

PE0_RX5_PPE0_RX3_N

PE0_RX4_NPE0_RX1_P

PEC_PRSNT#

PEC_CLKREQ#/GPIO_50

PE3_REFCLK_PPED_CLKREQ#/GPIO_51

PED_PRSNT#

PEB_CLKREQ#/GPIO_49

PEE_CLKREQ#/GPIO_16PEE_PRSNT#/GPIO_46

PEF_CLKREQ#/GPIO_17PEF_PRSNT#/GPIO_47

PEG_CLKREQ#/GPIO_18PEG_PRSNT#/GPIO_48

OUTOUTOUTOUTOUTOUTOUTOUTOUTOUTOUTOUT

OUTOUT

OUTOUTOUT

OUT

OUTOUTOUTOUT

ININ

ININININININININININININININININININININININ

ININ

IN

ININ

OUTOUT

OUT

OUTOUTOUTOUT

OUTOUT

IN

OUT

INOUT

3 6

BRANCHREVISION

DRAWING NUMBER SIZE

D

R

SHEETPAGE TITLE

A B C D

B

Int PU (S5)

If PE1 interface is not used, ground DVDD1_PEX and AVDD1_PEX

If PE0 interface is not used, ground DVDD0_PEX and AVDD0_PEX

206 mA (A01, AVDD0 & 1)Int PU

84 mA (A01)

Int PU

Int PUInt PUInt PUInt PU

Int PU

Int PUInt PU

Int PUInt PUInt PUInt PU

PCIE_MINI_R2D_C_NPCIE_FW_R2D_C_P

TP_PCIE_CLK100M_PE6N

PCIE_RESET_L

PCIE_MINI_R2D_C_P

TP_PCIE_CLK100M_PE5NTP_PCIE_CLK100M_PE5P

TP_PCIE_CLK100M_PE6P

TP_PCIE_CLK100M_PE4NTP_PCIE_CLK100M_PE4PPCIE_CLK100M_EXCARD_NPCIE_CLK100M_FW_NPCIE_CLK100M_MINI_N

AUD_IP_PERIPHERAL_DETGMUX_JTAG_TCK_L

=PP1V05_S0_MCP_PEX_DVDD0

PCIE_EXCARD_D2R_NPCIE_EXCARD_D2R_P

TP_PCIE_PE4_D2RN

PCIE_FW_D2R_NPCIE_FW_D2R_PPCIE_MINI_D2R_NPCIE_MINI_D2R_PPCIE_WAKE_LGMUX_JTAG_TDOCARDREADER_RESET

PCIE_FW_PRSNT_L

TP_PE4_PRSNT_LTP_PE4_CLKREQ_L

FW_CLKREQ_LPCIE_MINI_PRSNT_L

SYNC_DATE=04/04/2008

MCP PCIe Interfaces

SYNC_MASTER=T18_MLB

30B7 8C4 8C4

MF-LF 402

2.37K

8D6

8D6 29C5 75D3

8C6 8D6 34C2 34C2

34C1 75D3 34C1 75D3

29C5 75D3 29C5 75D3

8D6 8D6

29D7 29D7

8D6

34C1 75D3 34C1 75D3

6D5 29C7

35D3 8C6 35D3

6D5 29C7 75D3 6D5 29C7 75D3

8D6 8D6 8D6 8D6 8D6 8D6 8D6 8D6 8D6 8D6 8D6 8D6 8D6 8D6 8D6 8D6 8D6 8D6 8D6 8D6 8D6 8D6 8D6

8D6

8D6 8D6 8D6 8D6

8D6 8D6 8D6 8D6 8D6

8D6 8D6 8D6 8D6 8D6 8D6 8D6 8D6 8D6 8D6 8D6 8D6 8D6 8D6

K11

A11

M19 M17 M18

M16

L16

B10C10E8D9D5

F17

N14

L14K14

J13H13G13

J11J10

B6C6A7

B8A8D8

H7G7F9

H9G9K9

G11F11

H3H2G3F3F4

E2F2

D2E1

C1D1

B3B2

A4A3

C4B4

M2M1

M4M3L4K2K3

J2J3

H1J1

C5

L11L10J5J7J6

G5H5

C3D3

E4E3

E5F5

E6F6

D7C7

N5N4

N7N6N9N11N10

L7L6

L9L8F7

E11D11C9

T16U19U16W18W17V19U17W19T17

P13M13

U12T12R12M12AB12AA12

W12V12AD12Y12

U1400BGA

7A6

Trang 17

BI

OUT

ININININININ

OUT

OUTOUT

OUTOUTOUT

OUTOUT

OUTOUTOUTOUTOUTOUT

ININ

OUTOUT

OUTOUTOUTOUTOUT

IN

INOUT

ININ

GPIO_7/NFERR*/IGPU_GPIO_7+V_DUAL_MACPLL

+VDD_HDMI+V_PLL_HDMI+V_PLL_IFPAB+VDD_IFPB+VDD_IFPA

+V_TV_DAC+V_RGB_DAC

+V_DUAL_RMGT2

MII_COMP_GNDMII_COMP_VDD

LCD_PANEL_PWR/GPIO_58LCD_BKL_ON/GPIO_59LCD_BKL_CTL/GPIO_57

XTALOUT_TV

GPIO_6/FERR*/IGPU_GPIO_6

HDMI_TXC_P/ML0_LANE3_PHDMI_TXC_N/ML0_LANE3_NHDMI_TXD0_P/ML0_LANE2_PHDMI_TXD0_N/ML0_LANE2_N

HDMI_TXD1_N/ML0_LANE1_NHDMI_TXD2_P/ML0_LANE0_PHDMI_TXD2_N/ML0_LANE0_N

HPLUG_DET2/GPIO_22

IFPA_TXC_NXTALIN_TV

DDC_DATA2/GPIO_24DDC_CLK2/GPIO_23

RGB_DAC_RSETRGB_DAC_VREF

TV_DAC_VREF

DP_AUX_CH0_PDP_AUX_CH0_N

HPLUG_DET3

HDMI_RSETHDMI_VPROBE

RGMII_MDIO

BUF_25MHZ

DDC_DATA0DDC_CLK0

RGB_DAC_REDRGB_DAC_GREENRGB_DAC_BLUERGB_DAC_HSYNC

TV_DAC_REDTV_DAC_GREEN

IFPA_TXC_P

IFPA_TXD0_PIFPA_TXD0_N

IFPA_TXD2_PIFPA_TXD1_P

IFPA_TXD3_PIFPA_TXD2_N

IFPB_TXC_PIFPB_TXC_N

IFPB_TXD5_PIFPB_TXD4_PIFPB_TXD4_N

IFPB_TXD6_PIFPB_TXD5_N

IFPB_TXD6_NIFPB_TXD7_P

DDC_DATA3DDC_CLK3

IFPAB_RSETIFPAB_VPROBE

MII_RESET#

RGMII_MDC

RGMII_PWRDWN/GPIO_37

MII_RXER/GPIO_36MII_COL/GPIO_20/MSMB_DATAMII_CRS/GPIO_21/MSMB_CLK

TV_DAC_BLUETV_DAC_HSYNC/GPIO_44TV_DAC_VSYNC/GPIO_45

+V_DUAL_RMGT1

MII_VREF

RGMII_TXCTL/MII_TXENRGMII_TXC/MII_TXCLKRGMII_TXD3RGMII_TXD2RGMII_TXD1RGMII_TXD0

+3.3V_DUAL_RMGT1+3.3V_DUAL_RMGT2

OUTOUTOUTOUT

OUTOUTOUTOUTOUTOUT

OUTOUTOUTOUTOUT

OUTBIOUTBIOUTOUT

BRANCHREVISION

DRAWING NUMBER SIZE

D

R

SHEETPAGE TITLE

A B C D

B

In MCP79 these pins have undocumented internalGPIOs 57-59 (if LCD panel is used):

by default, pull-downs (1K or stronger) must be used

pull-ups (~10K to 3.3V S0) To ensure pins are low

Alias to GMUX_INT for systems with GMUX

Alias to HPLUG_DET2 for other systems

Pull-down (20k) required in all cases

=DVI_HPD_GMUX_INT:

Alias to DVI_HPD for systems using IFP for DVI

(See below)

(See below)NOTE: 1K pull-down required on DP_IG_AUX_CH_N if DP is used

NOTE: 20K pull-down required on DP_HPD_DET

level-shifters

NOTE: HDMI port requires level-shifting IFP interface can

be used to provide HDMI or dual-channel TMDS without

Interface Mode

DP_IG_ML_P/N<0>

DP_IG_DDC_DATADP_IG_HPDDP_IG_AUX_CH_P/NNOTE: 1M pull-down required on DP_IG_CA_DET if DP not used

Dual-channel TMDS: Power +VDD_IFPx at 3.3V

131 mA (A01)

83 mA (A01)

MII, RGMII products will enable

WF: IFP is capable of LVDS (1.8V) or TMDS (3.3V), need aliases

TMDS_IG_DDC_CLKTMDS_IG_TXD_P/N<1>

Network Interface Select Interface

RGMII

1 ENET_TXD<0>

DDC_CLK0/DDC_DATA0 pull-ups still required

Okay to float all TV_DAC signals

TV DAC Disable:

Y / Y

DDC_CLK0/DDC_DATA0 pull-ups still required

Okay to float all RGB_DAC signals

Okay to float XTALIN_TV and XTALOUT_TV

DP_IG_CA_DETPP1V05_ENET_MCP_PLL_MAC

=PP1V05_S0_MCP_HDMI_VDDPP3V3_S0_MCP_VPLL

=PP3V3R1V8_S0_MCP_IFP_VDD

PP3V3_S0_MCP_DACMCP_MII_COMP_GND

MCP_MII_COMP_VDD

LVDS_IG_PANEL_PWRLVDS_IG_BKL_ON

=MCP_HDMI_TXC_P

=MCP_HDMI_TXD_N<2>

MCP_CLK27M_XTALIN

LVDS_IG_DDC_DATALVDS_IG_DDC_CLK

MCP_TV_DAC_VREF

DP_IG_AUX_CH_PDP_IG_AUX_CH_N

=MCP_HDMI_HPD

ENET_MDIO

MCP_CLK25M_BUF0_R

MCP_DDC_DATA0MCP_DDC_CLK0

TP_MCP_RGB_REDTP_MCP_RGB_GREENTP_MCP_RGB_BLUETP_MCP_RGB_HSYNCTP_MCP_RGB_VSYNC

CRT_IG_R_C_PRCRT_IG_G_Y_Y

MCP_MII_VREF

ENET_TX_CTRLENET_CLK125M_TXCLKENET_TXD<3>

23C6 75B3 31C6 77D3

23C6 75B3 69D3 69D3 6C7 68C5 6C7 68C5 8C4 8C4 8C4

31C6 77D3

8C4 8C4 8C4 8D4 8D4 8D4 6C7 68C2 75B3 6C7 68C2 75B3 6C7 68C2 75B3 31C6 77D3

6C7 68C2 75B3 6C7 68C2 75B3 68B3 75B3 68B3 75B3 31C6 77D3

2

1

R1820

1/16W 402

10K

D38C38

C37

A35E36

A36

D36B36

D25C25C24B24

C26D24

A24E24C23

C22A23

G23C21D21J22

A41

B38C39

B39

A40

A39B40

M26M27

T25

K32J32

M28M29

V23U23

T23

K24 J24

E28

F23

J23B22

C27B27B26

F40E37

N30M30

L30K30

L29K29

J29H29

L31K31

G31E32

B34D33C33

D32C32

B32A32

B35C35

F31

J30

J33F33G33

G35F35

D35E35

J31

B15E16

D43C43

E31B30A31

D31C30

B31E23

U1400

OMIT

MCP79-TOPO-B

BGA(6 OF 11)

8C4 8C4 8C4

8D4 8D4

8D4 8D4 8D4 8D4

23C7 75B3 23C7 75B3

69D3 8B4 69C7 75B3 69C7 75B3 69D3 69D3 69D3 69D3 69D3 69D3 69D3

72B7 72C8 68C8 71A7 72B7

8D4 8D4

31B7 77C3

31B1 77D3 31C1 77D3 31C1 77D3 31C1 77D3 31C1 77D3 31C1 77D3

32A5 77D3 31B6 77D3 22A4

22A6

7D7 23D7 23C5

7B6 23D7

23D2 77D3

7B5 17D7 22A5 22B6

7C5 18D1 20A4

7B5 17D3 22A5 22B6

7A3 19C1

7A5 22D6

Trang 18

OUTBIBIBI

PCI_AD3PCI_AD2PCI_AD1

PCI_AD5PCI_AD6

PCI_AD10

PCI_AD15

PCI_AD17

PCI_AD21PCI_AD22

PCI_AD25PCI_AD23

PCI_AD26

PCI_AD29

PCI_AD31

GND66GND67

GND69GND68

GND70GND71GND72

GND74GND73

GND75GND76GND77

GND79GND78

GND80GND81

GND84GND83GND82

GND85GND86GND87

GND89GND88

GND90GND91GND92

GND94GND93

PCI_CLKIN

LPC_FRAME#

LPC_AD1LPC_AD0LPC_RESET0#

LPC_CLK0LPC_AD3

GND99GND100

GND102GND101

GND104GND103

GND105GND106GND107

GND109GND108

GND110GND111GND112

GND115GND114GND113

GND116GND117

GND120GND119GND118

GND121GND122

GND125GND124

GND126GND127GND128

GND130GND129

PCI_CLKRUN#/GPIO_42PCI_AD28

OUT

BIBIBIBIBIBI

OUT

OUTOUT

3 6

BRANCHREVISION

DRAWING NUMBER SIZE

D

R

SHEETPAGE TITLE

A B C D

B

Strap for Boot ROM Selection (See HDA_SDOUT)

Int PUInt PUInt PU

TP_PCI_AD<13>

GMUX_JTAG_TDIGMUX_JTAG_TMS

TP_PCI_INTZ_L

FW_PME_LTP_LPC_DRQ0_LPM_CLKRUN_L

LPC_PWRDWN_LLPC_RESET_LLPC_FRAME_R_L

LPC_CLK33M_SMC_RLPC_AD_R<3>

LPC_AD_R<2>

LPC_AD_R<0>

TP_PCI_CLK0TP_PCI_RESET1_L

TP_PCI_STOP_LTP_PCI_PARTP_PCI_IRDY_LTP_PCI_FRAME_LTP_PCI_DEVSEL_LTP_PCI_C_BE_L<3>

TP_PCI_C_BE_L<2>

TP_PCI_C_BE_L<1>

MCP_RS232_SOUT_LTP_PCI_GNT1_L

12C3 76D3 12C3 76D3 12C3 76D3 12C3 76D3 12C3 76D3 12C3 76D3 12C3 76D3 12C3 76D3

12C6

18D2 35A4 35C4 35C7 35D6

18D2

8C2

24C4

21R1953 22

5% 1/16W MF-LF 4022

1R1952

402MF-LF1/16W5%

22

21R1951

402

22

MF-LF1/16W5%

21R1950

402

22

MF-LF1/16W5%

21R1960

5%

22

402MF-LF1/16W

18D2

21R1992

402MF-LF1/16W5%

8.2K

21R1994 8.2K

5% 1/16W MF-LF 402

21R1990 8.2K

5% 1/16W MF-LF 4022

1R1991 8.2K

5% 1/16W MF-LF 402

21R1989 8.2K

PLACEMENT_NOTE=Place close to pin R8

40C5 42D3

24B4 76C3 40C8

42D3

40C5 42D5

Y3

Y2AA7

R11R10

T4U9T3V9T2

T1

AB9Y1AA10

N1N2N3

P3U11R4U10R3

Y4AA9

AD11

R9

R8R7R6

W10AA11AA6AA3

AA2AC7AB2AC6AB3

U7T5AE11

U6U1U5U2W11U3W9V2W8V3AC4

W7W4W6W3Y5AA5AC11AC10AC9

AE10AC3

AE6

AE5AE12AD4

AE2AE1

AE9AD5AD1AD2AD3

Y27Y26

Y25Y24Y22Y20Y18Y17Y16W43W36W24W22W20V7V40V4V37V33V27V26V24V22V20V17V16U8U4U39U26U24

AD34AD33AD28AD27AD25AD24AD20AD19AD17AD16AC5AB33AC36AC22AB40AB4AB37AB34AB28AB27AB26AB25AB23AB21AB20H34AB18

U1400

OMIT

MCP79-TOPO-B

(7 OF 11)BGA

40C8 42D3 76C3 40C8 42D3 76C3 40C8 42D5 76C3 40C8 42D5 76C3 24D4 76C3 40C8 42D5 76C3

7C5 17C1 20A4

18D7

18D2 76D3 18D2 76D3

76C3 76C3

18D4 18D7 76D3 18D7 76D3 18D7 35A4 35C4 35C7 35D6

Trang 19

BIBIBI

BI

BIBIBI

INININ

SATA_B0_RX_N

SATA_A0_RX_P

SATA_A1_TX_P

GND133GND134GND132GND131USB_RBIAS_GND

USB11_NUSB11_PUSB10_NUSB10_PUSB9_N

USB7_N

USB8_NUSB8_PUSB7_PUSB6_NUSB6_PUSB5_NUSB4_NUSB4_P

USB5_P

USB2_N

USB0_N

USB1_NUSB1_PUSB0_P

SATA_TERMP

SATA_LED#

SATA_C1_RX_NSATA_C1_RX_P

SATA_C0_TX_P

SATA_B1_RX_NSATA_B1_TX_NSATA_B1_TX_P

SATA_B0_TX_N

SATA_B0_RX_PSATA_B0_TX_P

SATA_A1_RX_NSATA_A1_TX_NSATA_A0_TX_P

GND138GND137GND135

USB3_PUSB3_N

USB_OC0#/GPIO_25

USB_OC2#/GPIO_27/MGPIOUSB_OC3#/GPIO_28/MGPIO

SATA_A0_RX_NSATA_A0_TX_N

SATA_C1_TX_NSATA_C1_TX_P

SATA_C0_RX_PSATA_C0_RX_NSATA_C0_TX_N

+V_PLL_USB

+V_PLL_SATA

+DVDD0_SATA1+DVDD0_SATA2+DVDD0_SATA3+DVDD0_SATA4

+DVDD1_SATA2

+AVDD0_SATA1

+AVDD0_SATA3+AVDD0_SATA4+AVDD0_SATA5+AVDD0_SATA6

+AVDD0_SATA8+AVDD0_SATA9

+AVDD1_SATA1

+AVDD1_SATA3+AVDD1_SATA4+DVDD1_SATA1

OUTOUT

ININ

OUTOUTININ

BIBI

3 6

BRANCHREVISION

DRAWING NUMBER SIZE

D

R

SHEETPAGE TITLE

A B C D

B

Geyser Trackpad/KeyboardAirPort (PCIe Mini-Card)

19 mA (A01)

84 mA (A01)

IRCamera

External A

External D

Current numbers from email Poonacha Kongetira provided 11/30/2007 4:04pm (no official document number)

43 mA (A01, DVDD0 & 1)

127 mA (A01, AVDD0 & 1)

If all SATA_Ax & Bx pins are not used, ground DVDD0_SATA and AVDD0_SATA

If all SATA_Cx pins are not used, ground DVDD1_SATA and AVDD1_SATA

External C

External BBluetooth

TP_SATA_D_D2RP

TP_SATA_E_R2D_CN

TP_SATA_E_D2RNTP_SATA_E_D2RP

PP3V3_S0_MCP_PLL_USB

MCP_USB_RBIAS_GND

TP_MCP_SATALED_L

TP_SATA_C_R2D_CPTP_SATA_C_R2D_CN

TP_SATA_D_R2D_CPTP_SATA_D_R2D_CN

TP_SATA_D_D2RN

TP_SATA_E_R2D_CP

TP_SATA_F_R2D_CPTP_SATA_F_R2D_CN

SATA_HDD_R2D_C_PSATA_HDD_R2D_C_N

SATA_HDD_D2R_PSATA_HDD_D2R_N

SATA_ODD_R2D_C_PSATA_ODD_R2D_C_N

USB_EXTB_NUSB_EXTB_P

USB_EXCARD_PUSB_EXCARD_N

TP_USB_10PUSB_EXTC_N

USB_CARDREADER_PUSB_CARDREADER_N

MCP SATA & USB

SYNC_MASTER=T18_MLB

30C7 76B3 30C7 76B3

37C3 75A3 37C3 75A3 37C3 75A3 37C3 75A3

37B2 75A3 37B2 75A3

37A2 75A3 37A2 75A3

D27

F27G27

J25H25

K23G25

U1400

MCP79-TOPO-B

BGA(8 OF 11)

A27

H21K21L21

K25L25E27

J26

K27L27

F29G29

A28B28

C28D28

L23F25

C29D29

AE3

E12

AP3AP2

AN2AN3

AN1AM1

AM3AM2

AM4AL3

AK3AL4

AK2AJ3

AJ1AJ2

AJ11AJ10

AK9AJ9

AJ7AJ6

AJ4AJ5

L28

AE16

AH19AH17AG19AG16AF19

AM14AM13AL14AN14AL13AN12AM12AM11AK13AK12AN11AJ12

AH24AH20AH18AG40AG36AG22AG20AG18AF40AF34AF33AF28AF27AF26AF20AF18AF17AF16AD6AE4AE39AE24AE22AD37AD35

1

R2051

MF-LF 402 1/16W

1

R2053

402 1/16W

MF-LF

41C4 38C7 38C7

8C6 8C6 8C6 38B4 76B3 38A4 76B3 29B5 76C3 29B5 76C3 48B8 76B3 39D7 76B3 39D7 76B3 29B5 76C3 29B5 76C3 8C6 8C6 8C6 8C6 38A8 76C3 38A8 76C3

22B4 76B3

75A3

22B2 7A6

7A6

7A3 17C7

Trang 20

OUTOUT

BIBIOUTOUT

OUTOUT

OUT

OUTOUT

ININ

OUT

OUTIN

OUT

ININOUT

ININININOUT

THERM_DIODE_NTHERM_DIODE_P

HDA_RESET*

HDA_PULLDN_COMPHDA_SDATA_IN1_GPIO_2/PS2_KB_CLK

MCP_VID2/GPIO_15MCP_VID1/GPIO_14MCP_VID0/GPIO_13

EXT_SMI/GPIO_32*

FANCTL1/GPIO_62FANRPM1/GPIO_63FANCTL0/GPIO_61

SIO_PME*

KBRDRSTIN*

PKG_TESTTEST_MODE_ENBUF_SIO_CLKCPUVDD_EN

SMB_DATA0SMB_CLK0SPKRHDA_SYNC

XTALIN_RTCXTALOUT

XTALOUT_RTC

JTAG_TRST*

XTALINJTAG_TCKJTAG_TMS

CPU_VLD

JTAG_TDIJTAG_TDO

RTC_RST*

PS_PWRGDPWRGD_SB

SPI_CS0/GPIO_10SPI_CLK/GPIO_11SPI_DI/GPIO_8SPI_DO/GPIO_9

SUS_CLK/GPIO_34

+V_DUAL_HDA1+V_DUAL_HDA2

HDA_DOCK_RST*_GPIO_5/PS2_MS_DATA

GPIO_1/PWRDN_OK/SPI_CS1

A20GATEGPIO_12_SUS_STAT_ACCLMTR_EXT_TRIG_L

+V_PLL_SP_SPREF+V_PLL_NV_H

OUTIN

IN

ININ

INOUTOUT

3 6

BRANCHREVISION

DRAWING NUMBER SIZE

D

R

SHEETPAGE TITLE

A B C D

17 mA

20 mA

37 mA (A01)

7 mA (A01)

HDA Output Caps

For EMI Reduction on HDA interface

PCI

not use LPC for BootROM override

LPC_FRAME# high for SPI1 ROM override

SPI0 = SPI_CS0_L, SPI1 = SPI_CS1_L

Int PU

Int PU (S5)Int PU

25 MHz

LPC ROMs So Apple designs will

0 1 HDA_SYNC

24 MHz

0 1

1 0

SPI_CLK SPI_DO

0

1 1

14.31818 MHz BUF_SIO_CLK Frequency

Frequency

31 MHz

NOTE: Straps not provided on this page

1 MHz SPI Frequency Select Frequency

NOTE: MCP79 does not support FWH, only

LPC

SPI0 SPI1

BIOS Boot Select

R1961 and R2160 selects SPI0 ROM bydefault, LPC+ debug card pulls

1 1 0 0

LPC_FRAME#

0 1 0

1

Int PU

Int PDInt PDInt PD

Int PU (S5)

NOTE: MCP79 rev A01 does not support SPI1 option Rev B01 will

Int PUInt PU (S5)

(MXM_OK for MXM systems)

SAFE mode: For ROMSIP recoveryUSER mode: Normal

Connects to SMC forautomatic recovery

MCP_VID<0>

PM_DPRSLPVRHDA_SDIN0

MCP_CPUVDD_EN

MCP_VID<0>

MCP_THMDIODE_P

SMBUS_MCP_1_CLKTP_MCP_LID_L

PM_PWRBTN_L

RTC_RST_L

MCP_PS_PWRGD

JTAG_MCP_TDIJTAG_MCP_TDO

SMBUS_MCP_1_DATAAP_PWR_EN

MCP_VID<2>

SMBUS_MCP_0_DATAPM_BATLOW_L

PM_CLK32K_SUSCLK_R

SPI_MISOSPI_MOSI_R

SMBUS_MCP_0_CLKMCP_THMDIODE_N

PM_SYSRST_DEBOUNCE_LTP_MCP_KBDRSTIN_L

HDA_RST_LHDA_BIT_CLKHDA_SDOUT

PP3V3_G3_RTC

=PP3V3R1V5_S0_MCP_HDA

HDA_SYNC_RHDA_SDOUT_R

HDA_RST_R_LHDA_BIT_CLK_R

MCP_VID<2>

MCP_VID<1>

JTAG_MCP_TMS

MCP_TEST_MODE_ENJTAG_MCP_TRST_L

PM_RSMRST_LSM_INTRUDER_L

ARB_DETECT

HDA_SYNCHDA_RST_R_L

ODD_PWR_EN_LMEM_EVENT_LSMC_WAKE_SCI_L

=PP3V3_S0_MCP_GPIO

MEM_EVENT_LSMC_IG_THROTTLE_L

SMC_ADAPTER_EN

TP_MLB_RAM_VENDORTP_MLB_RAM_SIZE

42B7 76A3 42A5 42C7 76A3 42A5 42B7 76A3

24A1 40C8

40D8 24A5

24C8

24B8 24C8 24C8

2

1

R2141

402 1/16W 5%

2

1

R2147

402 1/16W 5%

100K

20A4 26A5 27A5 40B8

32B7 35B5 40D5 41B2

24A8 24A5

20A4 57D3

37D6

B19B16A19A16

B11C11

K22B18

C13

B14C15C14D13

F21K19G21L19

M23

H17G17J17

C19

C20D16

D20C16

E20

L22

AE17AE18

K16J16

M21M20L20

M24M25L13

J18F19E19

K15

A15

L17K17E15

L24L26

D12B12

C12A12C18

D17C17

M22

AE7K13

U1400BGA(9 OF 11)

MCP79-TOPO-BOMIT

1C2171

10PF

50V 5%

402 CERM

12C3 12B6 12C3 12C3

2

1

R2150

402 1/16W 5%

402

42B8

2 1

R2172

402 5%

BOOT_MODE_USER

1/16W 2

2

1

R2163

402 5%

10K

MF-LF

2 1

R2173

5%

22

MF-LF 402

2 1

R2171

MF-LF 5%

1/16W 402

22

2 1

R2170

MF-LF 402 5%

22

1/16W

40B8 40C5

1/16W 402

1

R2121

MF-LF 1%

402

49.9K

52C7 76A3

52C7 76B3 52C7 76A3 52C7 76B3 52C7 76A3

40B8 62D8 73B3

8D1

46B5 80D3

20A3 29D5 32C7

20A3 63C8 20A3 63C8 46B5 80D3

20A3 63D8

43B8 76B3 12B6 43D8 76B3 43B8 76B3 12B6 43D8 76B3

6C3 40C5 41A2 66C8 6C3 32B7 35A5 40C5 66D5 70D8

42A5 42C8 76A3 20A4

7C5 20D8 22A8

20A4

20C3 29D5 32C7 7D3

20C3 57D3 20C3

20C3 63D8

20A7 76A3

20A7 76B3

76A3 22A2

6C3 21A5 24D4

7C5

20D3

22A8

20D4 76B3 20D4 76A3 20D4 76A3 20D4 76B3

20C3 63C8 20C3 63C8 20B3

20A7 76A3

7C5 17C1 18D1

20B3 26A5 27A5 40B8 20B3 41D4

20A7 76B3

7C5 21B3 22B8

Trang 21

GND161

GND167

GND171GND170GND169

GND172

GND176GND175GND174

GND177

GND181GND180GND179

GND182

GND184

GND187GND186GND185

GND188

GND192GND191GND190

GND193

GND197GND196GND195

GND198

GND203

GND208

GND213GND214

GND217GND216GND215

GND218

GND222GND221GND220

GND223

GND225

GND228GND227GND226

GND229GND230

GND233GND232GND231

GND234GND235

GND238GND237GND236

GND239GND240

GND243GND242GND241

GND244

GND249

GND252GND251GND250 GND342

GND343GND340GND339GND338GND337GND335GND334GND333GND331GND332GND330GND329GND328GND326GND327GND325GND324GND323GND321GND322GND320GND319GND318GND316GND317GND315GND314GND313GND311GND312GND309GND308

GND302GND299GND298GND296GND297GND294GND293GND292GND291GND289GND288GND287GND285GND284GND283GND282GND280GND279GND278GND277GND275GND276GND274GND273GND272GND270GND271GND268GND267GND264

+VTT_CPUCLK+VDD_CORE42

+3.3V_DUAL_USB2

+VTT_CPU17+VTT_CPU16+VTT_CPU15+VTT_CPU14+VTT_CPU13+VTT_CPU11+VTT_CPU10

+VTT_CPU1

+VDD_CORE7

+VDD_CORE1+VDD_CORE2

+VDD_CORE4+VDD_CORE5+VDD_CORE6

+VDD_CORE13+VDD_CORE14+VDD_CORE15+VDD_CORE16+VDD_CORE17

+VDD_CORE19

+VDD_CORE30

+VDD_CORE47

+VDD_CORE49+VDD_CORE50+VDD_CORE51+VDD_CORE52

+VDD_CORE54

+VTT_CPU51+VTT_CPU50+VTT_CPU47+VTT_CPU46+VTT_CPU45+VTT_CPU43+VTT_CPU42+VTT_CPU41+VTT_CPU40+VTT_CPU39+VTT_CPU37+VTT_CPU36+VTT_CPU35+VTT_CPU34+VTT_CPU32+VTT_CPU31+VTT_CPU30+VTT_CPU29+VTT_CPU26+VTT_CPU25+VTT_CPU24+VTT_CPU23+VTT_CPU21+VTT_CPU20+VTT_CPU19+VTT_CPU18

+VTT_CPU9+VTT_CPU8+VTT_CPU6+VTT_CPU5+VTT_CPU4+VTT_CPU3

+VDD_CORE38

+VTT_CPU33+VTT_CPU27

+VBAT

+3.3V_1

+3.3V_8

+3.3V_DUAL1+3.3V_DUAL2+3.3V_DUAL3+3.3V_DUAL4

+3.3V_DUAL_USB1

+3.3V_DUAL_USB3+3.3V_DUAL_USB4

+VDD_AUXC1

+VDD_AUXC3+VDD_CORE43

+VTT_CPU2

+VTT_CPU52

+VDD_CORE31

+VTT_CPU49+VTT_CPU48+VTT_CPU44

+3.3V_7+3.3V_6+3.3V_4+3.3V_3+3.3V_2

+VDD_CORE20

BRANCHREVISION

DRAWING NUMBER SIZE

D

R

SHEETPAGE TITLE

A B C D

W32V32U32T32

AA32Y32P32N32

N31M33M32L34L33L32K34

J36

J35J34H35G37G36F39F37E40

E39E38D41D39C42C41C40B41AC32

AB32AL31AD32AK31AJ32AH32AE32P31R32

AA16

AF12W25Y23

W23W21AA24AH9AH7AH6AH5AH3AH21Y21

AH25W28AA23AH2W26AH11AH10AH1AG8AG5

AG7AG6AA21AG4AG3AG25AG23AG21AG11AG10

AA20AF9AH23AF7AF4AF3AF25AF21AF2AH12

AA19AF11AE28AE26AE25AE23AE19U25

AA18V25W27AD23AD21AC28AC27AC26AC24AC23

AA17AC21AC20AC18AC17AC16AA28AA26AA25

V21U21A20

K28H27G26K20H19G18

Y9AA8AB11Y10AB10AE8AD10

U1400

OMIT

MCP79-TOPO-B

BGA(10 OF 11)

T22AH16Y11V11Y6P11AY13AB19AA4M11AD7AN26AB16Y38Y37Y35Y34Y28M37M35M34L5L43L40AU1K8K40K4K37K26K18K10J8J12G40H23AW35H15H11G8G6G43G4G34AW20G24G22BC12G16G14G10F8F32F12E33E29E25E17E13D6D37D26D23D22D19D15D14D10C2BC5AY14BC41BC37BC33L35AW31BA4BA1AV40

AY41AY37AY34AY33AV12AY10AW43AR43G20AW11AV7AV4AV36AV28F20G28AU4AU38AU36AR30AU32AP33AU12L12AY22AY21AT9AT6AT33AT29AT13AT10AR40AR32AR28AP7AP40AP4AP37AP34AP32AP28AP14AP10Y7AN4AN39AN28AP26AM9AM6AM5AM38AM37AM34AM30AM26AM24AM20AM18AM16AM10AL5AL40AL36AK40AK4AK37AK34AK33AK10AJ8AJ39AH37AH34AH33AH26

U1400

(11 OF 11)

MCP79-TOPO-BOMIT

BGA

7A3 22B8

7B3 22D8 7C5 20C2 22B8

6C3 20C8 24D4 7C6

Trang 22

DRAWING NUMBER SIZE

D

R

SHEETPAGE TITLE

A B C D

Apple: 4x 2.2uF 0402 (8.8 uF)

Apple: 4x 4.7uF 0402, 4x 1uF 0402, 6x 0.1uF 0402 (23.4 uF)NV: 1x 10uF 0805, 2x 4.7uF 0402, 3x 1uF 0402, 9x 0.1uF 0402 (23.3 uF)

Apple: 1x 2.2uF 0402 (2.2 uF)

NV: 1x 4.7uF 0603, 1x 0.1uF 0402 (4.8 uF)

Apple: 2x 2.2uF 0402 (4.4 uF)

Apple: 5x 2.2uF 0402 (11 uF)NV: 1x 10uF 0805, 1x 4.7uF 0402, 2x 1uF 0402, 2x 0.1uF 0402 (16.9 uF)

Apple: 1x 2.2uF 0402 (2.2 uF)

Apple: 1x 2.2uF 0402 (2.2 uF)MCP 1.05V AUX Power

270 mA (A01)

(No IG vs EG data)

23065 mA (A01, 1.2V)

NV: 1x 4.7uF 0603, 1x 0.1uF 0402 (4.8 uF)

MIN_LINE_WIDTH=0.4 MMVOLTAGE=1.05V

PP1V05_S0_MCP_PLL_SATA

VOLTAGE=1.05V

MIN_NECK_WIDTH=0.2 MMVOLTAGE=1.05VMIN_LINE_WIDTH=0.4 MM

402C250312

C2592

603 6.3V 20%

10UF

2 1

4.7UF

X5R-120%

4V402C25281

2 2

1C252910V402

0.1UF

20%

CERM

C25872110V402

0.1UF

CERM20%

C25852110V402

0.1UF

CERM20%

C2583

0.1UF

2110V40220%

2

1C251910VCERM

0.1uF

C25182110VCERM20%

0.1uF

2

1C252110V

402

1.47K

1/16W1%

MF-LF

2

1C2591

10V 402 20%

CERM

0.1UF

2

1R2590

402MF-LF1%

1/16W

1.47K

2 1

L2595

0402

30-OHM-1.7A

X5R-120%

4.7UF

4V402C259512

2

1C259010V

C256021

CERM402-LF20%

2.2UF

6.3V

2

1C252510V402

X5R-1

4.7UF

4V402C25011220%

X5R-14V20%

402C250012

4.7UF

0402 2 1

L2555

30-OHM-1.7A

2 1

L2586

30-OHM-1.7A

0402

2 1

L2588

0402

30-OHM-1.7A

2 1

0402

30-OHM-1.7A

2 1

L2575

0603

30-OHM-5A

2 1

2

1C25646.3V

2.2UF

20%

402-LFCERM

2

1C2562CERM402-LF20%

2.2UF

6.3V

X5R-120%

4.7UF

4V402C254012

0.1UF

2

1C254110V40220%

CERM

0.1UF

C25422110V402CERM20%

2

1C254310V402CERM20%

0.1UF 0.1UF

2

1C254410V402CERM20%

2

1C254510V402CERM20%

0.1UF

2

1C254610V402CERM20%

0.1UF

2

1C254710V402CERM20%

0.1UF

2

1C254810V402CERM20%

0.1UF

2

1C254910V402CERM20%

0.1UF

2

1C2550CERM402-LF20%

2.2UF

6.3V

2

1C2551CERM402-LF20%

6.3V

2.2UF

2

1C2552CERM402-LF20%

2.2UF

6.3V

2

1C2553CERM402-LF20%

6.3V

2.2UF

402-LF2

1C2575CERM20%

2.2UF

6.3V

2

1C25766.3V

2.2UF

20%

402-LFCERM

2

1C2573CERM402-LF20%

2.2UF

6.3V

2

1C2574CERM402-LF20%

2.2UF

6.3V2

1C2570CERM402-LF20%

2.2UF

6.3VX5R-14V

4.7UF

20%

402C25201

1C2571CERM402-LF20%

2.2UF

6.3V

2

1C2572CERM402-LF20%

2.2UF

6.3VX5R-1

4.7UF

4V20%

C251512402

C25162110V

1UF

402-1X5R

C25172110V

1UF

402-1X5R

2

1C2530CERM402-LF20%

2.2UF

6.3V

2

1C2531CERM402-LF6.3V

2.2UF

20%

2.2UF

C253221

CERM402-LF20%

6.3V

402-LFC253321

CERM20%

2.2UF

6.3V

2

1C2534CERM402-LF20%

6.3V

2.2UF

2

1C2535CERM402-LF20%

2.2UF

6.3V 6.3V

2

1C2536CERM402-LF20%

2.2UF

2

1C251210VCERM

0.1UF

2

1C251310VCERM

0.1UF

2

1C250810VCERM

0.1UF

2

1C250910VCERM

0.1UF

2

1C251010VCERM

0.1UF

2

1C251110VCERM

0.1UF

2

1C250410V

1UF

402-1X5R 2

1C250510V

1UF

402-1X5R 2

1C250610V

1UF

402-1X5R 2

1C250710V

1UF

402-1X5RX5R-1

4.7UF

4V20%

402C250212

2

1C25556.3V

2.2UF

20%

402-LFCERM

X5R-14V

4.7UF

20%

402C258612

X5R-1

4.7UF

20%

4V402C258412

X5R-120%

4.7UF

4V402C258812

X5R-14V

4.7UF

20%

402C258212

7B5 17D3 17D7 22B6

7C5

7B5 17D3 17D7 22A5 7A8 7D7

Trang 23

3 6

BRANCHREVISION

DRAWING NUMBER SIZE

D

R

SHEETPAGE TITLE

A B C D

Apple: 2x 2.2uF 0402 (4.4 uF)NV: 1x 4.7uF 0603, 1x 0.1uF 0402 (4.8 uF)

16 mA (A01)

206 mA (A01)

NOSTUFF PP3V3_S0_MCP_DAC RAIL COMPONENTS (L2650 AND C2650) REMOVE MCP 27MHZ CRYSTAL CRICUIT SINCE NOT SUPPORTING TV-OUT SYNC FROM T18

CHANGE C2651 TO R2651 TO GND PP3V3_S0_MCP_DAC REMOVE HDCP ROMS

REMOVE DAC TERMINATIONS R2665,C2665 AND R2670 TO R2672WF: Checklist says 0-ohm resistor placeholder for ferrite bead

MCP Graphics Support

CERM402-LF20%

2.2UF

6.3V2

1C2610

402 1/16W 1%

1K

MF-LF 2

0

5%

1/16W

40220%

1C2640

X5R-1C2615124024V

4.7UF

20%

402 CERM

1K

402

NO STUFF

CERM 10V

0.1UF

NO STUFF

402 2

1

C2620

30-OHM-1.7A

0402 2 1

1C2650

NO STUFF

17C3

17A3 75B3

17B6

17A6 75B3

7B6 17B6

Trang 24

OUTIN

NC NC

OUT

OUTIN

OUTOUT

OUTIN

IN

OUT

YBA

IN

ININ

OUTOUT

VIN

GND

VOUTEN

BRANCHREVISION

DRAWING NUMBER SIZE

D

R

SHEETPAGE TITLE

A B C D

Platform Reset Connections

CHANGE RTC COIN CELL TO LDO & SUPERCAP

NOTE: If CPU_VLD deasserts during S0 MCP79 will take system to S5 immediately

CPUVDD_EN (which is 40-100ms after PS_PWRGD assertion)

VR_PWRGOOD_DELAY should guarantee CPU_VLD does not go high beforeresults in earlier ROMSIP and MCP FSB I/O interface initialization

MCPSEQ_SMC represents MCP79 ’MLB’ power sequencing connections,

SYNC FROM T18 CHANGE RESET BUTTOM TO RESET PADS

ALIAS MEM_VTT_EN TO =DDRVTT_EN REMOVE UNUSED PCIE RESET SIGNALS

CHANGE Y2810 AND U2850 TO SMALLER PARTS REMOVE R2824 AND NET PCI_CLK33M_SLOT_A

=FW_RESET_LPCA9557D_RESET_LBKLT_PLT_RST_L

LPC_CLK33M_LPCPLUS

RTC_CLK32K_XTALOUT

=PP3V42_G3H_RTC_D

MAKE_BASE=TRUEMEM_VTT_EN

LPC_CLK33M_SMC_RRTC_CLK32K_XTALOUT_R

MCP_CLK25M_XTALOUT_R

MCP_CLK25M_XTALINMCP_CLK25M_XTALOUT

SB Misc

SYNC_MASTER=RAYMOND SYNC_DATE=04/05/2008

30A7

21/16W15%

0

MF-LF402R2895

21

402

0

1/16W5%

C2819

22

110%

X5R

SUPERCAP_YES0.47UF

40210V

20B7

21R2853

MF-LF5%

R2852

MF-LF5%

402

0

1/16W5%

MF-LFPLACEMENT_NOTE=Place close to U1400

MCPSEQ_SMC

2

1C2850

40220%

CERM

0.1UFMCPSEQ_SMC

10V

2 1

R2851

402

0

1/16W5%

R2815

1/16W4025%

0

21

2%

XHHGSM2

SUPERCAP_YES

0.08F

C28001

0

5%

11/16W2R2871

25A5

9C6 12B3

40B8

R2898

1 2

4025%

1/16W

XDP

0

NO STUFF0

MF-LF5%

402

SILK_PART=SYS RST

2

1R2890

33

402 MF-LF 5%

2 1

R2899

X5R 10%

18C4

R2870

33

4025%

1/16W2

R289221/16W5%

R2829

1 2PLACEMENT_NOTE=Place close to U1400

402MF-LF5%

1/16W

22

40C5 76A3 20B7

20B7

1

2402

1M

NO STUFF

R28161/16W5%

50VCERM402

402CERM50V

12pF

215%

C2815

18B3 76C3

PLACEMENT_NOTE=Place close to U1400

R2825

1 2

MF-LF5%

1/16W

33

402R2826

1 2PLACEMENT_NOTE=Place close to U1400

4025%

R28912

0

MF-LF4025%

1/16W1

PLACEMENT_NOTE=Place close to U1400

R2881

1 33 25%

1/16W402R2883

1 33 2MF-LF5%

1/16W402PLACEMENT_NOTE=Place close to U1400

18C3 76C3

12pF

4025%

50V21

CERMC2810

7D1

7A3

6C3 20C8 21A5

Trang 25

V+

V-RESET*

A0A1A2

SCLSDA

P0P1P2

P5P6P7

P3P4

IN

INBI

VDD

VOUTDVOUTCVOUTBVOUTASCL

SDAA0A1GND

INBI

BRANCHREVISION

DRAWING NUMBER SIZE

D

R

SHEETPAGE TITLE

A B C D

Signal aliases required by this page:

Place close to U1000.AD26

Place close to J3100.1

MEM A VREF CA MEM A VREF DQ

BOM options provided by this page:

SO-DIMM A and SO-DIMM B Vref settings should be margined separately (i.e not simultaneously) due to current limitation of TPS51116 regulator

VREFMRGN_DQ_SODIMMB_ENVREFMRGN_DQ_SODIMM

VREFMRGN_CPUFSB_BUFVREFMRGN_CPUFSB

40210VCERMC2903

VREFMRGN

MF-LF4025%

4022

1C290520%

0.1UF VREFMRGN

2

1C290110V402

VREFMRGN 0.1UF

20%

CERM

43B3 43B3

U2900

37

VREFMRGN

124

86

0.1UF

CERM4022

12

679

121314

402

21R2903

U2902

A3

A2

A1A4B1

B4

MAX4253

VREFMRGNUCSP

U2903

A3

A2

A1A4B1

B4

C2902

VREFMRGN 0.1UF

220%

1

402CERM

A4VREFMRGN

B4

1/16WVREFMRGN

R2910

1 2

100

1/16W1%

402VREFMRGN

B4

7C4 61D8

27B3 26B3 27D5

26D5

7D3

25B5

25A5 25B5 25A5 25A5

25B3 25C3 25D3 25B3 25C3

Trang 26

A5

DQ33

VDDA10/AP

VDD

VSS

SA1VTT

VSS

DQS4*

DQS4VSS

DQ35

VSSCK0*

SA0

VSSDQ58DQ59DM7

VSS

DQ57DQ56

DQ50DQ51VSSDQS6*

DQS6VSSDQ49

DQ43VSS

DM5

DQ42

SDASCLVTT

VSSEVENT*

DQ62VSS

DQ63

DQS7*

DQS7

DQ60DQ61VSSVSSDQ55

DM6VSS

DQ53VSSDQ52DQ47VSS

DQS5VSSDQ46DQ41

VSSDQ40DQ34VSSDQ32TESTVDDVDD

S1*

A13CAS*

WE*

BA0VDD

VDDCK0A1A3VDD

VDDA8A9A12/BC*

VDDBA2NCVDDCKE0

VSSDQS5*

VSSDQ44DQ45DQ39DQ38VSSVSSDM4

VSS

DQ37DQ36VREFCA

VDDODT1NC

S0*

ODT0

BA1RAS*

VDD

CK1*

VDDVDDA0

CK1

A2VDDA4VDDVDDA14A15CKE1VDD

BIIN

BIBIBI

BIBIIN

BIIN

BIBIBIINBIBIBIBIBIBIBI

DQ29DQ28DQ23DQ22DM2DQ21DQ20DQ15DQ14RESET*

DM1DQ13DQ12DQ7DQS0DQS0*

DQ5

DQ24DQ19DQ18DQS2DQS2*

DQ17DQ11DQ10DQS1DQS1*

DQ8DQ9

DM0DQ0VREFDQ

DQ3VSSVSS

BIBIBI

BIBI

BIBIBI

BIBI

ININ

IN

ININ

ININININ

ININ

BIBIBI

INBI

IN

BIBI

INBIBI

BIBI

BIINBIBIBIBI

BIBI

OUTBIIN

IN

ININ

ININININININININININININ

BIBIBI

INBI

BIBIBIBIBIBIBIBI

IN

BIBI

NC NC

BRANCHREVISION

DRAWING NUMBER SIZE

D

R

SHEETPAGE TITLE

A B C D

DDR3 DECOUPLING AND GROUND RETURN CAPS (CONNECTOR SIDE)

0.1UF0204-1

1

CRITICAL

C3113

X6S-CERM 6.3V 20%

0.1UF0204-1

0.1UFX6S-CERM 0204-1

0.1UF0204-1

2

1

10K

MF-LF 5%

R3141

14D7 74D3 14D7 74D3

14B7 74C3

14D7 74D3 14D7 74D3 14D5 74C3 14D5 74C3 14D7 74D3 14D7 74D3 14D7 74D3 14D7 74D3

14C7 74D3 14B7 74C3

14C7 74D3 14C7 74D3 14C7 74D3 14D5 74C3 14D5 74C3 14C7 74D3 14C7 74D3

14B5 74D3 14C5 74D3 14C5 74D3 14C5 74D3 14C5 74D3 14C5 74D3 14B5 74D3 14B5 74D3 14B5 74D3 14B5 74D3 14B5 74D3 14C5 74D3 14C5 74D3 14C5 74D3 14C5 74D3

14A5 74D3

2

1C3150

CERM 402-LF 20%

2.2UF

6.3V 43D6

20A4 20B3 27A5 40B8

14D7 74D3 14D7 74D3

14D5 74C3 14D5 74C3 14D7 74D3 14D7 74D3 14D7 74D3 14B7 74C3 14D7 74D3 14C7 74D3 14D7 74D3

2

1C3135

402-LF 20%

0.1UF

14D5 74C3 14C7 74D3 14D5 74C3

14C7 74D3 14C7 74D3 14C7 74D3 14C7 74D3 14B7 74C3 14C7 74D3 14B5 74D3

14B7 74D3 14C7 74D3 14B7 74C3 14C7 74D3 14C7 74D3 14C7 74D3 14C7 74D3

14B5 74D3 14B5 74D3

14C5 74D3 14C5 74D3 14B5 74D3 14B5 74D3 14B5 74D3 14B5 74D3

14B5 74D3 14B5 74D3

14C5 74D3 14C5 74D3

14C5 74D3 8D2

14D5 74C3 14D5 74C3

14C7 74D3 14C7 74D3 14B7 74D3

14D5 74C3 14B7 74D3

14D5 74C3 14B7 74D3 14B7 74D3 14B7 74D3 14B7 74D3 14A7 74D3

616365

6971

4

727068646260585250484642444038363234302826222018161210862

5953

4749454143

3531332927252123

1311957

13

1715

F-RT-THB

14C7 74D3 14B7 74D3 14D5 74C3 14B7 74D3 14B7 74D3 14C7 74D3 14C7 74D3 14B7 74C3 14C7 74D3 14C7 74D3 14B7 74D3 27C2 28C5 14B7 74D3 14A7 74C3 14B7 74D3 14B7 74D3 14B7 74D3 14B7 74D3 14D5 74C3

14A5 74D3

14B7 74D3 14B7 74D3

2.2UF

20%

C3130

CERM 2 1 402-LF 6.3V

14B7 74D3 14B7 74D3

J3100

908684

91

131

105107

124

195

201203

127

135137139

143

151103

197

189191193187

179

183181

175177173169171167165163159161

153155157

200202204

196198192190

194

186188

180182184178176174170172

166168164160162

154156158149

145147141133129125

117

121115113109111

99101979593

8789858379777573

150152

144146148142140138134128

132130126

118120

114116

108110112

10410610098

10296948882807874

10UF

20%

6.3V 603

6.3V 2

1C3100

10UF

20%

7C7 7C5

25D1 7D3

25C1

Trang 27

BIBIBIOUTBIIN

IN

ININ

INININ

ININININININININ

BIBIBI

INBIBIBIBIBIBIBIBI

IN

BIBI

BI

VDDA1A3VDDA5A8VDDA9VDDA12/BC*

VSSDQ42DQ43

DQ48

VSS

VSSDQ41DQS4*

DM5

VDDCKE1

A15A14VDDA11A7

A6VDD

A4

A2

CK1A0VDD

VDDCK1*

VDDRAS*

BA1

ODT0S0*

NCODT1VDD

VREFCAVDD

DQ36DQ37VSS

DM4VSS

VSSDQ38DQ39

DQ45DQ44VSS

DQS5*

VSS

CKE0VDDNCBA2

CK0

VDDBA0

WE*

A13S1*

VDD

VDDTEST

DQ33DQ32

VSS

DQ34

DQ40VSS

DQ46VSSDQS5

VSSDQ47

DQ52

VSSDQ53

VSSDM6

DQ54

VSS

VSSDQ61DQ60

DQS7DQS7*

DQ63VSSDQ62

EVENT*

VSS

VTTSCLSDA

VSS

DQS6DQS6*

VSS

DQ51DQ50

A10/APVDDCK0*

DQ35VSSDQS4VSSCAS*

VDD

DM7DQ56

MTG PINMTG PIN

MTG PIN MTG PINMTG PIN MTG PIN

MTG PIN

VSS

DQ57

VTTSA1SA0DQ58VSS

DQ59VSS

DQS1*

DQS1

DQ10DQ11

DQ17

DQS2*

DQS2

DQ18DQ19

DM1RESET*

DQ14DQ15

DQ20DQ21

DM2

DQ22DQ23

DQ28DQ29

DQS3*

DQS3

DQ30DQ4

DQ27DM3

DQ16

VSS

VSSVSSVSSVSSVSS

VSSVSS

KEY

VSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSS

VSSVSSVSS

BIIN

BIBIBI

BIBIIN

BIIN

BI

BIBIINBIBIBIBIBIBIBI

BI

INBI

BIBIBI

BI

BIBI

BIBIBIBIBI

INININ

BI

INININININININININININ

BIBIBI

INBI

IN

BIBIIN

BIBI

BIBIBIBIBIBI

BIIN

BIBIBIBI

3 6

BRANCHREVISION

DRAWING NUMBER SIZE

D

R

SHEETPAGE TITLE

A B C D

DDR3 DECOUPLING AND GROUND RETURN CAPS (CONNECTOR SIDE)

"Expansion" (bottom) slot DDR3 GROUND RETURN CAPS (MCP SIDE)

14D3 74B3 14D3 74B3 14C3 74B3

C3215

6.3V 20%

6.3V 2

2.2UF

C3235

CERM 20%

402-LF 1

2

C3236

20%

CERM 1 402

0.1UF

10V

14C3 74B3 14D1 74A3 14C3 74B3 14C3 74B3 14C3 74B3 14B3 74B3 14C3 74B3

C3216

20%

0.1UF0204-1

1

2

CRITICAL

X6S-CERM 6.3V

14C3 74B3 14B1 74B3

14C3 74B3 14C3 74B3 14B3 74B3 14C3 74B3 14C3 74B3 14B3 74B3 14C3 74B3 14B1 74B3

2

14B1 74B3 14C1 74B3 14C1 74B3 14B1 74C3 14B1 74C3 14B1 74B3 14B1 74B3 14B1 74B3 14B1 74B3 14C1 74B3

14B3 74B3

14C1 74B3 14C1 74B3 8D2

14D1 74A3 14D1 74A3 14B3 74B3 14C3 74B3 14B3 74B3

14D1 74A3 14B3 74B3

14B3 74B3

14D1 74A3 14B3 74B3 14B3 74B3 14B3 74B3 14B3 74B3 14A3 74B3

14C3 74B3

14C3 74B3 14D1 74A3 14C3 74B3 14C3 74B3 14C3 74B3 14B3 74B3 14B3 74B3 14C3 74B3 14B3 74B3

14C3 74B3

14B3 74B3 26C2 28C5 14B3 74B3 14A3 74B3 14B3 74B3 14B3 74B3 14B3 74B3 14B3 74B3 14D1 74A3 14A1 74B3

C3211

6.3V 20%

1

2

CRITICAL

0.1UFX6S-CERM 0204-1

14B3 74B3

72

1517

31

75

91113

19

2321

252729

3331

35

43

4947

51

55

5957

2

68101214

18202224

2830

3432

363840

4442

464850

5456

60

68704

71656361

3937

F-RT-BGA3CRITICAL

J3200

6264

6967

66

41

113115117119

189191

197

201203

183179

206

212211

210209

181

185187

94

103105107

175177173169171155

200202

196198192190186188

180182184

176174170172168164160162156

141133129131

109111

79777573

152

134132126

118120

114116

108110112

104106

98

1029692889086848076

153

135

149151

167165163159157

8385878991

959799

158

178166

C3224

X6S-CERM 20%

CRITICAL

X6S-CERM0.1UF20%

CRITICAL

C3228

X6S-CERM0.1UF20%

C3240

20%

CERM 402-LF 6.3V

2.2UF

1

2 MF-LF 402 5%

402 2 1

C3230

CERM 402-LF 6.3V 20%

2.2UF

1 2

14D3 74B3 14D3 74B3

14B3 74B3

14D3 74B3 14D3 74B3 14D1 74A3 14D1 74A3 14D3 74B3

C3212

6.3V 20%

14D3 74B3 14D3 74B3 14D3 74B3 14B3 74B3

14C3 74B3 14C3 74B3 14C3 74B3 14D1 74A3

C3213

0.1UF6.3V 20%

14B1 74B3 14C1 74B3 14C1 74B3 14C1 74B3 14C1 74B3 14C1 74B3 14B1 74C3 14B1 74C3

14B1 74B3 14B1 74B3 14C1 74B3 14C1 74B3 14C1 74B3 14C1 74B3

14A1 74B3

603 6.3V

0.1UF

2 1

20%

2 1 6.3V

1

2

CRITICAL

X6S-CERM 0204-1

2 402-LF

C3250

2.2UF

6.3V 20%

CERM 1 43C6

2

C3251

2.2UF

CERM 402-LF 6.3V 20%

1

20A4 20B3 26A5 40B8 14D3 74B3 14D3 74B3 14D1 74A3

20%

6.3V 0204-1

14B1 74B3

Trang 28

DRAWING NUMBER SIZE

D

R

SHEETPAGE TITLE

A B C D

B

Required becaues MCP79 does not meet DDR3 spec power-up reset timing requirement.

DDR3 RESET Support

rise to avoid glitch on MEM_RESET_L.

3.3V S5 is used because MEM_RESET must be high before 1.5V starts to

20K

5%

R33011

210V

0.1UF

20%

CERM402

C33001

2

DMB53D0UDW

SOT-363Q3305

402MF-LF

100K

R33051

2

15C3 7D3

7A3

Trang 29

IN

INBI

NC NC

ININ

YBA

BRANCHREVISION

DRAWING NUMBER SIZE

D

R

SHEETPAGE TITLE

A B C D

LOADINGRDS(ON)

275 mA peak

518S0610

0.8 A (EDP)CHANNEL

MINI_RESET_CONN_L

MINI_CLKREQ_Q_L

PCIE_MINI_D2R_N PCIE_MINI_D2R_P

AP_PWR_EN

PCIE_MINI_R2D_C_P PCIE_MINI_R2D_C_N

MINI_RESET_L

USB_CAMERA_P

WLAN_SMIT_BUF

CONN_USB2_BT_N CONN_USB2_BT_P USB_CAMERA_CONN_N

MIN_LINE_WIDTH=1 mmMIN_NECK_WIDTH=0.5 mmPP5V_WLANVOLTAGE=5V

USB_CAMERA_CONN_P

=I2C_ALS_SCL

=I2C_ALS_SDA PP5V_S3_BTCAMERA_F

MIN_LINE_WIDTH=0.5 mmVOLTAGE=5VMIN_NECK_WIDTH=0.25 mm

PP5V_WLAN_FMIN_NECK_WIDTH=0.5 mmMIN_LINE_WIDTH=1 mmVOLTAGE=5V

=PP5V_S3_WLANVOLTAGE=5VMIN_NECK_WIDTH=0.5 mmMIN_LINE_WIDTH=1 mm

PLACEMENT_NOTE=Place close to J3401

2

1C3422

1/16W

10K

MF-LF5%

4022

1R3451

R3450

1/16W5%

402MF-LF

100K

2140210%

X5R

0.033UF

2

1C3451

0.1UF

C3450

40210%

X5R

21

1

40221/16W

DLP0NS

PLACEMENT_NOTE=Place close to J3401

DLP11S90-OHM-100MA

21

L3401

CRITICAL

402CERM

1UF

6.3V10%

2

1C3453 R345462K

1/16W 402 MF-LF 5%

2 1

33K

5%

MF-LF 402 1/16W 2

1

R3453

PLACEMENT_NOTE=Place close to Q3450

10V805

10UF

X5R20%

U3402

SOT-5534

24C1

SOT665TC7SZ08AFEAPE

45

312

U3401

6D5 16B6 75D3 6D5 16B6 75D3

19C3 76C3 19D3 76C3

19D3 76C3 19D3 76C3

16C3 16C3

402

0.1uF

X5R16VPLACEMENT_NOTE=Place close to J3401

10%

21C3431

16B3 75D3 16B3 75D3

CERM40220%

0.1uF2

1C3452

29C1 32C6

7D3

29C3

6D5 75D3

6C5

6D5 75D3 6D5 75D3

7C3

6D5 76C3

6C3

6D5 76C3

6D5

Trang 30

VDDWRITE_PROTECT_SWCARD_DETECT_SWCARD_DETECT_GND

DAT6DAT7

DAT1

CD/DAT3DAT2

DAT4DAT5

VSSVSS

CLKCMDDAT0

SHLD_PIN

SHLD_PINSHLD_PINSHLD_PIN

NC NC NC NC

NC NC NC NC NC NC NC

D

SG

D

SG

D4D2

XD_CDZXD_CEXD_WEZ

XD_WPZMS_INS

SD_WPSD_CMDPDMOD

MS_BSGND

QTY

3 6

BRANCHREVISION

DRAWING NUMBER SIZE

D

R

SHEETPAGE TITLE

A B C D

B

10K LOW = POWER SAVING MODE ENABLE

/IPUIPU/

NC = DISABLE (DEFAULT) 10K HIGH = REMOTE WAKE UP ENABLE

(PDMOD)

/IPD

IPD/

/IPDIPD/

=PP3V3_S3_CARDREADER

CARDREADER_GPIO1 CARDREADER_GPIO2

PP3V3_S3_CARDREADER_DVDD

CARDREADER_PLT_RSTCARDREADER_RESET

CARDREADER_PLT_RST_L

SD_CMD

SD_WPSD_CD_L

PP3V3_S3_CARDREADER_AVDD

PP1V8_S3_CARDREADER

VOLTAGE=1.8VMIN_NECK_WIDTH=0.20MM

MIN_NECK_WIDTH=0.20MMVOLTAGE=3.3VMIN_LINE_WIDTH=0.40MMPLACEMENT_NOTE=PLACE 402 NEAR EACH PIN

1314244

24

3412

MF-LF

10K R3513

1

2

1/16W402MF-LF5%

10K R3512

1

2

4025%

0

1/16W

1 2R3511

10K

1/16W4025%

R3509

1

2

MF-LF402

1

2R3505

10UF C3514

1

26036.3V20%

4

20191817

13111098725

1

1415

CERM50V

1 2

33PF C3512

CRITICAL

Y3500

1 28X4.5X1.4-SM

12.000M-100PPM

33PF

4025%

CERM

C3511

1 250V

19C3 76B3 19C3 76B3

20%

CERM10V

0.1UF C3504

1

2402

10VCERM

0.1UF C3503

1

220%

402CERM

0.1UF C3502

1

2

10VCERM20%

0.1UF C3508

1

2

2.2UF

6.3VCERM120%

6031

1

2

20%

CERM10V4021

2

C3505 0.1UF

5%

1M

MF-LF402

R3503

1 21/16W

R3502

1

30B4 30D6 7C3

30A7 30D6

78C3

78C3 78C3

30A7 30B4

30A7

78C3

30A6

78C3 78C3 78C3

78D3 78D3 78C3

Trang 31

IN

INBI

IN

BI

BIBI

BIBIBIBIBI

OUT

OUTOUTOUT

CLOCK

MANAGEMENT

MEDIA DEPENDENTRGMII/MII

BRANCHREVISION

DRAWING NUMBER SIZE

D

R

SHEETPAGE TITLE

A B C D

B

Configuration Settings:

TXDLY = 0 (No TXCLK Delay)

If internal switcher is not used, VDDREG and REGOUT can float

(43mA typ - 1000base-T)

( 7mA typ - Energy Detect)(221mA typ - 1000base-T)

WF: Marvell numbers, update for Realtek

RXDLY = 0 (RXCLK transitions with data)

If internal switcher is used, must place 1x 22uF &

1x 0.1uF caps within 5mm of U3700 pins 44 & 45

NOTE: VDDREG rise time must be >1ms to avoid damage to switcher

of U3700, and 1x 22uF & 1x 0.1uF caps within 5mm of inductor

If internal switcher is used, must place inductor within 5mm

Alias to GND for external 1.05V supply

PLACE R3796 CLOSE TO U1400, PIN D24

per RealTek request

Reserved for EMI

Alias to =PP3V3_ENET_PHY for internal switcher

HENCE, RC (C3725 AND R3725) ARE NOT STUFFED

ENET_RESET_L IS NOT ASSERTED WHEN WOL IS ACTIVE

(19mA typ - Energy Detect)

AN[1:0] = 11 (Full auto-negotiation)

PHYAD = 01 (PHY Address 00001)

WF: Marvell numbers, update for Realtek

13

98

11

45

1816

12

353834

2

1

C3790

NO STUFF10PF

50V CERM 5%

402

2

1C371416V

0.1UF

X5R

2

1C371010%

40216V

0.1UF

2

1C3711

40210%

2.2UF

6.3V20%

CERM402-LFC3715126.3V402-LF

4.7K

5%

MF-LF402

8D2

2

1

R37561/16W5%

MF-LF

4.7K

402

17D6 77D3 17D6 77D3 17D6 77D3 17D6 77D3 17D6 77D3 17D6 77D3

21R3795

5% 1/16W MF-LF

22

402

21R3794

5% 1/16W MF-LF

22

4022

1R3793

5% 1/16W MF-LF

22

4022

1R3792 22

5% 1/16W MF-LF 4022

1R3791 22

5% 1/16W MF-LF 402

21R3790

402

22

1/16W5% MF-LF

33C8 77C3 33C8 77C3 33C8 77C3 33C8 77C3 33C8 77C3 33B8 77C3 33C8 77C3 33B8 77C3

32A3 77D3

17C3 77C3

17C3 77D3 17D3 77D3

17D3 77C3

17D3 77D3 17D3 77D3 17D3 77D3 17D3 77D3

2

1C370210%

40216V

0.1UF

2

1C370110%

402

0.1UF

16V2

1C370010%

40216V

0.1UF

2

1C370610%

40216V

0.1UF

2

1C370510%

40216V

2

1

R3720

4021/16W5%

10K

2

1

R3725MF-LF402

2 1

R3724

4021/16W5%

8D2 7B5

Trang 32

DS

OUT

D

SG

D

SG

D

SG

D

SG

IN

D

SG

BRANCHREVISION

DRAWING NUMBER SIZE

D

R

SHEETPAGE TITLE

A B C D

B

Pull-up is with power FET

ARB for alternate power options

Recommend aliasing PM_SLP_RMGT_L and

NOTE: MCP79 can provide 25MHz clock, but clock runs whenever RMGT rails are powered

Designs must ensure PHY is powered whenever RMGT rails are, or use separate crystal

=P3V3ENET_EN Nets separated on

Non-ARB:

ARB for alternate power options

Recommend aliasing PM_SLP_RMGT_L and

=P1V05ENET_EN Nets separated on

Rds(on) = 90mOhm max

NOTE: S3 term is guaranteed by S3 pull-up on open-drain AP_PWR_EN signal

"WLAN" = ("S3" && "AP_PWR_EN" && ("AC" || "S0"))

WLAN Enable Generation

Ethernet & AirPort Support

R3840

MF-LF402

100K

211/16W5%

R3841

1 2 MF-LF 1%

1/16W 402

10K

8D2

Q3841 3

5 4

R38001

2 1/16W 402 5%

10K

Q3840

3

1 2

1/16W

69.8K

Q3841 6

2 1

SSM6N15FEAPE

SOT563

Q3805 6

2 1

SOT563

SSM6N15FEAPE

6C3 20C3 35A5 40C5 66D5 70D8

20A3 20C3 29D5

Q3801

SSM6N15FEAPE

SOT563

2 1 6

20C7 35B5 40D5 41B2

Q3805 3

5 4

SOT563

SSM6N15FEAPE

29A4 29C1

C38401 2 402 10V CERM 20%

0.1UF

C3841

1 2 10%

402 CERM

MF-LF

22

402

17C3 77D3

R3810

1 21/16W5%

100K

402MF-LF

C38111

2 16V40210%

0.033UF

C3810

1 2 CERM 16V

0.01UF

402 10%

Q3810

3

1 2 SOT-23-HF

NTR4101PCRITICAL

7B6

7B3 7A3

7A3

Trang 33

3 6

BRANCHREVISION

DRAWING NUMBER SIZE

D

R

SHEETPAGE TITLE

A B C D

3

45

89

3

45

89

CERM10%

R3903

1 2

4021/16W

75

1% MF-LF

R3902

1 21% 1/16W MF-LF 402

75

1%

R3901

1 21/16W MF-LF 402

75

R3900

1 275

MF-LF1/16W

1

210%

4020.1UF

C3903 C3901

1

210%

0.1UF402X5R

0.1UF2

2X5R0.1UF

63

78

F-RT-TH

CRITICAL

21

402-1

C39185%

10PFCERM50V

CRITICAL

21

402-1

C391750VCERM10PF5%

CRITICAL

C391621

402-1

10PF50V5%

CERM

10PF

CRITICAL

21

402-1

C39155%

CERM50V

CRITICAL

21

402-1

C391450VCERM10PF5%

CRITICAL

21

402-150V10PF C39135%

CERM

CRITICAL

21

402-15%

C3912 10PF50VCERM

CRITICAL

2402-1

110PF C391150VCERM5%

77C3

77C3 77C3

Trang 34

ATBUSHATBUSN

VP25

OCR_CTL_V10

VAUX_DETECT

TMSTCKREFCLKNPCIE_TXD0P

AVREGCE

CLKREQN

FW_RESET*

FW620*

JASI_ENMODE_ANAND_TREE

OCR_CTL_V12

PCIE_RXD0NPCIE_RXD0PPCIE_TXD0N

SCLSDASE

SM

TDOTPA1N

TPA2NTPA2PTPB0N

TPB1N

TPB2NTPB2PTPBIAS0TPBIAS1TPBIAS2

DS0

TPA1P

VDD33VDD10

VREG_VSSVSS

CHIP RESETSCIF

1394 PHY

NC NC

NC

ININ

OUTOUT

OUT

ININ

IN

NC NC

QTY

3 6

BRANCHREVISION

DRAWING NUMBER SIZE

D

R

SHEETPAGE TITLE

A B C D

(Reserved)

NT-9(IPD)

(IPD) NT-19(IPD) NT-20

(IPU)

(IPD) NT-21

(IPU)

NT-13NT-12 (IPD)

=FW_CLKREQ_LPP1V0_FW_R

TP_FW643_NAND_TREE

FW_CLK24P576M_XI

TP_FW643_MODE_A

TP_FW643_TDIPCIE_FW_R2D_N

PP3V3_FW_FWPHY_VDDA

MIN_LINE_WIDTH=0.4 MMVOLTAGE=1.0V

PP1V0_FW_FWPHY_AVDD

MIN_NECK_WIDTH=0.2 MM

=PP3V3_FW_FWPHY

PP3V3_FW_FWPHY_VP25

FW_P0_TPBIASFW_P1_TPBIASFW_P2_TPBIASFW643_R0

FW643_PU_RST_LTP_FW643_OCR10_CTL

TP_FW643_SM

TP_FW643_CETP_FW643_SE

FW643_REXTFW_CLK24P576M_XO_RFW_CLK24P576M_XO

=PPVP_FW_PHY_CPS

FW643_VAUX_DETECTFW643_TRST_L

FW643_SCLTP_FW643_TMS

TP_FW643_AVREGTP_FW643_FW620_L

FW_RESET_LTP_FW643_SDATP_FW643_TDO

TP_FW643_VBUF

FW_P1_TPA_PFW_P1_TPA_N

FW_P2_TPA_NFW_P2_TPA_PFW_P0_TPB_N

FW_P1_TPB_NFW_P1_TPB_PFW_P2_TPB_NFW_P2_TPB_P

FW_P0_TPA_PFW_P0_TPA_N

PCIE_FW_R2D_P

PCIE_CLK100M_FW_P

PCIE_FW_D2R_C_NPCIE_FW_D2R_C_P

MF-LF5%

R41611

24021/16W1%

MF-LF

2.94K

35C4 8C2 35C8

16B6 75D3 16B6 75D3 16B3 75D3 16B3 75D3

16C3 16C3

C4140110%

1UF

4026.3V2

C41111

210%

1UF

4026.3V

C41411210V402

0.1UF

CERM20%

C41241210%

1UF

4026.3VC41231210%

1UF

4026.3V1

210%

1UF

402CERMC41226.3VC41211210%

1UF

4026.3VC41201

210%

1UF

6.3V402

C41061

210%

1UF

4026.3VC41051

210%

1UF

4026.3V

C41101

1UF

6.3V10%

2402CERM

C41041

210%

1UF

4026.3V

C4136210%

1UF

1

CERM402

C4135110%

1UF

402CERM 2

C41031

210%

1UF

4026.3VC41021

210%

1UF

4026.3V

C4132

1UF

1

210%

6.3V402

1

210%

1UF

4026.3VC41012

1

1UF

4026.3V10%

C4100

C4131110%

1UF

402CERM 21

210%

1UF

6.3VC4130

402

1 10%2402X5R16VPLACEMENT_NOTE=Place C4170 close to U1400

0.1UF

C4170 C41711 10%2

402X5R16VPLACEMENT_NOTE=Place C4171 close to U1400

0.1UF

R41661

24021/16W5%

MF-LF

10K

C41751 10%2

402X5R16V

PLACEMENT_NOTE=Place C4175 close to U4000

0.1UF

C41761 10%2

402X5R16V

PLACEMENT_NOTE=Place C4176 close to U4000

0.1UF

R41651

2402

10K

MF-LF5%

1/16W

FW643_LDO

R41641

24021/16W5%

MF-LF

10K

R41631

24021/16W5%

1/16W402R4150

R41601

2MF-LF

F13G13

N13M13

M11N12

H1G1L8

D13N10

B11

N4

N5N7

J13

K1

J2

D1D12

N2B13

N1

N6N9

E13

F2M1

R41621

2402

470K

MF-LF5%

1/16WC41621

210%

4026.3V

191

7A1 35D3

75D3

7B1 34B1 35D8 36B6 36D5

36C4

7B1 34D2 35D8 36B6 36D5 75D3

75D3

Trang 35

EQ2 C

S

GD

S

IN

G

DS

D

SG

D

SG

D

SG

D

SG

IN

D

SG

D

SG

IN

GD

S

GDSG

DSIN

IN

V+

3 6

BRANCHREVISION

DRAWING NUMBER SIZE

D

R

SHEETPAGE TITLE

A B C D

3.08V when port power is on

FireWire Port Power Switch

3.3V FW FET

I(max) = 1.7A (85C)

Power aliases required by this page:

PP1V05_FW PGOOD/FW_RESET_L

Rds(on) = 90mOhm max

(NONE)

- =PPBUS_S5_FWPWRSW (system supply for bus power)

2.91V when late Vg event and port power is offFWLATEVG Hysteresis:

Late-VG Event Detection

BC847CDXV6TXGSOT563

PM_SLP_S3_L

FW_PWR_EN SMC_ADAPTER_EN

C4260

21

40210%

0.1UF

SM-HF3

4

5

21

6Q4261

2N7002DW-X-G

470K

1

1/16W5%

402MF-LF2

R4261

SOT-363453

2N7002DW-X-G

Q4261

300K

1/16W2

R4260

1

MF-LF5%

45

C4295

12

R4297

MF-LF2

R42951

2

Q4293

45

3

SSM6N15FEAPE

SOT563

45

0.01UF

2

13

0.033UF

21

R4291

100K

MF-LF4025%

1/16W2

10K

1/16W1%

MF-LF402

4

3

5 Q4299SOT-563

DMB53D0UV CRITICAL

2

1C4281

6.3V

1UF

10%

CERM402

24C1

21R4283

4025%

MF-LF

10K

12

CRITICAL DMB53D0UV

SOT-563Q4275

12

2

1

12K

402MF-LF5%

2

1R4274

5%

402MF-LF

1

1/16W5%

R4270

4

35

Q4270 CRITICAL

100

1%

4021/16W

R4265

1/16W402MF-LF1%

10K

2

1R4213

MF-LF1%

1/16W402

50V

C4211

R4211

402MF-LF2

21

35D6 35C7 35A4 18D7 18D2 7B1

34D8 7A1

35B1 7B5 7B5

7B2

7C7

35D2 7B5 7B2 7B2

7A3

Trang 36

TPA+ TPA(R)VG

VPTPB+

TPB(R)TPB-

TPA-CHASSISGND

3 6

BRANCHREVISION

DRAWING NUMBER SIZE

D

R

SHEETPAGE TITLE

A B C D

B

Page Notes

to apply to entire TPA/TPB XNets

Power aliases required by this page:

local grounds per 1394b spec

Note: Trace PPVP_FW_PORT1 must handle up to 5A

When a bilingual device is connected to a

TPA<R>

VG

TPB+

VP

FireWire PHY Config Straps

properly terminate unused signals

PORT 1

- =GND_CHASSIS_FW_PORT1

FireWire TPA/TPB pairs to their

the necessary aliases to map the

1394b implementation based on Apple

FireWire Design Guide (FWDG 0.6, 5/14/03)

NOTE: FireWire TPA/TPB pairs are NOT

appropriate connectors and/or to

ground for speed signaling and connectionBREF should be hard-connected to logicbetween them (to avoid ground offset issue)beta-only device, there is no DC path

514S0605

- =PP3V3_FW_LATEVG

- =PPVP_FW_PORT1

TI PHYs require 1uF even though

Place close to FireWire PHY

FW spec calls out 0.33uF

Termination

assumed that FireWire PHY page will

and should be biased to 2.4V for marginPP2V4_FWLATEVG needs to be biased

for snap-back diodes

- Port "1" Bilingual (1394B)

- 1-port Portable Power Class (0)

NOTE: This page is expected to contain

Configures PHY for:

provide the appropriate constraints

constrained on this page It is

R4390 should be 390 Ohms max for a 3.3V rail

to at least 2.1V for FW signal integrity

Late-VG Protection Power

"Snapback" & "Late VG" Protection

FW_PORT1_AREF

MAKE_BASE=TRUEMIN_LINE_WIDTH=0.4 mm

FW_P0_TPBIASFW_P2_TPBIASFW_P0_TPA_N

MAKE_BASE=TRUE

NC_FW2_TPBNFW_P2_TPB_P NC_FW2_TPBP MAKE_BASE=TRUE

FW_PORT1_TPB_PFW_PORT1_TPB_NPP2V4_FW_LATEVG

1/16W

470K

R43121

25%

402MF-LF

330K

Q43006

2 1

2

10K

MF-LF1%

1/16W402

R43811

2

10K

1/16W1%

402MF-LF

J4310

1

10 11 13

2

3 4 5 6 7 8 9

CRITICAL

F-RT-TH

1394B-M97

D43901

1/16W

C43121240210%

0.01uF

C431312X7R

BAV99DW-X-G

SOT-3632

BAV99DW-X-G

DP4311

16SOT-363

2402

0.01uF

50VDP4310

1

26

BAV99DW-X-G

SOT-363C43101

2X7R10%

240210%

X7R

0.01UF

R43191

2

1M

1/16W5%

402MF-LF

PLACEMENT_NOTE=Place C4319 close to connector pin 5

C431912

0.1uF

X7R603-110%

R43601

2

SIGNAL_MODEL=EMPTY

56.2

402MF-LF1%

1/16W

C43601

240210%

6.3VCERM-X5R

0.33UF

R43611

2SIGNAL_MODEL=EMPTY

4021/16W

56.2

1%

C43641

2 25V5%

402CERM

220pF

R43621

2

56.2

402MF-LF1%

R43631

21/16W1%

402MF-LF

34B6

78D3

34B6 78D3

36B5 36B5

7B1 34B1 34D2 35D8 36B6

34B6 78D3

34B6

78D3

34B7 7B1

7B1 34B1 34D2 35D8 36D5

36B7 36B7

35A8 36A5

36B7 36B7

Trang 37

D

SG

D

SG

SYM_VER-1

OUTOUT

BRANCHREVISION

DRAWING NUMBER SIZE

D

R

SHEETPAGE TITLE

A B C D

PLACEMENT_NOTE=Place C4516 close to J4501

PLACEMENT_NOTE=PLACE FL4502 CLOSE TO J4501PLACEMENT_NOTE=PLACE C4502 CLOSE TO J4501

PP5V_SW_ODD

MIN_LINE_WIDTH=0.6mm

PP5V_S0_HDD_FLT

MIN_NECK_WIDTH=0.2MMVOLTAGE=5V

SATA_HDD_R2D_UF_P

SATA_HDD_D2R_P SATA_HDD_D2R_UF_N

SATA_ODD_D2R_N

SATA_ODD_D2R_P

SATA_ODD_R2D_UF_P SATA_ODD_R2D_UF_N

SATA_ODD_D2R_UF_P SATA_ODD_D2R_UF_N

SATA_HDD_R2D_P

=PP1V5_S3_HDD

IR_RX_OUTPP1V5_S3_HDD_FLT

54722-0164

151373

161412864F-ST-SMJ4500

CRITICAL

16V10%

0.01UF

21

0.01UF

C45101 2

21

C4516

0.01UF 10% 16VCERM 402

19D6 75A3

19D6 75A3 19D6 75A3

FL4502

21

C4501

FERR-70-OHM-4A

21

0.01UF

PLACEMENT_NOTE=PLACE C4520 CLOSE TO MCP79

C4520

1 216V10% CERM402

C4595

1

5%

1/16W402MF-LF

19D6 75A3 19D6 75A3

DLP11S

CRITICAL

34

2

6B7 40B8

20402

FERR-220-OHM

1L4502

26.3V10%

2115119531

14107

1613

402 X7R-CERM 10%

0.1UF

1

2C4532

MF-LF10

R4532

1

1/16W 402

6B7 75A3

7C3

39D7

6B7 6C3

6A7

7C3

6B7 75A3

7D5

7C5 37C7

75A3 75A3

6B7 75A3

6B7 75A3 6A7 6B7 75A3 7C5

37D6

75A3 75A3

6B7 75A3 7D3

6A7 39D4 41A6

6B7 75A3

Trang 38

IO NC IO

GNDVBUS NCVCC

GNDSELOE*

D+

D-Y+

M+

Y-

M-IN

OUT2

TPADGND

OUT1OC1*

EN2EN1OC2*

BRANCHREVISION

DRAWING NUMBER SIZE

D

R

SHEETPAGE TITLE

A B C D

STUFF R4691 IF USING TPS2060(ACTIVE LOW ENABLE)

USB PORT A (FRONT PORT)

SEL=1 Choose USB

Place L4600 and L4605 at connector pin

SEL=0 Choose SMC

USB PORT B (BACK PORT)

Port Power Switch

USB/SMC Debug Mux

We can remove C4690 later if the output cap of the 5V_S5 regulator is close enough

CAN NOSTUFF C4696 AND C4616 AFTER CHARACTERIZATION

PP5V_S3_RTUSB_B_F

CONN_USB_EXTB_NCONN_USB_EXTB_P

PP5V_S3_RTUSB_A_F

MIN_LINE_WIDTH=0.5 mmVOLTAGE=5V

CONN_USB_EXTA_N

CONN_USB_EXTA_PUSB_EXTA_MUXED_N

PP5V_S3_RTUSB_B_ILIM

MIN_NECK_WIDTH=0.5 mmVOLTAGE=5V

MIN_LINE_WIDTH=0.5 mmVOLTAGE=5VMIN_NECK_WIDTH=0.5 mm

PP5V_S3_RTUSB_A_ILIMUSB_EXTA_OC_L

USB_EXTB_OC_L

=PP5V_S3_EXTUSB

USB_EXTA_NUSB_EXTA_P

SMC_RX_LSMC_TX_L

USB_DEBUGPRT_EN_L

USB_EXTB_PUSB_EXTB_N

USB_EXTA_MUXED_P

=PP3V42_G3H_SMCUSBMUX

=USB_PWR_EN

SYNC_DATE=01/18/2008 SYNC_MASTER=YUAN.MA

External USB Connectors

J4610F-RT-TH-M97-4

87

65

342

USB

CRITICAL

F-RT-TH-M97-4

87

6

321

7

1 96

6.3V603C4690

2 1

10UF

X5R20%

NOSTUFF

6 3

2 5 4 1

SLP1210N6

CRITICALRCLAMP0502N

D4610

2 4

D4600

5 1

RCLAMP0502N

6 3

SLP1210N6

CRITICAL

19C2

19C3 76B3

CASE-B2-SM6.3VPOLY-TANT20%

X5R

10UF

2C4617

6036.3V20%

PLACEMENT_NOTE=NEAR J4610

DLP0NSL461090-OHM

CRITICAL

PLACEMENT_NOTE=NEAR J4610CRITICAL

L4615

060321

FERR-220-OHM-2.5A

0.01uF

C4615

2 1

CERM20%

402

2 1

0.01uF

16V402CERM

C460520%

1 2 MF-LF 5%

402

0SMC_DEBUG_NO

R4652

2 1

R4651

402 5%

PLACEMENT_NOTE=NEAR J4600

2L4600CRITICAL

MF-LF4021/16W1

2C465010V

0.1UF

2120%

CERM402

20%

10UF

6.3V 2

1C4695X5R POLY-TANT

100UF

C4696

CRITICAL

6.3V20%

21

CASE-B2-SM

FERR-220-OHM-2.5A

1L46052

CRITICALPLACEMENT_NOTE=NEAR J4600

0603

76B3 76B3

76C3 76C3 76C3

7C3

76C3

7D1

Trang 39

P0_3/INT1P0_4/INT2P0_5/TIO0P0_6/TIO1P0_7

P0_2/INT0P0_1

THRM_PADNC

P1_7P1_6/MISOP1_5/SMOSIP1_4/SCLK

P3_1P3_0

P1_3/SSELP1_2/VREG

VDDP1_1/D-P1_0/D+

VSSNC

P2_1P2_0

P0_0

BIBI

3 6

BRANCHREVISION

DRAWING NUMBER SIZE

D

R

SHEETPAGE TITLE

A B C D

USB_IR_PDIFFERENTIAL_PAIR=USB2_IR

IR_VREF_FILTER

IR_RX_OUTIR_RX_OUT_RC

0.001UF

CERM

2 1

R4800

MF-LF 5%

100

1/16W 402

19D3 76B3 19D3 76B3

C4803

2 1 402-1 X5R

8926

2523201815

3213456

3130292827

1917121110

U4800

CRITICALOMIT

6A7 37A7 7C3

37A8

Trang 40

IN

OUTOUTININOUT

ININININININ

IN

OUTIN

ININOUT

IN

OUTOUTOUTOUT

ININININ

IN

ININ

INININ

INININOUTIN

IN

BIBIBIBIBI

OUTOUTOUT

IN

INOUT

ININ

BI

BIOUT

IN

OUTOUT

NC

OUTOUT

OUTNC

NC NC NC NC NC

NC

NC NC

NC NC NC

NC

INOUT

OUT

P13P14

P10P11P12

P17P20P21

P23P24P25P26

P30P31P32P33

P36P37P40P41P42P43

P45

P47P50

P52

P60P61P62P63P64

P67P70P71

P73P74P75P76

P80P81

P84P85P86P90

P92P93P94

P96

P35

P83P82(1 OF 3)

PA5PA4

PA0PA1PA2PA3

PA6PA7PB0

PB2PB3PB4PB5

PB7PC0PC1PC2

PC4PC5PC6PC7PD0PD1PD2PD3PD4

PD6PD7

PE0PE1PE2PE3

PF0PF1PF2PF3

PF5PF6PF7PG0PG1PG2PG3PG4PG5

PG7PH0PH1

PH3PH4PH5(2 OF 3)

RES*

NMI

VSS

VCLVCC

NC

MD2MD1

ETRSTAVSS

AVREFAVCC

EXTALXTAL(3 OF 3)

BIBIBIBIININ

OUT

BI

ININININBIIN

3 6

BRANCHREVISION

DRAWING NUMBER SIZE

D

R

SHEETPAGE TITLE

A B C D

B

NOTE: P94 and P95 are shorted, P95 could be spare

(OC)

NOTE: Unused pins have "SMC_Pxx" names Unused

those designated as inputs require pull-ups

Otherwise, TP/NC okay (was ISENSE_CAL_EN)SMC_IG_THROTTLE_L for MG systems

SMC_PB3:

(OC)(OC)(OC)

(OC)(OC)(OC)(OC)

(DEBUG_SW_1)

(DEBUG_SW_2)

(OC)(OC)

(OC) pins designed as outputs can be left floating,

(OC)

(See below)

If SMS interrupt is not used, pull up to SMC rail

NOTE: SMS Interrupt can be active high or low, rename net accordingly

SMC_TRST_LSMC_KBC_MDE

SMC_VCL

SMC_NMI

SMB_0_S0_DATAPM_SLP_S5_LPM_SLP_S3_LSMC_BS_ALRT_LSMC_BC_ACOKSMC_ONOFF_LSMC_RX_L

SMC_BATT_ISENSESMC_PBUS_VSENSESMC_DCIN_ISENSESMC_CPU_VSENSESMC_CPU_ISENSE

SMC_RX_LSMC_GFX_THROTTLE_LSMS_ONOFF_LSMB_MGMT_DATASMC_P41LPC_SERIRQLPC_FRAME_LLPC_AD<2>

ALL_SYS_PWRGD

ALS_GAINSMC_PH2SMC_PROCHOTSMB_B_S0_CLKSMB_B_S0_DATASMB_A_S3_CLKSMB_A_S3_DATASMB_BSA_CLKSMB_BSA_DATA

=SMC_SMS_INTSMC_MCP_SAFE_MODESMC_LIDSMC_SYS_LEDSMC_TMS

ALS_RIGHTALS_LEFTSMC_NB_DDR_ISENSESMC_NB_CORE_ISENSESMC_ANALOG_IDSMS_Z_AXISSMS_Y_AXISSMS_X_AXISSMC_FAN_3_TACHSMC_FAN_2_TACHSMC_FAN_1_TACHSMC_FAN_0_TACHSMC_FAN_3_CTLSMC_FAN_1_CTLSMC_FAN_0_CTLSMC_GFX_OVERTEMP_LSMC_EXCARD_OC_LSMC_EXCARD_CPSMC_PB3SMC_ODD_DETECTSMC_RUNTIME_SCI_LPM_BATLOW_LSYS_ONEWIRESMC_PA1

SMC_PA5

SMC_XTALSMC_EXTAL

SMC_MD1

PM_CLK32K_SUSCLKSMC_WAKE_SCI_L

SMC_RSTGATE_LSMC_EXCARD_PWR_EN

PM_RSMRST_L

SMC_TDOSMC_TDISMC_CASE_OPEN

LPC_AD<3>

LPC_CLK33M_SMCSMC_LRESET_L

LPC_AD<1>

LPC_AD<0>

SMC_P26SMC_P24

ESTARLDO_ENPM_PWRBTN_LIMVP_VR_ON

PM_SLP_S4_LSMC_GPU_VSENSE

SMC_THRMTRIP

SMC_ADAPTER_EN

SMC_PROCHOT_3_3_LSMC_BIL_BUTTON_LRSMRST_PWRGD

SMC_PM_G2_EN

SMC_GPU_ISENSE

SMC_NB_MISC_ISENSE

LPC_PWRDWN_LSMC_TX_LPM_CLKRUN_L

SMB_MGMT_CLK

SYNC_DATE=06/26/2008 SYNC_MASTER=T18_MLB

SMC

41D1

43B5

43D6 76A3 24B1 41A2 6C3 20C3 41A2 66C8

70D8 66D5 35A5 32B7 6C3

H3L9

A2A3

N3N1

M2

K3

B8C9B9A10

B10C11A11G11

F12H13G10

H11J13M10N9K10L8M9N8K9

K1J3

J1K4K5N5

L5M5N4L4

M8N7K8K7

N6M7L6E2

J2A4

H2

B13D11

D10D13E11D12F11

E12F13E10A9

C8B7A8

D7D6D4A5B4

C2B2C1C3G2F3E4

L13K12

H12N10M11

N11

M13N13L12A7

A6B5

J4G3

G1

G4F4F1

D8

D5C7

41D5

58C4 6A7

41B2 35B5 32B7 20C7

50B7

41D5

42D5 18B7 20C7

41C5

41C5 41C2 41C2 43C3 43C3 43D3 43D3 43C6

58C1 48A5 41C2

42D5 41B2 42D5 41B2 42D3 41B2 41B2 42D3 41B2

10K

1

2MF-LFR4998

4021/16W5%

MF-LF

0

R49031

1/16WR49021

2

4021/16W5%

10K

MF-LFR49011

2

42D5 42C3

4021/16W5%

42C3 41B2 40C5 38A8

41C2

42C5 40C5 38A8

41D5 58D2 41B2 41B2

41B2 45A4 44B4 45B1 41B2 44D6

10V402

0.1UF

CERM20%

1

2C4906

0.1UF

20%

C49051

CERM10V402

0.1UF

20%

C49041

2

PLACEMENT_NOTE=PLACE R4999 CLOSE TO U4900 PINS M12

1/16W402

R49995%

4022

CERM240210V

PLACEMENT_NOTE=PLACE C4907 CLOSE TO U4900 PIN E1

1C4907

0.47UF

41C7 48C3 41C2 41A3

42D3 41D6

42D3 18C3

22UF

805CERM20%

6.3VC490212

6C2 41C6 41D8 41C7 41C3 41C1 7D1

45D7 45C5 45B5 45B2 45A4 45A1 44D6 44C6 44B5 41B6

41C2 41D5

41D5

Định dạng
Số trang	81
Dung lượng	1,36 MB