apple macbook pro a1297 k92

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TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM

3 ALL CRYSTALS & OSCILLATOR VALUES ARE IN HERTZ.

8

1 ALL RESISTANCE VALUES ARE IN OHMS, 0.1 WATT +/- 5%.

III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE

II NOT TO REPRODUCE OR COPY IT

B

7

ECN REV

BRANCH

DRAWING NUMBER

REVISION

SIZED

PROPRIETARY PROPERTY OF APPLE COMPUTER, INC

THE INFORMATION CONTAINED HEREIN IS THE

2 ALL CAPACITANCE VALUES ARE IN MICROFARADS.

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APPD CK DESCRIPTION OF REVISION

TABLE_TABLEOFCONTENTS_HEAD

TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_HEAD

External USB Connectors

08/24/2010 46

SATA Connectors

11/08/2010 45

FireWire Connector

07/22/2010 43

FireWire Port & PHY Power

10/20/2010 42

FireWire LLC/PHY (FW643)

10/20/2010 41

Ethernet Connector

08/24/2010 40

ETHERNET PHY (CAESAR IV)

10/19/2010 39

T29 Power Support

11/09/2010 38

T29 Host (2 of 2)

11/09/2010 37

T29 Host (1 of 2)

11/09/2010 36

ExpressCard Connector

07/27/2010 35

PCH GROUNDS

05/20/2010 23

PCH POWER

07/09/2010 22

PCH MISC

10/20/2010 21

PCH PCI/FLASHCACHE/USB

10/20/2010 20

PCH DMI/FDI/GRAPHICS

10/17/2010 19

PCH SATA/PCIE/CLK/LPC/SPI

10/19/2010 18

CPU DECOUPLING-II

07/21/2010 17

CPU DECOUPLING-I

07/21/2010 16

CPU POWER AND GND

04/26/2010 14

CPU CLOCK/MISC/JTAG

07/16/2010 11

CPU DMI/PEG/FDI/RSVD

04/26/2010 10

Signal Aliases

04/26/2010 9

Power Aliases

04/26/2010 8

Functional / ICT Test

04/26/2010 7

04/26/2010 98

LCD Backlight Support

09/07/2010 97

LCD Backlight Driver (LP8545)

07/28/2010 96

Graphics MUX (GMUX)

07/21/2010 95

1V0 GPU / 1V5 FB Power Supply

10/22/2010 94

DisplayPort/T29 A Connector

10/22/2010 93

DisplayPort/T29 A MUXing

06/25/2010 92

Muxed Graphics Support

04/26/2010 90

LVDS Display Connector

07/21/2010 89

GPU (Whistler) CORE SUPPLY

06/01/2010 88

Whistler DP PWR/GNDs

07/17/2010 87

Whistler GPIOs & STRAPs

10/21/2010 86

Whistler LVDS/DP/GPIO

08/23/2010 85

GDDR5 Frame Buffer B

08/23/2010 84

GDDR5 Frame Buffer A

04/27/2010 82

Whistler FRAME BUFFER I/F

06/03/2010 81

Whistler CORE/FB POWER

10/19/2010 80

Whistler PCI-E

07/22/2010 79

Power Control 1/ENABLE

10/18/2010 78

Power FETs

07/21/2010 77

Misc Power Supplies

09/23/2010 76

CPU VCCIO (1.05V) Power Supply

09/27/2010 75

CPU IMVP7 & AXG VCore Output

11/09/2010 74

CPU IMVP7 & AXG VCore Regulator

07/21/2010 73

1.5V DDR3 Supply

08/30/2010 72

5V / 3.3V Power Supply

07/21/2010 71

System Agent Supply

07/21/2010 70

PBus Supply & Battery Charger

06/28/2010 69

DC-In & Battery Connectors

11/22/2010 68

AUDIO: JACK TRANSLATORS

11/02/2010 67

AUDIO: JACKS

10/22/2010 66

AUDIO:SPEAKER AMP

10/22/2010 65

AUDIO: HEADPHONE OUT

06/16/2010 63

AUDIO: LINE IN

07/30/2010 62

AUDIO:CODEC

05/27/2010 61

SPI ROM

06/02/2010 59

Digital Accelerometer

07/27/2010 58

WELLSPRING 2

10/11/2010 57

WELLSPRING 1

04/26/2010 56

Fan Connectors

09/24/2010 55

Thermal Sensors

10/29/2010 54

High Side and CPU/AXG Current Sensing

09/24/2010 53

Voltage & Load Side Current Sensing

04/26/2010 52

K92 SMBus Connections

09/23/2010 51

LPC+SPI Debug Connector

07/12/2010 50

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II NOT TO REPRODUCE OR COPY ITIII NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

I TO MAINTAIN THIS DOCUMENT IN CONFIDENCETHE POSESSOR AGREES TO THE FOLLOWING:

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PERN4PERN1

PERN3PERN2

U6610,6620,6630,6640,6650

LINE OUT

LINE IN

PG 73USX2061

USBDN1USBDN2USBDN3USBDN4

EXPRESSCARD

PG 41

USB EXTERNAL J4600,J4610,4720

USBDN1USBDN2USBDN3USBDN4Misc

CONN LVDS

PG 87

J9400

DISPLAY PORT

U9320 CBTL06141EE

CONN

Mini PCI-E AIRPORT

PG 31 J3401

U4100

J4310FW643

FW-800 Conn

PG 36 E-NET GB BCM57765

PG 16 PEG

TMDS OUT

DVI OUTLVDS OUTHDMI OUTRGB OUT

INTEL

U1800 COUGAR POINT

J3500 EXPRESSCARD

PG 32CONN

Amp

Conns Audio

PG 61 J6780,6781,6782,6700,6750

U6100SPI Boot ROM

J3402

PG 31CAMERA IR

PG 44 J4800

PG 47 Port80,serial

PG 19

GPIO FDI

PG 17

PG 9-13SANDYBRIDGE

PG 26,28

PG 23

J2500XDP CONN

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5 6

7 8

DELAYRCDELAYRC

CPUVTTS0_EN

P1V5CPU_EN

P1V8S0_EN

P1V2S0_ENR7978

J6950

EG_RAIL2_ENEG_RAIL1_EN

EG_RAIL3_ENPPVBATT_G3H_CONN

PBUSVSENS_ENP3V3S0_ENP5VS0_EN

(PAGE 71) U7790 VOUT LTC1872

VIN

VOUT

P3V3S5_EN

P3V3GPU_ENGPUVCORE_EN

CHGR_BGATE

Q7055

P1V0GPU_EN

P1V5FB_EN PPVBAT_G3H_CHGR_R

(PAGE 86)

1.103V(L/H)EN1

1.8V(R/H)

ISL6236EN2

P3V3S5_EN

EN2EN1

U7000 ISL6259HRTZ

VOUTR6990

SMC_BATT_ISENSE

PPVBAT_G3H_CHGR_REG

F70418A FUSEF7040

PGOOD1

PP1V5R1V35_GPU_FB_ISNS D6990

TPS51980

P5VS3_PGOODSMC_GPU_1V5_ISENSE

P3V3S5_PGOOD

Q7830Q7810Q7870

PP3V3_FW_FETPGOODVOUT

(R/H)(L/H)

PP3V3_S5

VOUT

S3 S5

PGOODVOUT2

PP5V_S0_FETPPVTT_S0_DDR_LDO

P5VS0_ENDDRREG_PGOOD

VINU5805

VLDOIN

VR_ONVIN

PP3V3_S0_VMON

V2MON V3MON V4MON

VIN

PM_ALL_GPU_PGOOD

U7980PP1V5_S3

V Q5315

GPU VCOREISL6263C

VIN

U8900

PGOODVOUT

PM6640

3.425V G3HOT

(PAGE 63)U6990ENABLE

NCP303LSN SMC PWRGD

SMC_RESET_L

ISL95870

(PAGE 70)U7600

1.05V

VIN

PP3V3_S0_PWRCTL

PM_SLP_S4_LPM_SLP_S5_L

(PAGE 45)U4900H8S2117

PWRGD(P12)

PWR_BUTTON(P90) RSMRST_IN(P13)

PGOODVOUT

SMC AVREF SUPPLY

REF3333 (PAGE 46)

PM_MEM_PWRGDCPU_PWRGDPLT_RERST_L

PPCPUVCCIO_S3

VOUTPP1V0_FW

SYNC_DATE=04/26/2010

Revision HistorySYNC_MASTER=K17_MLB

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PROTO2/EVT 11/15/10 rev3.6 for board 820-2914-06.brd release

EVT 11/22/10 rev3.9 for board 820-2914-07.brd release

SYNC_DATE=04/26/2010

Revision HistorySYNC_MASTER=K17_MLB

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TABLE_ALT_ITEM TABLE_ALT_ITEM

TABLE_ALT_ITEM TABLE_ALT_ITEM TABLE_ALT_ITEM

QTY

BRANCHREVISION

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D

B

BOM OPTIONS BOM NAME

BOM NUMBER

TABLE_BOMGROUP_HEAD TABLE_BOMGROUP_ITEM TABLE_BOMGROUP_ITEM TABLE_BOMGROUP_ITEM

TABLE_BOMGROUP_ITEM TABLE_BOMGROUP_ITEM

TABLE_BOMGROUP_ITEM

TABLE_ALT_ITEM TABLE_ALT_ITEM

TABLE_ALT_ITEM

PART NUMBERALTERNATE FOR

TABLE_ALT_HEAD

TABLE_ALT_ITEM

TABLE_ALT_ITEM TABLE_ALT_ITEM TABLE_ALT_ITEM TABLE_ALT_ITEM

TABLE_ALT_ITEM

QTY

BOM OPTIONS BOM GROUP

TABLE_BOMGROUP_HEAD

TABLE_BOMGROUP_ITEM TABLE_BOMGROUP_ITEM TABLE_BOMGROUP_ITEM

IC,PROGRAMMED MCU,32B,LPC1112A,16KB/2KB,HVQFN25 U9330 CRITICAL1

IC,GPU ROM,K91/F,K92 U8701

4

IC,PCH,COUGARPOINT SLH9D,PRQ,BD82HM63 U1800 CRITICAL1

337S4029

SMC_BLANKU4900 CRITICAL

870-1699870-2015

127S0111

157S0055

353S3055

152S0796

IC,EEPROM,SERIAL,8KB,SOIC CRITICAL1

376S0613 ALL radar8515240 Toshiba FET

376S0855

ST Micro alt to LT

ALL353S1658

BOM Configuration

ENETROM_PROG:B0_NOSD

CRITICAL

U3990IC,ENET ROM, PROTO2, EVT,DVT,PVT,K92

1341S3027

IC,EFI,ROM,PVT, K90/K90I/K91/K91F/K92

341S2896

1

IC,SMC,DEVELOPMENT-PVT,K92 U4900

CRITICAL1

add Murata part as 2nd source

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J5800 (IPD FLEX CONN)

J3500 (EXPRESS CARD CONN)

J5650 (LEFT FAN CONN)

Functional Test Points

I1052 I1053 I1054 I1055 I1056

I1057 I1058 I1059 I1060 I1061

I1062 I1063

I1064

I1065 I1066

I1067 I1068 I1069 I1070 I1071 I1072 I1073 I1074 I1075 I1076 I1077 I1078 I1079

I1080 I1081 I1082 I1083 I1084

I1085 I1086 I1087

I1088 I1089 I1090 I1091

I1092 I1093 I1094

I1095

I1096

I1097 I1098

I1099 I1100 I1101

I1102 I1103 I1104 I1105 I1106 I1107 I1108 I1109 I1110 I1111 I1112 I1113 I1114 I1115 I1116 I1117

I1131

I1132

I1134 I1135 I1136 I1137

I1273

I1436 I1437 I1438 I1439 I1440 I1441 I1442

I1443 I1444 I1445 I1446 I1447 I1448 I1449 I1450

I1484 I1485

I1599 I1600 I1601 I1602

TRUE SMC_MD1 SPIROM_USE_MLB TRUE

SPI_ALT_CS_L TRUE

NC_FW0_TPBPNC_FW2_TPBP

TP_FW643_AVREG

MAKE_BASE=TRUE

NC_FW643_AVREGNC_FW643_TDI

NC_DP_IG_D_MLN<3 0>

MAKE_BASE=TRUE TRUE

NC_DP_IG_D_CTRL_DATANC_DP_IG_D_HPDNC_DP_IG_C_AUXNNC_DP_IG_C_AUXP

NC_DP_IG_C_MLP<3 0>

MAKE_BASE=TRUE TRUE

NC_FW0_TPBN

TP_DC_TEST_A4TRUE

TP_DC_TEST_D1TRUE

NC_SATA_D_D2RNNC_SATA_D_D2RP

SATA_HDD_R2D_RC_UF_PTRUE

SATA_HDD_R2D_UF_NTRUE

SATA_HDD_R2D_UF_PTRUE

SATA_HDD_R2D_RDRVR_OUT_N

TRUE

T29_A_BIAS_R2D_P0TRUE

T29_A_BIAS_R2D_N1TRUE

T29_A_BIAS_R2D_P1TRUE

T29_A_BIAS_R2D_N0TRUE

DP_A_BIAS_N_0TRUE

NC_PCIE_CLK100M_PE4NNC_PCIE_CLK100M_PE4PTP_NV_WE_CK_L<1 0>

T29_D2R1_BIASTRUE

NC_DP_IG_C_CTRL_DATANC_DP_IG_C_CTRL_CLK

NC_DP_IG_C_HPD

NC_CRT_IG_GREEN

TRUE MAKE_BASE=TRUE

NC_SMC_FAN_3_CTLTRUE

NC_SMC_FAN_3_TACHTRUE

NC_PCH_TP4

TRUE MAKE_BASE=TRUE

NC_PCH_TP9NC_PCH_TP12

MAKE_BASE=TRUE

NC_SATA_D_D2RN

MAKE_BASE=TRUE TRUE

NC_SATA_D_D2RP

MAKE_BASE=TRUE TRUE MAKE_BASE=TRUE

MAKE_BASE=TRUE

TRUE MAKE_BASE=TRUE

NC_SATA_SSD2_D2RN

NC_BCM57765_TRAFFICLED_L

TRUE MAKE_BASE=TRUE

PCH_VSS_NCTF<2>

TRUE

NC_SATA_C_R2D_CP

MAKE_BASE=TRUE TRUE

NC_SATA_C_D2RN

TRUE MAKE_BASE=TRUE

MAKE_BASE=TRUE TRUE MAKE_BASE=TRUENC_SATA_SSD2_R2D_CP

TRUE MAKE_BASE=TRUE

NC_SATA_SSD2_D2RPNC_SATA_D_R2D_CP

NC_SATA_C_D2RP

TRUE MAKE_BASE=TRUE MAKE_BASE=TRUE

NC_PCIE_CLK100M_PE6P

MAKE_BASE=TRUE TRUE TRUE MAKE_BASE=TRUE

TP_NV_WR_RE_L<1 0>

NC_NV_CLE

NC_NV_DQS<1 0>

TRUE MAKE_BASE=TRUE

NC_PCI_CLK33M_OUT3

TRUE MAKE_BASE=TRUE

MAKE_BASE=TRUE

NC_PCI_PME_L

TRUE MAKE_BASE=TRUE

NC_PCI_PAR

MAKE_BASE=TRUE TRUE

NC_CRT_IG_DDC_CLKNC_CRT_IG_GREENNC_CRT_IG_BLUE

TRUE MAKE_BASE=TRUE

NC_LVDS_IG_B_CLKN

TRUE MAKE_BASE=TRUE MAKE_BASE=TRUE

NC_LVDS_IG_BKL_PWM

MAKE_BASE=TRUE TRUE

TRUE MAKE_BASE=TRUE

NC_PCH_TP7

TRUE MAKE_BASE=TRUE

NC_PCH_TP6

TRUE MAKE_BASE=TRUE

NC_PCH_TP2

MAKE_BASE=TRUE TRUE

TRUE MAKE_BASE=TRUE NC_PCH_NC2

MAKE_BASE=TRUE

TRUE MAKE_BASE=TRUE NC_PCH_SST

MAKE_BASE=TRUE

NC_DP_IG_D_AUXP

MAKE_BASE=TRUE TRUE

NC_DP_IG_D_CTRL_CLK

TRUE MAKE_BASE=TRUE

NC_DP_IG_D_HPD

TRUE MAKE_BASE=TRUE

NC_DP_IG_C_AUXN

TRUE MAKE_BASE=TRUE

NC_DP_IG_C_AUXP

TRUE MAKE_BASE=TRUE

TP_LVDS_IG_B_CLKN

NC_PCH_NC2NC_PCH_NC1

NC_DP_IG_D_AUXP

NC_SDVO_TVCLKINP

NC_SDVO_INTNNC_SDVO_STALLP

NC_PCH_SSTNC_SDVO_STALLN

NC_PCH_TP17

NC_PCH_NC3NC_PCH_NC4NC_PCH_NC5NC_PCH_TP19NC_PCH_TP18

TP_GPU_MIOA_D<9 0>

NC_SDVO_INTP

NC_GPU_BUFRST_LNC_GPU_GSTATE<0>

TRUE MAKE_BASE=TRUE

NC_PCH_LVDS_VBG

NC_CRT_IG_DDC_DATA

TRUE MAKE_BASE=TRUE

NC_CRT_IG_DDC_CLK

TRUE MAKE_BASE=TRUE

NC_CRT_IG_BLUE

TRUE MAKE_BASE=TRUE

NC_CRT_IG_HSYNC

TRUE MAKE_BASE=TRUE

NC_HDA_SDIN1

MAKE_BASE=TRUE TRUE

NC_PCH_LVDS_VBG

NC_CRT_IG_VSYNCNC_CRT_IG_HSYNCNC_CRT_IG_RED

TRUE

DP_T29SNK1_ML_C_P<3 0>

TRUE

DP_T29SNK1_AUXCH_PTRUE

DP_T29SNK1_AUXCH_C_NTRUE

DP_T29SNK1_AUXCH_C_PTRUE

DP_T29SNK1_AUXCH_NTRUE

DP_T29SNK1_ML_C_N<3 0>

TRUE

TP_DP_T29SRC_AUXCH_CNTRUE

NC_SMC_FAN_2_CTLTRUE

NC_SMC_FAN_2_TACHTRUE

TRUEDP_SDRVA_ML_R_P<2>

DP_T29SNK0_AUXCH_C_NTRUE

NC_NV_ALE

NC_NV_RB_L

MAKE_BASE=TRUE TRUE MAKE_BASE=TRUE

NC_NV_WR_RE_L<1 0>

TRUE MAKE_BASE=TRUE

NC_NV_WE_CK_L<1 0>

TRUE

NC_SATA_C_D2RPNC_PSOC_P1_3NC_PCIE_CLK100M_PE7PNC_PCIE_CLK100M_PE7NNC_PCIE_CLK100M_PE6PNC_PCIE_CLK100M_PE6NNC_PCIE_CLK100M_PE5PNC_PCIE_CLK100M_PE5N

TP_T29_PCIE_RESET1_LTRUE

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T29 Rails

"FW" (FireWire) Rails 3.3V/1.8V Rails

1.5V/1.05V Rails

? mA

Chipset Rails 5V Rails

PP15V_T29

MAKE_BASE=TRUE VOLTAGE=15V MIN_NECK_WIDTH=0.2 MM

PP15V_T29

PPVIN_S5_HS_COMPUTING_ISNS

PP5V_S5PP5V_S5

PP3V3_S0

PPVCCSA_S0_CPUPP3V3_S0

PP3V3_S0

MAKE_BASE=TRUE VOLTAGE=5V

PP5V_S0

MIN_NECK_WIDTH=0.2 MM

PP5V_S0PP5V_S0

PP5V_S0PP5V_S0PP5V_S0PP5V_S0PP5V_S0PP5V_S0

PP3V3_S4PP3V3_S4

PP3V3_S4

PP3V3_S5_ISNS_R

PP3V3_SUSPP3V3_SUS

PPBUS_G3H

PPVIN_S5_HS_COMPUTING_ISNSPPVIN_S5_HS_COMPUTING_ISNSPPVIN_S5_HS_COMPUTING_ISNS

PP3V3_S5PP3V3_S5PP3V3_S5

VOLTAGE=12.8V MAKE_BASE=TRUE MIN_LINE_WIDTH=0.4 MM

MAKE_BASE=TRUE VOLTAGE=5V

PP1V8_S0GPU

MIN_LINE_WIDTH=0.6 MM VOLTAGE=1.8V

PP1V8_S0GPU_ISNS_R

MIN_NECK_WIDTH=0.2 MM MAKE_BASE=TRUE

PP1V0_S0GPU

MAKE_BASE=TRUE VOLTAGE=1.0V MIN_LINE_WIDTH=0.6 MM

PP1V5_S3RS0

PP3V3_S0GPUPP3V3_S0GPUPPVCORE_GPU

PP1V8_S0GPU

PP0V75_S0_DDRVTTPP0V75_S0_DDRVTT

PP1V5R1V35_GPU_FB_ISNSPP1V5R1V35_GPU_FB_ISNSPP1V5R1V35_GPU_FB_ISNSPP1V5_S0GPU_ISNS_R

PP3V3_S0GPUPP3V3_S0GPU

PP1V0_S0GPUPP1V0_S0GPUPP1V0_S0GPUPP1V0_S0GPU

PP1V8_S0GPU

PP1V5_S3

PP1V5_S3RS0_CPUDDR

PPVTTDDR_S3

MIN_LINE_WIDTH=0.6 MM VOLTAGE=1.5V MAKE_BASE=TRUE

PP1V5_S3RS0_CPUDDR

VOLTAGE=0.75V MAKE_BASE=TRUE

PP1V8_S0GPUPP1V8_S0GPU_ISNS_R

PP1V0_S0GPUPP1V0_S0GPU_ISNS_R

PP1V5_S3RS0_CPUDDR

PP3V3_S0GPU

PP0V75_S0_DDRVTT

MIN_LINE_WIDTH=2 mm MIN_NECK_WIDTH=0.2 mm

PP1V5_S0GPU_ISNS_R

MIN_LINE_WIDTH=0.6 MM MAKE_BASE=TRUE VOLTAGE=1.5V

MAKE_BASE=TRUE VOLTAGE=1.5V

PP1V0_S0GPU_ISNS_R

MIN_LINE_WIDTH=0.6 MM

PP1V5R1V35_GPU_FB_ISNS

PP3V3_S0GPU

MAKE_BASE=TRUE MIN_NECK_WIDTH=0.2 MM

MIN_LINE_WIDTH=0.6 MM MAKE_BASE=TRUE

PP1V5_S3

VOLTAGE=1.5V

PPVRTC_G3H

MAKE_BASE=TRUE VOLTAGE=3.42V MIN_NECK_WIDTH=0.2 MM

PPVRTC_G3H

PPDCIN_G3H

PP3V42_G3H

PP5V_S5PP5V_S5

PP5V_S5

MAKE_BASE=TRUE VOLTAGE=5V MIN_LINE_WIDTH=0.3 MM

PP5V_S5

PP5V_S3PP5V_S3

PP5V_S3PP5V_S3PP5V_S3

PP5V_S3_ISNS_R

PP5V_S0PP5V_S0PP5V_S0

PP5V_S0

PP5V_S0PP5V_S0

PP5V_S0_ISNS_RPP5V_S0_ISNS_R

PP5V_SUS

PP3V3_S0PP3V3_S0

PP3V3_S0PP3V3_S0PP3V3_S0PP3V3_S0PP3V3_S0PP3V3_S0PP3V3_S0

PP3V3_S0PP3V3_S0

PP3V3_S0PP3V3_S0PP3V3_S0PP3V3_S0

PP3V3_S0

PP5V_S3

PP3V42_G3H

PPDCIN_G3H

PPVIN_S5_HS_GPU_ISNS

PP5V_S5

PP1V05_SUSPPVIN_S5_HS_COMPUTING_ISNS

PP1V2_ENET

PP1V5_S3_CPU_VCCDQ

PP1V05_SUS

PP1V05_S0

PP1V05_S0PP1V05_S0PP1V05_S0PP1V05_S0PP1V05_S0PP1V05_S0PP1V05_S0

PP1V05_S0PP1V05_S0

PP1V05_S0

PP1V2_S0

PP1V0_FW_FWPHYPP1V0_FW_FWPHY

PP3V3_FW_FWPHYPPVP_FW

PP1V8_S0

PPVCORE_S0_CPUPP3V3_S3

PPVCORE_S0_CPU

PPVCORE_S0_AXG

PPVCCSA_S0_CPU

PP3V3_ENET

PP3V3_ENETPP3V3_ENETPP3V3_ENET

PP1V2_ENET

PP3V3_S3

PP3V3_S3PP3V3_S3

PPBUS_G3HPPBUS_G3HPPBUS_G3H

PP3V3_S5

VOLTAGE=5V MAKE_BASE=TRUE MIN_NECK_WIDTH=0.2 MM

PP3V3_S5PP3V3_S5

PP3V3_S5PP3V3_S5PP3V3_S5PP3V3_S5PP3V3_S5PP3V3_S5PP3V3_S5PP3V3_S5

PP3V3_S5

PP1V8_S0

PP3V3_S3

VOLTAGE=3.3V MAKE_BASE=TRUE MIN_NECK_WIDTH=0.2 MM

PP3V3_S3_ISNS_R

PP3V3_S0PP3V3_S3_ISNS_R

PP3V3_S3

PP3V3_S0

PP3V3_S3_ISNS_R

VOLTAGE=12.8V MIN_LINE_WIDTH=0.4 MM

PPVP_FW

PP3V3_S5

VOLTAGE=1.8V MAKE_BASE=TRUE MIN_NECK_WIDTH=0.2 MM

PP1V8_S0_CPU_VCCPLL_R

PP0V75_S0_DDRVTT

PP3V3_S5_ISNS_R

PP3V3_SUSPP3V3_SUSPP3V3_SUSPP3V3_SUSPP3V3_SUS

PP3V3_S3PP3V3_S3

PP3V3_SUS

PP3V3_SUSPP3V3_S5_ISNS_R

PP3V3_FW_FWPHY

PP3V3_S5PP3V3_S5PP3V3_S5PPBUS_G3H

PP3V3_T29PP3V3_T29PP3V3_T29PP3V3_T29

PP1V05_T29PP1V05_T29

PP3V3_T29

PP3V3_S0PP3V3_S0

PP3V3_S0

PP3V3_S0PP3V3_S0

PP5V_S5PP5V_S5

Trang 8

3 6

BRANCHREVISION

D

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SHEETPAGE TITLE

B

Digital Ground

Unused USB ports

T29 / GMUX JTAG Signals

T29_A_BIAS caps

T29 Signals Unused SD card signals

Bottom GPU Right

GMUX ALIASES CPU signals

Thermal Module Holes

Bosses for Flex Protector Bracket

TM Hole

Frame Holes

Rev A NCs USB Hub Aliases

Unused T29 PortsTop GPU Center

DP_A_BIAS caps

DP_A_BIAS capsRight CPU

Heat spreader mounting boss for PCH

Left CPU

TM Hole

Bottom CPU Left

Bottom GPU Left

2 1XW0901SM

1

ZT0983STDOFF-4.5OD.98H-1.1-3.48-TH

1

ZT0984STDOFF-4.5OD.98H-1.1-3.48-TH

1

ZT0987STDOFF-4.5OD.98H-1.1-3.48-TH

1

ZT0988STDOFF-4.5OD.98H-1.1-3.48-TH

1

ZT0991STDOFF-4.5OD.98H-1.1-3.48-TH

1

ZT0930STDOFF-4.5OD.98H-1.1-3.48-TH

1.4DIA-SHORT-EMI-MLB-M97-M98

1

SH0910SM

1

SH0914SM

1

SMSH0911

1

SH09002.0DIA-TALL-EMI-MLB-M97-M98

2.0DIA-TALL-EMI-MLB-M97-M98

1

SH0919SM

1 SMSH09172.0DIA-TALL-EMI-MLB-M97-M98

1

SH0916SM

1

SH0918SM

1 SMSH09201.4DIA-SHORT-EMI-MLB-M97-M98

1

SH0921SM

1

SH0922SM

1

SH0923SM

1

ZT0915

3R2P5

SH0924SM

1

SM

1

SH0931SM

1

SM

1

SH0933SM

1 SM

2.0DIA-TALL-EMI-MLB-M97-M98SH09351

SH0934SM

1

SH0912SM

21

402

100K

5%

MF-LFR0902

10K

4025%

MF-LF

2

1R0916

10K

5%

4021/16W

R0950

8055%

1/8WMF-LF

21R0926SIGNAL_MODEL=EMPTY

201

51

5%

1/20W MF

51

1/20W 5%

MF 201

MF

51

1/20W2015%

51

5%

1/20W201MF

X5R

1/20W5%

51

201MF2

SIGNAL_MODEL=EMPTY10V

20110%

X5R

5%

1/20WMF

201

0.01UF

10V2

SIGNAL_MODEL=EMPTY

0.01UF

X5R10%

201

SM

1

SH09361.4DIA-SHORT-EMI-MLB-M97-M98

DP_A_BIAS_N_0

LCD_BKLT_ENLVDS_IG_PANEL_PWREG_RESET_L

T29_LSEO_LSOE3

NO_TEST=TRUE MAKE_BASE=TRUE

FW_PLUG_DET_L

MAKE_BASE=TRUE MAKE_BASE=TRUE

GND

MAKE_BASE=TRUE

TP_LVDS_MUX_SEL_EGEG_RESET_L

T29_LSEO_LSOE3T29_R2D_C_N<2 3>

T29_D2R_N<2 3>

DP_A_BIAS_P_2 DP_A_BIAS_P_0

T29_D2R_P<2 3>

MAKE_BASE=TRUEJTAG_ISP_TDIT29_R2D_C_P<2 3>

MAKE_BASE=TRUE

PEX_CLKREQ_L

USB_T29A_N PP3V3_S3

PP5V_S0

GND

VOLTAGE=0V MIN_LINE_WIDTH=0.6MM MIN_NECK_WIDTH=0.11MM

Trang 9

INININ

IN

ININININ

ININININININ

INININININOUT

OUTOUTOUTOUT

OUTOUTOUTOUTOUTOUT

OUTOUTOUTOUT

OUTOUTOUTOUTOUT

OUTOUTOUTOUTOUTOUT

OUT

EDP_HPDEDP_COMPIOEDP_ICOMPOEDP_AUX*

EDP_AUXEDP_TX_3EDP_TX_2EDP_TX_1EDP_TX_0EDP_TX_3*

FDI_TX_3

FDI0_FSYNCFDI1_FSYNCFDI_INT

FDI_TX_1FDI_TX_0

DMI_TX_3

FDI_TX_0*

DMI_RX_2*

DMI_RX_0DMI_RX_1DMI_RX_2DMI_RX_3DMI_TX_0*

DMI_RX_3*

DMI_RX_1*

PEG_ICOMPOPEG_RCOMPO

PEG_RX_3PEG_RX_2

PEG_RX_4

PEG_RX_6PEG_RX_5

PEG_RX_7PEG_RX_8

PEG_RX_10PEG_RX_9

PEG_RX_11PEG_RX_12PEG_RX_13PEG_RX_14PEG_RX_15

PEG_TX_2PEG_TX_3PEG_TX_4

PEG_TX_6PEG_TX_5

PEG_TX_7PEG_TX_8PEG_TX_9PEG_TX_10PEG_TX_11PEG_TX_12

PEG_TX_14PEG_TX_13

(SYM 1 OF 11)

RSVD_96RSVD_95RSVD_94RSVD_93RSVD_92RSVD_91RSVD_90

RSVD_97

RSVD_38RSVD_39RSVD_40RSVD_36

RSVD_41RSVD_42RSVD_43

RSVD_45RSVD_44

RSVD_48RSVD_49RSVD_50RSVD_47RSVD_46

RSVD_53

RSVD_52RSVD_51

RSVD_55RSVD_54

RSVD_57

RSVD_61

RSVD_63RSVD_62

RSVD_65RSVD_64

RSVD_66RSVD_67

RSVD_71RSVD_72

RSVD_86RSVD_85

CFG_4CFG_3CFG_2CFG_1CFG_0

CFG_15CFG_16CFG_17

RSVD_1

RSVD_22RSVD_23

(5 OF 11)RESERVED

OUTOUTOUTOUTOUT

OUTOUT

OUT

OUTOUTOUTOUTOUT

OUTOUT

OUT

INININININ

BIBI

NCNCNCNCNC

NC

NCNC

NC

NCNC

NC

NCNC

NCNCNCNCNC

NCNCNCNCNCNCNCNCNCNCNCNCNCNCNC

NCNCNCNCNC

NCNCNCNC

NC

NCNCNCNC

NC

NCNCNCNC

NC

NCNCNCNC

NC

NCNCNCNC

NCNC

D

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SHEETPAGE TITLE

3 4

5 6

7 8

(IPU)(IPU)

Intel is investigating processor driven VREF_DQ generation

(IPU)

(IPU)(IPU)

(IPU)(IPU)(IPU)(IPU)

(DDR_VREF0)(DDR_VREF1)

(THERMDA)(THERMDC)

CPU_CFG<4> should be pulled down to enable EDP

These can be Placed close to J2500 and Only for debug access

24.9

R10101

2

BGA

SANDY-BRIDGE MOBILE-REV1

OMIT

U1000

N8N10

T9R10

R6R8

U8U10

N2N4

R2R4

P3P1

T5U6

AE4AE2

AC2AE8AB1

AG4AG2

AF3AF1

AF7AE6

AG8AG6

AC8

AB7AA2

AB3AD9

W6V7

W10W8

Y9AA8

AA10AC10

U2U4

W4W2

V3V1

AA6Y5

G2H1F3

G22F23

K23H23

F11H11

K11J12

F9E8

H9G10

H7J8

G6

F7

K21H21

F19H19

K19J20

H17G18

K15K17

G14F15

J16H15

K13H13

C22A22

D23B23

B13D13

C10A10

D11B11

B9D9

D7B7

F13

E12

A18C18

B21D21

D19B19

F21E20

C14A14

B17D17

D15B15

F17E16

SANDY-BRIDGEBGAMOBILE-REV1

OMIT

U1000

B57D57

F55K55F57E58H57H55D53K57

B55A54A58D55C56E54J54G56

BB17

AW46BG26BB25BG34BH35BJ34BF35BF41BH43BJ42AY17

BF43

AW50BB57BF63AD5AH5AJ6BF3BG4BD29

BD19AY45AY41BG62BB43D49B53G52G64BD33

AJ10BE6AA4AC4AC6C52D3C4C24D25BC30

B25K47H47

F5K9H5L10G4K7K5

BE32

M9L6J2L2P7M5J4L4N6G48

AW42

K49H49J50AY13BB13

BA48

BB15AY15AW14BD13BA16BE16BD15BC14BF19BH19BC42

BF21BH21BF23BH23BF25BH25BJ22BG22

1K

1/16W 402 MF-LF 1%

R1022

1

2

402 1/16W

MF-LF

2 MF-LF 402 5%

Trang 10

IN

OUT

ININOUT

OUTBI

SM_DRAMPWROKPM_SYNC

PREQ*

TMSTRST*

TDITDO

BCLK_ITPBCLK_ITP*

UNCOREPWRGOODRESET*

DPLL_REF_CLKDPLL_REF_CLK*

NC

OUTBI

INOUT

ININ

INOUTIN

ININ

OUT

BIBIBI

3 6

BRANCHREVISION

D

R

SHEETPAGE TITLE

(IPU)

(IPU)(IPU)

(IPU)(IPU)(IPU)(IPD)

(IPU)(IPU)(IPU)(IPU)(IPU)

D5C6

K63K65

C62D61E62F63D59F61F59G60

H53

H61

AJ4AJ2

F53

K53

J62H65

B59AH9

H51

K51

AY25BE24

BJ46BG46BF45BJ44

J58

K61K59

F51

H59H63

MF-LF

68

R11011

MF-LF 402 1/16W

0.1UF

16VC1130

1

2

MF-LF402

1K

5%

1/16WR11411

2

1K

5%

1/16W402

R11401

2

4025%

56

1/16W

R110312

46

68

NOSTUFF

201 1/20W MF

MF-LFPLACE_NEAR=U1000.AY25:51.562mm

130

R112112

23

25

201 1/20W MF

NOSTUFF

1K

5%

R11021

XDP_CPU_TMSXDP_CPU_TCK

PP1V05_S0_CPU_VCCPQE

ITPCPU_CLK100M_PDPLL_REF_CLK_L

DPLL_REF_CLK

PM_SYNCCPU_PWRGD

Trang 11

BIBI

BIBIBIBIBIBI

BIBI

BIBIBIBIBIBI

BIBI

BIBIBIBIBIBI

BIBI

BIBIBIBIBIBI

BIBI

BIBIBIBIBIBI

BIBI

BIBIBIBIBIBI

BIBI

OUT

OUTOUT

OUT

BIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIOUTOUTOUTOUT

OUTOUT

SA_CAS*

SA_RAS*

SA_WE*

SA_DQ_63SA_DQ_62SA_DQ_61SA_DQ_60SA_DQ_59SA_DQ_58SA_DQ_57

SA_BS_2SA_BS_1SA_BS_0

SA_DQ_47SA_DQ_48SA_DQ_49

SA_DQ_56SA_DQ_55SA_DQ_54SA_DQ_53SA_DQ_52SA_DQ_51SA_DQ_50

SA_DQ_37SA_DQ_38SA_DQ_39SA_DQ_40SA_DQ_41SA_DQ_42SA_DQ_43SA_DQ_44SA_DQ_45SA_DQ_46

SA_DQ_36

SA_DQ_32SA_DQ_33

SA_DQ_27SA_DQ_28SA_DQ_29SA_DQ_30SA_DQ_31

SA_DQ_34SA_DQ_35SA_DQ_26

SA_DQ_16SA_DQ_17SA_DQ_18SA_DQ_19SA_DQ_20SA_DQ_21SA_DQ_22SA_DQ_23SA_DQ_24SA_DQ_25

SA_DQ_10SA_DQ_11SA_DQ_12SA_DQ_13SA_DQ_14SA_DQ_15

SA_DQ_9SA_DQ_8SA_DQ_7SA_DQ_6

SA_DQ_1SA_DQ_2SA_DQ_3SA_DQ_4SA_DQ_5

SA_DQ_0

SA_CK_1SA_CK_0

SA_DQS_3SA_DQS_2

SA_DQS_5SA_DQS_4

SA_DQS_6SA_DQS_7SA_MA_0SA_MA_1

SA_MA_3SA_MA_2

SA_MA_5SA_MA_4

SA_MA_6SA_MA_7SA_MA_8SA_MA_9

SA_MA_11SA_MA_10

SA_MA_12

SA_MA_14SA_MA_13

SB_CK_0SB_CK_0*

SB_CK_1SB_CKE_0

SB_CKE_1

SB_DQ_0SB_DQ_1

SB_DQ_10SB_DQ_11SB_DQ_12SB_DQ_13SB_DQ_14SB_DQ_15SB_DQ_16SB_DQ_17SB_DQ_18SB_DQ_19SB_DQ_2

SB_DQ_30SB_DQ_31SB_DQ_32

SB_DQ_34SB_DQ_35SB_DQ_36SB_DQ_37SB_DQ_38SB_DQ_39SB_DQ_4

SB_DQ_60SB_DQ_61SB_DQ_62SB_DQ_63

SB_DQ_7SB_DQ_8SB_DQ_9

SB_CS_0*

SB_CS_1*

SB_ODT_1SB_ODT_0

SB_DQS_3SB_DQS_4SB_DQS_5

SB_DQS_7SB_DQS_6

SB_MA_1SB_MA_0

SB_MA_2SB_MA_3SB_MA_4SB_MA_5SB_MA_6

SB_MA_8SB_MA_7

SB_MA_10SB_MA_11SB_MA_9

SB_MA_13SB_MA_12

SB_MA_15SB_MA_14

(SYM 4 OF 11)

OUTOUTOUTOUTOUTOUTOUTOUTOUTOUTBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIOUTOUTOUTOUTOUTOUTOUTOUTOUTOUTOUTOUTOUTOUTOUTOUT

BRANCHREVISION

D

R

SHEETPAGE TITLE

3 4

5 6

7 8

OMIT

U1000

BA36BC38BB19BE44

BB31BA32

AW34AY33BC18

BD17BD41BD45

AL6AL8

AV7AY5AT5AR6AW6AT9BA6BA8BG6AY9AP7

AW8BB7BC8BE4AW12AV11BB11BA12BE8BA10AM5

BD11BE12BB49AY49BE52BD51BD49BE48BA52AY51AK7

BC54AY53AW54AY55BD53BB53BE56BA56BD57BF61AL10

BA60BB61BE60BD63BB59BC58AW58AY59AL60AP61AN10

AW60AY57AN60AR60

AM9AR10AR8

AN6AN8

AU8AU6

BD5BC6

BC10BD9

BB51BC50

BD55BB55

BD61BD59

AV61AU60

BD27BA28

AW38AW22BA20BB45BE20AW18

BB27AW26BB23BA24AY21BD21BC22BB21

BB41BC46

BE36BA44

BGAMOBILE-REV1 SANDY-BRIDGE

OMIT

U1000

BJ38BD37AY29BH39

BF33BH33

BF37BH37BD25

BJ26BE40BH41

AL4AK3

BA4BB1AV1AU2BA2BB3BC2BF7BF11BJ10AP3

BC4BH7BH11BG10BJ14BG14BF17BJ18BF13BH13AR2

BH17BG18BH49BF47BH53BG50BF49BH47BF53BJ50AL2

BF55BH55BJ58BH59BJ54BG54BG58BF59BA64BC62AK1

AU62AW64BA62BC64AU64AW62AR64AT65AL64AM65AP1

AR62AT63AL62AM63

AR4AV3AU4

AN2AN4

AW4AW2

BF9BH9

BH15BF15

BH51BF51

BF57BH57

AY65AY63

AN64AN62

BF31BH31

AY37BJ30AW30BA40BB29BE28

BB37BC34BF27BB33BH27BG30BH29BF29

BG42BH45

BG38BF39

12 OF 132

11 OF 105

Trang 12

(9 OF 11)

VIDALERT*

VCCSA_14VCCSA_15VCCSA_16VCCSA_8

VCCIO_SEL

VCCPQE_3VCCPQE_2VCCPQE_1VCCPQE_0VCCPLL_2VCCPLL_1VCCPLL_0VCCDQ_3VCCDQ_2VCCDQ_1VCCDQ_0VCCSA_1

VCCSA_0

VCCSA_3VCCSA_4VCCSA_2

VCCSA_5VCCSA_6VCCSA_7

VCCSA_9VCCSA_10VCCSA_11VCCSA_12VCCSA_13

VCCSA_17VIDSOUTVIDSCLK

VCCSA_VID_0

VCC_SENSEVCCSA_VID_1

VAXG_SENSEVSS_SENSE

VSSAXG_SENSEVCCIO_SENSE

VDDQ_SENSEVSS_SENSE_VCCIO

VCCSA_SENSEVSS_SENSE_VDDQ

VCC_VAL_SENSEVCC_DIE_SENSE

VAXG_VAL_SENSEVSS_VAL_SENSE

VSSAXG_VAL_SENSE

VSS_NCTF_0VSS_NCTF_1VSS_NCTF_2

VSS_NCTF_4VSS_NCTF_3

VSS_NCTF_7

VSS_NCTF_12VSS_NCTF_13VSS_NCTF_14VSS_NCTF_15

DC_TEST_D65DC_TEST_D1DC_TEST_C64DC_TEST_C2DC_TEST_BJ64DC_TEST_BJ62DC_TEST_BJ4DC_TEST_BJ2DC_TEST_BH65DC_TEST_BH63DC_TEST_BH3DC_TEST_BH1DC_TEST_BG64DC_TEST_BG2DC_TEST_BF65DC_TEST_BF1DC_TEST_B65DC_TEST_B63DC_TEST_B3DC_TEST_A64DC_TEST_A62DC_TEST_A4

CORE POWER

(6 OF 11)

VCC_54VCC_55VCC_56VCC_57VCC_58

VCC_63VCC_62VCC_61

VCC_59VCC_60

VCC_73VCC_72VCC_71

VCC_69VCC_70

VCC_74VCC_75VCC_76VCC_77VCC_78VCC_79

VCC_83VCC_82VCC_81VCC_80

VCC_93VCC_92

VCC_90VCC_91

VCC_105VCC_106VCC_107

VCC_16VCC_15

VCC_17VCC_18VCC_19VCC_20VCC_21VCC_22VCC_23VCC_24VCC_25VCC_26VCC_27VCC_28VCC_29VCC_30VCC_31VCC_32VCC_33VCC_34VCC_35VCC_36VCC_37VCC_38VCC_39VCC_40VCC_41VCC_42VCC_43VCC_44VCC_45VCC_46VCC_47VCC_48VCC_49VCC_50VCC_51VCC_52VCC_53

OUTOUTOUTOUTOUTOUT

BRANCHREVISION

D

R

SHEETPAGE TITLE

B

HR_PPDG sections 6.2.1 and 6.3.1

(IPU)

For Future Compatibility

PLACEMENT NOTE: Please place all sense line resistors on BOTTOM side

NOTE: Intel validation sense lines per doc 439028 rev1.0

BGA

OMIT

MOBILE-REV1 SANDY-BRIDGE U1000

A4A62A64B3B63B65BF1BF65BG2BG64BH1BH3BH63BH65BJ2BJ4BJ62BJ64C2C64D1D65

F49

B49F47B47

D47

AV23AT23AP23AL23AJ8

AW10

AK65AK63AK61AV21AT21AP21AL21

W17W15

N16N14M17M15M12M11L18L14

W12U17U15U12T16T14T11N18

K3

AE10AG10

AY19

B51D51A50

BJ60BJ6

E64E2B61B5A60A6

BH61BH5BE64BE2BD65BD1F65F1

A46

AU10

AW20

C48E50

A48

OMIT

SANDY-BRIDGEMOBILE-REV1

BGA

U1000

R46R42

N43

B29A44A40A38A34A32A28A26

N39N37N33N30N26N24N20M46M42R40

M40M36M34M29M27M23M21L44L40L38R36

L34L32L28L26L22K45K43K41K37K35R34

K31K29K25J44J40J38J34J32J28J26R29

H45H43H41H37

H35H31H29H25G44G40

G34G32G28G26F45F43F41F37F35R23

F31F29F25E44E40E38E34E32E28E26R21

D45D43D41D37D35D31D29C44C40C38N45

C34C32C28C26B45B43B41B37B35B31

10K

1/16W 5%

R1320 1

2

MF-LF 5%

0

1/16W 402

402 1/16W

MF 1/20W 1%

R13651

2

PLACE_SIDE=BOTTOM

MF-LF 402

NOSTUFF

100

1/16W 1%

MF-LF 1%

100

402 1/16W

R1314 1

2

PLACE_NEAR=U1000.F49:50.8mm

402 1/16W

MF-LF 402

CPU_VIDSCLK_RCPU_VIDSOUT_R

PP3V3_S0

DC_TEST_BH3_BJ2DC_TEST_B65_C64

PPVCCSA_S0_CPU

TP_DC_TEST_A4TP_DC_TEST_A62

TP_DC_TEST_BF1

TP_DC_TEST_BJ62

TP_DC_TEST_D1TP_DC_TEST_D65

DC_TEST_BJ64_BH63DC_TEST_BG64_BH65DC_TEST_B63_A64

TP_DC_TEST_BJ4DC_TEST_B3_C2

PP1V5_S3_CPU_VCCDQPP1V05_S0

PP1V05_S0_CPU_VCCPQEPP1V8_S0_CPU_VCCPLL_RPPVCCSA_S0_CPU

CPU_VIDALERT_LCPU_VIDSCLKCPU_VIDSOUT

PPVCORE_S0_CPUPPVCORE_S0_AXG

Trang 13

VDDQ_9VDDQ_8VDDQ_7

VDDQ_5VDDQ_6

VDDQ_10VDDQ_11VDDQ_12VDDQ_13VDDQ_14

VDDQ_19VDDQ_18VDDQ_17

VDDQ_15VDDQ_16

VDDQ_20VDDQ_21VDDQ_22VDDQ_23VDDQ_24VDDQ_25

VDDQ_29VDDQ_28VDDQ_27VDDQ_26

VDDQ_39VDDQ_38

VDDQ_36VDDQ_37

VDDQ_60VDDQ_59VDDQ_58

VDDQ_56VDDQ_57

VDDQ_61VDDQ_62VDDQ_63VDDQ_64VDDQ_65VDDQ_66VDDQ_67VDDQ_68

VAXG_4VAXG_3VAXG_2VAXG_1VAXG_0

VAXG_16VAXG_15

VAXG_17VAXG_18VAXG_19VAXG_20VAXG_21VAXG_22VAXG_23VAXG_24VAXG_25VAXG_26VAXG_27VAXG_28VAXG_29VAXG_30VAXG_31VAXG_32VAXG_33VAXG_34VAXG_35VAXG_36VAXG_37VAXG_38VAXG_39VAXG_40VAXG_41VAXG_42VAXG_43VAXG_44VAXG_45VAXG_46VAXG_47VAXG_48VAXG_49VAXG_50VAXG_51VAXG_52VAXG_53VAXG_54VAXG_55VAXG_56VAXG_57VAXG_58VAXG_59VAXG_60VAXG_61VAXG_62VAXG_63

(8 OF 11)(10 OF 11)

VSS_85VSS_84VSS_83VSS_82VSS_81VSS_80VSS_79VSS_78VSS_77VSS_76VSS_75VSS_74VSS_73VSS_72VSS_71VSS_70VSS_69VSS_68VSS_67VSS_66VSS_65VSS_64VSS_63VSS_62VSS_61VSS_60VSS_59VSS_58VSS_57VSS_56VSS_55VSS_54VSS_53VSS_52VSS_51VSS_50VSS_49VSS_48VSS_47VSS_46VSS_45VSS_44VSS_43VSS_42VSS_41VSS_40VSS_39VSS_38VSS_37VSS_36VSS_35VSS_34VSS_33VSS_32VSS_31VSS_30VSS_29VSS_28VSS_27VSS_26VSS_25VSS_24VSS_23VSS_22VSS_21VSS_20VSS_19VSS_18VSS_17

VSS_15VSS_16

VSS_10VSS_11VSS_12VSS_13VSS_14

VSS_171VSS_170VSS_169VSS_168VSS_167VSS_164VSS_163

VSS_165VSS_166

VSS_162VSS_161VSS_160VSS_159VSS_158VSS_157

VSS_153VSS_152

VSS_154VSS_155VSS_156

VSS_143VSS_142

VSS_131VSS_130VSS_129VSS_128VSS_127VSS_126VSS_123VSS_122

VSS_124VSS_125

VSS_112VSS_113VSS_114VSS_115

VSS_102VSS_101

VSS_92VSS_91

VSS_93VSS_94VSS_95

(11 Of 11)

VSS_257VSS_256VSS_255VSS_254VSS_253VSS_252VSS_251VSS_250VSS_249VSS_248VSS_247VSS_246VSS_245VSS_244VSS_243VSS_242VSS_241VSS_240VSS_239VSS_238VSS_237VSS_236VSS_235VSS_234VSS_233VSS_232VSS_231VSS_230VSS_229VSS_228VSS_227VSS_226VSS_225VSS_224VSS_223VSS_222VSS_221VSS_220VSS_219VSS_218VSS_217VSS_216VSS_215VSS_214VSS_213VSS_212VSS_211VSS_210VSS_209VSS_208VSS_207VSS_206VSS_205VSS_204VSS_203VSS_202VSS_201VSS_200VSS_199VSS_198VSS_197VSS_196VSS_195VSS_194VSS_193VSS_192VSS_191VSS_190VSS_189

VSS_187VSS_188

VSS_337VSS_338

VSS_325VSS_324

VSS_315VSS_314

VSS_303VSS_302VSS_301VSS_300VSS_299VSS_298VSS_295VSS_294

VSS_296VSS_297

VSS_284VSS_285VSS_286VSS_287

VSS_274VSS_273

VSS_264VSS_263

VSS_343

IO POWER(7 OF 11)

VCCIO_33VCCIO_34VCCIO_35VCCIO_36VCCIO_37

VCCIO_42VCCIO_41VCCIO_40

VCCIO_38VCCIO_39

VCCIO_48VCCIO_49

VCCIO_53VCCIO_54VCCIO_55VCCIO_56VCCIO_57VCCIO_58

VCCIO_62VCCIO_61VCCIO_60VCCIO_59

VCCIO_16VCCIO_15VCCIO_14VCCIO_13VCCIO_12VCCIO_11VCCIO_10

VCCIO_17VCCIO_18VCCIO_19VCCIO_20VCCIO_21VCCIO_22VCCIO_23VCCIO_24VCCIO_25VCCIO_26VCCIO_27VCCIO_28VCCIO_29VCCIO_30VCCIO_31VCCIO_32

BRANCHREVISION

D

R

SHEETPAGE TITLE

3 4

5 6

7 8

D

B

SANDY-BRIDGE MOBILE-REV1BGA

OMIT

U1000

AH65AH63

AE64AE62AE60AD65AD63AD61AD58AD56AB65AB63AH61

AB61AB58AB56AA64AA62AA60Y58Y56W64W62AH58

W60V65V63V61V58V56T65T63T61T58AH56

T56R64R62R60R55R53R48N64N62N60AG64

N58N56N52N49M65M63M61M59M55M53AG62

M48L56L52L48

AG60AF58AF56

BJ36BJ28

AY47AY43AY39AY35AY31AY27AY23AV46AV42AV40BG40

AV36AV34AV29AV27AU45AU43AU39AU37AU33AU30BG32

AU26AU24AT46AT42AT40AT36AT34AT29AT27AR45BD47

AR43AR39AR37AR33AR30AR26AR24AP46AP42AP40BD43

AP36AP34AP29AP27AN45AN43AN39AN37AN33AN30BD39

AN26AN24AL46AL42AL40AL36AL34AL29AL27

BD31BD23BB35

BGA

SANDY-BRIDGE MOBILE-REV1

AT44AT38AT31AT25AT19AT11AT7AT3AT1AR54BG52

AR47AR41AR35AR28AR22AP65AP63AP57AP50AP44BG48

AP38AP31AP25AP19AP17AP15AP12AP11AP9AP5BG44

AN54AN47AN41AN35AN28AN22AM61AM7AM3AM1BG36

AL57AL50AL44AL38AL31AL25AL19AK16AK14AK11BG28

AK9AK5AJ64AJ62AJ60AJ57AH7AH3AH1AG57BG24

AG17AG15

BJ8

AV57AV50AV44AV38AV31AV25AV19AV9AV5AU54

SANDY-BRIDGEBGAMOBILE-REV1

OMIT

U1000

AG12AF65AF63AF61AF11AF9AF5AE57AD16AD14AD7AD3AD1AC64AC62AC60AC57AB11AB9AB5AA57AA17AA15AA12Y65Y63Y61Y7Y3Y1W57V16V14V11V9V5U64U62U60U57T7T3T1R57R50R44R38R31R25R19R17R15R12P65P63P61P11P9P5N54N47N41N35N28N22M57M50M44M38M31M25M19M7M3M1L64L62L60L58L54L50L46L42L36L30L24

L20L16L12L8K39K33K27K1J64J60J56J52J48J46J42J36J30J24J22J18J14J10J6H39H33H27H3G62G58G54G50G46G42G36G30G24G20G16G12G8F39F33F27E60E56E52E48E46E42E36E30E24E22E18E14E10E6E4D63D39D33D27C58C54C50C46C42C36C30C20C16C12C8B39B33B27A56A52A42A36A30A24A20A16A12A8

BGAMOBILE-REV1 SANDY-BRIDGE

OMIT

U1000

AV55AV53

AU20AU18AT55AT53AT48AT17AT15AT12AR58AR56AV48

AR52AR49AR20AR18AR16AR14AP55AP53AP48AN58AV17

AN56AN52AN49

AN20AN18AN16AN14AM11AL55AL53AV15

AL48AL17AL15AL12AK58AK56AJ17AJ15AJ12AH16AV12

AH14AH11AF16AF14AE17AE15AE12AD11AC17AC15AU58

AC12AB16AB14Y16Y14Y11

AU56AU52AU49

CPU POWER AND GND

PP1V05_S0PP1V05_S0

PP1V5_S3RS0_CPUDDRPPVCORE_S0_AXG

Trang 14

3 6

BRANCHREVISION

D

R

SHEETPAGE TITLE

B

PLACEMENT_NOTE (C1600-C16C7):

Intel recommendation: 2x 330uF, 10x 10uF 0603, 26x 1uF 0402

Intel recommendation: 1x 10mOhn resistor, 1x 1uF 0402

CPU VCCIO/VCCPQ DECOUPLING

CPU VCCPLL Low pass filter

PLACEMENT_NOTE (C1646-C1671):

CPU VCCPLL DECOUPLING

Apple Implementation: 2x 330uF, 10x 10uF 0603, 26x 1uF 0402

CPU VCORE DECOUPLING

C16121

210%

X5R1UF10VC16111

2X5R

1UF10%

C16101

2

20%

02016.3V1UFNOSTUFF

X5R

C16A41

220%

02016.3VX5R1UF

NOSTUFFC16A31

2

40210V1UF

C16091

2

NOSTUFF

20%

0201X5R1UF6.3VC16A21

2

10%

X5R1UF

C16081

2X5R1UF40210%

C16071

2

20%

02016.3V1UFNOSTUFF

X5R

C16A11

26.3V020120%

X5R1UF

NOSTUFFC16A01

22UF Place near inductors on bottom side.

X5R-CERM10603

402

1UF10VC16061

2

40210V1UF

C16191

2X5R

10%

1UF

C16051

2

40210%

X5R1UF

C16181

210V

4021UF

C16041

2

40210V1UF

C16171

2Place on bottom side of U1000

X5R1UF10V40210%

C16031

2

1UF10%

X5R

Place on bottom side of U1000

C16021

2

40210V1UF

C16161

240210V1UF

C16151

210%

X5R

Place on bottom side of U100.

1UF10VC16011

2

10%

X5R1UF

C16141

21UF

10%

X5R

C16001

2

40210V1UF

C16131

2

CRITICAL 22UF20%

Place near inductors on bottom side.

6.3VX5R-CERM106032

CRITICAL 22UF Place near inductors on bottom side.

20%

6.3VX5R-CERM10603

2.0VD2T-SMPOLY-TANT20%

470UF-4MOHMNOSTUFFPlace near inductors on bottom side.

C16431

23

2

CRITICAL Place near inductors on bottom side.

20%

6.3V22UFX5R-CERM106032

20%

22UF6.3VCRITICAL

X5R-CERM10603

470UF-4MOHM Place near inductors on bottom side.

2.0V20%

D2T-SMPOLY-TANT

CRITICAL

C16421

23

470UF-4MOHM

D2T-SM

2.0V20%

POLY-TANT

CRITICAL

C16411

23

D2T-SM20%

23

020120%

X5R1UFNOSTUFF

6.3VC16A61

220%

02016.3V1UFX5R

NOSTUFFC16A51

C16201

C16211

2

CRITICAL

0402-16.3V20%

10UF Place near U1000 on bottom side

CERM-X5R

C16221

10UF

0402-1

C16231

2

6.3V20%

CRITICAL

X5R-CERM106032

CRITICAL 22UF20%

6.3VX5R-CERM10603

2

CRITICAL

6.3VPlace near inductors on bottom side.

20%

22UF0603

CRITICAL 22UF20%

X5R-CERM10603

2

CRITICAL 22UF6.3V20%

X5R-CERM10603

2

CRITICAL Place near inductors on bottom side.

22UF20%

6.3V0603X5R-CERM12

CRITICAL

20%

6.3V22UF Place near inductors on bottom side.

X5R-CERM106032

CRITICAL 22UF20%

X5R-CERM10603

2120%

0603X5R-CERM122UF

CRITICAL

C16362

C1635

CRITICAL

20%

22UF6.3VPlace near inductors on bottom side.

X5R-CERM106031

2

CRITICAL 22UF6.3VPlace near inductors on bottom side.

20%

X5R-CERM10603

470UF-4MOHM

D2T-SMPOLY-TANT

20%

2.0V

CRITICAL

C16441

23

X5R 10%

1UF

402 PLACE_NEAR=U1000.AK65:2.54 mm:NO_VIA

C1686

1

2

1/16W 402

0

MF-LF 5%

1UF10VC16581

2

1UF10%

X5R

C16571

210V4021UF

C16561

240210V1UF

C16551

240210V1UF10%

C16541

21UFX5R10%

402

C16531

2402

1UF10%

C16521

2X5R10%

1UF

C16511

210%

X5R1UF

C16501

2X5R10%

1UF Place on bottom side of U1000

10V402

C16491

240210V1UF

C16481

210%

X5RPlace on bottom side of U100.

10V1UF

C16471

21UF Place on bottom side of U1000

10%

X5R

C16461

2

40210V1UF

C16641

240210%

X5R1UF

C16631

210%

40210V1UF

C16621

24021UFX5R10%

C16611

240210V1UF

C16601

210%

X5R1UF

C16591

2

10%

40210V1UF

C16711

21UF40210%

X5R

C16701

240210V1UF

C16691

240210V1UF

C16681

2X5R10%

1UF

C16671

240210%

X5R1UF

C16661

240210V1UF

C16651

603

C16751

2

CRITICAL

6.3V20%

Place near U1000 on bottom side

10UF

X5R

C16731

2

CRITICAL

6.3V20%

Place near U1000 on bottom side

10UF

X5R

C16761

X5R

C16811

2

CRITICAL

6.3V20%

10UF Place near U1000 on bottom side

X5R

C16801

330UF-0.006OHMC16821

2

0603MF1/4W1%

0.010

R1601

NOSTUFF1UFX5R20%

6.3V0201

C16A71

2

NOSTUFF1UFX5R02016.3VC16A81

220%

NOSTUFF1UFX5R20%

6.3V0201

C16A91

2

NOSTUFF1UFX5R20%

6.3V0201

C16B01

2

NOSTUFF1UFX5R20%

02016.3VC16B11

2

NOSTUFF1UFX5R20%

02016.3VC16B21

2

NOSTUFF1UFX5R20%

02016.3VC16B31

2

NOSTUFF1UFX5R20%

02016.3VC16B41

2

NOSTUFF

X5R0201

1UF20%

6.3VC16B51

2

NOSTUFF1UFX5R20%

02016.3VC16B61

2

NOSTUFF1UFX5R20%

02016.3VC16B71

2

NOSTUFF1UFX5R20%

02016.3VC16B81

2

NOSTUFF1UFX5R20%

02016.3VC16B91

2

NOSTUFF

1UFX5R20%

6.3V0201

C16C01

2

NOSTUFF

1UF6.3V020120%

X5R

C16C71

26.3V020120%

X5R1UF

NOSTUFFC16C61

2X5R20%

6.3V1UFNOSTUFF

0201

C16C51

21UFX5R20%

6.3VNOSTUFF

0201

C16C41

2

NOSTUFF

1UF20%

6.3V0201X5R

C16C31

2

NOSTUFF

1UFX5R20%

02016.3VC16C11

2

1UFX5R20%

02016.3V

NOSTUFFC16C21

22UFNOSTUFF

X5R-CERM106032

6.3V20%

22UFNOSTUFF

X5R-CERM106032

6.3V22UF20%

NOSTUFF

X5R-CERM106032

20%

6.3V22UFNOSTUFF

X5R-CERM10603

330UF-0.006OHM

CASE-D2-SMCRITICAL

Place near inductors on bottom side

POLY 20%

2V

C16831

2

330UF-0.006OHM

PLACE_NEAR=U1000.AK61:5 mm CASE-D2-SM

CRITICAL

20%

2V POLY

C16871

2

SYNC_DATE=07/21/2010SYNC_MASTER=K91_MLB

Trang 15

BRANCHREVISION

D

R

SHEETPAGE TITLE

3 4

5 6

7 8

D

B

Apple Implementation: 2x 470uF 4mOhm, 1x 470uF 4mOhm (NOSTUFF), 6x 22uF 0603, 2x 22uF 0603 (NOSTUFF), 6x 10uF 0402, 2x 10uF 0402 (NOSTUFF), 9x 1uF 0402, 9x 1uF 0402 (NOSTUFF)

Intel recommendation: 1x 330uF, 5x 10uF 0603, 5x 1uF 0402

CPU VCCSA DECOUPLING

Intel recommendation: 1x 10mOhn resistor, 1x 1uF 0402

1UF

C17171

2402

NOSTUFF

10%

1UF

C17161

2NOSTUFF

10%

4021UF

C17151

2NOSTUFF

40210V1UF

C17141

2NOSTUFF

40210V1UF

C17131

210V1UFNOSTUFF

40210%

C17121

2

1UF10%

402NOSTUFF

X5R

C17111

210%

4021UFNOSTUFF

10VC17101

2

NOSTUFF1UF10%

40210VC17091

21UF40210%

C17081

2X5R1UF

C17071

2X5R

1UF10%

402

C17061

2

CERM-X5R6.3V

10UFNOSTUFF

20%

0402-1

Place close to U1000 on bottom side

C17251

2

CERM-X5R6.3V20%

10UFNOSTUFF

0402-1

C17241

NOSTUFF

22UFX5R-CERM106032

NOSTUFFPlace near inductors on bottom side.

6.3V20%

22UFX5R-CERM10603

X5R1UF

C17051

C17231

2

10V4021UF

C17041

2

10UF

CERM-X5R6.3V20%

0402-1

C17221

2

X5R1UF10V402

C17031

C17211

22UF20%

X5R-CERM106032

20%

22UFX5R-CERM10603

2.0V20%

D2T-SMPOLY-TANT

NOSTUFF

470UF-4MOHM

C17371

23

10%

4021UF

C17021

2

1UF10%

40210VC17011

C17201

C17191

C17001

C17181

2

6.3V22UF20%

X5R-CERM106032

22UF20%

6.3VX5R-CERM10603

POLY-TANTD2T-SM20%

470UF-4MOHM

2.0VC17351

23

2

20%

6.3VX5R-CERM10603

2.0VD2T-SM20%

POLY-TANT

470UF-4MOHM

C17341

23

X5R 10%

1UF

10V 402

C1757

1

2

X5R10%

1UF

C17471

210%

1UF402

C17461

240210V1UF

C17451

2X5R

1UF10%

402

C17441

2X5R10%

1UF

C17431

240210V1UF

C17421

2X5R10%

1UF402

C17411

2X5R

10%

1UF

C17401

240210%

X5RPlace on bottom side of U100.

10V1UF

C17391

210VPlace on bottom side of U1000

10%

X5R1UF

C17381

2

20%

10UF

6.3VX5R

603

C17551

C17531

2

10UF

6.3V20%

X5R

C17521

26.3V20%

10UF

X5R

C17511

2

10UF

6.3V20%

X5R

C17501

2

10UF Place close to U1000 on bottom side

20%

6.3VX5R

C17491

26.3V20%

10UF

X5R

C17481

2

10V4021UF

C17621

2Place on bottom side of U1000

X5R10%

40210V1UF

C17611

220%

6.3V

10UF

X5R

C17661

2

X5R

1UF10%

402

C17601

240210%

1UF

C17591

2

20%

10UF

6.3VX5R

C17651

26.3V20%

10UF

X5R

C17641

2

X5R

1UF10%

402

C17581

2

6036.3V20%

10UF

X5R

C17631

2

1%

0.010

0603MF1/4W

R1700

20%

TANT2VCASE-B4-SM

270UF

C17681

POLY

CRITICALC17561

Trang 16

IN

OUTOUT

OUTIN

BI

BIBIBIOUT

BI

ININOUTOUT

ININ

OUTOUT

OUTOUTOUTOUTOUTIN

OUTOUT

ININ

IN

OUTBI

ININOUTOUT

OUT

SATA1RXNSATA0TXPSATA0TXN

SATA2RXNSATA2RXP

HDA_SDIN3HDA_SDIN2

HDA_SDO

HDA_DOCK_EN*/GPIO33HDA_DOCK_RST*/GPIO13

JTAG_TCKJTAG_TMSJTAG_TDIJTAG_TDO

SPI_CS0*

SPI_CLK

SPI_CS1*

SPI_MOSISPI_MISO

FWH0/LAD0RTCX1

RTCX2

SATA1TXP

SATA0RXNSERIRQLDRQ1*/GPIO23

FWH1/LAD1FWH2/LAD2FWH3/LAD3FWH4/LFRAME*

SATA1RXPSATA1TXN

SATA2TXNSATA2TXPSATA3RXNSATA3RXPSATA3TXNSATA3TXPSATA4RXNSATA4RXPSATA4TXNSATA4TXPSATA5RXN

SATA5TXNSATA5TXP

SATAICOMPOSATAICOMPI

SATALED*

SATA0GP/GPIO21SATA1GP/GPIO19

SATA3COMPISATA3RCOMP0SATA3RBIAS

PERN3PETP2PETN2PERP1

CL_RST1*

CL_DATA1CL_CLK1CLKIN_GND1_PCLKIN_GND1_N

CLKOUT_ITPXDP_PCLKOUT_ITPXDP_NCLKOUTFLEX3/GPIO67CLKOUTFLEX2/GPIO66CLKOUTFLEX1/GPIO65CLKOUTFLEX0/GPIO64XCLK_RCOMPXTAL25_OUTXTAL25_INCLKIN_PCILOOPBACKREFCLK14IN

CLKIN_SATA_NCLKIN_SATA_P

CLKIN_DOT_96PCLKIN_DOT_96NCLKIN_DMI_PCLKIN_DMI_N

CLKOUT_DP_NCLKOUT_DP_P

CLKOUT_DMI_PCLKOUT_DMI_NCLKOUT_PEG_A_PCLKOUT_PEG_A_N

CLKOUT_PEG_B_NCLKOUT_PEG_B_P

CLKOUT_PCIE5PPCIECLKRQ5*/GPIO44

CLKOUT_PCIE4PCLKOUT_PCIE5N

CLKOUT_PCIE3PCLKOUT_PCIE4NCLKOUT_PCIE3NPCIECLKRQ2*/GPIO20CLKOUT_PCIE2PCLKOUT_PCIE2N

CLKOUT_PCIE1NCLKOUT_PCIE1P

CLKOUT_PCIE0NCLKOUT_PCIE0P

PETN1PERN1

SMBCLKSMBALERT*/GPIO11

PETP8

PERP8PETN8

PETP7PERN8PETN7PERP7PERN7

PETN6PETP6PERP6PERN6PETP5PETN5PERP5

PETP4PERN5PETN4PERP4

PETP3PERN4PETN3PERP3

PERN2PERP2PETP1

SML1DATA/GPIO75SML1CLK/GPIO58SML1ALERT*/PCHHOT*/GPIO74

SML0DATA

SML0ALERT*/GPIO60SML0CLKSMBDATA

INININ

IN

OUTOUT

IN

INININOUT

OUTOUT

BRANCHREVISION

D

R

SHEETPAGE TITLE

20K

5%

201 2

201 1/20W MF

33

MF 5%

PLACE_NEAR=U1800.N34:1.27mmR1810

1 2

2 1

R1811

201 1/20W

R1812

201 MF

33

5%

1/20W

2 1

R1813PLACE_NEAR=U1800.A36:1.27mm

201 1/20W MF 5%

2 1

R1861

1/20W MF

33

5% 201 2 1

R1862

201 MF

33

1/20W 5%

2 1 201

33

MF 1/20W

R1863

5%

2 1

R1864

201 MF

33

1/20W 5%

2

1

R1832

201 1/20W 5%

750

MF

PLACE_NEAR=U1800.AH1:2.54mm

201 MF 1/20W

AP7

T10

V4U3T1T3

P3

Y11Y10AB1AB3Y1Y3AD1AD3Y5Y7AF1AF3AB10AB8

AH1AB13

AH4AH5AD5AD7AP10AP11AM8AM10

P1

AP5AM1AM3

V14

C20A20

K36

H7

H1K5J3

K22

L34

A36A34C34G34E34K34

N32C36

N34

D36C37B37A38C38

U1800 MOBILE COUGAR-POINTFCBGAOMIT

Y14D20

Y47

M16E14C13G12C8A12C9H14E12

K45AY38

BB40AV36BB36BB34AU34AY32AU32

AW38AY40AU36AY36AY34AV34BB32AV32

BC38BJ40BG38BH37BE36BJ36BF34BJ34

BE38BG40BJ38BG37BF36BG36BE34BG34

E6M10

L14

L12A8

V10

M1J2

K49H47F47K43

AB40AB42

AB38AB37

V46V45Y45Y43Y36Y37

AA47AA48AB47AB49Y39Y40

AK13AK14

AM13AM12AU22AV22

AK5AK7

H45

BG30BJ30

E24G24BE18BF18

P10T11M7

U1800

FCBGA

OMITMOBILE COUGAR-POINT

1/20W MF

1R1853

5%

201 MF 1/20W

1/20W

21

2

1

R1844

MF 5%

1K

201 MF

10K

5%

201

R18971

2

10K

5%

2011/20WMF

R18961

2

10K

1/20W5%

201MF1

R18941

2

10K

5%

1/20WMF201

R18931

2

10K

5%

MF2011/20WR18921

2

10K

2015%

MF1/20WR18911

SATA_HDD_R2D_C_N

T29_PWR_ENLPC_FRAME_R_L

LPC_R_AD<1>

LPC_R_AD<0>

LPC_SERIRQ

EXCARD_CLKREQ_LPCH_SATALED_L

PCH_CLK14P3M_REFCLK

PEG_CLKREQ_LT29_CLKREQ_L

PCIE_CLK100M_PCH_PPCH_CLK100M_SATA_NPCIE_CLK100M_PCH_N

NC_SATA_D_R2D_CPTP_SATA_E_D2RN

PCH_SATAICOMP

PCIE_CLK100M_FW_N

FW_CLKREQ_L

SML_PCH_0_ALERT_LPEG_B_CLKRQ_L_GPIO56

SATA_HDD_R2D_C_P

HDA_SYNC_RHDA_SDOUT_R

PP1V5_S0

PP3V3_T29PP3V3_S0_PCHPP3V3_SUS

ENET_CLKREQ_L

AP_CLKREQ_LFW_CLKREQ_LPCH_SPKRJTAG_T29_TMS

SATARDRVR_EN

PPVCCIO_S0_PCH

PCH_SATA3COMP

PCH_CLK96M_DOT_PPCH_CLK96M_DOT_NPCH_CLK100M_SATA_P

TP_LPC_DREQ0_L

TP_SPI_CS1_L

SPI_MISOSPI_MOSI_R

XDP_PCH_TDOXDP_PCH_TMSXDP_PCH_TCK

SATA_ODD_R2D_C_P

HDA_RST_R_L

NC_HDA_SDIN2NC_HDA_SDIN3

SYSCLK_CLK32K_RTC

TP_SATA_B_D2RNTP_SATA_B_D2RP

ENET_CLKREQ_L

TP_PCIE_CLK100M_PEBNTP_PCIE_CLK100M_PEBP

NC_PCIE_5_R2D_CP NC_PCIE_5_R2D_CN

SMC_SCI_L

SML_PCH_1_ALERT_L

ITPCPU_CLK100M_PITPXDP_CLK100M_N

HDA_RST_R_L

HDA_SDOUTHDA_RST_L

ITPCPU_CLK100M_N

SYSCLK_CLK25M_SB

PP3V3_SUS

PCH_GPIO11SMBUS_PCH_CLKSMBUS_PCH_DATA

SML_PCH_0_ALERT_LSML_PCH_0_CLK

PEG_CLK100M_NPEG_CLK100M_P

DMI_CLK100M_CPU_N

PCIE_CLK100M_PCH_NPCIE_CLK100M_PCH_P

PCH_CLK96M_DOT_N

PCH_CLK14P3M_REFCLK

SML_PCH_1_CLKSML_PCH_1_ALERT_L

HDA_SYNC_R

TP_SATA_B_R2D_CP

TP_SATA_E_D2RPTP_SATA_E_R2D_CNTP_SATA_E_R2D_CP

PP3V3_SUS

PCIE_ENET_D2R_PPCIE_ENET_D2R_N

DP_AUXCH_ISOL

LPC_FRAME_LLPC_AD<2>

HDA_BIT_CLK_R

PCH_CLK100M_SATA_PPCH_CLK96M_DOT_P

PCIE_CLK100M_FW_PPCIE_CLK100M_AP_P

PCIECLKRQ5_L_GPIO44PCIE_CLK100M_EXCARD_N

PEG_B_CLKRQ_L_GPIO56

PCH_INTRUDER_LRTC_RESET_L

SPI_CLK_RHDA_BIT_CLK_R

TP_PCH_GPIO66_CLKOUTFLEX2PCH_CLK100M_SATA_N

TP_CLINK_CLKPCH_CLKIN_GNDP1

ITPXDP_CLK100M_NTP_PCH_GPIO67_CLKOUTFLEX3

TP_CLINK_RESET_LTP_CLINK_DATA

ITPXDP_CLK100M_P

PCH_CLKIN_GNDN1

PCIE_AP_D2R_N

SML_PCH_1_DATASML_PCH_0_DATA

PCIE_EXCARD_R2D_C_NPCIE_EXCARD_R2D_C_P

NC_PCIE_5_D2RN NC_PCIE_5_D2RP

NC_PCIE_6_D2RN

NC_PCIE_7_R2D_CN NC_PCIE_7_D2RP NC_PCIE_7_D2RN NC_PCIE_6_R2D_CN NC_PCIE_6_D2RP

NC_PCIE_8_D2RN NC_PCIE_6_R2D_CP

NC_PCIE_8_D2RP NC_PCIE_8_R2D_CN

ITPXDP_CLK100M_PPP3V3_S0_PCH

PCIE_CLK100M_AP_N

PCH_GPIO11

NC_PCIE_8_R2D_CPPCIE_CLK100M_ENET_N

SATA_HDD_D2R_PSATA_HDD_D2R_NLPC_R_AD<3>

Trang 17

OUTOUTOUTOUTOUT

INBI

OUTOUTOUTOUT

ININ

FDI_RXN5FDI_RXN4

FDI_RXN2FDI_RXN3FDI_RXN1FDI_RXN0

RI*

BATLOW*/GPIO72

PWROKSYS_PWROKSYS_RESET*

DMI_ZCOMP

DMI3TXPDMI2TXPDMI1TXP

DMI3TXNDMI0TXP

DMI1TXNDMI2TXN

SUSACK*

SLP_SUS*

DSWVRMENDF_TVS

PMSYNCHTP23

SLP_LAN*/GPIO29SLP_A*

SLP_S4*

SLP_S5*/GPIO63

SUS_STAT*/GPIO61SUSCLK/GPIO62

CLKRUN*/GPIO32WAKE*

FDI_LSYNC1

FDI_FSYNC1FDI_LSYNC0FDI_FSYNC0FDI_INTFDI_RXP7

FDI_RXP4FDI_RXP5

FDI_RXP2FDI_RXP1

FDI_RXP3FDI_RXP0FDI_RXN7FDI_RXN6

DMI0RXPDMI1RXPDMI2RXPDMI3RXP

DDPD_3P

DDPD_2PDDPD_3NDDPD_2NDDPD_1PDDPD_1NDDPD_0PDDPD_0NDDPD_HPD

DDPD_AUXNDDPD_AUXPDDPD_CTRLDATADDPD_CTRLCLK

DDPC_3NDDPC_3P

DDPC_2NDDPC_2P

DDPC_1NDDPC_0P

DDPC_1PDDPC_0NDDPC_HPDDDPC_AUXPDDPC_AUXNDDPC_CTRLDATADDPC_CTRLCLKDDPB_3PDDPB_3N

DDPB_2NDDPB_2PDDPB_1PDDPB_1NDDPB_0P

DDPB_HPDDDPB_0NDDPB_AUXPDDPB_AUXN

SDVO_CTRLCLKSDVO_CTRLDATA

SDVO_INTNSDVO_INTP

SDVO_STALLNSDVO_STALLP

SDVO_TVCLKINNSDVO_TVCLKINP

CRT_BLUECRT_GREENCRT_RED

CRT_DDC_CLKCRT_DDC_DATA

CRT_HSYNCCRT_VSYNC

CRT_IRTNDAC_IREF

NCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNC

INOUTIN

INOUT

OUTIN

BRANCHREVISION

D

R

SHEETPAGE TITLE

3 4

5 6

7 8

D

B

Set to Vcc when High DF_TVS:DMI & FDI Term Voltage Set to Vss when Low

49.9

1/20W 201

R19511

2

201 1/20W MF 5%

2.2K

2

MF 5% 1/20W

1K

201

MOBILEFCBGACOUGAR-POINT

E22B13

A18

AV12BC10AW16

AV14BB10

AY14BE14BH13BC12BJ12BG10BG9BG14BB14BF14BG13BE12BG12BJ10BH9

AP14E20

G16G8

C12

N14

K16

P12K3

AY16B9

BJ14

COUGAR-POINT

OMIT

MOBILEFCBGA

U1800

N48

T39M40P49

AV47AV49

AT49AT47AT40

AY47AY49AY43AY45BA47BA48BB47BB49

AP47AP49

P46P42

AT38

BB43BB45BF44BE44BF42BE42BJ42BG42

AT45AT43

M43M36

BH41

AT1

AT10AT12

AT3AT4AT5AT8

AU2AU3AV1

AV10

AV3AV5AV7

AY3AY5AY7BA2BA3BB1BB3BB5BB7BC8BD4BE8BF3BF6BG4

P38M39

AP39AP40

AM42AM40

AP43AP45

390K

5%

MF 1/20W 201

201 MF

2

1/20W MF 201 5%

10K1

2

R1982

1/20W MF 201 5%

2 201 1/20W MF 5%

FDI_DATA_N<1>

FDI_DATA_N<2>

PM_PCH_PWROK

NC_DP_IG_D_CTRL_CLKNC_DP_IG_C_MLP<3>

PM_MEM_PWRGDPM_SYSRST_L

NC_CRT_IG_RED

DMI_S2N_N<0>

FDI_DATA_P<7>

PM_PCH_SYS_PWROKPM_PCH_PWROK

NC_CRT_IG_HSYNC

PCIE_WAKE_LFDI_FSYNC<1>

NC_DP_IG_D_MLN<2>

NC_DP_IG_D_MLN<3>

NC_DP_IG_C_MLN<1>

NC_DP_IG_D_CTRL_DATANC_DP_IG_C_MLP<1>

NC_DP_IG_D_AUXPNC_DP_IG_D_HPDNC_DP_IG_D_MLN<0>

NC_DP_IG_D_MLP<1>

NC_DP_IG_D_MLP<3>

NC_SDVO_TVCLKINPNC_SDVO_TVCLKINN

NC_DP_IG_C_MLN<2>

NC_DP_IG_D_MLP<2>

NC_DP_IG_D_AUXNNC_DP_IG_C_AUXN

PM_PWRBTN_LSUSWARN_L

PCH_SUSACK_LGPIO29_SLP_LAN_L

FDI_LSYNC<1>

PM_CLK32K_SUSCLK_RLPC_PWRDWN_LPM_CLKRUN_L

FDI_DATA_P<3>

FDI_DATA_P<1>

DMI_N2S_N<1>

PCH_DAC_IREFCPU_PROC_SEL_L

PCH_SUSACK_L

SUSWARN_LGPIO29_SLP_LAN_L

PP1V8_S0_PCH

PCH_DF_TVS

PM_SLP_S4_L

PM_SYNCTP_PCH_TP23

PM_SLP_S4_LPM_SLP_S5_L

PM_SLP_S3_L

PM_SLP_S5_LPM_SLP_SUS_L

TP_PM_SLP_A_LPM_SLP_S3_L

PCH_DSWVRMENPM_SLP_SUS_L

PM_CLKRUN_LPP3V3_S0_PCH

Trang 18

USBP2N

USBP1NUSBP1P

USBP0NUSBP0P

OC7*/GPIO14OC6*/GPIO10OC5*/GPIO9OC4*/GPIO43OC3*/GPIO42OC2*/GPIO41OC1*/GPIO40OC0*/GPIO59

USBRBIAS*

USBRBIASUSBP13PUSBP13NUSBP12PUSBP12NUSBP11PUSBP11NUSBP10PUSBP10NUSBP9PUSBP9NUSBP8PUSBP8N

USBP7NUSBP7P

USBP6NUSBP6P

USBP5NUSBP5PUSBP4PUSBP4NUSBP3PUSBP3NUSBP2P

GNT2*/GPIO53GNT1*/GPIO51

GNT3*/GPIO55PIRQE*/GPIO2PIRQF*/GPIO3PIRQG*/GPIO4PIRQH*/GPIO5PME*

CLKOUT_PCI0PLTRST*

CLKOUT_PCI2CLKOUT_PCI1

CLKOUT_PCI3CLKOUT_PCI4

LVDSA_CLK*

LVDSA_DATA3

LVDSA_CLKLVDSB_DATA0*

LVDSB_DATA1*

LVDSB_DATA2*

LVDSB_DATA3*

LVDSB_DATA1LVDSB_DATA0

LVDSB_DATA2LVDSB_DATA3LVDSB_CLK*

LVDSB_CLK

L_BKLTENL_BKLTCTLLVD_VREFLLVD_VREFHLVD_VBGLVD_IBG

L_VDD_EN

L_CTRL_DATAL_DDC_CLKL_DDC_DATAL_CTRL_CLK

OUTOUT

OUTOUTOUTOUT

OUTOUT

OUTOUTOUT

OUTOUT

BIBI

BIBIOUT

OUTOUT

BRANCHREVISION

D

R

SHEETPAGE TITLE

Unused

UnusedUnused

OMITMOBILE U1800

H49H43J48K42H40

D47E42F46

P45J47

T45P39T40K47M45

AF37AF36AE48AE47

AK40AK39AN47AN48

AM49AM47

AK49AK47

AJ47AJ48

AF39AF40AH43AH45

AH49AH47

AF47AF49

AF43

AF45

A14K20B17C16L16A16D14C14

K40K38H38G38

G42G40C42D44

C6K10

C46C44E40

C24A24

C30A30L32K32G32E32C32A32

C25B25C26A26K28H28E28D28C28A28C29B29N28M28L30K30G30E30

B33C33

10K

5%

1/20W 5%

5%

NOSTUFF

1/20W MF 201 5%

R20521

2

201 MF 1/20W 5%

R20621

2

MF 1/20W

R20701

2

201 5% 1/20W MF

NC_PCI_CLK33M_OUT3PCH_CLK33M_PCIOUTNC_PCI_PME_L

PCH_USB_RBIAS

USB_HUB_SOFT_RESET_L

SDCONN_STATE_CHANGEPCH_GPIO43_OC4_L

PCH_GPIO52JTAG_GMUX_TMSPCI_INTC_LPCI_INTA_L

NC_USB_11PNC_USB_12NNC_USB_12PNC_USB_13NNC_USB_13P

NC_USB_11NNC_USB_10NUSB_CAMERA_PUSB_CAMERA_NUSB_HUB2_UP_PUSB_HUB2_UP_NNC_USB_7PNC_USB_7NNC_USB_6PNC_USB_6NNC_USB_5PNC_USB_5NNC_USB_4PNC_USB_4NNC_USB_3PNC_USB_2PNC_USB_1P

NC_USB_3NNC_USB_2NNC_USB_1N

USB_HUB1_UP_NUSB_HUB1_UP_P

LVDS_IG_A_DATA_P<1>

LVDS_IG_DDC_CLKNC_LVDS_IG_CTRL_CLKLVDS_IG_PANEL_PWRTP_LVDS_IG_BKL_PWMPCH_LVDS_IBG

PCH_PCI_GNT3_LPCH_PCI_GNT2_L

AP_PWR_EN

PCH_GPIO10_OC6_LSDCONN_STATE_RST_L

NC_LVDS_IG_B_DATAP<3>

TP_LVDS_IG_B_CLKN

ENET_PWR_ENNC_USB_10P

PCH_PCI_GNT1_LPCI_REQ3_L

PCI_INTD_LPCI_INTB_L

Trang 19

OUTBI

IN

MISC(6 OF 10)

CLKOUT_PCIE7P

A20GATETACH3/GPIO7

LAN_PHY_PWR_CTRL/GPIO12GPIO8

TACH0/GPIO17

GPIO24/MEM_LEDSCLOCK/GPIO22

GPIO27GPIO28

GPIO35SATA2GP/GPIO36

SLOAD/GPIO38SDATAOUT0/GPIO39PCIECLKRQ6*/GPIO45PCIECLKRQ7*/GPIO46

SATA5GP/GPIO49SDATAOUT1/GPIO48

TACH4/GPIO68GPIO57

TACH6/GPIO70TACH7/GPIO71

CLKOUT_PCIE6N

CLKOUT_PCIE7NCLKOUT_PCIE6PBMBUSY*/GPIO0

TACH2/GPIO6TACH1/GPIO1

TP6TP5

TP7TP8TP9TP10TP11TP12TP13TP14TP15TP16TP17

TP19TP20TP21TP22TP24TP25TP26TP27

TP29TP28

TP30TP31TP32TP33TP34TP35TP36NC_1

INIT3_3V*

TP40TP39TP37

VSS_NCTF

VSS_NCTFVSS_NCTF

VSS_NCTFVSS_NCTFVSS_NCTF

VSS_NCTFVSS_NCTF

VSS_NCTFVSS_NCTFVSS_NCTF

VSS_NCTFVSS_NCTFVSS_NCTFVSS_NCTFVSS_NCTFVSS_NCTFVSS_NCTFVSS_NCTFVSS_NCTFVSS_NCTFVSS_NCTFVSS_NCTF

VSS_NCTFVSS_NCTF

VSS_NCTFVSS_NCTFVSS_NCTFVSS_NCTFVSS_NCTFTS_VSS1TS_VSS2TS_VSS3

VSSADACTS_VSS4

IN

NCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNC

NCNCNCNC

IN

OUT

OUTIN

BRANCHREVISION

D

R

SHEETPAGE TITLE

3 4

5 6

7 8

D

B

(IPU)

(PUs necessary?)

THIS SIGNAL IS INTENDED FOR FIRMWARE HUB AND WE ARE NOT USING IT

This has internal pull up and should not pulled low

R2140

19

FCBGAMOBILE COUGAR-POINT

G2

E8E16P8

K4

D6C10

T14

C4

P37

T13K12

AU16

AY11P5

V8M5U2

V3

T5

M3

V13N2K1D40

A42H36E38

C40B41C41A40

AY10

BG26

C18N30H3AH12AM4AM5Y13K24L24AB46BJ26

AB45B21M20BG46BE28BC30BE32BJ32BC28BH25

BE30BF32BG32AV26BB26AU28AY30

AU26AY26

AV28BJ16

AW30

BG16AH38AH37AK43AK45

AH8AK11AH10AK10

A4A44

BE1BE49BF1BF49BG2BG48BH3BH47BJ4BJ44A45

BJ45BJ46BJ5BJ6C2C48D1D49E1E49A46

F1F49

A5A6B3B47BD1BD49

U47

19

201 1/20W MF

10K

MF 5%

10K

R21841

2

MF 201 1/20W

R21721

2

MF 201

MF 201 5%

NOSTUFFR21151

2

MF

10K

201 5%

1/20W

R21141

2

201 5%

10K

1/20W MF

R21921

2

201MF1/20W5%

100K

2

MF 1/20W 201 5%

R21121

2

MF 1/20W 201 5%

201 MF

R21901

2

5%

201 1/20W MF

10K

R21991

2

1/20W MF 201

R21961

MF 5%

10K

1/20W

NOSTUFFR21971

2

5%

10K

201 1/20W MF

R21551

2

10K

201 1/20W MF 5%

10K

201 MF

NOSTUFFR21161

R21911

2

MF 1/20W

NOSTUFF

201 5%

SMC_RUNTIME_SCI_L

PCH_GPIO15AUD_IPHS_SWITCH_EN

ODD_PWR_EN_LPCH_GPIO24

PP3V3_S0_PCHJTAG_ISP_TCK

PP3V3_S5

SMC_SCI_LPCH_GPIO0

PM_THRMTRIP_LPCH_RCIN_L

PCH_GPIO71_TACH7

PCH_GPIO36_SATA2GPENET_LOW_PWRPCH_GPIO12

JTAG_ISP_TDI

SPIROM_USE_MLBFW_PWR_ENWOL_EN

PCH_GPIO36_SATA2GPT29_SW_RESET_LISOLATE_CPU_MEM_L

PCH_GPIO69_TACH5NC_GPIO35

Trang 20

VCCTX_LVDSVCCTX_LVDSVCCTX_LVDSVCCTX_LVDS

VCCDFTERMVCCDFTERM

VCCALVDS

VCCVRM_3_DMIVCC3_3_7_HVCMOS

VCC3_3_5_PCI

VCCDFTERM

VCCSPIVCCDFTERMVCC3_3_6_HVCMOS

VCCIO_18_FDI

VCCIO_21_PCIEVCCIO_20_PCIEVCCIO_11_PLLPCIE

VCCIO_25_PCIEVCCIO_24_PCIE

VCCCLKDMIVCCCORE

VCCIO_27_DPVCCIO_26_PCIE

VCCIO_19_PCIE

VCCIO_22_PCIE

VCCIO_10_PLLFDIVCCIO_23_PCIE

VCCIO_17_FDI

VCCIO_28_DP

VCCDMI_0_FDIVCCAPLLEXP

VCCCOREVCCCORE

VCCCOREVCCCOREVCCCOREVCCCOREVCCCOREVCCCOREVCCCOREVCCCOREVCCCORE

VCCDMI_1_DMI

VCCCOREVCCCOREVCCCORE

VCCAFDIPLL

VCCCORE

VCCVRM_2_FDIVCCADACVCCCORE

VCCIO_2_USBVCCIO_3_USBVCCIO_1_USBVCCIO_0_USBVCCASW_0_MISC

VCCASW_2_MISCVCCASW_1_MISCVCCIO_8_SATA

VCCIO_6_SATAVCCIO_7_SATA

VCCAPLLSATAVCCVRM_1_SATAVCCIO_9_PLLSATA3

VCCIO_15_SATA3VCCIO_16_SATA3

VCC3_3_0_SATAVCCIO_5_PLLSATA

VCC3_3_2_GPIOVCC3_3_3_GPIOVCC3_3_1_GPIO

VCCSUS3_3_7_GPIOVCCSUS3_3_8_GPIO

VCCSUS3_3_5_GPIOVCCSUS3_3_6_GPIO

V5REF

VCCRTCV_PROC_IO

DCPSUSBYPVCCACLK

DCPRTC

VCCADPLLAVCCADPLLB

DCPSST

DCPSUS_2_CLKDCPSUS_1_CLK

VCCDIFFCLKN_2VCCDIFFCLKN_1VCCDIFFCLKN_0

VCCDSW3_3

VCCIO_13_CLK

VCC3_3_4_CLK

VCCASW_4_CLKVCCASW_5_CLKVCCASW_6_CLKVCCASW_7_CLKVCCASW_8_CLKVCCAPLLDMI2

VCCASW_20_CLK

VCCASW_10_CLKVCCASW_11_CLKVCCASW_12_CLKVCCASW_13_CLKVCCASW_14_CLKVCCASW_15_CLKVCCASW_16_CLKVCCASW_17_CLKVCCASW_18_CLKVCCASW_19_CLKVCCASW_9_CLK

VCCVRM_0_CLK

VCCASW_22_CLKVCCASW_21_CLK

VCCSSC

VCCSUS3_3_9_USBVCCIO_14_PLLUSBV5REF_SUS

VCCSUS3_3_0_SUSDCPSUS_3_SUS

VCCASW_3_CLKDCPSUS_0_CLKVCCIO_12_PLLCLK

NCNC

BRANCHREVISION

D

R

SHEETPAGE TITLE

1.44 A Max, 474mA Idle

VCCAFDIPLL pin left as NC per DGVCCAPLLSATA pin left as NC per DG

NC-ed per DGVCCACLK pin left as NC per DG

10 mA Max, 1mA Idle NC-ed per DG

OMIT

COUGAR-POINTFCBGAMOBILE U1800

BH29

V33V34

AG27AG29AJ23AJ26AJ27AJ29AJ31

AD21AD23AF21AF23AG21AG23AG24AG26

AG16AG17AJ16AJ17

V1

AM37AM38AP36AP37

AP16

AT16AK37

FCBGACOUGAR-POINT

OMITMOBILE U1800

N16

V16AL24

T17V19

AA16W16T38

AD49

BD47BF47

BH23

AK1

T19

AC26AC27AC29AC31AD29AD31W21W23W24W26

V21W29

W31W33

T21

AA19AA21AA24AA26AA27AA29AA31

AF33AF34AG34

T16

N26AL29

AF17

T26

AH13AH14

P26P28T27T29

AF13

AC16AC17AD17AF14

A22

AG33

AN24

T23T24V23V24

N20N22P20P22

402

PLACE_NEAR=U1800.A22:2.54mm

C2232

1 2 CERM 10%

1UF

6.3V 402

PLACE_NEAR=U1800.A22:2.54mm

C2231

1 2

CERM

0.1UFPLACE_NEAR=U1800.V16:2.54mm

20%

402

C2222

1 2

PLACE_NEAR=U1800.N16:2.54mm

0.1UF

CERM 20%

402 10VC2210

0.1UFC2233

1 2

PCH POWER

PP1V5_S0PP3V3_SUSPP5V_SUS_PCH_V5REFSUS

PPVOUT_G3_PCH_DCPRTC

MIN_LINE_WIDTH=0.2 mm VOLTAGE=3.3V

MIN_NECK_WIDTH=0.2 mm

PPVOUT_S0_PCH_DCPSST

MIN_NECK_WIDTH=0.2 mm VOLTAGE=3.3V MIN_LINE_WIDTH=0.2 mm

PP3V3_SUS

PP3V3_S0_PCH

TP_1V05_S0_PCH_VCCAPLLEXP

PP1V05_S0_PCH_VCCCLKDMI_FPPVCCIO_S0_PCH

PPVCCIO_S0_PCHPPVCCIO_S0_PCH

PP3V3_S0_PCHPP3V3_S0_PCH

TP_PPVOUT_PCH_DCPSUSBYP

PPVCCIO_S0_PCH

PP3V3_S0_PCH

PP1V8_S0PP5V_S0_PCH_V5REF

PP3V3_SUS

PPVCCIO_S0_PCH

PPVCCIO_S0_PCHPPVCCIO_S0_PCH

Trang 21

VSS(9 OF 10)

VSS

VSSVSS

VSS

VSSVSSVSSVSSVSSVSSVSS

VSSVSSVSS

VSS

VSSVSS

VSS

VSSVSS

VSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSS

VSSVSS

VSSVSSVSS

VSSVSSVSSVSSVSS

VSSVSSVSSVSSVSSVSS

VSSVSSVSSVSSVSS

VSSVSSVSSVSS

VSSVSS

VSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSS

VSSVSSVSS

VSSVSSVSSVSSVSSVSSVSSVSSVSSVSS

VSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSS

VSSVSS

VSSVSSVSSVSSVSSVSSVSSVSS

VSS

VSS(10 OF 10)

VSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSS

VSSVSSVSSVSSVSS

VSSVSSVSS

VSSVSS

VSSVSSVSSVSS

VSS

VSSVSSVSS

VSSVSSVSSVSSVSSVSS

VSSVSSVSS

VSSVSSVSSVSSVSS

VSSVSSVSS

VSSVSS

VSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSS

VSSVSS

VSS

VSSVSSVSS

VSSVSS

VSSVSSVSSVSS

BRANCHREVISION

D

R

SHEETPAGE TITLE

3 4

5 6

7 8

D

B

OMITFCBGAMOBILE COUGAR-POINT U1800

AJ3N24

AB14

AL48AM11AM14AM36AM39AM43AM45AM46AM7AN2AB39

AN29AN3AN31AP12AP13AP19AP28AP30AP32AP38AB4

AP4AP42AP46AP8AR2AR48AT11AT13AT18AT22AB43

AT26AT28AT30AT32AT34AT39AT42AT46AT7AU24AB5

AU30AV11AV16AV20AV24AV30AV38AV4AV43AV8AB7

AW14AW18AW2AW22AW26AW28AW32AW34AW36AW40AC19

AW48AY12AY22AY28AY4AY42AY46AY8B11B15AC2

B19B23B27B31

AC21AC24BG29

AC33AC34AC48AD10AD11AD12AD13AD14AD16AD19H5

AD24AD26AD27AD33AD34AD36AD37AD38AD39AD4AA17

AD40AD42AD43AD45AD46AD47AD8AE2AE3AF10AA2

AF12AF16AF19AF24AF26AF27AF29AF31AF38AF4AA3

AF42AF46AF5AF7AF8AG19AG2AG31AG48AH11AA33

AH3AH36AH39AH40AH42AH46AH7AJ19AJ21AJ24AA34

AJ33AJ34AK12AK3AK38AK4AK42

AK46AK8AL16

AB11

AL17AL19AL2AL21AL23AL26AL27AL31AL33AL34

OMITFCBGA

COUGAR-POINT MOBILE U1800

B35

B39B43B7BB12BB16BB20BB22BB24BB28BB30BB38BB4BB46BC14BC18BC2BC22BC26BC32BC34BC36BC40BC42BC48BD3BD46BD5BE10BE22BE26BE40BF10BF12BF16BF20BF22BF24BF26BF28BF30BF38BF40BF8BG17BG21BG22BG24BG33BG41BG44BG8BH11BH15BH17BH19BH27BH31BH33BH35BH39BH43BH7C22D12D16D18D22D24D26D3D30D32D34D38D42D8E18E26F3F45G14G18G20G26G28G36

G48H10H12H16H18H22H24H26H30H32H34H46K18K26K39K46K7L18L2L20L26L28L36L48M12M14M18M22M24M30M32M34M38M4M42M46M8N18N47P11P16P18P30P40P43P47P7R2R48T12T31T33T36T37T4T46T47T8V11V26V27V29V31V36V39V43V7W17W19W2W27W34W48Y12Y38Y4Y42Y46Y8V17AP3AP1BE16BC16BG28BJ28

SYNC_MASTER=K92_YUN SYNC_DATE=05/20/2010

PCH GROUNDS

23 OF 132

21 OF 105

Trang 22

D

R

SHEETPAGE TITLE

69 mA

1 mA S0-S5

(PCH 1.05V CORE PWR)

(PCH SUSPEND USB 3.3V PWR)PCH VCCSUS3_3 BYPASS

NEED PWR CONSTRAINT(PCH Reference for 5V Tolerance on PCI)

68 mA

PCH VCCADPLLA Filter (PCH DPLLA PWR)

PCH VCCADPLLB Filter (PCH DPLLB PWR)

PLACE_NEAR=U1800.P34:2.54mm

X5R 10%

1UF

402C24391 2

MF-LF 402 5%

100R24052

1

PLACE_NEAR=U1800.M26:2.54mm

20%

402 CERM

0.1UFC24381 2

BAT54DW-X-G

SOT-363D24001 6 5

402 1/16W 5%

10

MF-LFR24042

1

SOT-363BAT54DW-X-GD24004 3 2

10V 402 CERM 20%

0.1UFPLACE_NEAR=U1800.AJ16:2.54mm

C24401 2

402 CERM 20%

0.1UF

10VC24411 2

6.3V

1UF

10%

CERM 402

PLACE_NEAR=U1800.AT20:2.54mm

C24191 2

PLACE_NEAR=U1800.BH29:2.54mm

10%

402 16V

0.1UFC2421

1

2

X5R 10%

0.1UF

PLACE_NEAR=U1800.V24:2.54mm

C24131 2

4.7UF

X5R

PLACE_NEAR=U1800.BJ8:2.54mm

C24161 2

10%

0.1UF

402 16VC24841 2

25V 402

0.1UF

PLACE_NEAR=U1800.AA16:2.54mm

C24851 2

PLACE_NEAR=U1800.AN27:2.54mm

6.3V 402

1UF

10%

CERM

C24631 2

10%

6.3V 402

1UF

PLACE_NEAR=U1800.AG33:2.54mm

C24751 2

402 10%

1UF

CERM

C24341 2

PLACE_NEAR=U1800.AF17:2.54mm

CERM 402

1UF

10%C24691 2

CERM 402 10%

1UFC24141 2

X5R-CERM 16V 0805

10UFC240112

402 10%

PLACE_NEAR=U1800.AC17:2.54mm

CERM

1UFC24521 2

PLACE_NEAR=U1800.T16:2.54mm

10V CERM 20%

402

0.1UFC24991 2

10%

6.3V 402

1UF

CERM

PLACE_NEAR=U1800.V1:2.54mm

C24421 2

402 10%

0.1UF

25V

C24861 2

PLACE_NEAR=U1800.AH13:2.54mm

10%

6.3V 402 CERM

1UFC24441

402 CERM 10%

1UF

6.3VC24461 2

CRITICALC246012

PLACE_NEAR=U1800.AG24:2.54mm

6.3V 10%

1UF

402

C24821 2 6.3V

1UF

CERM 10%

PLACE_NEAR=U1800.AD21:2.54mm

402

C24811 2

PLACE_NEAR=U1800.AJ27:2.54mm

6.3V 402

1UF

10%

C24831 2

6.3V

1UF

402 10%

C24071 2

6.3V 402 10%

CERM

1UFC24291 2

22UF

805 CERM 20%

6.3VC242012

402 CERM

6.3V 402

1UF

CERM

C24561 2 402 10%

6.3V

1UF

C24261 2

MF-LF

1

5%

1/16W 402

CERM 805 6.3V20%

22UF

C242812

10%

CERM 402 16V

PLACE_NEAR=U1800.AM37:2.54mm

0.01UFC240612

CRITICAL

6.3V20%

805 CERM

22UFC240012

16V 402 CERM

0.01UFC240812

0.01UF

16VC245512

CRITICAL10UF

CERM

PLACE_NEAR=U1800.U48:2.54mm

6.3V 805 20%

C245012

5%

1

402 1/16W

C245312

1UF

402 10V

C24541 2

1UF

C24761 2

CRITICAL

20%

2.5VPOLY-TANTCASE-B2-SM1

NO STUFF

PLACE_NEAR=U1800.BD47:2.54MM

C24921

2

PLACE_NEAR=U1800.BF47:2.54MM

10%

6.3V1UFCERM

NO STUFF

402

C24941

2

CRITICALPLACE_NEAR=U1800.BF47:2.54MM

220UF

POLY-TANT2.5V20%

0603

L2491

MF-LF 402 1/16W

0

R2491

1 2

CRITICAL 10UH-0.45A

PP1V05_S0_PCH_VCCCLKDMI_F

PP5V_SUS

MIN_NECK_WIDTH=0.25MM VOLTAGE=1.05V MIN_LINE_WIDTH=0.5MM

PP1V05_S0_PCH_VCCCLKDMI_RPPVCCIO_S0_PCH

PP1V05_S0_PCH_VCCADPLLA_R

MIN_NECK_WIDTH=0.2MM VOLTAGE=1.05V MIN_LINE_WIDTH=0.4MM VOLTAGE=1.05V

PP1V05_S0_PCH_VCCADPLLA_FMIN_LINE_WIDTH=0.4 MM

PPVCCIO_S0_PCH

VOLTAGE=1.05VMIN_NECK_WIDTH=0.2 MM

PP1V8_S0_PCH_VCCTX_LVDS_F

MIN_NECK_WIDTH=0.25MM MIN_LINE_WIDTH=0.5MM VOLTAGE=1.8V

PP1V8_S0_PCH

PP3V3_S0_PCH_VCC3_3_CLK_RMIN_NECK_WIDTH=0.075 MMVOLTAGE=3.3V

VOLTAGE=3.3V

PP3V3_S0_PCH_VCC3_3_CLK_FMIN_LINE_WIDTH=0.5 MMMIN_NECK_WIDTH=0.075 MM

PPVCCIO_S0_PCH

MAKE_BASE=TRUE

PP5V_S0_PCH_V5REF

VOLTAGE=5V MIN_NECK_WIDTH=0.25MM MIN_LINE_WIDTH=0.3MM

PP3V3_S0_PCH_VCCA_DAC_F

MAKE_BASE=TRUE MIN_LINE_WIDTH=0.4 MM VOLTAGE=3.3V MIN_NECK_WIDTH=0.2 MM

MIN_NECK_WIDTH=0.25MM MIN_LINE_WIDTH=0.3MM VOLTAGE=5V MAKE_BASE=TRUE

PP3V3_S0_PCH

PP3V3_S0_PCHPP3V3_S0_PCH

Trang 23

IN

ININ

IN

ININININ

INININ

OUT

IN

ININ

IN

OUTOUT

NC

IN

ININ

OUT

IN

BIIN

OUTINOUT

OUT

IN

ININ

INOUT

ININ

NC

BIIN

ININ

BIIN

BRANCHREVISION

D

R

SHEETPAGE TITLE

3 4

5 6

7 8

D

B

OBSDATA_D3OBSDATA_C3

NOTE: XDP_DBRESET_L pulled-up to 3.3V on P 28

PCH MINI XDP

OBSDATA_C0

PROCESSOR MINI XDP

517S0774HOOK3

OBSFN_A1

OBSDATA_A1

TDITCK0

OBSDATA_D0

VCC_OBS_AB

OBSDATA_D1OBSDATA_A0

OBSDATA_B2

OBSDATA_A1OBSFN_A1

SCLOBSDATA_B0

TDIOBSDATA_B1

SDA

TRSTn

OBSFN_C0

OBSDATA_C2OBSDATA_C1

OBSFN_C1OBSDATA_C0

517S0774

TMS

OBSFN_A0

OBSDATA_D0OBSFN_A0

NOTE: XDP_DBRESET_L pulled-up to 3.3V on P 28

ITPCLK/HOOK4OBSFN_D1

TRSTn

OBSDATA_C2OBSDATA_C1TCK0

OBSDATA_B0

HOOK3PWRGD/HOOK0

HOOK2

ITPCLK#/HOOK5

OBSDATA_D3OBSDATA_D2

VCC_OBS_ABHOOK1PWRGD/HOOK0

XDPR2501

R2576

1/20W201MF

XDPPLACE_NEAR=U1800.M1:2.54mm0

201

0XDP

XDPC25801

XDP

402 10%

XDPR2502

0

PLACE_NEAR=R1841.1:2.54mmXDP

R2515

PLACE_NEAR=R1840.1:2.54mmXDP

0

201 5% 1/20W MF

XDPR25511

MF 1/20W 5%

51

XDPPLACE_NEAR=U1800.H7:2.54mmR25521

XDP_CPU_BPMR2561 1 2

XDP_CPU_BPM

1/20W 5%

XDP_CPU_CFG

201 1/20W 5%

1/20W 5%

R2565 1 2

402 MF-LF 5%

MF

XDPPLACE_NEAR=U1000.C60:2.54mm

DF40C-60DS-0.4V

J25001

PLACE_NEAR=J2500.52:2.54mm

XDPR25101

XDPR25111

2

51

5%

MF 1/20W 201

PLACE_NEAR=U1000.H59:2.54mm

XDPR25121

R25131

2

PLACE_NEAR=U1000.J58:2.54mmXDP

5%

51

MF 1/20W 201

TP_XDPPCH_HOOK2

XDP_CPU_TMSCPU_CFG<0>

TP_XDP_PCH_OBSFN_A<0>

PCH_GPIO43_OC4_LXDP_PCH_SDCONN_DET_L

XDP_PCH_PWRBTN_LPCH_GPIO14_OC7_L

SMBUS_PCH_CLKSMBUS_PCH_DATA

JTAG_ISP_TCKXDP_BPM_L<2>

PLT_RST_CPU_BUF_LXDP_CPU_CLK100M_P

AP_CLKREQ_L

ITPXDP_CLK100M_N

XDP_PCH_USB_HUB_SOFT_RST_L

SDCONN_STATE_RST_LUSB_HUB_SOFT_RESET_L

SDCONN_STATE_CHANGE

XDP_DBRESET_L

PM_PWRBTN_LENET_PWR_EN

SMBUS_PCH_CLK

XDP_CPU_TCK

XDP_CPU_TDOXDP_CPU_TRST_L

Trang 24

SG

D

S

USBDN2_DP/PRT_DIS_P2USBDN3_DM/PRT_DOS_M3USBDN3_DP/PRT_DIS_P3

PRTPWR1HS_IND/CFG_SEL1

USBDN4_DM/PRT_DIS_M4SDA/SMBDATA/NON_REM1

OCS4*

OCS3*

RBIASVBUS_DET

PRTPWR3PRTPWR2

USBDN2_DM/PRT_DIS_M2USBDN1_DP/PRT_DIS_P1USBDN1_DM/PRT_DIS_M1

SUSP_IND/LOCAL_PWR/NON_REM0XTAL2

XTAL1/CLKINRESET*

USBUP_DPUSBUP_DM

OCS2*

PRTPWR4OCS1*

VDD33PLL VDD33CRVDD33 VDD18

THRML_PADTEST

(SYM-VER1)

VDDA33

BIBIBI

BIBI

BIBIBIBIBI

IN

ININ

BIBI

USBDN2_DP/PRT_DIS_P2USBDN3_DM/PRT_DOS_M3USBDN3_DP/PRT_DIS_P3

PRTPWR1HS_IND/CFG_SEL1

USBDN4_DM/PRT_DIS_M4SDA/SMBDATA/NON_REM1

OCS4*

OCS3*

RBIASVBUS_DET

PRTPWR3PRTPWR2

USBDN2_DM/PRT_DIS_M2USBDN1_DP/PRT_DIS_P1USBDN1_DM/PRT_DIS_M1

SUSP_IND/LOCAL_PWR/NON_REM0XTAL2

XTAL1/CLKINRESET*

USBUP_DPUSBUP_DM

OCS2*

PRTPWR4OCS1*

VDD33PLL VDD33CRVDD33 VDD18

THRML_PADTEST

(SYM-VER1)

VDDA33

BIBIBIBI

ININ

TABLE_BOMGROUP_ITEM TABLE_BOMGROUP_ITEMBOM OPTIONS

BOM GROUP

TABLE_BOMGROUP_HEAD

3 6

BRANCHREVISION

D

R

SHEETPAGE TITLE

B

External A Trackpad/Keyboard

SD Card/Express Card

IR Receiver

External C External B

Bluetooth

IPU IPU IPU IPU

0 0 All ports are removable

1 1 Port 1, 2, and 3 are non removable

1 0 Port 1 and 2 are non removable

NON_REM1 NON_REM0 DESCRIPTION

0 1 Port 1 is non removable

BOM TABLE

T29 unused USB port, only has pull up

5%

402MF-LF

Q2640

3

54

4025%

Q2640

6

21

5%

50VCERM402

100PF

NOSTUFF

C26411

2

10%

6.3V402CERM-X5R

0.47UF

C26401

2

CRITICAL

5%

50VCERM402

18PF

2

4025%

18PF

C26201

2

6.3V20%

10UF

603

C26041

2

0.01UF

CERM16V402

C26051

2

100PF

CERM50V4025%

C26061

2

40210%

CERM

0.01UF

C26001

100PF

C26011

C26561

C26551

2

QFN USX2061 OMIT

U2600

25

13171921

12161820

35

26

24222811

12346789

303127

402MF

12K

1/16W1%

CRITICAL

R26001

C26151

2

1UF

X5R10%

402

C26161

2

MF-LF5%

402

10K

R26201

2

0.1UF

X7R-CERM16V402

C26171

1UF

40210%

C26181

2

0.1UF

40210%

X7R-CERM

2

6.3VX5R20%

2

0.1UF

40210%

0.1UF

2

X7R-CERM40210%

C26111

2

0.1UF 0.1UF

40210%

C26121

2X7R-CERM16V

0.01UF

CERM16V402

C26131

2

0.01UF

CERM16V402

C26141

2

18

5%

1/16W402

10K

MF-LF4025%

R26061

2

10K

MF-LF4025%

R26071

2

HUB1_NONREM0_1

4021/16W5%

10K

R26031

C26671

2

0.01UF

40210%

CERM

C26641

2

X5R10%

1UF

C26661

2X7R-CERM10%

402

0.1UF

C26651

2

0.01UF

10%

40216VCERM

C26631

2

0.1UF

X7R-CERM16V402

C26621

2X7R-CERM

0.1UF

10%

402

C26611

2

0.1UF

10%

40216VX7R-CERM

R26701

2

12K

4021%

MF

CRITICAL

1/16WR26501

2

18 94

QFN OMIT USX2061

U2650

25

13171921

12161820

35

26

24222811

12346789

303127

10%

0.1UF

402X7R-CERM

220%

6.3VX5R

2

0.1UF

16V402X7R-CERM

2603

C26701

25%

50VCERM

10K

5%

R26571

2402

10K

MF-LF5%

R26561

2MF-LF

100PF

5%

C26511

CERM

0.01UF

C26501

2

10UF

6.3V60320%

X5R

C26541

HUB1_NONREM1_1,HUB1_NONREM0_0HUB1_2NONREM

HUB1_NONREM1_0,HUB1_NONREM0_0HUB1_ALLREM

HUB1_NONREM1_0,HUB1_NONREM0_1HUB1_1NONREM

PP3V3_S3

MIN_LINE_WIDTH=0.4MMPPUSB_HUB1_VDDPLL3V3VOLTAGE=3.3V

USB_T29A_N PP3V3_S3

PP3V3_S3 PP3V3_S3

USB_HUB2_RBIAS USB_HUB2_VBUS_DET

USB_HUB2_TEST

USB_TPAD_P

USB_HUB2_CFG_SEL1 USB_HUB2_CFG_SEL0 USB_HUB2_NONREM1

NC_USB_HUB2_PRTPWR3 NC_USB_HUB2_PRTPWR2

USB_TPAD_N USB_BT_P

USB_HUB2_NONREM0 USB_HUB_RESET_L

USB_HUB2_UP_P

NC_USB_HUB2_OCS2 NC_USB_HUB2_PRTPWR4

PP3V3_S3

USB_HUB1_NONREM0 USB_HUB1_NONREM1

USB_HUB2_XTAL2 USB_HUB2_XTAL1

USB_HUB1_XTAL1

USB_EXTB_OC_L USB_HUB1_CFG_SEL1

TP_USB_HUB2_OCS1 TP_USB_HUB2_PRTPWR1

USB_HUB1_UP_N USB_EXTC_OC_L TP_USB_HUB1_OCS1 NC_USB_HUB1_PRTPWR4

USB_EXTA_N USB_EXTA_P

USB_EXCARD_P USB_EXCARD_N

USB_HUB2_UP_N USB_EXTA_OC_L

NC_USB_HUB1_OCS2

NC_USB_HUB1_PRTPWR2 TP_USB_HUB1_PRTPWR1 USB_EXTC_P

USB_EXTC_N

EXCARD_OC_L

USB_HUB1_UP_P USB_HUB1_XTAL2

USB_BT_N

PPUSB_HUB2_VDD1V8MIN_LINE_WIDTH=0.4MMVOLTAGE=1.8V

VOLTAGE=1.8VMIN_LINE_WIDTH=0.4MMPPUSB_HUB1_VDD1V8PLLMIN_NECK_WIDTH=0.11MMVOLTAGE=1.8VMIN_LINE_WIDTH=0.4MMPPUSB_HUB1_VDD1V8MIN_LINE_WIDTH=0.4MM

VOLTAGE=3.3VPPUSB_HUB1_VDDA3V3

PPUSB_HUB2_VDDA3V3MIN_LINE_WIDTH=0.4MMVOLTAGE=3.3VMIN_NECK_WIDTH=0.2MM

PPUSB_HUB2_VDDPLL3V3MIN_LINE_WIDTH=0.4MMVOLTAGE=3.3V

PPUSB_HUB2_VDD1V8PLLMIN_LINE_WIDTH=0.4MMVOLTAGE=1.8VMIN_NECK_WIDTH=0.11MM

USB_HUB1_VBUS_DET USB_HUB1_RBIAS USB_T29A_P

Trang 25

OUT

OUTOUT

IN

OUTOUT

25MHZ_C25MHZ_B25MHZ_A

X1X2

VDD_RTC_OUTTHRMGND32KHZ_A

PAD

NCNC

IN

D

SG

BRANCHREVISION

D

R

SHEETPAGE TITLE

3 4

5 6

7 8

D

B

PCH Reset Button Ethernet WAKE# Isolation

VDDIO_25M_A: SB power rail for XTAL circuit.

VDDIO_25M_B: Ethernet power rail for XTAL circuit.

VDDIO_25M_C: T29 power rail for XTAL circuit.

NOTE: VDD_25M must be powered if any VDDIO_25M_x is powered.

to reduce VBAT draw.

No Coin-Cell: 3.3V S5

For SB RTC Power

APN:359S0178 VBAT and +V3.3A are

No bypass necessary

T29 XTAL Power

Buffered CPU reset

VTT voltage divider on CPU page

Coin-Cell & G3Hot: 3.42V G3Hot

No Coin-Cell: 3.42V G3Hot (no RC)

Buffered

Series R is R3803

Note: Based on K91/K92 layout, ENET,AP and BKLT are moved to Buffered reset

System RTC Power Source & 32kHz / 25MHz Clock Generator

internally ORed to

NOTE: 30 PPM crystal required

Coin-Cell & No G3Hot: 3.3V S5 Coin-Cell: VBAT (300-ohm & 10uF RC)

ENET_MEDIA_SENSE ISOLATION CIRCUIT

0

4021/16W

21R2883

MF-LF4021/16W335%

21R28815%

402MF-LF331/16W

6 25 47 88 95

45

31

21R2856PLACE_NEAR=U1800.P53

MF20122

21R28551/20W201

22PLACE_NEAR=U1800.N52

R2871

05%

4021/16W

5%

2011/20WMF22

23

21R2889

XDP

4021K

MF-LF

20%

2

1C288010VCERM4020.1UF

541

23U2880SC70-HFMC74VHC1G08 CRITICAL

MF-LF2

1R28805%

1/16W100K402

32

16 95

21R2859PLACE_NEAR=U1800.P48

2011/20WMF

225%

18

25 88

21R28875%

402

01/16WSILK_PART=SYS RESET

2

OMIT

MF-LF4025%

01/16W

Q2830

SSM3K15FVSOD-VESM-HF

10K

MF-LF402

402-1

10V0.1UF

2

1C282020%

402

10V

CERM2

1C2822

0.1UF

402CERM

CRITICAL

3414611

U2800

TQFNSLG3NB148V

2

1R2806

NO STUFF

MF-LF5%

0.1UF

402CERM

R280521

21

C2806

12PF

5%

50VCERM402

10 23 25

2

MF-LF100K1/16W5%

402

45

1 32

U2890

SC70

74LVC1G07 CRITICAL

2

1C2890

0.1UF40210VCERM

5%

21/16WR2882

MF-LF1

4020

R2888

0

MF-LF

21

5%

4021/16W

1/16W

021R2893

4025%

MF-LF

21R2800

2011/20W0

MF5%

16

PLACE_NEAR=U1800.N32:5mm

MF 201 1

2 1/20W 5%

10K

R2819

R2810

21

5

SOT563Q2810

R2811

201 1/20W 5%

SOT563Q2810

ENET_MEDIA_SENSE_EN

MAKE_BASE=TRUEPLT_RST_BUF_L

AP_RESET_L PLT_RST_BUF_L LPC_CLK33M_SMC_R

MAKE_BASE=TRUEENET_WAKE_L

LPC_CLK33M_GMUX_RMAKE_BASE=TRUE

MAKE_BASE=TRUELPCPLUS_RESET_L

PLT_RST_CPU_BUF_L

ENET_WAKE_L

SMC_LRESET_L PP3V3_S0

SYSCLK_CLK25M_SB SYSCLK_CLK25M_T29

PP3V3_T29

PP3V3_S5 PP3V42_G3H

PP1V8_S0 PP3V3_ENET

SYSCLK_CLK25M_ENET_R

SYSCLK_CLK25M_ENET SYSCLK_CLK32K_RTC

PP3V3_ENET

MAKE_BASE=TRUEGMUX_RESET_L

PP3V3_S0

PM_SYSRST_L

PLT_RST_BUF_L LPC_CLK33M_LPCPLUS_R

ENET_RESET_L_R

PLT_RESET_LMAKE_BASE=TRUE

Trang 26

A5

DQ33

VDDA10/AP

VDD

VSS

SA1VTT

VSS

DQS4*

DQS4VSS

DQ35

VSSCK0*

SA0

VSSDQ58DQ59DM7

VSS

DQ57DQ56

DQ50DQ51VSS

DQS6*

DQS6VSSDQ49DQ48

DQ43VSS

DM5VSSDQ42

SDASCLVTT

VSSEVENT*

DQ62VSS

DQ63

DQS7*

DQS7

DQ60DQ61VSS

VSSDQ55DQ54

DM6VSS

DQ53VSSDQ52

DQ47VSS

DQS5VSSDQ46DQ41

VSSDQ40DQ34VSSDQ32TESTVDD

VDD

S1*

A13CAS*

WE*

BA0VDD

VDDCK0A1A3VDD

VDDA8A9A12/BC*

VDDBA2NCVDDCKE0

VSSDQS5*

VSSDQ44DQ45

DQ39DQ38VSS

VSSDM4

VSS

DQ37DQ36VREFCA

VDDODT1NC

S0*

ODT0

BA1RAS*

VDD

CK1*

VDD

VDDA0

CK1

A2VDDA4VDD

VDDA14A15

CKE1VDD

BIIN

BIBI

BIIN

BI

BIBI

DQ16

DM3

DQ26DQ27

DQ4

DQ31DQ30DQS3DQS3*

DQ29DQ28DQ23DQ22DM2DQ21DQ20DQ15DQ14RESET*

DM1DQ13DQ12DQ7DQ6DQS0DQS0*

DQ5

DQ24DQ25

DQ19DQ18DQS2DQS2*

DQ17DQ11DQ10DQS1DQS1*

DQ8DQ9

DM0

DQ0DQ1VREFDQ

DQ3DQ2VSSVSS

BIBI

BI

BIBI

BI

BIBI

ININ

BIBI

IN

BIBI

BI

BIBI

BI

BIBI

OUTBIIN

IN

ININ

BIBI

BRANCHREVISION

D

R

SHEETPAGE TITLE

Signal aliases required by this page:

"Factory" (top) slot

F-RT-THB

J2900

9897

107

8483

119

8078

9695

9291

9086

8985

109

10879

115

101103

102104

141143

130132

140142

147149

157159

146148

158160

163165

175177

164166

174176

181183

191193

180182

192194

137135

154152

171169

188186

198

77

122116

144145

150151

172173

178179

184185

C2931

1 2

2.2UF

20%

402-LF CERM

C2930

1 2

3335

2224

3436

3941

5153

15

4042

5052

5759

6769

565817

6870

46

1618

2123

1210

2927

4745

6462

5455

8

6061

C2936

1 2 CERM

2.2UF

6.3V 20%

402-LF

C2935

1 2

10K

R2941

1

2 402

402-LF CERM 20%

2.2UF

C2940

1 2

20%

6036.3VX5R

10UF

C29001

2

10UF

X5R6.3V

20%

603

C29011

0.1UF

20%

402CERM

C29101

40210V

0.1UF

C29121

2

0.1UF

20%

CERM40210V

C29141

40210V

0.1UF

C29151

40220%

0.1UF

10V

C29161

40220%

0.1UF

10V

C29171

40220%

0.1UF

C29181

40220%

0.1UF

10V

C29191

2

0.1UF

CERM40220%

C29201

40220%

0.1UF

10V

C29211

40220%

0.1UF

10V

C29221

2

CERM40220%

0.1UF

10VC29231

2

10%

1UFX5R

C29501

2

10%

1UFX5R

C29511

2

10%

1UFX5R

C29521

2

10%

1UFX5R

C29531

Trang 27

BRANCHREVISION

D

R

SHEETPAGE TITLE

3 4

5 6

7 8

D

B

CPU CHANNEL A DQS 0 -> DIMM A DQS 0

CPU CHANNEL B DQS 6 -> DIMM B DQS 6 CPU CHANNEL A DQS 5 -> DIMM A DQS 5

CPU CHANNEL B DQS 7 -> DIMM B DQS 7

CPU CHANNEL B DQS 5 -> DIMM B DQS 5 CPU CHANNEL B DQS 4 -> DIMM B DQS 4 CPU CHANNEL B DQS 3 -> DIMM B DQS 3 CPU CHANNEL B DQS 2 -> DIMM B DQS 2

SYNC_DATE=05/14/2010SYNC_MASTER=K92_YUN

Trang 28

BI

BIBI

OUTBIIN

IN

ININ

IN

ININ

BIBI

BI

BIBI

VDDA12/BC*

VSS

DQ42DQ43

DQ48DQ49VSS

VSSDQ41DQS4*

DM5

VDDCKE1

A15A14VDDA11A7

A6VDD

A4

A2

CK1

A0VDD

VDDCK1*

VDDRAS*

BA1

ODT0S0*

NCODT1VDD

VREFCAVDD

DQ36DQ37VSS

DM4VSS

VSSDQ38DQ39

DQ45DQ44VSS

DQS5*

VSS

CKE0VDDNCBA2

CK0

VDDBA0

WE*

A13S1*

VDD

VDDTEST

DQ33DQ32

VSS

DQ34

DQ40VSS

DQ46VSSDQS5

VSSDQ47

DQ52

VSSDQ53

VSSDM6

DQ54DQ55VSS

VSSDQ61DQ60

DQS7DQS7*

DQ63

VSSDQ62

EVENT*

VSS

VTTSCLSDA

VSS

DQS6DQS6*

VSS

DQ51DQ50

A10/APVDDCK0*

DQ35VSSDQS4VSSCAS*

VDD

DM7VSSDQ56

DQ58VSS

DQ59VSS

BIBI

BIIN

BI

BIBI

BI

DQ2DQ3

VREFDQ

DQ1DQ0

DM0

DQ9DQ8

DQS1*

DQS1

DQ10DQ11

DQ17

DQS2*

DQS2

DQ18DQ19

DQ25DQ24

DQ5

DQS0*

DQS0

DQ6DQ7

DQ12DQ13

DM1RESET*

DQ14DQ15

DQ20DQ21

DM2

DQ22DQ23

DQ28DQ29

DQS3*

DQS3

DQ30DQ31DQ4

DQ27DQ26DM3

DQ16

VSS

VSSVSSVSSVSSVSS

VSSVSS

KEY

VSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSS

VSSVSS

VSS

BIBI

BI

BIBI

BI

BIBI

ININ

IN

BI

IN

ININ

BIBI

IN

BIBI

BI

BIBI

BRANCHREVISION

D

R

SHEETPAGE TITLE

B

- =PP0V75_S0_MEM_VTT_B

- =I2C_SODIMMB_SDA

BOM options provided by this page:

DDR3 DECOUPLING AND GND RETURN CAPS (SPACE EVENLY AT CONNECTOR)

Power aliases required by this page:

- =I2C_SODIMMB_SCL

(NONE)

"Expansion" (bottom) slot

CERM

C3131

1 2

C3130

1 2

1/16W

10K

402 MF-LF 5%

R3140

1

2 20%

CERM 402-LF 6.3V

2.2UF

C3140

1 2

10UF

20%

6.3V603

C31001

2

CERM40210V

0.1UF

C31101

2

0.1UF

402CERM10VC31111

2

27

0.1UF

10V402CERM20%

C31141

0.1UF

20%

402CERM

C31161

0.1UF

20%

402CERM

C31171

0.1UF

20%

402CERM

C31181

0.1UF

20%

402CERM

C31191

402CERM

0.1UF

C31201

0.1UF

20%

402CERM

C31211

0.1UF

20%

402CERM

PLACE_NEAR=J3100.75:2.54mmC3122

PLACE_NEAR=J3100.75:2.54mmC3123

1

2

27

1UF40210VC31531

21UF40210VC31521

2

11 93

402

1UF10VC31511

2402

1UF10VC31501

107

8483

119

8078

9695

9291

9086

8985

109

10879

115

101103

102104

141143

130132

140142

147149

157159

146148

158160

163165

175177

164166

174176

181183

191193

180182

192194

137135

154152

171169

188186

198

77

122116

144145

150151

172173

178179

184185

3335

2224

3436

3941

5153

15

4042

5052

5759

6769

565817

6870

46

1618

2123

1210

2927

4745

6462

5455

8

6061

C3136

1 2 402-LF 20%

CERM

2.2UF

C3135

1 2

Trang 29

IN IN

INOUT

OUT

D

SG

D

SG

D

SG

OUTIN

IN

D

SG

D

SG

IN

GD

D

R

SHEETPAGE TITLE

3 4

5 6

7 8

D

B

ISOLATE_CPU_MEM_L GPIO state during S3<->S0 transitions determines behavior of signals.

WHEN LOW: CPU 1.5V follows S0 rails, VTT ensures clean CKE transition, MEM_RESET_L isolated.

must deassert ISOLATE_CPU_MEM_L and then generate a valid reset cycle on CPU_MEM_RESET_L.

transition Rails will power-up as if from S3, but MEM_RESET_L will not properly assert Software

NOTE: In the event of a S3->S5 transition ISOLATE_CPU_MEM_L will still be asserted on next S5->S0

(*) CPU_MEM_RESET_L asserts due to loss of PM_MEM_PWRGD, must wait for software to clear before deasserting ISOLATE_CPU_MEM_L GPIO

5 0 1 1 1 0 (*) 1 1 1

6 0 1 1 1 1 1 1 1

7 1 1 1 1 1 CPU_MEM_RESET_L 1 1

MEM_RESET_L = !ISOLATE_CPU_MEM_L + CPU_MEM_RESET_L

75mA max load @ 0.75V

MEMVTT_EN = (ISOLATE_CPU_MEM_L + PLT_RST_L) * PM_SLP_S3_L

PM_MEM_PWRGD pull-up to CPU VTT rail is on CPU page

MEMVTT Clamp

1V5 S0 "PGOOD" for CPU

WHEN HIGH: CPU 1.5V remains powered in S3, VTT follows S0 rails, MEM_RESET_L not isolated.

Ensures CKE signals are held low in S3

as isolating the CPU’s SM_DRAMRST# output from the SO-DIMMs when necessary.

The circuit below handles CPU and VTT power during S0->S3->S0 transitions, as well

MF-LF

CPUMEM_S0

402R32021

402

R32101

2

CPUMEM_S0

100K

MF-LF 402 5%

1/16WR32151

2

26 28

20K

MF-LF 402 1/16W 1

2

R3216CPUMEM_S0

CRITICAL

SSM6N15FEAPE

SOT563

CPUMEM_S0Q3210 6

2 1

SSM6N15FEAPE

CPUMEM_S0Q3210

3

5 4 SOT563

CRITICAL

SOT563

SSM6N15FEAPE

CPUMEM_S0Q3205 6

2 1

72

CPUMEM_S0

10K

1/16W 5%

402 MF-LF

R32051

5 4

1/16W 5%

100K

402

CPUMEM_S0R32511

2 1

MF-LF

10

5%

603 1/10W

CPUMEM_S0R32501

2

MF-LF 5%

402

1 0 2

R3217CPUMEM_S3

10

29

MF-LF 1%

402 1/16W

3

4

MF-LF 5%

0.001UF

C32201 2

16V

0.1UF

CPUMEM_S0C3216

Trang 30

V+

V-IN

RESET*

A0A1A2

SCLSDA

P0P1P2

P5P6P7

P3P4

THRM

VCC

GNDPAD

NC

INBI

VDD

VOUTDVOUTCVOUTBVOUTASCL

SDAA0A1

GND

INBI

3 6

BRANCHREVISION

D

R

SHEETPAGE TITLE

GPU Frame Buffer (1.8V, 70% VRef)

Page Notes

C MEM A VREF CA

+61uA - -61uA (- = sourced)

MEM VREG MEM B VREF DQ

0.75V (DAC: 0x3A) 0.000V - 1.501V (0x00 - 0x74) +3.4mA - -3.4mA (- = sourced) 0.300V - 1.200V (+/- 450mV)

Addr=0x30(WR)/0x31(RD)

RST* on ’platform reset’ so that system

NOTE: Margining will be disabled across all soft-resets and sleep/wake cycles.

1.51mV / step @ output 0.000V - 3.300V (0x00 - 0xFF)

6 D

NOTE: Must not enable more than two SO-DIMM margining buffers at once or VRef source may be overloaded.

5 D DAC Channel:

VREFMRGN - Stuffs VREF Margining

VREFMRGN_NOT - Bypasses VREF Margining

10mA max load

both at the same time!

a DAC output, cannot enable NOTE: MEMVREG and FRAMEBUF share

1.000V - 2.000V (+/- 500mV)

Required zero ohm resistors when no VREF margining circuit stuffed

watchdog will disable margining.

67

10V402CERM0.1UF

MF-LF402

R33131

2

VREFMRGN

402MF-LF5%

100K

R33151

2

UCSPMAX4253

B4

VREFMRGNUCSPMAX4253 U3303

A3

A2

A1A4B1

B4

CRITICAL VREFMRGNUCSPMAX4253 U3302

A3

A2

A1A4B1

B4

CRITICAL VREFMRGN MAX4253UCSPU3303

C3

C2

C1C4B1

B4

MAX4253 VREFMRGNUCSPU3304

A3

A2

A1A4B1

B4

CRITICAL

MAX4253 VREFMRGNUCSPU3304

C3

C2

C1C4B1

B4

200 VREFMRGN

MF-LF4021%

1/16WPLACE_NEAR=J2900.126:2.54mmR3309

VREFMRGN

402MF-LF

R3318

NONE

OMIT SHORT

NONE402NONE

R3319

25

PLACE_NEAR=J2900.1:2.54mmVREFMRGN

402MF-LF200

R3303

1/16WVREFMRGN

MF-LF402

VREFMRGN

R3305

402MF-LF1%

1/16WVREFMRGN

PLACE_NEAR=R3305.2:1mm133

R3306

VREFMRGN 0

5%

1/16W402

R33171

2

VREFMRGN 0

5%

1/16W402MF-LF

2

4021/16W

2

402MF-LF

VREFMRGN

PLACE_NEAR=R3309.2:1mm133

R3310

100K

MF-LF5%

402

VREFMRGN

1/16WR33071

2

CRITICAL VREFMRGN

QFNPCA9557

U33013

45

679101112131415

12

2

4021/16WVREFMRGN

1%

133

MF-LFPLACE_NEAR=R3311.2:1mm

R3312

VREFMRGN 100K

MF-LF4025%

1/16WR33081

U3300

910

3

67

81245

C33011

2

VREFMRGN 2.2UFCERM402-LF20%

6.3V

2

VREFMRGN 0.1UF20%

CERM402

2

0.1UF10VCERM402

VREFMRGN

2

VREFMRGN_NOT 2

DDRREG_FB

VREFMRGN_SODIMMB_DQ SMBUS_PCH_DATA

SMBUS_PCH_CLK

PP0V75_S3_MEM_VREFDQ_AVOLTAGE=0.75V

MIN_LINE_WIDTH=0.3 mm

PP0V75_S3_MEM_VREFDQ_BMIN_LINE_WIDTH=0.3 mmVOLTAGE=0.75VMIN_NECK_WIDTH=0.2 mm

VOLTAGE=0.75VMIN_NECK_WIDTH=0.2 mmPP0V75_S3_MEM_VREFCA_A

VOLTAGE=0.75VMIN_NECK_WIDTH=0.2 mmPP0V75_S3_MEM_VREFCA_B

VREFMRGN_MEMVREG_FBVREF_R

VREFMRGN_FRAMEBUF_EN

VREFMRGN_MEMVREG_BUF

VREFMRGN_CA_SODIMMB_EN VREFMRGN_CA_SODIMMA_EN PP3V3_S3

VREFMRGN_CA_SODIMMA_BUF VREFMRGN_DQ_SODIMMB_EN

VREFMRGN_MEMVREG_FBVREF VREFMRGN_SODIMMS_CA VREFMRGN_SODIMMA_DQ

Trang 31

BI

INBI

GNDTHRMIN

BI

IN

OUTOUT

OUT

QTY

BRANCHREVISION

D

R

SHEETPAGE TITLE

3 4

5 6

7 8

D

B

3V S3 WLAN FET

TPCP8102P-TYPEMOSFET

Supervisor & CLKFREG # Isolation

PLACE_NEAR=J3402.6:2.54MM

FERR-120-OHM-1.5A

0402-LF

L340812

0.1uF

40210VCERM

C34521

34

73 MF-LF

5%

10K

1/16W 402

R34511

C34511 2

23V1K-SMTPCP8102

402-1 16V

0.1UFC3450

CERMC34211 2

CERM 10V 402

0.1uFC34221 2

202122232425262728293

30

3132

3334

456789

10%

0.01UF

CERM 402

402

0.1uF

C34401

2

232K

MF-LF4021/16W1%

R34541

2

402 MF-LF 1%

0.005

CRITICAL

R3452

1234

NOSTUFF

10%

0.1UF

16V X5R-CERM 0201

NOSTUFF

10%

0.1UFC3471

1

2

NOSTUFF

0201 10%

X5R-CERM

0.1UF

16VC3473

0201

0.1UFC3477

L3470,L3471,L3473,L3474

PP3V3_WLAN_R

MIN_LINE_WIDTH=1 mm MIN_NECK_WIDTH=0.5 mm

ISNS_AIRPORT_P

P3V3WLAN_SS

USB_CAMERA_N USB_CAMERA_P

PP5V_S3

AP_RESET_L P3V3WLAN_VMON

AP_PWR_EN

AP_CLKREQ_L PP3V3_S3

PM_WLAN_EN_L

PCIE_WAKE_L

USB_CAMERA_CONN_N USB_CAMERA_CONN_P SMBUS_SMC_A_S3_SDA

MIN_NECK_WIDTH=0.2 mmPP5V_S3_ALSCAMERA_F

MIN_NECK_WIDTH=0.4 mm MIN_LINE_WIDTH=1 mmPP3V3_WLAN_F

PP3V3_S3 SMBUS_SMC_0_S0_SDA

AP_RESET_CONN_L PCIE_AP_D2R_PI_P

AP_CLKREQ_Q_L

PCIE_CLK100M_AP_P PCIE_CLK100M_AP_CONN_N

PCIE_CLK100M_AP_CONN_P PCIE_AP_D2R_PI_N

Trang 32

NC

NCNC

OUT

NCNC

DET_OUT

DET_IN RST_IN*

IN

THRML_PADRCLKEN

GND

NC4NC3NC2NC1

VOUT1P5

CPPE*

PERST*

NC0OC*

SYSRST*

STBY*

AUXOUTVOUT3P3VIN1P5

BRANCHREVISION

D

R

SHEETPAGE TITLE

B

DETECT-CHANGED PCH GPIO LATCH CIRCUIT

R3514 and R3512 mutually exclusive when R3511 is NOT STUFFED.

Must STUFF R3512 and NOSTUFF R3514

10ms regardless of RST_IN# state.

Otherwise RST_OUT# follows RST_IN#

deasserts for >80ms, then asserts for When ENET_LOW_PWR deasserts, RST_OUT#

to bypass reset logic DLY block is 20ms nominal

OUTPUT DECOUPLING

(IPU) (IPU)

10uFC35051 2

0.1UFC35021 2

PLACE_NEAR=J3500.3:4mm

DLP0NSL3502

34

20%

603 6.3V

10uF

X5R

C35031 2

PLACE_NEAR=J3500.19:4mm

L3503

34

0.1uFC35001 2

U3551

74HC1G00GWDG SC70-5

CRITICAL

502250-8627F-RT-SMJ3500

1

10 11 12 13 14 15 16 17 18 19

2

20 21 22 23 24 25 26 27

28

29

3 4 5 6 7 8 9

2 1

R3504OMIT

NONE NONE NONE 402

SHORT

2 1

R3503

SHORT

OMIT

NONE NONE NONE 402

2 1

R3502OMIT

SHORTNONE NONE NONE 402

0

MF-LF 5%

402 1/16W

R3505

25

36 R3514

2

1/16W5%

MF-LF402

1/16W21

MF-LF

NOSTUFFR3512

0

5%

402

C3510402-1

21

10V1UF10%

5 9

4

32

7

6

8

TDFNSLG4AP014V

1 CRITICAL U3511

10 9

4 5 13 14 16

19

8

18

20 1 6

21

12 2

11 3

10uF

603 20%

X5R 6.3VC35351 2 CERM 20%

402

0.1uFC35341 2

603

10uF

20%

6.3V X5R

C35311 2 CERM 20%

402

0.1uFC35301 2

20%

2

1C35500.1uF

402 CERM 10V

2

1R35611%

1/16W 402

100K

2

1C35600.1uF

402 10V CERM

16V 402-1

0.1UF

10%

X5R

C35011 2

C2 A2 C1 B1U3561

BGA SN74LVC1G04YZPR

6.3V 20%

603

10uFC35041 2

5 4 1 2 3

U3560

SC70-5 74HC1G00GWDG

SYNC_DATE=07/27/2010SYNC_MASTER=K92_ERIC

ExpressCard Connector

EXCARD_CPUSB_L

EXCARD_CLKREQ_LEXCARD_RCLKEN

EXCARD_CLKREQ_CONN_L

PP3V3_S0

EXCARD_CLKREQ_CONN

PCIE_EXCARD_R2D_C_PPCIE_EXCARD_R2D_C_NPCIE_CLK100M_EXCARD_PPCIE_CLK100M_EXCARD_N

USB_EXCARD_PUSB_EXCARD_N

PCIE_EXCARD_R2D_PPCIE_EXCARD_R2D_NPCIE_CLK100M_EXCARD_CONN_PPCIE_CLK100M_EXCARD_CONN_N

EXCARD_RESET_R_L

PP3V3_S0_EXCARD_R

MIN_NECK_WIDTH=0.2mm VOLTAGE=3.3V

EXCARD_CPPE_L

EXCARD_CP

PCIE_EXCARD_D2R_NPCIE_EXCARD_D2R_P

PCIE_CLK100M_EXCARD_CONN_PEXCARD_CPPE_L

PP3V3_S0_EXCARD_SWITCH

PLT_RESET_SWITCH_LPCIE_WAKE_LPP1V5_S0_EXCARD_SWITCHSMBUS_PCH_CLK

USB2_EXCARD_CONN_PUSB2_EXCARD_CONN_N

EXCARD_CPUSB_LSMBUS_PCH_DATAPP1V5_S0_EXCARD_SWITCHPP3V3_S3_EXCARD_SWITCHEXCARD_CLKREQ_CONN_LPCIE_CLK100M_EXCARD_CONN_N

TP_EXCARD_STBY_L

EXCARD_RCLKEN

MIN_NECK_WIDTH=0.11mm VOLTAGE=1.5V MIN_LINE_WIDTH=.6mm

VOLTAGE=3.3V MIN_LINE_WIDTH=.6mm MIN_NECK_WIDTH=0.2mm

VOLTAGE=3.3V MIN_LINE_WIDTH=.3mm MIN_NECK_WIDTH=0.2mm

EXCARD_OC_L

VOLTAGE=1.5V MIN_NECK_WIDTH=0.2mm

PP1V5_S0_EXCARD_R

MIN_LINE_WIDTH=0.6mm

EXCARD_CPPE_LPLT_RESET_SWITCH_L

SLG_ENET_RESET_OUT_L ENET_RESET_L ENET_RESET_L_R

ENET_LOW_PWR

MIN_LINE_WIDTH=0.5mm VOLTAGE=3.3V

Trang 33

OUT

INININ

OUT

OUTOUT

OUT

INOUT

IN

OUT

OUTOUT

INININ

OUT

ININOUT

OUTBI

DPSNK0_ML_LANE_3PDPSNK0_ML_LANE_3NDPSNK0_ML_LANE_2P

DPSRC0_HOT_PLUG_DET

TEST_POINT_2TEST_POINT_3

DPSNK0_HOT_PLUG_DETDPSNK0_AUX_CHNDPSNK0_AUX_CHPDPSNK0_ML_LANE_0NDPSNK0_ML_LANE_0PDPSNK0_ML_LANE_1NDPSNK0_ML_LANE_1PDPSNK0_ML_LANE_2N

TEST_POINT_0TEST_ENTHERM_DPEE_CLKEE_CS*

EE_DOEE_DIPCIE_CLKREQ_3*

PCIE_CLKREQ_2*

PCIE_CLKREQ_1*

PCIE_CLKREQ_0*

DPSNK1_ML_LANE_1PDPSNK1_ML_LANE_2NDPSNK1_ML_LANE_2PDPSNK1_ML_LANE_3NDPSNK1_ML_LANE_3P

DP_RES_1DP_RES_0DP_ATEST

DPSRC0_AUX_CHNDPSRC0_AUX_CHPDPSRC0_ML_LANE_0NDPSRC0_ML_LANE_0PDPSRC0_ML_LANE_1NDPSRC0_ML_LANE_1PDPSRC0_ML_LANE_2NDPSRC0_ML_LANE_2PDPSRC0_ML_LANE_3NDPSRC0_ML_LANE_3P

TMU_CLK_OUTTMU_CLK_IN

XTAL_25_INXTAL_25_OUT

REFCLK_100_IN_PREFCLK_100_IN_N

TDOTCKTMSTDIPCIE_RST_3*

PER_0_NPER_0_P

PET_3_PPET_3_N

PET_2_NPET_2_P

PET_1_PPET_1_N

PET_0_NPET_0_P

TEST_POINT_1

DPSNK1_ML_LANE_0N

PER_1_N

DPSNK1_ML_LANE_0PDPSNK1_ML_LANE_1N

DPSNK1_AUX_CHP

DPSNK1_HOT_PLUG_DETDPSNK1_AUX_CHN

PRT0_T29T_NPRT0_T29R_PPRT0_T29R_NT29_0_LSEOT29_0_LSOE

PRT1_T29T_PPRT1_T29T_NPRT1_T29R_PPRT1_T29R_NT29_1_LSEOT29_1_LSOE

T29_SDAT29_SCL

S_LW_LHOLD_L

OUTIN

OUT

INININ

D

R

SHEETPAGE TITLE

3 4

5 6

7 8

SNK1 AC Coupling SNK0 AC Coupling

NOTE: All unused LSOE/EO pairs should be aliased

(T29_SPI_CLK) (T29_SPI_CS_L)

together Other signals okay to float (TP/NC).

DEBUG: For monitoring clockDEBUG: For monitoring current/voltage

1/16W402

2

CERM50V5%

CERM402

BYPASS=U3600.Y19::5.08mm

0.01UF

C36861

2

80

05%

1/16W402

R36251

R36321

W2V1

V5

Y9AA10Y7AA8Y5AA6Y3AA4

U6V7

U4

U14V15U12V13U10V11U8V9

U16W16

V3

Y11AA12Y13AA14Y15AA16Y17AA18

L2N2

P1M1

B21

A20

M17K17

P3N4M3L4

K1J2K3J4

T19V19

M19P19

H19K19

D19F19

E6

T21V21

M21P21

H21K21

D21F21

C2C4A4A6

C6C8A8A10

C10C12A12A14

C14C16A16A18

E16

G16E14

J6K5

G6H5

G4H3

G2H1

F5F3

R2T3

T1

E4P5N6M5L6A2

R4

E2U2

F1

P17R16

1/16W402

05%

MF-LF

2

3.3K5%

402MF-LF

R36931

2

MF-LF402

10K

5%

1/16WR36981

2

10KMF-LF5%

R36221

10K5%

1/16WR36211

2

X5R16V

1.0K

2

0.1uF 16VX5R

0.1uF

16VX5R

0.1uF

40210%

0.1uF

16V10%

0.1uF X5R

16V10%

0.1uF

16VX5R

0.1uF

16V10%

0.1uF

16VX5R

0.1uF

16VX5R

0.1uF

16V10%

4021K

2

MF-LF402

M95160MLP2KX8-1.8V U3690

65

7

2

1

98

43

MF-LF4023.3K

R36911

T29_LSEO_LSOE3 T29_LSEO_LSOE3

T29_LSEO_LSOE2 T29_LSEO_LSOE2

PCIE_T29_R2D_C_N<2>

PP3V3_T29

T29_SPI_MISO

I2C_T29_SCL I2C_T29_SDA

T29ROM_HOLD_L

T29ROM_WP_L

T29_SPI_CS_L T29_SPI_CLK

TP_T29_MONDC1

SYSCLK_CLK25M_T29

TP_T29_MONOBSP TP_T29_MONOBSN

PCIE_T29_R2D_P<2>

PCIE_T29_R2D_P<1>

T29_RESET_L T29_RSENSE

T29_RBIAS

TP_T29_PCIE_RESET0_L TP_T29_PCIE_RESET2_L TP_T29_PCIE_RESET1_L TP_T29_PCIE_RESET3_L JTAG_ISP_TDI

JTAG_T29_TMS JTAG_ISP_TCK JTAG_ISP_TDO

PCIE_CLK100M_T29_N PCIE_CLK100M_T29_P

TP_T29_XTAL25OUT SYSCLK_CLK25M_T29_R

T29_TMU_CLK_IN T29_TMU_CLK_OUT

T29_DP_ATEST T29_DP_RES

T29_GPIO<2>

T29_RSVD

T29_THERMD_P T29_TEST_EN TP_T29_TEST_POINT_0

T29_TEST_POINT_3 TP_T29_TEST_POINT_2

Trang 34

VDD3P3DP_PLL

VCC3P3_DP_TXRXBIAS

VSSDP

VSSDPVSSDP

VSSDPVSSDPVSSDP

VSSDPVSSDP

VSSDPVSSDPVSSDP

VSSDPVSSDP

VSSDP

VSSDP_PLLVSSDP

VSSPEVSSPE

VSSPEVSSPEVSSPE

VSSPEVSSPE

VSSPEVSSPEVSSPE

VSSPEVSSPE

VSSPEVSSPEVSSPE

VSSPEVSSPE

VSSPEVSSPEVSSPE

VCC1P0VCC1P0

VCC1P0VCC1P0VCC1P0

VCC1P0VCC1P0

VCC1P0_PEVCC1P0_PEVCC1P0_PEVCC1P0_PEVCC1P0_PE

VDD1P0_DP_TXRXVDD1P0_DP_RX1

VDD1P0_DP_TXRX

VDD1P0_DP_PLL

VSSVSSVSS

VSSVSS

VSSPE

VSSPEVSSPEVSSPE

VSSPEVSSPE

VSSPEVSSPEVSSPE

VSSPEVSSPE

VSSPEVSSPEVSSPE

VSSPEVSSPEVSSPEVSSPEVSSPEVSSPEVSSPEVSSPE

VSSPEVSSPE

VCC1P0_PEVCC1P0_PE

VCC3P3VCC3P3VCC3P3VCC3P3_T29VCC3P3_T29

BRANCHREVISION

D

R

SHEETPAGE TITLE

B

Current numbers from Vendor slide (<REDACTED> power measure 1.ppt), emailed 6/21/2010, TDP @ 90C.

0-ohms are placeholders for now, replace

2100 mA (Single Port)

2250 mA (Dual Port) EDP: 3000 mA

135 mA (Single-Port)

with proper values after characterization.

152 mA (Dual-Port) EDP: 200 mA

0402

FERR-120-OHM-1.5A L3730

6.3V1UFCERM40210%

C37121

2

1UF6.3V10%

402CERM

C37131

402CERM1UF

C37141

2

CERM20%

2.2UF402-LF

C37301

2

6.3V10%

402CERM1UF

C37201

10%

402CERM1UF

C37211

10%

402CERM1UF

C37221

2

1UFCERM40210%

6.3VC37081

210UF

X5R20%

402CERM1UF

10%

402CERM1UF

2

402CERM1UF

10%

402CERM1UF

21UF

CERM40210%

6.3VC37091

2

2.2UF402-LF

2

CERM20%

2.2UF402-LF

2

FERR-120-OHM-1.5A0402

L3770

CERM10%

4021UF

1UF40210%

1/16W

R3750

1UFCERM40210%

6.3V

26036.3V20%

10UFX5R

C37461

20%

60310UF

C37471

2

6.3V10%

4021UFCERM

C37101

2

1UFCERM40210%

6.3VC37111

2

FCBGA OMIT_TABLE CRITICAL

T29

U3600

H9H11H13K9K11K13M9M11M13H15K15M15E8E10E12G14

H7M7K7

P7R6P9P11

P15

G10G12

R14

R8R10R12

P13

G8J8

N10N12N14

J10J12J14L8L10L12L14N8

T5T7

W10W12W14Y1AA2

T9T11T15T17V17W4W6W8

T13B1

B3

C18C20D1D3D5D7D9D11D13D15B5

D17E18E20F7

F9F11F13F15F17G18B7

G20J16J18J20L16L18L20N16N18N20B9

R18R20U18U20W18W20

B11B13B15B17B19

1UF6.3V10%

402CERM

C37051

40210%

6.3V1UF

C37061

40210%

6.3V1UF

C37071

PP1V05_T29_VDD_DPVOLTAGE=1.05V

MIN_NECK_WIDTH=0.2 mmPP1V05_T29

PP3V3_T29_DPBIASVOLTAGE=3.3VMIN_NECK_WIDTH=0.2 mm

PP3V3_T29_PLLMIN_LINE_WIDTH=0.4 mmVOLTAGE=3.3V

PP3V3_T29_DPMIN_LINE_WIDTH=0.4 mmVOLTAGE=3.3V

Trang 35

ONVIN

GNDVOUT

ONVIN

IN

VDD

SENSE+

ONVIN

BRANCHREVISION

D

R

SHEETPAGE TITLE

3 4

5 6

7 8

D

B

<Ra>

Max Current = 1A Vout = 15.47V Freq = 300KHz

Page Notes

- =PPVIN_SW_T29BST (8-13V Boost Input)

- =PP18V_T29_REG (18V Boost Output)

- =PP1V05_T29_FET (1.05V FET Output)

U3810 & U3815/U3816

3.3V T29 Switch

Load Switch

18 mOhm Typ TPS22924C

Max Output: 2A per IC

DLY = 60 ms +/- 20%

Max Current = 1.7A (85C)

R(on)

Part Type

U3816.A2:

Pull-up provided by SB page.

Platform (PCIe) Reset

Open-Drain GPIO

1.05V T29 Switch

Supervisor & CLKREQ# Isolation

Vout = 1.6V * (1 + Ra / Rb)

<Rb>

GND inside package, SGND shorted to

no XW necessary.

Max Vgs: 10V

<R1>

add property on another page

Voltage not specified here,Rds(on): 46mOhm @ 4.5V Vgs

Vds(max): -30V SI8409DB:

Vgs(max): +/-12V

Id(max): 3.7A @ 70C Vgs(th): -1.4V

<R2>

- =PP3V3_T29_FET (3.3V FET Output)

- =PP3V3_T29_P3V3T29FET (3.3V FET Input)

- =PP1V05_T29_P1V05T29FET (1.05V FET Input)

- =T29_RESET_L

- =T29_CLKREQ_L

- =PP3V3_S0_T29PWRCTL

T29BST:Y - Stuffs 18V boost circuitry.

UVLO = 4.55V (falling), 4.95 (rising) UVLO(rising) = UVLO(falling) + (2uA * R1) UVLO(falling) = 1.22 * (R1 + R2) / R2

A1B1

CSP

CRITICAL TPS22924 U3815

C2

A2B2

A1B1

33

1/16W402MF-LF5%

8

42

100K

R38071

2

19

CRITICALCSP

A1B1

T29BST:Y

C38801

2

330K

MF-LF4025%

T29BST:Y

R38871

2

SSM6N37FEAPESOT563

T29BST:Y

Q38883

54

SOT563SSM6N37FEAPE

T29BST:Y

Q38886

21

1%

41.2K

MF-LF4021/16W

T29BST:Y

210%

402CERM-X5R6.3V

0.33UF

T29BST:Y

C38941

2

330K

MF-LF4025%

T29BST:Y

R38881

2

45 91

50VCERM

1%

4021/16W15.8K

2

T29BST:Y

120650V

4.7UF

10%

T29BST:Y

C38951

2 X7R-CERM

50VX7R-CERM1206

4.7UF

10%

T29BST:Y

C38971

2

CERM402

NO STUFF 100PF

5%

50VC38871

280510V

2

4.7UF T29BST:Y

BGA

SI8409DB

CRITICAL T29BST:Y

L3895

NO STUFF

4025%

100PF

CERM50VC38881

2

LT3957

QFN

CRITICAL T29BST:Y

63

27 38

T29BST:Y 137K1

2R3895

402

12SM

PLACE_NEAR=C3895.1:2 mmXW3895

1/16W402MF-LF

T29BST:Y

2DFLS230L

POWERDI-123

CRITICAL T29BST:Y

D3895

1

2

120610%

0.001UF

40250V

T29BST:Y

C38991

2

10%

0.01UF

40250V

T29BST:Y

C38931

2

T29 Power Support

SYNC_MASTER=T29_REF SYNC_DATE=11/09/2010

MIN_NECK_WIDTH=0.25 mmMIN_LINE_WIDTH=0.5 mmDIDT=TRUE

SWITCH_NODE=TRUET29BST_BOOST

T29BST_SNS2

PP15V_T29 PPBUS_G3H

GND_T29BST_SGNDVOLTAGE=0V

MIN_NECK_WIDTH=0.25 mmMIN_LINE_WIDTH=0.5 mmT29_A_HV_EN

SMC_DELAYED_PWRGD

T29BST_SS T29BST_RT T29BST_INTVCC

T29BST_SHDN_DIV

T29BST_PWREN_DIV_L

PPVIN_SW_T29BSTMIN_LINE_WIDTH=0.5 mmMIN_NECK_WIDTH=0.25 mm

T29BST_VC T29BST_EN_UVLO

T29BST_FBX T29BST_VSNS

Trang 36

INOUTOUT

BIBIBIBIBI

NC

BI

BIBI

OUT

ININ

INOUT

CS*

SO

SPD100LED*/SERIAL_DOTRAFFICLED*/SERIAL_DI

TRD0_P

TRD1_PTRD0_N

TRD1_N

TRD2_NTRD2_P

TRD3_NTRD3_P

PCIE_RXD_NPCIE_RXD_P

PCIE_REFCLK_NPCIE_REFCLK_P

CR_DATA0CR_DATA1

CR_DATA3CR_DATA2

CR_DATA4CR_DATA5CR_DATA6

CE*/MS_INS*

CR_DATA7

CR_LED/ALE

XD_DETECTTHRM_PAD

XTALIXTALORDAC

CR_WP*/XD_WP*

OUT

BIBIBI

BIBI

SI

GNDVCC

3 6

BRANCHREVISION

D

R

SHEETPAGE TITLE

B

281mA (1000base-T max power, Caesar IV)

Must isolate from PCIe WAKE# if PHY N-channel FET isolation suggested.

=ENET_WAKE_L to PCIE_WAKE_L.

(Required ROM size TBD)

(IPD)

No MS (Memory Stick) Insert feature needed.

internal SR IPD has a race condition.

NOTE: "IPx" == Programmable pull-up/down

SD_DETECT can only be used active low due to errata

LR_OUT/GPIO1 is used as a 3.3V/1.8V internal LDO out for

Current Limiting

(OD)

o

(OD)

NOTE: ENETM requires SI pull-down instead of SO.

PHY Non-Volatile Memory

If PHY is always powered then alias

is powered-down in S3/S5 Standard

ROM contains MAC address, PCIe config

???mA (1000base-T, Caesar V)

ROM is used then the straps must change.

If enabled: VDD/VDDP connect to =PP3V3_S3_ENET_PHY (add bypassing), LX connects to inductor.

Internal 1.2V Switching Regulator pins.

Required for proper PHY operation.

info as well as code for Bonjour proxy.

(See note) WAKE#

SR_DISABLE must be pulled down to use

If disabled: Okay to float VDD, VDDP & LX pin VFB must always connect to =PP1V2_S3_ENET_PHY.

the card reader on-chip I/O.

Connect only to U3900 pin 20.

BCM57765 supports both active-levels for WP.

NOTE: Pull-down on SO plus internal pull-ups on

VDD for Card Reader I/O Special Star routing needed on these pins Decoupling on Pg 37.

BCM57765 ENET SR pins are internal 1.2V switching regulator See note for SR_DISABLE below.

Resistor

2

1C392140216VX7R-CERM0.1UF

10UFX5R10%

21

6.3VC3935

CRITICAL

2

X5R-CERM60310%

4.7UF6.3V

21

L3925SM

CRITICAL FERR-600-OHM-0.5A2

10%

6.3V603X5R-CERM4.7UF

21

L3920

SM

CRITICAL FERR-600-OHM-0.5A2

1L3900

CRITICAL

SMFERR-600-OHM-0.5A

21

L3905

FERR-600-OHM-0.5A CRITICAL

SM

2

1R39421/16W

1K

4025%

40216V

0.1uF

21

X5R10%

0.1uF

402

C3956

21

MF-LF4025%

4.7K

1/16WR3941

2

1R39405%

2

4.7K4025%

MF-LFNOSTUFF

14.7UF603C3970

402X7R-CERM

0.1UF10%

2

402X7R-CERM

2

16V0.1UF

25

2

1R3910MF-LF402

58

20 56 62

5049

4647

4443

4041

106

33343130

262112

5%

R3980

8

21

L3910

FERR-600-OHM-0.5A CRITICAL

8

2

1C3900402

2

40216VX7R-CERM

0.1UF10%

2

X7R-CERM16V0.1UF10%

402

2

60310%

4.7UFX5R-CERM6.3V1

C393110%

4020.1UFX7R-CERM 2

21

L3930

CRITICAL

SMFERR-600-OHM-0.5A

2

1C391510%

6.3VX5R-CERM6034.7UF

2

10%

402X7R-CERM0.1UF

5

8

12

3

4

AT45DB011D OMITSOIC-8S1U3990

2

1/16W5%

402MF-LF4.7K

2C3936X7R-CERM40210%

0.1UF1

2

10.1UFX7R-CERM10%

402C3926

NC_BCM57765_SPD100LED_L NC_BCM57765_TRAFFICLED_L

PCIE_ENET_D2R_C_P

PCIE_ENET_R2D_N PCIE_ENET_R2D_P

PCIE_CLK100M_ENET_N PCIE_CLK100M_ENET_P

ENET_RESET_L ENET_CLKREQ_L ENET_WAKE_R_L ENET_LOW_PWR

TP_SDCONN_DATA<5>

NC_CE_L_MS_INS_L

TP_SDCONN_WP TP_ENET_CR_PWREN

BDM57765_SR_DISABLE SYSCLK_CLK25M_ENET

BCM57765_RDAC

ENET_VMAIN_PRSNT

PCIE_ENET_R2D_C_P PCIE_ENET_D2R_P

PP3V3_S0

MIN_LINE_WIDTH=0.4 mmPP1V2_ENET_PHY_GPHYPLLVOLTAGE=1.2V

MIN_NECK_WIDTH=0.2 mm

VOLTAGE=1.2VMIN_NECK_WIDTH=0.2 mmPP1V2_ENET_PHY_PCIEPLL PP1V2_ENET

BCM57765_SMB_CLK BCM57765_SMB_DATA

ENET_MDI_P<1>

ENET_MDI_N<0>

PP3V3_S3_ENET_PHY_AVDDHMIN_LINE_WIDTH=0.4 mm

TP_SDCONN_CMD TP_SDCONN_DETECT_L ENET_MEDIA_SENSE ENET_MDI_N<1>

VOLTAGE=1.2VMIN_NECK_WIDTH=0.2 mmPP1V2_ENET_PHY_AVDDL

Trang 37

RXTX

BRANCHREVISION

D

R

SHEETPAGE TITLE

3 4

5 6

7 8

D

B

sides of the board

(NONE)

514-0636Place one of 0.1uf cap close to each centertap pin of transformer

mirrored on opposite

10 11 12 2

3

4 5

8 9

402 1/16W 5%

MF-LF

75

R4002 1

1/16W 5%

MF-LF

75

R4003 1

C4006 1

2 10%

402-1 X5R

0.1UF

C4004 1

2 10%

402-1 X5R

0.1UF

C4002 1

10 11 12 2

3

4 5

8 9

10%

402-1 X5R

0.1UF

C4000 1

1112

23456789

SLP2510P8CRITICAL

MIN_LINE_WIDTH=0.6 mm MIN_NECK_WIDTH=0.25 mm

ENET_BOB_SMITH_CAP

ENET_CTAP3 ENETCONN_P<2>

Trang 38

ATBUSHATBUSN

VP25

OCR_CTL_V10

VAUX_DETECT

TMSTCKREFCLKNPCIE_TXD0P

AVREGCE

CLKREQN

FW_RESET*

FW620*

JASI_ENMODE_ANAND_TREE

OCR_CTL_V12

PCIE_RXD0NPCIE_RXD0PPCIE_TXD0N

SCLSDASE

SM

TDOTPA1N

TPA2NTPA2PTPB0NTPB0PTPB1NTPB1PTPB2NTPB2PTPBIAS0TPBIAS1TPBIAS2

DS0

TPA1P

VDD33VDD10

VREG_VSSVSS

CHIP RESETSCIF

1394 PHY

NCNCNC

NC

ININ

IN

NCNC

3 6

BRANCHREVISION

D

R

SHEETPAGE TITLE

(Reserved)

NT-5

NT-17NT-16 (IPD)(OD)NT-4 (IPU)

NT-6(IPD) NT-18

(IPD) NT-21

NT-10 (IPD)

135 mA

191MF-LF1%

1/16W402

R41701

2

0.33UFCERM-X5R6.3V40210%

C41621

2

470K5%

1/16W402

2

OMIT CRITICAL

FW643BGAU4100B13

A13A11

A10L13

L2

F12E12E13

D12

K13D1J2K1

J12J13

N8N7N5N6

N4B11

N9N10

D13

L8

G2G1H1F2

N12M11M13

N13

M4N2M1M3

B8A8B5A5B3A3B9A9B6A6B4A4B7C3A2

B10

N1

E1D2

H10 J4 J5 J9 J10 K4 K5 K7D9 K8 K9 L7 K6

D10 E4 E5 E9 F4 F6

C2

G13F13

22PF

CERM5%

50V402

C4151

50V22PF

CERM5%

402

C4150

200KMF-LF1%

1/16W402

R4150

10KMF-LF5%

1/16W402

R41631

2

10KMF-LF5%

1/16W402

R41641

2

FW643_LDO 10KMF-LF5%

1/16W402

2

PLACE_NEAR=U1800.BJ36:2.54mm0.1UF

1/16W402

R41661

2

PLACE_NEAR=U1800.AU34:2.54mm16V

402-10.1UF X5R10%

0.1UF

PLACE_NEAR=U1800.AV34:2.54mm10% 16V

1UFCERM40210%

21UFCERM40210%

2

1UFCERM40210%

C41001

2

1UFCERM40210%

C41011

2

1UFCERM40210%

2

1UFCERM40210%

C41021

2

1UF10%

6.3V402

C41031

2

1UFCERM40210%

21UFCERM40210%

2

6.3V1UFCERM40210%

C41041

2

1UFCERM40210%

C41101

2

1UFCERM40210%

C41051

2

1UFCERM40210%

C41061

2

1UFCERM40210%

21UFCERM40210%

2

0.1UFCERM20%

402

2

1UFCERM40210%

C41111

2

1UFCERM40210%

C41401

1/16W402

L4130

120-OHM-0.3A-EMI0402-LF

L4135

39

120-OHM-0.3A-EMI0402-LF

L4110

CRITICAL

SM-3.2X2.5MM24.576MHZ

R4100

SYNC_DATE=10/20/2010SYNC_MASTER=K91_MLB

FireWire LLC/PHY (FW643)

VOLTAGE=1.0VMIN_NECK_WIDTH=0.2 MMPP1V0_FW_R

PP3V3_FW_FWPHY

FW_CLK24P576M_XO_R FW_CLK24P576M_XI TP_FW643_SE

PCIE_FW_D2R_P PCIE_FW_D2R_N

PCIE_FW_R2D_C_N PCIE_FW_R2D_C_P

TP_FW643_VAUX_ENABLE

FW643_TRST_L

FW643_WAKE_L FW643_REGCTL FW643_VAUX_DETECT

PCIE_CLK100M_FW_P PCIE_FW_D2R_C_P

PP3V3_FW_FWPHY

FW_CLKREQ_PHY_L

TP_FW643_TMS NC_FW643_TDI TP_FW643_TCK

PCIE_FW_R2D_P PCIE_FW_R2D_N

TP_FW643_SCIFCLK FW643_TPCPS

PP1V0_FW_FWPHY

FW643_R0 NC_FW2_TPBN

FW643_PU_RST_L

TP_FW643_SDA

FW_RESET_L

TP_FW643_SCIFDOUT TP_FW643_SCIFMC FW_CLK24P576M_XO

PPVP_FW_CPS

TP_FW643_OCR10_CTL TP_FW643_AVREG TP_FW643_FW620_L TP_FW643_SM

TP_FW643_VBUF

FW_PORT1_TPA_P FW_PORT1_TPA_N NC_FW2_TPAN NC_FW2_TPAP NC_FW0_TPBN FW_PORT1_TPB_N FW_PORT1_TPB_P NC_FW2_TPBP NC_FW0_TPBIAS NC_FW2_TPBIAS

FW643_REXT

FWPHY_DS2

FWPHY_DS0 FWPHY_DS1

FW_P1_TPBIAS NC_FW0_TPBP

NC_FW0_TPAP NC_FW0_TPAN

FW643_SCL TP_FW643_SCIFDAIN

PP1V0_FW_FWPHY_AVDDVOLTAGE=1.0V

PP3V3_FW_FWPHY_VDDAVOLTAGE=3.3V

MIN_LINE_WIDTH=0.4 MMVOLTAGE=3.3VPP3V3_FW_FWPHY_VP25

Trang 39

S

ININ

GD

S

OUT

IN

SG

ONVIN

GNDVOUT

ONVIN

IN

OUT

INOUTIN

IN

VDD

SENSE+

D

R

SHEETPAGE TITLE

3 4

5 6

7 8

D

B

FireWire Port 5K Pull-Down Detect

All FireWire devices require 5K pull-down on TPB pair.

Q4262 provides for fast-off of Q4260 in S0 (Late-VG detection)

Supervisor & CLKREQ# Isolation

Pull-up provided by another page.

3.3V FW Switch

1.0V FW Switch

Part

U4201 & U4202

When PHY is powered, FW_5KPD_DET_L acts as legacy PME# signal.

LSI FireWire PHY requires 1.0V.

To avoid an extra power supply, 1.05V is used with a series R

Max Current = 1.7A (85C)

Load Switch

50 mOhm Max

FireWire Port Power Switch

2) FW643 WAKE# (PME#) when PHY is powered.

- =FW_CLKREQ_L

- =FW_PME_L

Pull-up provided on another page.

1) 5K Pull-down Detect when FW_PWR_EN is low.

Host can detect as load on TPBIAS signal.

Current source only active when FW_PWR_EN is low.

- =PP3V3_FW_FWPHY (PHY 3.3V Power)

- =PP3V3_FW_FET (3.3V FET Output)

- =PP1V05_FW_P1V0FWFET (1.0V FET Input)

- =PP1V0_FW_FWPHY (PHY 1.0V)

- =PP3V3_S0_FWPWRCTL

Max Output: 2A R(on) 18 mOhm Typ

TPS22924C

to reduce voltage.

Type DLY = 60 ms +/- 20%

Dual-purpose output:

- =PP3V3_FW_P3V3FWFET (3.3V FET Input)

- =PPBUS_FW_FET (FW VP FET Output)

- =PPBUS_S5_FWPWRSW (FW VP FET Input)

FireWire PHY WAKE# Support

40225V0.1UF

21/16W

5%

402MF-LF300K

R42601

2

1/16W5%

402MF-LF470K

R42611

SOT563BC847CDXV6TXG

CRITICAL Q4270

26

1

SOT563BC847CDXV6TXG

CRITICAL Q4270

53

4

MF-LF5%

4021/16W330K

R42701

2

56KMF-LF402

2PLACE_NEAR=C4360.1:2 mm

MF-LF4025%

1K1/16W

2

CRITICAL DMB53D0UV

SOT-563Q42756

3

4

CRITICAL DMB53D0UV

SOT-563Q4276

R42761

2

NO STUFF 0.1UF

1/16W40210K

2

CRITICAL BSS8402DWSOT-363

2

CRITICALCSP

TPS22924 U4201

C2

A2B2

A1B1

40

402MF1/16W1%

0.549

R42021

2

38

1/16W4025%

10K

MF-LF

R42832

SM

Q4260

1256

34

CRITICAL

SSM3K15FV

SOD-VESM-HFQ4261

3

402CERM10%

1UF

2

CERM10%

8

42

4025%

MF-LF

100K

R42901

PP3V3_FW_FWPHY

FWPORT_PWREN_L PP3V3_S0

FWPORT_FASTOFF_L

MIN_NECK_WIDTH=0.25 mmPPBUS_FW_FWPWRSW_FMIN_LINE_WIDTH=0.5 mmVOLTAGE=12.6V

FWPORT_PWR_EN

FW_RESET_R_L

MIN_LINE_WIDTH=0.4 mmVOLTAGE=1.05VPP1V05_FW_FET PP1V05_S0

FW_CLKREQ_L

PP3V3_S0

PP3V3_FW_FWPHY

FWPORT_PWREN_L_DIV PPBUS_G3H

Trang 40

TPA+ TPA(R) VG

VP TPB+

TPB(R) TPB-

TPA-CHASSIS GND

OUTOUTOUT

BIBIBIBI

IN

BIBIBIBIIN

3 6

BRANCHREVISION

D

R

SHEETPAGE TITLE

B

- =PPVP_FW_PHY_CPS_FET (From Port)

- =PPVP_FW_PHY_CPS (To PHY)

- =PP3V3_FW_FWPHY

- =PP3V3_S0_FWLATEVG

NOTE: This page is expected to contain

Page Notes

FW643 has internal leakage path from TPCPS pin to VDD33.

FireWire PHY Config Straps

Configures PHY for:

- Port "1" Bilingual (1394B) (All unused port signals TP/NC)

- =PPVP_FW_PORT1

To FW643 From Port

Disabled per LSI instructions

Unused FireWire Ports

FireWire TPA/TPB pairs to their

appropriate connectors and/or to

FireWire Design Guide (FWDG 0.6, 5/14/03)

FET blocks current to TPCPS until VDD33 is powered.

AREF needs to be isolated from all

beta-only device, there is no DC path

BREF should be hard-connected to logic

Note: Trace PPVP_FW_PORT1 must handle up to 5A

(FW_PORT1_TPB_N)

local grounds per 1394b spec

ground for speed signaling and connection between them (to avoid ground offset issue) When a bilingual device is connected to a

TPA-BILINGUAL

TPB+

VP NC TPB<R>

TPB-INPUTOUTPUT

1394b implementation based on Apple

properly terminate unused signals.

the necessary aliases to map the

402MF-LF56.2

2

SIGNAL_MODEL=EMPTY

56.2MF-LF4021%

1/16WR43621

2

220pFCERM4025%

25VC43641

2

56.2MF-LF402

6.3VC43601

2

1/16W1%

402MF-LF56.2

SIGNAL_MODEL=EMPTYR43601

2

PLACE_NEAR=J4310.5:2 mm

50V603-10.1uF

2

1/16W5%

4021M

PLACE_NOTE=J4310.5:2 mm

MF-LF

R43191

2

50V4020.01UFX7R

C43141

2

CRITICAL FERR-250-OHMSM

L4310

F-RT-THCRITICAL 1394B-M97 J43101

10111213

2

3

456789

10KMF-LF4021%

1/16WR43811

2

402MF-LF10K

2

10KMF-LF4021%

1/16WR43801

2

1

402MF-LF330K

2

402MF-LF470K

564

2

MF-LF402

FW_PORT1_TPB_NMAKE_BASE=TRUEMAKE_BASE=TRUEFW_PORT1_TPB_PMAKE_BASE=TRUEFW_PORT1_TPA_N

FW_PORT1_AREF

MIN_LINE_WIDTH=0.5 mmVOLTAGE=33VPPVP_FW_PORT1_FMIN_NECK_WIDTH=0.25 mmPPVP_FW

PP3V3_S0

FWPORT_PWR_EN TP_FWLATEVG_VCLMP FW_P1_TPBIAS

FW_PORT1_TPA_N FW_PORT1_TPB_P

PP3V3_FW_FWPHY

CPS_EN_L

NC_FW2_TPAN NC_FW2_TPBP NC_FW2_TPBN

NC_FW0_TPBN

NC_FW2_TPAP NC_FW2_TPBIAS

NC_FW0_TPAP NC_FW0_TPAN NC_FW0_TPBP NC_FW0_TPBIAS

MAKE_BASE=TRUENC_FW2_TPBN

NO_TEST=TRUE

NO_TEST=TRUEMAKE_BASE=TRUE

FWPHY_DS1

FWPHY_DS2 FWPHY_DS0

FWPHY_DS2MAKE_BASE=TRUE

FWPHY_DS0MAKE_BASE=TRUE

Định dạng
Số trang	105
Dung lượng	2,31 MB