99208 apple macbook pro a1386 (MBP 15MLB) schematics

APPLE INC.NONESCALE II NOT TO REPRODUCE OR COPY ITIII NOT TO REVEAL OR PUBLISH IN WHOLE OR PART I TO MAINTAIN THE DOCUMENT IN CONFIDENCENOTICE OF PROPRIETARY PROPERTY Power Block Diagram

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II NOT TO REPRODUCE OR COPY ITIII NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

I TO MAINTAIN THE DOCUMENT IN CONFIDENCENOTICE OF PROPRIETARY PROPERTY

MATERIAL/FINISHNOTED ASAPPLICABLE

SIZE

D

THIRD ANGLE PROJECTION

DIMENSIONS ARE IN MILLIMETERS

XX

X.XX

X.XXX

DO NOT SCALE DRAWING

CK APPD

DATE

ENG APPD

DATE

1 ALL RESISTANCE VALUES ARE IN OHMS, 0.1 WATT +/- 5%.

2 ALL CAPACITANCE VALUES ARE IN MICROFARADS.

3 ALL CRYSTALS & OSCILLATOR VALUES ARE IN HERTZ.

TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM

TABLE_TABLEOFCONTENTS_HEAD TABLE_TABLEOFCONTENTS_ITEM

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APPLE INC.

NONESCALE

Line InU3700

Mini PCI-EAirPort

PG 18 RGMII

HDMI OUT

DP OUT LVDS OUT

PG 44

ConnectorsCAMERA

SMCADC Fan Ser

PG 43 J5100

FAN CONN AND CONTROL

MAIN MEMORY

PG 18

PG 20 SPI

J3900,4635,4655 U6100

PG 40

U6600,6605,6610,6620

J4510

U1300 U1000

E-NET

GB

PG 31 88E1116

Conn

PG 33

U3900 J3400

PG 71

LVDSCONNJ9000

DISPLAY PORTJ9400

SYNC_MASTER=T18_MLB

051-7892

97 2

A.0.0

SYNC_DATE=12/12/2007

System Block Diagram

Trang 3

APPLE INC.

NONESCALE

DRAWING NUMBER

SIZE

D

M98 POWER SYSTEM ARCHITECTURE

(6A MAX CURRENT)

PP5V_S3

PP3V3_S5

PPVIN_G3H_P3V42G3H

V PPBUS_G3H

VIN

VOUT1

Q7055 LIO_DCIN_ISENSE

SMC

Q3805

DELAY

P3V3S0_EN (S0)

PM_ENET_EN_L

Q7920 (PAGE 61)

VLDOIN

VOUT2

PPVCORE_CPU_S0 CPUVCORE_IOUT

VOUT2

VIN

PP5V_S0PP3V3_S0

PP1V5_S0_REG V4

V3V2V1

U7870 RST*

VOUT1

PP1V8_GPU_REG

V4

U9701 (PAGE 84)

(PAGE 64)SC417U7400

VIN1.103V(L/H)

1.8V(R/H)TPS51124U9500(PAGE 82)

5V

3.3V

TPS51125U7201(PAGE 62)

CPU VCORE

ISL9504B

ISL6263BU8900GPU VCORE

3.425V G3HOT

LT3470U6990(PAGE 59)

PP3V42_G3H_REG

VOUT

TPS51117U7600(PAG 66)

PGOOD

CPUVTTS0_EN PPCPUVTT_S0_REG

CPUVTTS0_PGOOD

ISL8009U7750(PAGE 66)

(8A MAX CURRENT)PP5V_S5_REG

(5.5A MAX CURRENT)PP3V3_S5_REG

PP5V_RT_REG

Q7970Q7930

PPVOUT_S0_LCDBKLTGOSHAWK6P

LTC3407

U3850(PAGE 33)

PP1V9_ENET_REG

PP1V2_ENET_REG

ENETAVDD_ENP1V2ENET_EN

PPVIN_S0_DDRREG_LDO

1.8V 0.9V

TPS51116(PAGE 63)U7300

DDRREG_EN

DDRVTT_EN

PM_ENET_EN_L

WOL_ENQ3800

PM_SLP_S3_L

P5VS0_ENP5VRIGHT_EN

P3V3ENET_EN_LP3V3_ENET_FETP3V3GPU_SS

P1V05S0_PGOOD P5VRIGHT_PGOOD MCPCORES0_PGOOD CPUVTTS0_PGOOD

U4900

PM_SLP_S3_LPM_SLP_S4_LPM_SLP_S5_L

(PAGE 60) PBUS SUPPLY/

BATTERY CHARGER ISL6258A U7000

MCP_PS_PWRGD

RSMRST_PWRGD

SMC_ONOFF_L

PM_PWRBTN_LPWR_BUTTON(P90)

PLT_RST*

IMVP_VR_ONRSMRST_IN(P13)

GPUVCORE_IOUT (18A MAX CURRENT)

P3V3S3_SS

P1V5S0_PGOODS0PGOOD_PWROK

(PAGE 42)

P3V3S0_SSPP3V3_S0GPU_FET

SYNC_MASTER=T18_MLB

051-7892

97 A.0.0

3

Power Block Diagram

Trang 4

APPLE INC.

NONESCALE

Power Block Diagram

Trang 5

APPLE INC.

NONESCALE

BOM NUMBER

TABLE_BOMGROUP_HEAD TABLE_BOMGROUP_ITEM TABLE_BOMGROUP_ITEM TABLE_BOMGROUP_ITEM TABLE_BOMGROUP_ITEM TABLE_BOMGROUP_ITEM

TABLE_BOMGROUP_ITEM

QTY

TABLE_BOMGROUP_ITEM TABLE_BOMGROUP_ITEM TABLE_BOMGROUP_ITEMBOM OPTIONS

TABLE_BOMGROUP_ITEM TABLE_BOMGROUP_ITEM TABLE_BOMGROUP_ITEM TABLE_BOMGROUP_ITEM

TABLE_BOMGROUP_ITEMBOM OPTIONS

PART NUMBERALTERNATE FOR

TABLE_ALT_HEAD

TABLE_ALT_ITEM TABLE_ALT_ITEM TABLE_ALT_ITEM TABLE_ALT_ITEM TABLE_ALT_ITEM TABLE_ALT_ITEM TABLE_ALT_ITEM

TABLE_ALT_ITEM TABLE_ALT_ITEM TABLE_ALT_ITEM

128S0220

338S0554 338S0714 ALL Low Leakage G96 GPU

CYNTEC alt to YDS

ALL 107S0139 107S0075

138S0602 ALL Murata alt to Samsung

Maglayers alt to Cyntec IND

ALL 152S0915 152S0796

ALL ROHM ALT TO KEMET

127S0062 127S0108 152S0968 152S0966 ALL Maglayer alt to Delta

CYNTEC alt to YDS

ALL 107S0138 107S0074

BMON_PROD,LPCPLUS_NOT,NO_VREFMRGNK19_PROD

GMUX_1V8,GPUVID_1P00V,GPU_SS_INT,ISL6258A,MCP_B03,MCPSEQ_SMC,MIKEY,MUXGFX,SMC_DEBUG_YES,XDPK19_COMMON2

K19_COMMON,DEVEL_BOM,EEE_6XP,CPU_2_66GHZ,FB_256_HYNIX

PCBA,2.66GHZ,256HYN_VRAM,HB_AUDIO,K19630-9966

K19_COMMON,DEVEL_BOM,EEE_6XN,CPU_2_66GHZ,FB_256_SAMSUNG

A.0.0

SYNC_DATE=12/18/2008SYNC_MASTER=DDR

051-7892

97 5

BOM Configuration

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OUT

GND

VCC

NCNC

YA

INININ

OUT

APPLE INC.

NONESCALE

MCP U1400

CPU

To XDP connector and/or level translator

XDP connector

TMSTCKTDI

1.05V TO 3.3V LEVEL TRANSLATOR (M98: ON ICT FIXTURE)

5 4 3 2

U0600

0.1UF

20%

402 10V CERM JTAG_ALLDEV

2

1C0601

JTAG_ALLDEV

402 CERM 10V

0.1UF

2

1C0602

402 MF-LF

6 5 4 3 2 1

2 1

R0603

0

1/16W 5%

402

XDP

PLACEMENT_NOTE=Place near pin U1400.F19

2 1

2U0601

PLACEMENT_NOTE=Place close to U8000

402

10K

1/16W 5%

NOSTUFF

2 1

R0605

402 MF-LF 5%

6 97

A.0.0 051-7892

JTAG_GMUX_TCK

XDP_TCK

JTAG_MCP_TRST_L

MAKE_BASE=TRUE PPCPUVTT_S0

JTAG_GMUX_TDIJTAG_GMUX_TMSJTAG_MCP_TRST_L

JTAG_LVL_TRANS_EN_LXDP_TMS

PP3V3_S0

JTAG_MCP_TMSXDP_TMS

GPU_JTAG_TDI

JTAG_MCP_TDOJTAG_MCP_TDI

Trang 7

APPLE INC.

NONESCALE

2 TPs FUNC_TEST

3 TPs FUNC_TEST

10 TPs

Airport/BT/Camera Conn.

SYNC_DATE=N/ASYNC_MASTER=N/A

Functional / ICT Test

7 97

A.0.0 051-7892

PPVOUT_S0_LCDBKLTTRUE

FSB_ADS_LTRUE

TRUENC_ENET_PWRDWN_L

WS_KBD20TRUE

NC_SB_A20GATE NC_SATA_D_D2RP

TRUEMAKE_BASE=TRUENC_SATA_D_D2RP

TRUEMAKE_BASE=TRUENC_SB_A20GATE

FSB_DSTB_L_N<3 0>

TRUE

USB_BT_NTRUE

USB_BT_PTRUE

USB_CAMERA_NTRUE

USB_CAMERA_PTRUE

NC_PCIE_CLK100M_PE6P NC_PCIE_PE4_D2RN NC_PCIE_PE4_R2D_CN NC_PE4_PRSNT_L

NC_PCI_INTZ_L NC_PCI_GNT1_L NC_PCI_CLK0

NC_USB_10P NC_AUD_LO1_N_L

NC_ENET_PWRDWN_L

NC_MEM_A_CLK2N

TRUEMAKE_BASE=TRUENC_MEM_A_CLK3P

TRUEMAKE_BASE=TRUE

TRUEMAKE_BASE=TRUENC_MEM_A_CLK4P

PP1V8R1V5_S3TRUE

PP5V_S3_IR_RTRUE

SATA_HDD_D2R_C_PTRUE

SATA_ODD_D2R_UF_PTRUE

SATA_ODD_R2D_NTRUE

WS_KBD19TRUE

SMBUS_SMC_BSA_SCLTRUE

KBDLED_ANODETRUE

SATA_HDD_D2R_C_NTRUE

SATA_HDD_R2D_PTRUE

PP5V_S0_HDD_FLTTRUE

PP5V_SW_ODDTRUE

SPKRCONN_L_OUT_PTRUE

BI_MIC_LOTRUE

BI_MIC_SHIELDTRUE

SD_CMDTRUE

PSOC_MISOTRUE

Z2_KEY_ACT_LTRUE

Z2_CLKINTRUE

Z2_HOST_INTNTRUE

Z2_SCLKTRUE

Z2_MOSITRUE

PP18V5_S3TRUE

PP3V3_S3_LDOTRUE

BKL_ISEN5TRUE

LED_RETURN_2TRUE

LVDS_CONN_B_CLK_F_PTRUE

WS_KBD10TRUE

PP3V42_G3HTRUE

SMC_BIL_BUTTON_LTRUE

SPKRCONN_S_OUT_NTRUE

SATA_ODD_R2D_PTRUE

TRUEMAKE_BASE=TRUENC_PCI_C_BE_L<3 0>

TP_PCI_C_BE_L<3 0>

TRUENC_PCI_CLK0

MAKE_BASE=TRUE

TRUENC_PCI_CLK1

MAKE_BASE=TRUENC_PCI_CLK1

TRUENC_PCI_DEVSEL_L

MAKE_BASE=TRUE

TRUEMAKE_BASE=TRUENC_PCI_FRAME_L

NC_PCI_FRAME_L

TRUENC_PCI_GNT0_L

MAKE_BASE=TRUENC_PCI_GNT0_L

TRUENC_PCI_GNT1_L

MAKE_BASE=TRUE

TRUEMAKE_BASE=TRUENC_PCI_INTW_L

NC_PCI_INTW_L

TRUENC_PCI_INTX_L

MAKE_BASE=TRUENC_PCI_INTX_L

TRUENC_PCI_INTZ_L

MAKE_BASE=TRUE

TRUENC_PCI_IRDY_L

MAKE_BASE=TRUENC_PCI_IRDY_L

TRUEMAKE_BASE=TRUENC_PCI_PERR_L

NC_PCI_PERR_L

TRUENC_PCI_RESET1_L

MAKE_BASE=TRUENC_PCI_RESET1_L

TRUENC_PCI_SERR_L

MAKE_BASE=TRUENC_PCI_SERR_L

TRUENC_PCI_STOP_L

MAKE_BASE=TRUENC_PCI_STOP_L

TRUENC_PCI_TRDY_L

MAKE_BASE=TRUENC_PCI_TRDY_L

TRUENC_PCIE_CLK100M_PE4N

MAKE_BASE=TRUENC_PCIE_CLK100M_PE4N

TRUENC_PCIE_CLK100M_PE4P

MAKE_BASE=TRUENC_PCIE_CLK100M_PE4P

TRUENC_PCIE_CLK100M_PE5N

MAKE_BASE=TRUENC_PCIE_CLK100M_PE5N

MAKE_BASE=TRUENC_PCIE_CLK100M_PE5P

MAKE_BASE=TRUE

TRUENC_PCIE_PE4_R2D_CN

MAKE_BASE=TRUE

TRUENC_PCIE_PE4_D2RN

MAKE_BASE=TRUE

TRUENC_PE4_PRSNT_L

MAKE_BASE=TRUE

TRUENC_PSOC_P1_3

MAKE_BASE=TRUENC_PSOC_P1_3

TRUENC_PSOC_SDA

MAKE_BASE=TRUENC_PSOC_SDA

TRUENC_SATA_C_D2RP

MAKE_BASE=TRUENC_SATA_C_D2RP

TRUENC_SATA_C_R2D_CN

MAKE_BASE=TRUENC_SATA_C_R2D_CN

NC_SATA_C_R2D_CP NC_SATA_C_R2D_CP

NC_SATA_D_D2RN

TRUEMAKE_BASE=TRUENC_SATA_D_D2RN

NC_AUD_LO1_N_L

TRUEMAKE_BASE=TRUENC_AUD_LO1_P_L

TRUEMAKE_BASE=TRUENC_USB_10N

NC_USB_10N NC_ENET_INTR_L

TRUEMAKE_BASE=TRUENC_LPC_DRQ0_L

NC_LPC_DRQ0_L

NC_MEM_A_CKE<3 2>

TRUEMAKE_BASE=TRUENC_MEM_A_CLK2N

NC_MEM_A_CLK3N

TRUEMAKE_BASE=TRUENC_MEM_A_CLK3N

NC_MEM_A_CLK4P NC_MEM_A_CLK3P

TRUENC_MEM_A_CS_L<3>

MAKE_BASE=TRUENC_MEM_A_CS_L<3>

TRUEMAKE_BASE=TRUENC_MEM_A_ODT<3 2>

TP_MEM_A_ODT<3 2>

TRUEMAKE_BASE=TRUENC_MEM_B_CKE<2>

NC_MEM_B_CKE<2>

TRUENC_MEM_B_CLK3P

MAKE_BASE=TRUENC_MEM_B_CLK3P

TRUENC_MEM_B_CLK4N

MAKE_BASE=TRUENC_MEM_B_CLK4N

TRUEMAKE_BASE=TRUENC_MEM_B_CLK4P

NC_MEM_B_CLK4P

TRUENC_MEM_B_ODT<2>

MAKE_BASE=TRUE

NC_MEM_B_CLK5N

MAKE_BASE=TRUENC_MEM_B_CLK5N

TRUEMAKE_BASE=TRUENC_MLB_RAM_SIZE

NC_MLB_RAM_SIZE

TRUENC_P7_7

MAKE_BASE=TRUENC_P7_7

NC_PCI_AD<31 8>

TP_PCI_AD<31 8>

NC_PCI_DEVSEL_L WS_KBD22

TRUE

BKL_ISEN4TRUE

LVDS_CONN_B_CLK_F_NTRUE

WS_KBD23TRUE

LVDS_DDC_DATATRUE

FAN_LT_TACHTRUE

FAN_LT_PWMTRUE

PP3V42_G3HTRUE

PP3V3_S3TRUE

WS_KBD9TRUE

PPVCORE_S0_MCP_REGTRUE

PP1V8R1V5_S0_FETTRUE

PP1V2R1V05_S5TRUE

PPCPUVTT_S0TRUE

PP0V9R0V75_S0_DDRVTTTRUE

PPVCORE_S0_CPUTRUE

WS_KBD11TRUE

WS_KBD4TRUE

PP5V_SW_ODDTRUE

PP5V_S0_HDD_FLTTRUE

GNDTRUE

Trang 8

APPLE INC.

NONESCALE

SYNC_DATE=(MASTER)

PP1V1_S0GPU_REG

MIN_LINE_WIDTH=0.6 mmMIN_NECK_WIDTH=0.15 mmMAKE_BASE=TRUEVOLTAGE=1.8VPP1V8_GPUIFPX

PP1V8_S0GPU_ISNS_R

VOLTAGE=1.0VMIN_NECK_WIDTH=0.2 mmPPVCORE_GPUMAKE_BASE=TRUE

PP1V8_GPUIFPX

MIN_NECK_WIDTH=0.2 mmPP1V8_S0GPU_ISNSMIN_LINE_WIDTH=0.6 mmMAKE_BASE=TRUEVOLTAGE=1.8VPP1V8_S0GPU_ISNS

VOLTAGE=1.05VPP1V2R1V05_S5MAKE_BASE=TRUEMIN_NECK_WIDTH=0.2 mm

PPVCORE_S0_CPU

PP5V_S0

PP5V_S0 PP5V_S0

PP5V_S0 PP5V_S0 PP5V_S0

PP5V_S0

PP5V_S0 PP5V_S0

VOLTAGE=5VPP5V_S0MAKE_BASE=TRUEMIN_LINE_WIDTH=0.4 MM

MAKE_BASE=TRUEMIN_NECK_WIDTH=0.20MMVOLTAGE=3.3V

PP3V3_S3MIN_LINE_WIDTH=0.40MM

MIN_LINE_WIDTH=0.30MMVOLTAGE=3.3VMAKE_BASE=TRUEPP3V3_S0 PPBUS_CPU_IMVP_ISNS

MIN_LINE_WIDTH=0.6 mmMAKE_BASE=TRUEVOLTAGE=3.3VPP3V3_S5

PP3V3_S5

MIN_LINE_WIDTH=0.8 mmVOLTAGE=1.5VMAKE_BASE=TRUE

PP1V8R1V5_S3

PP1V8R1V5_S0_FET PP1V8R1V5_S0_FET

PPCPUVTT_S0

PP1V2R1V05_S5 PP3V3_S0

PP3V3_S0

PP3V3_S3 PP3V3_S3

PP3V3_S3 PP3V3_S3 PP3V3_S3 PP3V3_S3

PP5V_S3

PPBUS_G3H

MAKE_BASE=TRUEMIN_LINE_WIDTH=0.4 mmPPBUS_CPU_IMVP_ISNSVOLTAGE=12.6V

MIN_NECK_WIDTH=0.25 mm

MIN_LINE_WIDTH=0.6 mmMIN_NECK_WIDTH=0.25 mmMAKE_BASE=TRUEVOLTAGE=16.5VPPDCIN_G3H

PP3V42_G3H

PP5V_S3 PP5V_S3

MIN_LINE_WIDTH=0.4 mmMAKE_BASE=TRUEVOLTAGE=12.6VMIN_NECK_WIDTH=0.25 mmPPBUS_G3H

PPBUS_G3H

PP1V1_S0GPU_REG PP1V1_S0GPU_REG PP1V1_S0GPU_REGMAKE_BASE=TRUEVOLTAGE=1.1VPP1V1_S0GPU_REGMIN_NECK_WIDTH=0.2 mmPP1V8R1V5_S0_FET

MAKE_BASE=TRUEVOLTAGE=1.05VPPCPUVTT_S0MIN_NECK_WIDTH=0.2 mm

PP1V05_S0_MCP_SATA_AVDD

PP1V05_S0_MCP_PEX_AVDD PPCPUVTT_S0

PP1V1_S0GPU_REG

PP0V9R0V75_S0_DDRVTT PP0V9R0V75_S0_DDRVTT

PP1V8R1V5_S0_FET

PP1V8R1V5_S3 PP3V3_S5

PPCPUVTT_S0

PPCPUVTT_S0 PPCPUVTT_S0

MAKE_BASE=TRUEMIN_NECK_WIDTH=0.2 mmPPVTTDDR_S3MIN_LINE_WIDTH=0.3 mmVOLTAGE=0.75V

PP1V2R1V05_ENETMIN_NECK_WIDTH=0.2 mmMAKE_BASE=TRUEVOLTAGE=1.05VMIN_LINE_WIDTH=0.4 MM

PPCPUVTT_S0

PP5V_S3

PP3V3_FW_FWPHY PP3V3_FW_FWPHY

PP1V05_S0_MCP_PLL_UF

PP1V05_S0_MCP_PEX_AVDD

PP3V3_S0 PP3V3_S0

PP3V3_S0

PP3V3_S0 PP3V3_S0 PP3V3_S0

PP3V3_S0

PP1V8_S0GPU_ISNS_R PP1V8_GPUIFPX

PP3V3_S0GPU

PPVTTDDR_S3

PP1V2R1V05_ENET PP1V2R1V05_ENET

MAKE_BASE=TRUEMIN_LINE_WIDTH=0.6mm

PP5V_S3

PP1V8_S0GPU_ISNS PP1V8_S0GPU_ISNS

PP1V8R1V5_S3

PP1V05_S0_MCP_SATA_AVDDMAKE_BASE=TRUE

PP1V8R1V5_S0_FET

PP1V1_S0GPU_REG

PP1V8_S0GPU_ISNS PP1V8_S0GPU_ISNS

PPVCORE_GPU

PPVP_FW

PP1V1_S0GPU_REG PP3V3_S5

PP1V2R1V05_S5 PPBUS_G3H

MIN_NECK_WIDTH=0.2 mmPPVCORE_S0_MCP_REGMAKE_BASE=TRUE

MIN_LINE_WIDTH=0.6 mmVOLTAGE=1.05VPPVCORE_S0_CPU

PPVCORE_S0_MCP_REG PPVCORE_S0_MCP_REG

PP3V3_S0 PPBUS_G3H

MIN_LINE_WIDTH=0.6 mmPPVCORE_S0_CPUMIN_NECK_WIDTH=0.25 mm

PP3V3_S5 PP3V3_S5

PPVP_FW

MIN_NECK_WIDTH=0.2 mmMAKE_BASE=TRUEVOLTAGE=12.6VPPVP_FW

PP1V0_FW

PP3V3_FW_FWPHY

PP1V0_FW

PP1V0_FWMIN_LINE_WIDTH=0.6mmMAKE_BASE=TRUEVOLTAGE=1.05V

MAKE_BASE=TRUEMIN_NECK_WIDTH=0.10MMVOLTAGE=1.8VPP1V8_S0

PP3V3_S0

PP3V3_S0 PP3V3_S0

PPBUS_G3H PPBUS_G3H

PP3V3_S5

PP3V3_S5 PP3V3_S5 PPBUS_G3H

PPVCORE_GPU

PP1V1_S0GPU_REG PP1V1_S0GPU_REG

PP3V3_S0GPU

PP3V3_S0GPU PP3V3_S0GPUMAKE_BASE=TRUEMIN_NECK_WIDTH=0.20MMVOLTAGE=3.3VPP3V3_S0GPU

PP3V3_S0

PP3V42_G3H

PP3V42_G3H PP3V42_G3H

PP3V42_G3H

PP3V42_G3H PP3V42_G3H PP3V42_G3H

PP0V9R0V75_S0_DDRVTT PP1V2R1V05_S5

PP3V3_FW_FWPHYMIN_LINE_WIDTH=0.6mmVOLTAGE=3.3VMAKE_BASE=TRUEPP3V3_S5

PP3V42_G3H

PP5V_S3

PP3V3_S0 PP3V3_S0 PP3V3_S0 PP3V3_S0 PPBUS_G3H

PP3V3_S0 PP3V3_S0

MIN_LINE_WIDTH=0.6 mmMAKE_BASE=TRUEVOLTAGE=1.2VMIN_NECK_WIDTH=0.2 mmPP1V2_S0

PP3V3_S0 PP3V3_S0

PP3V3_S5 PP3V3_S5 PP3V3_S5 PP3V3_S5

PPCPUVTT_S0

PP1V8_S0

PP1V8R1V5_S3 PP1V8R1V5_S3

PP3V42_G3H

MAKE_BASE=TRUEMIN_LINE_WIDTH=0.3 mmVOLTAGE=3.42VPP3V42_G3HMIN_NECK_WIDTH=0.2 mmPPBUS_G3H

PP5V_S3

MAKE_BASE=TRUEVOLTAGE=0.9VPP0V9R0V75_S0_DDRVTTMIN_NECK_WIDTH=0.17 mmMIN_LINE_WIDTH=2 mmPP0V9R0V75_S0_DDRVTT

PP3V3_S0

PP5V_S3 PP5V_S3

PP5V_S3VOLTAGE=5.0VMAKE_BASE=TRUEMIN_LINE_WIDTH=0.5MMMIN_NECK_WIDTH=0.17MM

PP3V3_S0GPU PP3V3_S0GPU

PP3V3_S5

PP3V3_S3 PP3V3_S3

PP1V05_S0_MCP_PEX_AVDDMAKE_BASE=TRUE

PP3V3_S5 PP3V3_S5

Trang 9

OUT

IN

OUTOUTOUTOUTOUT

APPLE INC.

NONESCALE

If found to be necessary, will move to page14.csa

402MF-LF47K

2

MF-LF01/16W5%

NO STUFF

402

2 1

402

2 1

R0900

MF-LF1%

10

402

2 1

402

2 1

402

2 1

40262

1

R0950

2001/16W5%

402MF-LF

NO STUFF

1/16W1%

MF-LF2

1501/16W

NO STUFF

MF-LF4021%

5%

1/16W0

402

2 1

R0903

1.4DIA-SHORT-EMI-MLB-M97-M98

SM1

SH0912

SM1.4DIA-SHORT-EMI-MLB-M97-M98

1

SH0911

SM1

SH0913

2.0DIA-TALL-EMI-MLB-M97-M98

SM1

SH0902 2.0DIA-TALL-EMI-MLB-M97-M98

SM1

SH0900

SM2.0DIA-TALL-EMI-MLB-M97-M98

1

SH0903

SM2.0DIA-TALL-EMI-MLB-M97-M98

SH0901

SM1

SH0917

402 5%

22

1/16W

2

1R0931

SM1

SH0904

051-7892 A.0.0

97 9

Signal Aliases NC_RTL8211_REGOUT

MAKE_BASE=TRUEFW_PLUG_DET_L

PEG_D2R_N<0 15>

MAKE_BASE=TRUEPEG_R2D_C_P<0 15>

MAKE_BASE=TRUE

TP_CPU_PECI_MCPMAKE_BASE=TRUEMAKE_BASE=TRUENC_USB_EXTCN

NO_TEST=TRUE

MAKE_BASE=TRUETP_MEM_B_A<15>

GND PM_SLP_RMGT_L

TP_PCIE_EXCARD_R2D_C_N DP_IG_HPD

FSB_CPURST_L CPU_INTR CPU_NMI CPU_DPRSTP_L

TP_PCIE_EXCARD_R2D_C_PTP_PCIE_EXCARD_R2D_C_N

TP_EXCARD_CLKREQ_L

TP_PCIE_CLK100M_EXCARD_N

GNDMAKE_BASE=TRUENC_RTL8211_REGOUT

NO_TEST=TRUE

TP_PP3V3_ENET_PHY_VDDREGMAKE_BASE=TRUE

PM_SLP_RMGT_L

MIN_NECK_WIDTH=0.25 mmVOLTAGE=5V

MIN_LINE_WIDTH=0.5 mm

RTL8211_CLK125

MAKE_BASE=TRUEDP_IG_DDC_DATA

GND

GPU_FB_A_VREF_DIVMAKE_BASE=TRUE

GND

MAKE_BASE=TRUEPEG_R2D_C_N<0 15>

LCD_BKLT_EN

MAKE_BASE=TRUELVDS_IG_PANEL_PWR

MAKE_BASE=TRUENC_USB_MINIP

NO_TEST=TRUE

USB_CARDREADER_PMAKE_BASE=TRUE

MAKE_BASE=TRUENC_USB_MININ

NO_TEST=TRUE

GMUX_INT

MAKE_BASE=TRUENC_USB_EXTDP

NO_TEST=TRUE

TP_MEM_A_A<15>

JTAG_GMUX_TDIMAKE_BASE=TRUE

MAKE_BASE=TRUELVDS_IG_BKL_ON

MAKE_BASE=TRUENC_USB_EXTDN

MCP_MII_PD MCP_MII_PD

MAKE_BASE=TRUEPCIE_FW_PRSNT_L

LVDS_IG_BKL_ON LVDS_IG_PANEL_PWR

MCP_SPKRMAKE_BASE=TRUEGMUX_INT

GND

MAKE_BASE=TRUEPM_ALL_GPU_PGOOD

MAKE_BASE=TRUEDP_IG_DDC_CLK

DP_IG_HPDMAKE_BASE=TRUE

LCD_BKLT_ENMAKE_BASE=TRUE

MAKE_BASE=TRUE

EG_RESET_LMAKE_BASE=TRUETP_LVDS_MUX_SEL_EG

USB_CARDREADER_NMAKE_BASE=TRUEMAKE_BASE=TRUENC_USB_EXCARDP

NO_TEST=TRUE

NC_USB_MINIP

MAKE_BASE=TRUENC_USB_EXCARDN

TP_IMVP6_CLKEN_L

CPU_VID<0 6>

MAKE_BASE=TRUECPU_BSEL<0 2>

MAKE_BASE=TRUEMAKE_BASE=TRUEMEM_VTT_EN

=MCP_BSEL<0 2>

MAKE_BASE=TRUEPEG_D2R_P<0 15>

DP_IG_ML_P<3>

MAKE_BASE=TRUE

IMVP6_VID<0 6>

NO_TEST=TRUEMAKE_BASE=TRUE

NC_USB_EXTCPMAKE_BASE=TRUETP_MEM_A_A<15>

PM_ALL_GPU_PGOOD

EG_CLKREQ_OUT_L

PEG_PRSNT_LMAKE_BASE=TRUE

DP_IG_ML_N<2 0>

MAKE_BASE=TRUE

MAKE_BASE=TRUEJTAG_GMUX_TDO

JTAG_GMUX_TMSMAKE_BASE=TRUE

JTAG_GMUX_TDI

TP_CPU_PECI_MCP

JTAG_GMUX_TDO

FW643_WAKE_LMAKE_BASE=TRUEGPU_FB_A_VREF_DIV

FSB_BREQ0_L

RTL8211_CLK125MAKE_BASE=TRUE

PP1V8_S0GPU_ISNS

JTAG_GMUX_TMS DP_IG_DDC_DATA

NC_LVDS_IG_B_CLKP NC_LVDS_IG_B_CLKN

NC_LVDS_IG_BKL_PWM NC_LVDS_IG_BKL_PWM

NO_TEST=TRUEGND

NC_LVDS_IG_A_DATAP<3>

GND_CHASSIS_AUDIO_JACK

NC_LVDS_IG_B_CLKNMAKE_BASE=TRUE

NC_LVDS_IG_B_CLKP

NO_TEST=TRUE

NC_LVDS_IG_B_DATAP<3>

MIN_NECK_WIDTH=0.09MMMIN_LINE_WIDTH=0.6MMVOLTAGE=0VGND

Trang 10

BIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBI

INININ

INOUTIN

BIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBI

OUTOUTOUT

BIBIBIBIBIBIBIBIBIBIBIBIBIBIBI

BIBIBIBIBI

BIBIBIBIBIBIBIBIBIBIBIBIBIBIBI

BI

BIBIBI

BI

BIBI

BIBIBIBIBI

ININ

OUT

ININ

IN

INININ

INOUT

BIBIBIBI

THERMTRIP*

THERMDAPROCHOT*

DBR*

TRST*

TMSTDOTDITCKPREQ*

LINT1LINT0STPCLK*

BSEL0BSEL1BSEL2

DPRSTP*

DPSLP*

DPWR*

PWRGOODSLP*

MAKE TRACE LENGTH SHORTER THAN 0.5"

COMP0,2 CONNECT WITH ZO=27.4OHM,

MAKE TRACE LENGTH SHORTER THAN 0.5"

COMP1,3 CONNECT WITH ZO=55OHM,

0.5" MAX LENGTH FOR CPU_GTLREF

REFERENCED TO GND

PLACE C1000 CLOSE TO CPU_TEST4PIN MAKE SURE CPU_TEST4 IS

1/16W1%

402MF-LF54.9

2

1/16W5%

402MF-LF68

402

2 1

MF-LF27.4

402

2 1

R1018

1/16W1%

MF-LF54.9

402

2 1

MF-LF27.4

402

2 1

402

2 1

R1030

1/16W5%

MF-LF1K NOSTUFF

4022

1/16W1%

402MF-LF54.9

402

2 1

R1020

1/16W1%

MF-LF54.9

402

2 1

R1021

1/16W1%

MF-LF54.9

402

2 1

402

2 1

R1023

1/16W5%

402MF-LF1K NOSTUFF

2

1

R1012

16V4020.1uF NOSTUFF

402

2 1

R1024

FCBGAPENRYN OMIT

AB6

G2

AB5

C7B25A24

AB3AA6AC5

D5

A3

D3D22D2F6B2V3T2N5M4

G3F4F3C1

L1J3K2H2K3

D21

AC1AC2H4

B4C6

B3

C4

D20

E4G6

A5

F21H5

E1

C20

F1G5

AC4AD1AD3AD4E2

A21A22V1

M1

H1

J1N2M3K5L4L5

AA3AB2AA4W3V4U2

J4

Y4W5W2T3T5R4U1Y5U4

A6

W6R3U5Y2

R1P1P4L2P2P5N3

U1000

FCBGAPENRYN OMIT

C3A26AF1AF26C24D25C23

D7D6AE6

AD26

AF24AA26

M26

H26

AE25Y26

L26J26

D24B5E5AC20U22

N24

H25

G24K24E23

AC23AF22AD23AC22

E25

AD21AE21AC25AF23AE22AD20AC26AB21AB22AA21

G25

AD24AE24

AB25AA24AA23W25W24Y23W22Y25

F23

U23U25T22V23V26V24AB24Y22

N25T25

G22

L25R24T24P22P23P25M23L22M24L23

E26

R23P26K25N22

H23K22F26H22J23J24

F24E22

Y1AA1U26R26

C21B23B22

U1000

SYNC_DATE=11/12/2008SYNC_MASTER=M98_MLB

97 051-7892 A.0.0

PM_THRMTRIP_L

CPU_THERMD_P CPU_PROCHOT_L

XDP_DBRESET_L XDP_TRST_L XDP_TMS XDP_TDO XDP_TDI XDP_TCK XDP_BPM_L<5>

FSB_RS_L<1>

FSB_RS_L<0>

FSB_CPURST_L

CPU_IERR_L FSB_BREQ0_L FSB_DBSY_L FSB_DRDY_L FSB_DEFER_L FSB_BNR_L

TP_CPU_RSVD4 TP_CPU_RSVD3 TP_CPU_RSVD2 TP_CPU_RSVD1 TP_CPU_RSVD0 CPU_SMI_L CPU_NMI CPU_INTR CPU_STPCLK_L CPU_FERR_L

Trang 11

OUTOUT

VCC

VCCP

VCCA

VID0VID1VID2VID3VID4VID5VID6

TBD A (Auto-Halt/Stop-Grant HFM)TBD A (Auto-Halt/Stop-Grant SuperLFM)

TBD A (Sleep LFM)TBD A (Auto-Halt/Stop-Grant LFM)

Current numbers from Merom for Santa Rosa EMTS, doc #22221

TBD A (LFM)TBD A (HFM)

TBD A (Auto-Halt/Stop-Grant HFM)

TBD A (Sleep HFM)

TBD A (Deeper Sleep)TBD A (Sleep SuperLFM)

TBD A (SuperLFM)18.7 A (LFM)23.0 A (Design Target)Low Voltage:

(CPU INTERNAL PLL POWER 1.5V)(CPU IO POWER 1.05V)

1%

1/16W2

9 88

63 88

63 88 PLACEMENT_NOTE=Place within 1 inch of CPU, no stub.

100MF-LF402

1%

1/16W2

OMIT

PENRYNFCBGA

AE7

AE2AF3AE3AF4AE5AF5AD6

AF7

N6N21M21K21J21M6K6J6

W21V21T6T21R6R21

V6G21

C26B26

AF20AF18AF17AF15AF14AF12AF10AF9AE20AE18

B7

AE17AE15AE13AE12AE10AE9AD18AD17AD15AD14

A20

AD12AD10AD9AD7AC18AC17AC15AC13AC12AC9

A18

AC7AB7AB20

AB18AB17AB15AB14AB12AB10AC10

A17

AB9AA20AA18AA17AA15AA13AA12AA10AA9AA7

A15

F20F18F17F15F14F12F10F9F7E20

A13

E18E17E15E13E12E10E9E7D18D17

A12

D15D14D12D10D9C18C17C15C13C12

A10

C10C9B20B18B17B15B14B12B10B9

A9A7

U1000

OMIT

PENRYNFCBGA

V25V22V5V2U24U21U6U3T26B8

T4T1R25R22R5R2P24P21P6

P3

B6

N26N23N4N1M25M22M5M2L24L21

AF2

L6L3K26K23K4K1J25J22J5J2

A23

H24H21H6H3G26G23G1G4F25F22

A19

F2F19F16F13F11F8F5E24E21E19

A16

E16E14E11E8E6E3D26D23D19D16

A14

D13D11D8D4D1C25C22C2C19C16

A11

C14C11C8

A25AF21

C5

AF19AF16AF13AF11AF8AF6A2AE26AE23AE19

B24

AE16AE14AE11AE8AE4AE1AD25AD22AD19AD16

B21

AD13AD11AD8AD5AD2AC24AC21AC19AC16AC14

B19

AC11AC8AC6AC3AB26AB23AB19AB16AB13AB11

B16

AB8AB4AB1AA25AA22AA19AA16AA14AA11AA8

B13

AA5AA2Y24Y21Y6Y3W26W23W4W1B11

A8A4

U1000

SYNC_DATE=11/12/2008SYNC_MASTER=M98_MLB

CPU Power & Ground

051-7892 A.0.0

11 97

PPVCORE_S0_CPU

CPU_VCCSENSE_N CPU_VCCSENSE_P

Trang 12

APPLE INC.

NONESCALE

VCCP (CPU I/O) DECOUPLING

WF: Consider sharing bulk cap with NB Vtt?

VCCA (CPU AVdd) DECOUPLING

6.3V20%

X5R-CERM22UF CRITICAL

32

1

C1235

6.3V20%

603

2

6.3V20%

603

2

6.3V20%

603

2

6.3V20%

603

2

6.3V20%

603

2

6.3V20%

603

2

6.3V20%

603

2

6.3V20%

603

2

6.3V20%

603

2

6.3V20%

603

2

6.3V20%

603

2

6.3V20%

603

2

6.3V20%

603X5R-CERM22UF CRITICAL

2

6.3V20%

603

2

10V402CERM0.1UF2

6.3V20%

603

2

6.3V20%

603

2

6.3V20%

603

2

6.3V20%

603

2

10V402CERM0.1UF2

6.3V20%

603

2

16V402CERM0.01UF

PLACEMENT_NOTE=Place near CPU pin B26.

2

6.3V20%

60310uF2

1

C1280

2.0V20%

D2T-SM2POLY-TANT330UF CRITICAL

PLACEMENT_NOTE=Place in CPU center cavity.

32

1

C1250

2.0V20%

32

1

C1251

2.0V20%

32

1

C1252

2.0V20%

32

Trang 13

BIBI

OUT

IN

BIIN

ININ

OUT

OUTOUT

BIBI

OUT

IN

ININ

INOUTOUTOUT

OBSFN_C0

OBSDATA_C0OBSDATA_C1

SCLSDA

TRSTnHOOK3

HOOK2HOOK1

Direction of XDP module

998-1571

ITPCLK#/HOOK5ITPCLK/HOOK4OBSDATA_D3OBSDATA_D2

OBSDATA_D1OBSDATA_B1

OBSDATA_B0OBSFN_B1OBSDATA_A2OBSDATA_A0OBSFN_A1OBSFN_A0

Use with 920-0620 adapter board to support CPU, MCP debugging

21

2

1

R1315

16V4020.1uF XDP

2

1

C1300

16V4020.1uF XDP

PLACEMENT_NOTE=Place close to CPU to minimize stub.

21

9

606

J1300

eXtended Debug Port(MiniXDP)

97 A.0.0

PP3V3_S0 PPCPUVTT_S0

XDP_TCK

SMBUS_MCP_0_DATA SMBUS_MCP_0_CLK

JTAG_MCP_TCK PM_LATRIGGER_L

XDP_OBS20

TP_XDP_OBSDATA_B3 XDP_PWRGD

TP_XDP_OBSDATA_B0 TP_XDP_OBSDATA_B1 TP_XDP_OBSFN_B1

XDP_TDI XDP_TRST_L XDP_TDO_CONN

Trang 14

OUTBI

BIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBI

BIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBI

BIBIBIBIBIBIBIBIBIBIBIBI

BIBI

BI

BIBIBI

BI

BIBI

INBI

OUT

OUTOUTOUT

OUTOUTOUTOUT

OUTOUT

OUTOUTOUTOUTOUTOUT

OUT

OUTOUTOUTOUTOUT

OUTOUTIN

BIBI

BCLK_IN_N

CPU_A20M#

CPU_NMICPU_INTRCPU_SMI#

402MF-LF2

1/16W1%

402MF-LF49.9

2

1

R1431

49.9MF-LF402

1%

1/16W2

1

R1430

49.91/16W1%

402MF-LF2

1

R1435

NO STUFF 1K4025%

1/16W2

1

R1422 1K

NO STUFF

402MF-LF5%

1/16W2

1

R1421 1K

5%

402MF-LF

NO STUFF

1/16W2

1

R1420

1/16W402MF-LF

625%

2

1

R1415

1/16W402MF-LF

54.91%

2

1

R1410

NO STUFF 1501/16W402MF-LF5%

2

OMIT

(1 OF 11)MCP79-TOPO-BBGA

AH27AG28AH28AG27

H38

AC35AC33AC39AA33AC38

AH43

AJ41E41

AG41

AC43

AF42AH42AH39

AD40AB42

AH40

M39N37W39T40

M41L36W37U40

AD41

AM32AN33

AN32

AA40AD39

J41N35V35V41

U41P42Y42

M43H39J40K41

Y41

H42H43L41H41K42H40M40N40N41P41

V42

M42L42J37J38J39N38N36L38L39L37

Y39

R38R37R39P35R35R34N33N34U37R33

W41

W38U34U33U35U36U38AA35AA38AA34AA36

Y40

W34W33AA37W35T43R41T41T42T39R42

W42Y43

AM43AM42

F42D42F41

AL32AE40

AA41AD43

AK35AE36

AD42

AB35AE35AE37AC37AE34AE38

AN35AR39AN34AL35AL38AJ34

AC34

AN37AL34AL37AJ38AJ36AJ37AJ35AN36AJ33

AF41

AL33AG33AL39AN38AG34AG38AG37AE33AG39AG35AF35

AM39AM40

AL41AK42

AL43AL42

G42G41

AJ40AK41

U1400

1/16W402MF-LF

625%

SYNC_MASTER=T18_MLB

FSB_CLK_CPU_P FSB_CLK_CPU_N

FSB_BREQ0_L FSB_BNR_L

FSB_CLK_ITP_P FSB_CLK_ITP_N

CPU_A20M_L

CPU_NMI CPU_INTR CPU_SMI_L

FSB_CPURST_L FSB_CPUSLP_L CPU_DPSLP_L CPU_STPCLK_L CPU_DPRSTP_L

Trang 15

0A MEMORY

CONTROL

MCKE0A_1MCKE0A_0

MODT0A_1MODT0A_0

MCS0A_0#

MCS0A_1#

MCLK0A_0_NMCLK0A_0_PMCLK0A_1_N

MCLK0A_2_NMCLK0A_1_PMCLK0A_2_P

MA0_0MA0_1MA0_2MA0_3MA0_4MA0_5MA0_6

MA0_8MA0_7MA0_9MA0_10MA0_11

MA0_13MA0_12MA0_14

MBA0_2

MBA0_0MBA0_1

MWE0#

MCAS0#

MRAS0#

MDQS0_0_PMDQS0_0_N

MDQS0_1_PMDQS0_2_NMDQS0_1_N

MDQS0_2_PMDQS0_3_N

MDQS0_4_P

MDQS0_3_PMDQS0_4_NMDQS0_5_NMDQS0_5_PMDQS0_6_NMDQS0_6_PMDQS0_7_NMDQS0_7_P

MDQM0_2MDQM0_1MDQM0_0

MDQM0_3MDQM0_4

MDQ0_0MDQM0_7

MDQM0_5MDQM0_6MDQ0_1

MDQ0_4MDQ0_3MDQ0_2

MDQ0_5MDQ0_6

MDQ0_9MDQ0_8MDQ0_7MDQ0_10MDQ0_11

MDQ0_21MDQ0_20

MDQ0_18MDQ0_19MDQ0_17

MDQ0_30MDQ0_31

MDQ0_35MDQ0_34

MDQ0_47MDQ0_46

MDQ0_43

MDQ0_45MDQ0_44

MDQ0_51MDQ0_50MDQ0_49MDQ0_52

MDQ0_48

MDQ0_56MDQ0_57

MDQ0_61MDQ0_60

MDQ0_58MDQ0_59

MDQ0_62MDQ0_63

OUTOUT

OUTOUTOUTOUTOUTOUTBI

BIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBI

OUTOUTOUT

OUTOUTOUTOUT

OUTOUT

BIBI

BI

BIBI

BI

BIBI

BIBIBIBI

BIBI

BIBIBI

BIBI

BIBIBIBIBIBI

BIBI

OUTOUTOUT

OUTOUTOUTOUTOUTOUTOUTOUTOUTOUTOUTOUTOUTOUTOUT

OUTOUTOUTOUT

OUTOUT

MEMORY CONTROL 1A

MDQ1_63

MDQ1_58MDQ1_61

MDQ1_57

MDQ1_53

MDQ1_52

MDQ1_49

MDQ1_51MDQ1_50

MDQ1_42MDQ1_41

MDQ1_36MDQ1_35

MDQ1_31MDQ1_30

MDQ1_22

MDQ1_18MDQ1_21

MDQ1_16

MDQ1_11MDQ1_10

MDQ1_7MDQ1_8MDQ1_9

MDQ1_3MDQ1_6

MDQ1_2MDQ1_4MDQ1_5

MDQ1_1

MDQM1_6MDQM1_5

MDQ1_0MDQM1_7

MDQM1_4MDQM1_3

MDQM1_0MDQM1_1MDQM1_2

MDQ1_40

MDQS1_7_P

MDQS1_6_NMDQS1_6_PMDQS1_7_N

MDQS1_5_NMDQS1_5_P

MDQS1_4_P

MDQS1_3_PMDQS1_4_N

MDQS1_2_PMDQS1_3_N

MDQS1_1_PMDQS1_2_NMDQS1_1_NMDQS1_0_PMDQS1_0_N

MRAS1#

MCAS1#

MWE1#

MBA1_2MBA1_1MBA1_0

MA1_14MA1_13MA1_12MA1_11MA1_10MA1_9MA1_8MA1_7MA1_6MA1_5MA1_4MA1_3MA1_2MA1_1MA1_0

MCLK1A_2_P

MCLK1A_1_PMCLK1A_2_N

MCLK1A_0_PMCLK1A_1_N

MCS1A_1#

MCS1A_0#

MCLK1A_0_N

MODT1A_1MODT1A_0

MCKE1A_0MCKE1A_1

BIBIBI

BIBI

BIBIBI

BIBI

BIBIBI

BIBI

BIBIBIBIBIBI

BIBI

BIBIBI

BIBI

BIBIBI

BIBI

BIBIBI

BIBI

BIBIBIBIBIBI

BIBI

OUTBI

OUTOUTOUTOUTOUTOUTOUT

APPLE INC.

NONESCALE

AR17AV17

AP15AV15

AL10AL11AR8AR9AW7AW8AP13AR13AV25AW25AU30AU29AT35AU35AU39AT39

AN5AU5AR10AN13AN27AW29AV35AR34

AT37AU37AW39

AL8AL9AP9AN9

AV39

AL6AL7AN6AN7AR6AR7AV6AW5AN10AR5

AR37

AU6AV5AU7AU8AW9AP11AW6AY5AU9AV9

AR38

AU11AV11AV13AW13AR11AT11AR14AU13AR26AU25

AV38

AT27AU27AP25AR25AP27AR27AP29AR29AP31AR31

AW38

AV27AN29AV29AN31AU31AR33AV37AW37AT31AV31

AR35AP35

AT15AR18

AW33AV33BA24AY24BB20BC20

AU23AT23

AP17

AP23AP19AW17

AV21AR22AU21AP21AR21AN21AV19AU19

AR23AU15AN23AW21AN19

AT19AR19

BA16AW16

BB13AY15

AT2AT1AY2AY1BB6BA6BA10AY11BB33BA33BB37BA37BA43AY42AT42AT43

AT5BA2AY7BA11BB34BB38AY43AR42

AW42AW41AT40

AT4AT3AV2AV3

AT41

AR4AR3AU2AU3AY4AY3BB3BC3AW4AW3

AP41

BA3BB2BB5BA5BA8BC8BB4BC4BA7AY8

AN40

BA9BB10BB12AW12BB8BB9AY12BA12BC32AW32

AU40

BA35AY36BA32BB32BA34AY35BC36AW36BA39AY40

AU41

BA36BB36BA38AY39BB40AW40AV42AV41BA40BC40

AR41AP42

BB14BB16

BA42BB42BB22BA22BA19AY19

AY31BB30

BA15

BB29BB18BB17

BB28AY28BA28AY27BA27BA26BB26BA25

BA29BA14AW28BC28BA17

BB25BA18

Trang 16

MCLK1B_1_NMCLK1B_0_PMCLK1B_1_PMCLK1B_2_N

MRESET0#

GND55GND56GND57GND58

GND60GND59GND61GND62GND63GND64

GND49GND50GND48GND47GND46

GND13GND14

GND10

GND12GND11

GND2GND3GND4GND1

MEM_COMP_VDDMEM_COMP_GND

MODT0B_0MODT0B_1

MCKE0B_1MCKE0B_0

MCLK0B_0_N

MCS0B_0#

MCS0B_1#

MCLK0B_2_NMCLK0B_1_P

MCLK0B_0_PMCLK0B_1_NMCLK0B_2_P

+V_PLL_XREF_XS+V_PLL_CORE+V_VPLL

+VDD_MEM1+VDD_MEM2+VDD_MEM3+VDD_MEM4+VDD_MEM5+VDD_MEM6+VDD_MEM7+VDD_MEM8+VDD_MEM9+VDD_MEM10+VDD_MEM11

+VDD_MEM14+VDD_MEM15+VDD_MEM16+VDD_MEM17+VDD_MEM18+VDD_MEM19+VDD_MEM20

+VDD_MEM22+VDD_MEM21

+VDD_MEM23+VDD_MEM24+VDD_MEM25+VDD_MEM26

+VDD_MEM30

+VDD_MEM27

+VDD_MEM29+VDD_MEM31+VDD_MEM32+VDD_MEM33+VDD_MEM34

+VDD_MEM38+VDD_MEM39+VDD_MEM40+VDD_MEM41+VDD_MEM43+VDD_MEM44+VDD_MEM45+VDD_MEM42

+V_PLL_DP

+VDD_MEM13+VDD_MEM12

+VDD_MEM28

+VDD_MEM37+VDD_MEM36+VDD_MEM35

MEMORY CONTROL 0B MEMORY CONTROL 1B

OUT

APPLE INC.

NONESCALE

1

R1610

MF-LF4021%

1/16W40.2

BC29AN16AM29AM27AM25

AM31AL30BC25AW24AW19AY26

AM23

AY25AU18AM15AY18AY17AV20BC17AW27AU22AU20

AM21

AV24AY29AT21AU24AN18AU16AP18AP22AW15AR24

AM19

AR20AR16AV16AP24AP20AN22AP16AT17AN24AN20

AM17

T28

T27U28U27

AY32

BC13AY16AN15

AN17

AN41AM41

BA13BC16AR15

AU17

BA41BB41AY23BA23BA20AY20

AU33AU34BB24BC24BA21BB21

BA31BA30AN25

AV23

W5V34V10

U22U20U18T9T7

T6

T38T37T35T34T33

T26T24AK11T20T18

T10

R5R43R40R36P7P40P4P37P34P33

P10

N8N39M9M7M6M5M38K7H31G32

G30

F24D34BC9AY9BC21F28AU10AR36AP30AT25

AP12

AM28AK7AH35AG24AF24AE20AD22AB7AB22AA39AA22

SYNC_DATE=12/12/2008SYNC_MASTER=T18_MLB

NC_MEM_B_CLK4N NC_MEM_B_CLK4P

MCP_MEM_RESET_L

MCP_MEM_COMP_VDD MCP_MEM_COMP_GND

NC_MEM_A_CS_L<3>

TP_MEM_A_CLK5N NC_MEM_A_CLK4P

NC_MEM_A_CLK3P TP_MEM_A_CLK4N TP_MEM_A_CLK5P

NC_MEM_B_CLK5N TP_MEM_B_CLK5P

Trang 17

PE0_RX2_N

+AVDD0_PEX11

+AVDD0_PEX7+AVDD0_PEX8

+AVDD1_PEX3+AVDD1_PEX2+AVDD1_PEX1+AVDD0_PEX13+AVDD0_PEX12+AVDD0_PEX10+AVDD0_PEX9

+AVDD0_PEX6+AVDD0_PEX5+AVDD0_PEX4+AVDD0_PEX3+AVDD0_PEX2+AVDD0_PEX1

+V_PLL_PEX+DVDD1_PEX2+DVDD1_PEX1+DVDD0_PEX8+DVDD0_PEX7+DVDD0_PEX6+DVDD0_PEX5+DVDD0_PEX4+DVDD0_PEX3+DVDD0_PEX2+DVDD0_PEX1

PE1_TX1_NPE1_TX2_P

PE1_TX0_NPE1_TX1_P

PE6_REFCLK_N

PEX_RST0#

PE1_TX0_P

PE5_REFCLK_NPE5_REFCLK_P

PE6_REFCLK_P

PE4_REFCLK_NPE4_REFCLK_PPE3_REFCLK_NPE2_REFCLK_N

PE1_REFCLK_P

PE0_TX15_N

PE0_TX14_NPE0_TX15_P

PE0_TX13_PPE0_TX11_NPE0_TX11_PPE0_TX10_N

PE0_TX9_NPE0_TX10_PPE0_TX8_NPE0_TX8_P

PE0_TX9_P

PE0_TX7_NPE0_TX7_PPE0_TX6_N

PE0_TX5_NPE0_TX6_P

PE0_TX4_NPE0_TX5_PPE0_TX3_NPE0_TX3_P

PE0_TX4_P

PE0_TX2_NPE0_TX2_P

PE0_TX0_NPE0_TX1_NPE0_TX1_PPE0_TX0_P

PEX_CLK_COMP

PE1_RX3_NPE1_RX3_PPE1_RX2_N

PE1_RX0_NPE1_RX1_P

PE1_RX2_PPE1_RX1_N

PE_WAKE#

PE1_RX0_P

PE0_PRSNT_16#

PE0_RX13_NPE0_RX14_P

PE0_RX15_PPE0_RX14_NPE0_RX15_N

PE0_RX12_PPE0_RX11_P

PE0_RX13_P

PE0_RX11_NPE0_RX12_NPE0_RX10_N

PE0_RX8_P

PE0_RX9_P

PE0_RX10_P

PE0_RX8_NPE0_RX9_N

PE0_RX5_N

PE0_RX7_PPE0_RX6_N

PE0_RX7_N

PE0_RX3_P

PE0_RX5_P

PE0_RX3_NPE0_RX4_N

PE0_RX1_PPE0_RX1_N

PEC_PRSNT#

PEC_CLKREQ#/GPIO_50

PE3_REFCLK_PPED_CLKREQ#/GPIO_51

PED_PRSNT#

PEB_CLKREQ#/GPIO_49

PEE_CLKREQ#/GPIO_16PEE_PRSNT#/GPIO_46

PEF_CLKREQ#/GPIO_17PEF_PRSNT#/GPIO_47

PEG_CLKREQ#/GPIO_18PEG_PRSNT#/GPIO_48

OUTOUTOUTOUTOUTOUTOUTOUTOUTOUTOUTOUTOUTOUTOUTOUT

OUTOUT

OUTOUTOUTOUT

OUT

OUTOUTOUTOUTOUT

OUTOUTOUTOUT

ININ

ININININININININININININININININININININININININININININININ

ININ

IN

ININ

OUTOUT

IN

OUT

INOUT

APPLE INC.

NONESCALE

If PE1 interface is not used, ground DVDD1_PEX and AVDD1_PEX

If PE0 interface is not used, ground DVDD0_PEX and AVDD0_PEX

206 mA (A01, AVDD0 & 1)Int PU

84 mA (A01)

Int PU

Int PUInt PUInt PUInt PU

Int PU

Int PUInt PU

Int PUInt PUInt PUInt PU

57 mA (A01, DVDD0 & 1)

Current numbers from email Poonacha Kongetira provided 11/30/2007 4:04pm (no official document number)

OMIT

MCP79-TOPO-B(5 OF 11)BGA

K11

A11

M19M17M18M16L18L16B10M15C10E8D9D5

F17

N14M14

L14K14

J13H13

G13F13

J11J10

B6C6

A7B7

B8A8

D8C8

H7G7

F9E9

H9G9

K9J9

G11F11

H3H2

G3H4

F3F4

E2F2

D2E1

C1D1

B3B2

A4A3

C4B4

M2M1

M4M3

L4L3

K2K3

J2J3

H1J1

C5D4

L11L10

J5J4

J7J6

G5H5

C3D3

E4E3

E5F5

E6F6

D7C7

N5N4

N7N6

N9P9

N11N10

L7L6

L9L8

F7E7

E11D11C9

T16

U19T19U16W18W17W16V19U17W19T17

P13N13M13

U12T12N12R12P12M12AB12AA12

W12V12AD12AC12Y12

PCIE_FW_R2D_C_NTP_PCIE_EXCARD_R2D_C_P

PCIE_MINI_R2D_C_NPCIE_FW_R2D_C_P

TP_PCIE_CLK100M_PE6N

PCIE_RESET_L

PCIE_MINI_R2D_C_P

NC_PCIE_CLK100M_PE5NNC_PCIE_CLK100M_PE5P

NC_PCIE_CLK100M_PE6P

NC_PCIE_CLK100M_PE4NNC_PCIE_CLK100M_PE4PTP_PCIE_CLK100M_EXCARD_NPCIE_CLK100M_FW_N

PCIE_CLK100M_MINI_NPCIE_CLK100M_FW_P

PEG_CLK100M_NPEG_CLK100M_P

PCIE_MINI_D2R_NPCIE_FW_D2R_P

TP_PCIE_EXCARD_D2R_PPCIE_FW_D2R_N

TP_PCIE_CLK100M_EXCARD_PTP_EXCARD_CLKREQ_L

TP_PCIE_EXCARD_PRSNT_LMINI_CLKREQ_L

TP_PE4_CLKREQ_LNC_PE4_PRSNT_LAUD_IP_PERIPHERAL_DETGMUX_JTAG_TCK_LCARDREADER_RESETJTAG_GMUX_TDO

Trang 18

BI

OUT

ININININININ

OUT

OUTOUT

OUT

OUTOUT

OUTOUTOUTOUTOUTOUT

OUTOUT

ININ

OUTOUT

OUTOUTOUTOUTOUT

IN

INOUT

INININ

GPIO_7/NFERR*/IGPU_GPIO_7+V_DUAL_MACPLL

+VDD_HDMI+V_PLL_HDMI+V_PLL_IFPAB+VDD_IFPB+VDD_IFPA

+V_TV_DAC+V_RGB_DAC

+V_DUAL_RMGT2

MII_COMP_GNDMII_COMP_VDD

LCD_PANEL_PWR/GPIO_58LCD_BKL_ON/GPIO_59LCD_BKL_CTL/GPIO_57

XTALOUT_TV

GPIO_6/FERR*/IGPU_GPIO_6

HDMI_TXC_P/ML0_LANE3_PHDMI_TXC_N/ML0_LANE3_NHDMI_TXD0_P/ML0_LANE2_PHDMI_TXD0_N/ML0_LANE2_NHDMI_TXD1_P/ML0_LANE1_PHDMI_TXD1_N/ML0_LANE1_NHDMI_TXD2_P/ML0_LANE0_PHDMI_TXD2_N/ML0_LANE0_N

HPLUG_DET2/GPIO_22

IFPA_TXC_NXTALIN_TV

DDC_DATA2/GPIO_24DDC_CLK2/GPIO_23

RGB_DAC_RSETRGB_DAC_VREF

TV_DAC_VREF

DP_AUX_CH0_PDP_AUX_CH0_N

HPLUG_DET3

HDMI_RSETHDMI_VPROBE

RGMII_MDIO

BUF_25MHZ

DDC_DATA0DDC_CLK0

RGB_DAC_REDRGB_DAC_GREENRGB_DAC_BLUERGB_DAC_HSYNCRGB_DAC_VSYNC

TV_DAC_REDTV_DAC_GREEN

IFPA_TXC_P

IFPA_TXD0_PIFPA_TXD0_N

IFPA_TXD2_P

IFPB_TXC_PIFPB_TXC_N

IFPB_TXD5_P

IFPB_TXD4_PIFPB_TXD4_N

IFPB_TXD6_PIFPB_TXD5_NIFPB_TXD6_NIFPB_TXD7_PIFPB_TXD7_N

DDC_DATA3DDC_CLK3

IFPAB_RSETIFPAB_VPROBE

MII_RESET#

RGMII_MDC

RGMII_PWRDWN/GPIO_37

MII_RXER/GPIO_36MII_COL/GPIO_20/MSMB_DATAMII_CRS/GPIO_21/MSMB_CLK

TV_DAC_BLUETV_DAC_HSYNC/GPIO_44TV_DAC_VSYNC/GPIO_45

+V_DUAL_RMGT1

MII_VREF

RGMII_TXCTL/MII_TXENRGMII_TXC/MII_TXCLKRGMII_TXD3RGMII_TXD2RGMII_TXD1RGMII_TXD0

+3.3V_DUAL_RMGT1+3.3V_DUAL_RMGT2

OUTOUTOUTOUTOUT

OUTOUTOUTOUTOUTOUT

OUTOUTOUTOUTOUT

OUTBI

OUTOUT

OUT

OUTOUTOUT

APPLE INC.

NONESCALE

Okay to float XTALIN_TV and XTALOUT_TV.

Okay to float all RGB_DAC signals.

DDC_CLK0/DDC_DATA0 pull-ups still required.

Y / Y

TV DAC Disable:

Okay to float all TV_DAC signals.

DDC_CLK0/DDC_DATA0 pull-ups still required.

ENET_TXD<0>

1 0 MII

RGMII Interface Network Interface Select

NOTE: All Apple products set strap to feature via software This avoids a leakage issue since

5 mA (A01)

DisplayPort DP_IG_ML_P/N<3>

DP_IG_ML_P/N<1>

DP_IG_ML_P/N<2>

DP_IG_DDC_CLK

TP_DP_IG_AUX_CHP/N TMDS_IG_DDC_DATA TMDS_IG_TXD_P/N<2>

TMDS_IG_TXD_P/N<1>

TMDS_IG_DDC_CLK

TMDS_IG_TXD_P/N<0>

TMDS_IG_TXC_P/N TMDS/HDMI

Current numbers from email Poonacha Kongetira provided 11/30/2007 4:04pm (no official document number).

TV / Component

RGB DAC Disable:

WF: IFP is capable of LVDS (1.8V) or TMDS (3.3V), need aliases

MII, RGMII products will enable

83 mA (A01)

131 mA (A01)

Dual-channel TMDS: Power +VDD_IFPx at 3.3V

NOTE: 1M pull-down required on DP_IG_CA_DET if DP not used.

DP_IG_AUX_CH_P/N DP_IG_HPD DP_IG_DDC_DATA DP_IG_ML_P/N<0>

Interface Mode

be used to provide HDMI or dual-channel TMDS without

NOTE: HDMI port requires level-shifting IFP interface can

level-shifters.

NOTE: 20K pull-down required on DP_HPD_DET.

NOTE: 1K pull-down required on DP_IG_AUX_CH_N if DP is used.

(See below) (See below)

Alias to DVI_HPD for systems using IFP for DVI.

=DVI_HPD_GMUX_INT:

Pull-down (20k) required in all cases.

Alias to HPLUG_DET2 for other systems.

Alias to GMUX_INT for systems with GMUX.

pull-ups (~10K to 3.3V S0) To ensure pins are low

by default, pull-downs (1K or stronger) must be used.

GPIOs 57-59 (if LCD panel is used):

In MCP79 these pins have undocumented internal

D38C38

C37

A35E36

A36

D36

B36C36

D25C25C24B24

C26D24

A24E24B23C23

C22A23

G23C21D21J22

A41

B38C39

B39

A40

A39B40

M26M27

T25

K32J32

M28M29

V23U23

T23

K24J24

F40E37G39

N30M30

L30K30

L29K29

J29H29

L31K31

G31E32

B34C34

D33C33

D32C32

B32A32

B35C35

F31C31

J30

J33H33

F33G33

G35F35

D35E35

J31

B15E16

D43C43

E31B30A31

D31C30

B31E23

U1400

MF-LF5%

1/16W40210K

4022

100K1/16W5%

47K5%

DP_CA_DET PP1V05_ENET_MCP_PLL_MAC

PPCPUVTT_S0 PP3V3_S0_MCP_VPLL PP1V8_S0

PP3V3_S0_MCP_DAC

PP1V2R1V05_ENET

MCP_MII_COMP_GND MCP_MII_COMP_VDD

LVDS_IG_PANEL_PWR LVDS_IG_BKL_ON NC_LVDS_IG_BKL_PWM

LVDS_IG_DDC_DATA LVDS_IG_DDC_CLK

NC_MCP_RGB_DAC_RSET NC_MCP_RGB_DAC_VREF

NC_MCP_TV_DAC_VREF

DP_IG_AUX_CH_P DP_IG_AUX_CH_N

DP_IG_HPD

MCP_HDMI_RSET MCP_HDMI_VPROBE

ENET_MDIO

MCP_CLK25M_BUF0_R

MCP_DDC_DATA0 MCP_DDC_CLK0

NC_MCP_RGB_RED NC_MCP_RGB_GREEN NC_MCP_RGB_BLUE NC_MCP_RGB_HSYNC NC_MCP_RGB_VSYNC NC_CRT_IG_R_C_PR NC_CRT_IG_G_Y_Y

MCP_IFPAB_RSET MCP_IFPAB_VPROBE

NC_CRT_IG_B_COMP_PB NC_CRT_IG_HSYNC NC_CRT_IG_VSYNC

MCP_MII_VREF

ENET_TX_CTRL ENET_CLK125M_TXCLK ENET_TXD<3>

Trang 19

OUT

BIBIBIBI

PCI_AD5PCI_AD6

PCI_AD9PCI_AD8PCI_AD7

PCI_AD10PCI_AD11

PCI_AD21PCI_AD22

PCI_AD25PCI_AD23

PCI_AD26

PCI_AD29PCI_AD31

GND70GND71GND72

GND74GND73GND75GND76GND77GND79GND78

GND80GND81

GND84GND83GND82

GND85GND86GND87

GND89GND88

GND95GND96GND97

PCI_CLKIN

LPC_FRAME#

LPC_AD1LPC_AD0LPC_RESET0#

LPC_CLK0LPC_AD3LPC_AD2

GND99GND98

GND100GND102GND101

GND109GND108

GND110GND111GND112

GND115GND114GND113

GND116GND117

GND120GND119GND118

GND121GND122GND123

GND125GND124

PCI_CLKRUN#/GPIO_42PCI_AD28

OUT

BIBIBIBIBIBIBIBI

OUT

OUTOUT

APPLE INC.

NONESCALE

Y3

Y2AA7

R11R10

T4U9T3V9T2

T1

AB9Y1AA10

N1N2N3P2

P3U11R4U10R3

Y4AA9

AD11

R9

R8R7R6

W10AA11AA6AA3

AA2AC8AC7AB2AC6AB3

U7T5

AE11

U6U1U5U2W11U3W9V2W8V3

AC4

W7W4W6W3Y5AA5AA1AC11AC10AC9

AE10AC3

AE6

AE5AE12AD4

AE2AE1

AE9AD5AD1AD2AD3

Y27Y26

Y25Y24Y22Y20Y19Y18Y17Y16W43W40W36W24W22W20V7V40V4V37V33V28V27V26V24V22V20V18V17V16U8U4U39U26U24

AD34AD33AD28AD27AD26AD25AD24AD20AD19AD18AD17AD16AC5AB33AC40AC36AC22AB40AB4AB37AB34AB28AB27AB26AB25AB24AB23AB21AB20H34AB18

R1989

402MF-LF1/16W5%

R1994 8.2K

21

R1992

19

MF-LF4021/16W5%

R1960

22

4022

R1952

402MF-LF1/16W5%

MCP PCI & LPC

FW_PLUG_DET_L

LPC_PWRDWN_L

NC_PCI_TRDY_L

NC_LPC_DRQ0_L LPC_SERIRQ

TP_PCI_PAR NC_PCI_SERR_L NC_PCI_STOP_L

MEM_VTT_EN_R NC_PCI_RESET1_L

PCI_CLK33M_MCP_R NC_PCI_CLK1 NC_PCI_CLK0

NC_PCI_C_BE_L<1>

NC_PCI_PERR_L

AUD_IPHS_SWITCH_EN MCP_RS232_SIN_L

PM_LATRIGGER_L

FW_PWR_EN

PCI_REQ0_L PCI_REQ1_L

FW_PWR_EN PCI_REQ1_L PCI_REQ0_L MCP_RS232_SOUT_L

Trang 20

BIBI

BIBISATA_B0_RX_N

SATA_A0_RX_P

SATA_A1_TX_P

GND160

GND133GND134GND132GND131USB_RBIAS_GND

USB11_NUSB11_PUSB10_NUSB10_PUSB9_NUSB9_P

USB7_N

USB8_NUSB8_PUSB7_PUSB6_NUSB6_PUSB5_NUSB4_NUSB4_P

USB5_P

USB2_NUSB2_P

USB0_N

USB1_NUSB1_PUSB0_P

SATA_TERMP

SATA_LED#

SATA_C1_RX_NSATA_C1_RX_P

SATA_C0_TX_P

SATA_B1_RX_NSATA_B1_RX_PSATA_B1_TX_NSATA_B1_TX_P

SATA_B0_TX_N

SATA_B0_RX_PSATA_B0_TX_P

SATA_A1_RX_NSATA_A1_RX_PSATA_A1_TX_NSATA_A0_TX_P

GND138GND137GND135

USB3_PUSB3_N

USB_OC0#/GPIO_25USB_OC1#/GPIO_26USB_OC2#/GPIO_27/MGPIOUSB_OC3#/GPIO_28/MGPIO

SATA_A0_RX_NSATA_A0_TX_N

SATA_C1_TX_NSATA_C1_TX_P

SATA_C0_RX_PSATA_C0_RX_NSATA_C0_TX_N

+V_PLL_USB

+V_PLL_SATA

+DVDD0_SATA1+DVDD0_SATA2+DVDD0_SATA3+DVDD0_SATA4

+DVDD1_SATA2

+AVDD0_SATA1+AVDD0_SATA2+AVDD0_SATA3+AVDD0_SATA4+AVDD0_SATA5+AVDD0_SATA6+AVDD0_SATA7+AVDD0_SATA8+AVDD0_SATA9

+AVDD1_SATA1+AVDD1_SATA2+AVDD1_SATA3+AVDD1_SATA4+DVDD1_SATA1

OUTOUT

ININ

OUTOUT

ININ

BIBI

APPLE INC.

NONESCALE

Minimum 1.025V for Gen2 support

If all SATA_Cx pins are not used, ground DVDD1_SATA and AVDD1_SATA.

External A

External D AirPort (PCIe Mini-Card)

Geyser Trackpad/Keyboard

127 mA (A01, AVDD0 & 1)

1/16W4022.49K

2

1

R2010

806MF-LF1%

1

R2053

1/16W4025%

1

R2051

8.2K402MF-LF5%

2

1

R2050

OMIT MCP79-TOPO-B(8 OF 11)BGA

A27

H21J21K21L21

H25J25

K25L25

D27E27

F27G27

J26J27

K27L27

F29G29

A28B28

C28D28

K23L23

F25G25

C29D29

AE3

E12

AP3AP2

AN2AN3

AN1AM1

AM3AM2

AM4AL3

AK3AL4

AK2AJ3

AJ1AJ2

AJ11AJ10

AK9AJ9

AJ7AJ6

AJ4AJ5

L28

AE16

AH19AH17AG19AG17AG16AF19

AM14AM13AL14AN14AL13AN12AM12AM11AL12AK13AK12AN11AJ12

AH24AH22AH20AH18AG40AG36AG26AG22AG20AG18AF40AF37AF34AF33AF28AF27AF26AF22AF20AF18AF17AF16AD6AE4AE39AE24AE22AD38AD37AD35

USB_EXTB_N

NC_USB_EXCARDN NC_USB_EXCARDP USB_EXTB_P USB_BT_N USB_BT_P USB_TPAD_N

USB_IR_N USB_IR_P

USB_TPAD_P

NC_USB_EXTDN NC_USB_EXTDP

USB_EXTA_N

NC_USB_MININ NC_USB_MINIP USB_EXTA_P

MCP_SATA_TERMP

TP_MCP_SATALED_L

TP_SATA_F_D2RN TP_SATA_F_D2RP

TP_SATA_E_R2D_CP

NC_SATA_D_D2RN NC_SATA_D_D2RP

TP_SATA_D_R2D_CN TP_SATA_D_R2D_CP

NC_SATA_C_R2D_CN

NC_SATA_C_D2RP NC_SATA_C_R2D_CP

SATA_ODD_D2R_N SATA_ODD_D2R_P SATA_ODD_R2D_C_N SATA_HDD_R2D_C_P

USB_CAMERA_P USB_CAMERA_N

USB_EXTA_OC_L USB_EXTB_OC_L USB_EXTC_OC_L EXCARD_OC_L

SATA_HDD_D2R_N SATA_HDD_R2D_C_N

TP_SATA_F_R2D_CN TP_SATA_F_R2D_CP

TP_SATA_E_D2RP TP_SATA_E_D2RN TP_SATA_E_R2D_CN

PP3V3_S0_MCP_PLL_USB

PP1V05_S0_MCP_PLL_SATA PPCPUVTT_S0

Trang 21

OUTOUT

OUT

OUTOUT

ININ

OUT

OUTIN

OUT

ININOUT

IN

INININOUT

THERM_DIODE_NTHERM_DIODE_P

HDA_RESET*

HDA_PULLDN_COMPHDA_SDATA_IN1_GPIO_2/PS2_KB_CLK

MCP_VID2/GPIO_15MCP_VID1/GPIO_14MCP_VID0/GPIO_13EXT_SMI/GPIO_32*

FANCTL1/GPIO_62FANRPM1/GPIO_63FANCTL0/GPIO_61FANRPM0/GPIO_60

SIO_PME*

KBRDRSTIN*

PKG_TESTTEST_MODE_ENBUF_SIO_CLKCPUVDD_EN

SMB_DATA0SMB_CLK0SPKRHDA_SYNC

XTALIN_RTCXTALOUT

XTALOUT_RTC

JTAG_TRST*

XTALINJTAG_TCKJTAG_TMS

CPU_VLDJTAG_TDIJTAG_TDO

RTC_RST*

PS_PWRGDPWRGD_SB

SPI_CS0/GPIO_10SPI_CLK/GPIO_11SPI_DI/GPIO_8SPI_DO/GPIO_9

SUS_CLK/GPIO_34

+V_DUAL_HDA1+V_DUAL_HDA2

HDA_DOCK_RST*_GPIO_5/PS2_MS_DATA

GPIO_1/PWRDN_OK/SPI_CS1

A20GATEGPIO_12_SUS_STAT_ACCLMTR_EXT_TRIG_L

+V_PLL_SP_SPREF+V_PLL_NV_H

OUTIN

IN

ININ

INOUTOUT

APPLE INC.

NONESCALE

Int PU (S5)

Int PU

SPI1 option Rev B01 will.

NOTE: MCP79 rev A01 does not support

LPC_FRAME#

0 0 1 1

default, LPC+ debug card pulls R1961 and R2160 selects SPI0 ROM by

BIOS Boot Select HDA_SDOUT

I/F

SPI1 SPI0 LPC

NOTE: MCP79 does not support FWH, only

Frequency

SPI Frequency Select

1 MHz NOTE: Straps not provided on this page.

31 MHz Frequency

BUF_SIO_CLK Frequency

14.31818 MHz

1 1 0 SPI_DO SPI_CLK

0 1

1 0

24 MHz

HDA_SYNC 1 0 LPC ROMs So Apple designs will

0

42 MHz

25 MHz

Int PU Int PU Int PU (S5)

Int PU

SPI0 = SPI_CS0_L, SPI1 = SPI_CS1_L

LPC_FRAME# high for SPI1 ROM override.

not use LPC for BootROM override PCI

For EMI Reduction on HDA interface

HDA Output Caps

7 mA (A01)

17 mA

Int PU (S5) Int PU (S5)

(MGPIO3) (MGPIO2)

40249.9K

1

R2120

1KMF-LF1%

1/16W4022

221/16W21

R2170

MF-LF5%

1/16W402

2221

R2171

5%

22

MF-LF402

21

R2173

4025%

10KMF-LF2

MF-LF

8.2K5%

1/16W4022

5%

10KMF-LFBOOT_MODE_SAFE

4021/16W2

5%

10K402MF-LFBOOT_MODE_USER

1/16W2

4025%

221/16W21

R2172

44

49.9MF-LF1%

4022

1

R2110

4021/16W5%

402CERM2

50V10PF5%

402CERM2

B19

B16A19A16

B11C11

K22B18

C13

B14C15

C14D13

F21

K19G21L19

M23

H17

G17J17

C19

C20D16

D20C16

E20

L22

AE17AE18

K16J16

M21M20L20

M24M25L13

J18J19F19E19

K15

A15

L17K17E15

L24L26

D12B12

C12A12C18

D17C17

M22

AE7K13

100K

2

10K5%

1/16W402MF-LF2

1

R2142

4021/16W5%

MF-LF4022

22K5%

MF-LF4022

4021/16W22K5%

MF-LF2

402MF-LF5%

1/16W100K

2

1

R2151

1/16W5%

100K4021

2

R2154

MF-LF4021/16W5%

10K

2

1

R2143 10K

5%

MF-LF4022

21 97

A.0.0 051-7892

MCP_GPIO_4 AUD_I2C_INT_L

MCP_VID<0>

TP_MLB_RAM_VENDOR

PM_SLP_S3_L PM_SLP_RMGT_L

HDA_BIT_CLK_R HDA_SDOUT_R

MCP_THMDIODE_N MCP_THMDIODE_P

HDA_RST_R_L

MCP_HDA_PULLDN_COMP NC_MLB_RAM_SIZE

MCP_VID<2>

MCP_VID<1>

SMC_RUNTIME_SCI_L

ARB_DETECT SMC_IG_THROTTLE_L ODD_PWR_EN_L MEM_EVENT_L

SMC_WAKE_SCI_L TP_MCP_KBDRSTIN_L

MCP_TEST_MODE_EN TP_MCP_BUF_SIO_CLK MCP_CPUVDD_EN

SMBUS_MCP_0_DATA SMBUS_MCP_0_CLK MCP_SPKR HDA_SYNC_R

RTC_CLK32K_XTALIN MCP_CLK25M_XTALOUT

RTC_CLK32K_XTALOUT

JTAG_MCP_TRST_L

MCP_CLK25M_XTALIN JTAG_MCP_TCK JTAG_MCP_TMS

MCP_CPU_VLD JTAG_MCP_TDI JTAG_MCP_TDO

RTC_RST_L

MCP_PS_PWRGD PM_RSMRST_L

SM_INTRUDER_L TP_MCP_LID_L PM_BATLOW_L

PM_PWRBTN_L PM_SYSRST_DEBOUNCE_L PM_DPRSLPVR

PM_SLP_S4_L HDA_SDIN0

SMBUS_MCP_1_CLK SMBUS_MCP_1_DATA AP_PWR_EN

SPI_CS0_R_L SPI_CLK_R SPI_MISO SPI_MOSI_R

PM_CLK32K_SUSCLK_R

PP3V3_S0

SPIROM_USE_MLB

NC_SB_A20GATE SMC_ADAPTER_EN PP1V05_S0_MCP_PLL_NV

ARB_DETECT SMC_IG_THROTTLE_L

AP_PWR_EN PP3V3_S3

AUD_I2C_INT_L MCP_GPIO_4

MCP_VID<0>

HDA_RST_L HDA_BIT_CLK HDA_SDOUT

PP3V42_G3H PP3V3_S0

HDA_SYNC_R

HDA_SDOUT_R

HDA_RST_R_L HDA_BIT_CLK_R

Trang 22

GND161

GND167GND168

GND171GND170GND169

GND172GND173

GND176GND175GND174

GND177GND178

GND181GND180GND179

GND182GND183GND184

GND187GND186GND185

GND188GND189

GND192GND191GND190

GND193GND194

GND197GND196GND195

GND198

GND203

GND208

GND213GND214

GND217GND216GND215

GND218GND219

GND222GND221GND220

GND223GND224GND225

GND228GND227GND226

GND229GND230

GND233GND232GND231

GND234GND235

GND238GND237GND236

GND239GND240

GND243GND242GND241

GND244

GND249

GND252GND251

GND341

GND343GND340GND339GND338GND337GND336GND335GND334GND333

GND312

GND309GND308

GND305GND306GND307

GND294GND293GND292GND291GND290GND289GND288GND287

GND275GND276GND274GND273GND272GND270GND269GND271

GND268GND267

GND264GND265GND266

GND263GND262

GND259GND260GND261

GND256GND253

+VTT_CPUCLK+VDD_CORE42

+3.3V_DUAL_USB2

+VTT_CPU17+VTT_CPU16+VTT_CPU15+VTT_CPU14+VTT_CPU13+VTT_CPU12+VTT_CPU11+VTT_CPU10

+VTT_CPU1

+VDD_CORE7

+VDD_CORE1+VDD_CORE2+VDD_CORE3+VDD_CORE4+VDD_CORE5+VDD_CORE6

+VDD_CORE13+VDD_CORE14+VDD_CORE15+VDD_CORE16+VDD_CORE17+VDD_CORE18+VDD_CORE19

+VDD_CORE21+VDD_CORE22+VDD_CORE23+VDD_CORE24+VDD_CORE25+VDD_CORE26+VDD_CORE27+VDD_CORE28+VDD_CORE29+VDD_CORE30+VDD_CORE32+VDD_CORE33+VDD_CORE34+VDD_CORE35+VDD_CORE36+VDD_CORE37+VDD_CORE39+VDD_CORE40+VDD_CORE41

+VDD_CORE47+VDD_CORE48+VDD_CORE49+VDD_CORE50+VDD_CORE51+VDD_CORE52+VDD_CORE53+VDD_CORE54

+VTT_CPU51+VTT_CPU50+VTT_CPU47+VTT_CPU46+VTT_CPU45+VTT_CPU43+VTT_CPU42+VTT_CPU41+VTT_CPU40+VTT_CPU39+VTT_CPU38+VTT_CPU37+VTT_CPU36+VTT_CPU35+VTT_CPU34+VTT_CPU32+VTT_CPU31+VTT_CPU30+VTT_CPU29+VTT_CPU28+VTT_CPU26+VTT_CPU25+VTT_CPU24+VTT_CPU23+VTT_CPU22+VTT_CPU21+VTT_CPU20+VTT_CPU19+VTT_CPU18

+VTT_CPU9+VTT_CPU8+VTT_CPU7+VTT_CPU6+VTT_CPU5+VTT_CPU4+VTT_CPU3

+VDD_CORE38

+VTT_CPU33+VTT_CPU27

+VDD_CORE55+VDD_CORE56+VDD_CORE57+VDD_CORE58+VDD_CORE59+VDD_CORE60+VDD_CORE61+VDD_CORE62+VDD_CORE63+VDD_CORE64+VDD_CORE65+VDD_CORE66+VDD_CORE67+VDD_CORE68+VDD_CORE69+VDD_CORE70+VDD_CORE71+VDD_CORE72+VDD_CORE73+VDD_CORE74+VDD_CORE75+VDD_CORE76+VDD_CORE77+VDD_CORE78+VDD_CORE79+VDD_CORE80+VDD_CORE81

+VBAT

+3.3V_1

+3.3V_8

+3.3V_DUAL1+3.3V_DUAL2+3.3V_DUAL3+3.3V_DUAL4

+3.3V_DUAL_USB1+3.3V_DUAL_USB3+3.3V_DUAL_USB4

+VDD_AUXC1

+VDD_AUXC3+VDD_AUXC2+VDD_CORE43

+VTT_CPU2

+VDD_CORE46+VDD_CORE45+VDD_CORE44

+VTT_CPU52

+VDD_CORE31

+VTT_CPU49+VTT_CPU48+VTT_CPU44

+3.3V_7+3.3V_6+3.3V_5+3.3V_4+3.3V_3+3.3V_2

+VDD_CORE20

+VDD_CORE12+VDD_CORE11+VDD_CORE10+VDD_CORE9+VDD_CORE8

APPLE INC.

NONESCALE

T22AH16Y11V11T11Y6P11AY13AB19AA4M11AD7AN26AB16AB17Y38Y37Y35Y34Y33Y28M37M35M34M10L5L43L40AU1K8K40K4K37K26K18K12K10J8J12G40AN8H23AW35H15H11G8G6G43G4G34AW20G24G22BC12G16G14G12G10F8F32F16F12E33E29E25E21E17E13D6D37D30D26D23D22D19D18D15D14D10C2BC5AY14BC41BC37BC33L35AY6AW31BA4BA1AV40

AY41AY38AY37AY34AY33AY30AV12AY10AW43AR43G20AW11AV7AV4AV36AV32AV28F20G28AU4AU38AU36AR30AU32AP33AU28AU12L12AY22AY21AT9AT7AT6AT33AT29AT13AR12AT10AR40AR32AR28AW23AP7AP40AP4AP37AP36AP34AP32AP28AU14AP14AU26AP10Y7AN4AN39AN30AN28AP26AM9AM7AM6AM5AM38AM37AM35AM34AM30AM26AM24AM22AM20AM18AM16AM10AL5AL40AL36AK40AK4AK37AK34AK33AK10AJ8AJ39AH38AH37AH34AH33AH26

U1400

OMIT

(10 OF 11)BGAMCP79-TOPO-B

AG32

W32V32U32T32

AA32Y32P32

N32

N31M33M32M31L34L33L32K35K34K33

J36

J35J34H37H35G38G37G36F39F38F37

E40

E39E38D41D40D39C42C41C40B42B41

AC32

AB32AL31AD32AK32AK31AJ32AH32AE32AF32P31

R32

AA16

AF12W25

Y23

W23W21AA24AH9AH7AH6AH5AH4AH3AH21

Y21

AH25W28AA23AH2W26AH11AH10AH1AG9AG8

AG5

AG7AG6AA21AG4AG3AG25AG23AG21AG12AG11

AG10

AA20AF9AH23AF7AF4AF3AF25AF23AF21AF2

AH12

AA19AF11AF10AE28AE27AE26AE25AE23AE21AE19

U25

AA18V25W27AD23AD21AC28AC27AC26AC25AC24

AC23

AA17AC21AC20AC19AC18AC17AC16AA28AA27AA26AA25

V21U21T21

A20

K28J28H27G26K20J20H19G18

Y9AA8AB11Y10AD9AB10AE8AD10

U1400

051-7892 A.0.0

97 22

MCP Power & Ground

PPCPUVTT_S0 PPVCORE_S0_MCP_REG

Trang 23

APPLE INC.

NONESCALE

MCP79 A01 Silicon Support

Trang 24

APPLE INC.

NONESCALE

Current numbers from email Poonacha Kongetira provided 11/30/2007 4:04pm (no official document number)

NV: 1x 4.7uF 0603, 1x 0.1uF 0402 (4.8 uF)

16996 mA (A01, 1.0V)

23065 mA (A01, 1.2V)

MCP 3.3V Ethernet PowerNV: 1x 4.7uF 0603, 1x 0.1uF 0402 (4.8 uF)

Apple: 1x 2.2uF 0402 (2.2 uF)

Apple: 5x 2.2uF 0402 (11 uF)

NV: 1x 4.7uF 0603, 1x 0.1uF 0402 (4.8 uF)

Apple: 1x 2.2uF 0402 (2.2 uF)

131 mA (A01)MCP 1.05V RMGT PowerMCP PCIE (DVDD) Power

MCP Core Power

NV: 1x 10uF 0805, 1x 4.7uF 0402, 2x 0.1uF 0402 (14.9 uF)

4.7UFX5R20%

1

C2582

4.7UFX5R20%

1

C2588

4.7UFX5R20%

1

C2584

4.7UFX5R20%

4V2

1

C2586

2.2UFCERM402-LF20%

6.3V2

4.7UFX5R20%

1

C2502

1UFX5R402-110%

2

1UFX5R10%

402-12

1UF402-110V2

1UFX5R402-110%

2

CERM40220%

0.1UF2

0.1UFCERM40220%

2

0.1UFCERM40220%

2

0.1UFCERM40220%

2

0.1UFCERM40220%

2

0.1UFCERM20%

4022

2.2UFCERM402-LF20%

6.3V2

2.2UFCERM402-LF20%

6.3V2

2.2UFCERM402-LF20%

6.3V2

2.2UFCERM402-LF20%

6.3V2

2.2UFCERM402-LF20%

6.3V2

2.2UFCERM402-LF20%

6.3V2

2.2UFCERM402-LF20%

6.3V2

1UFX5R402-110%

2

1UFX5R402-110%

2

4.7UFX5R20%

4V2

1

C2515

2.2UFCERM402-LF20%

6.3V2

2.2UFCERM402-LF20%

6.3V2

4.7UFX5R20%

4V2

1

C2520

2.2UFCERM402-LF20%

6.3V2

2.2UFCERM402-LF20%

6.3V2

2.2UFCERM402-LF20%

6.3V2

2.2UFCERM402-LF20%

6.3V2

CERM20%

6.3V402-LF2.2UF2

2.2UFCERM402-LF20%

6.3V2

2.2UFCERM402-LF20%

6.3V2

2.2UFCERM402-LF20%

6.3V2

2.2UFCERM402-LF20%

6.3V2

0.1UFCERM40220%

2

0.1UFCERM40220%

2

0.1UFCERM40220%

2

0.1UFCERM40220%

2

0.1UFCERM40220%

2

0.1UFCERM40220%

2

0.1UFCERM40220%

2

0.1UFCERM40220%

2

0.1UFCERM40220%

2

4.7UFX5R20%

1

C2540

2.2UFCERM402-LF20%

6.3V2

2.2UFCERM402-LF20%

6.3V2

4.7UFX5R20%

1

C2580

30-OHM-5A060321

L2570

30-OHM-5A060321

L2575

0402

30-OHM-1.7A

21

L2582

30-OHM-1.7A040221

L2584

30-OHM-1.7A040221

L2588

30-OHM-1.7A040221

L2586

30-OHM-1.7A040221

L2555

4.7UFX5R20%

1

C2500

4.7UFX5R20%

1

C2501

0.1uFCERM40220%

2

0.1uFCERM40220%

2

2.2UFCERM402-LF20%

6.3V2

0.1UFCERM40220%

2

0.1UFCERM40220%

2

4.7UFX5R20%

1

C2595

30-OHM-1.7A040221

L2595

1.47KMF-LF4021%

1/16W2

1

R2590

0.1UFCERM40220%

2

1.47KMF-LF4021%

1/16W2

1

R2591

18

0.1uFCERM40220%

2

CERM40220%

0.1uF2

0.1uFCERM40220%

2

10V402CERM

0.1UF20%

2

0.1UFCERM40220%

2

0.1UFCERM40220%

2

0.1UFCERM40220%

2

0.1uFCERM40220%

2

4.7uFX5R20%

1

C2528

30-OHM-1.7A040221

L2580

0.1UFCERM20%

4022

4.7UFX5R20%

1

C2503

97 051-7892 A.0.0

MIN_LINE_WIDTH=0.4 MM

VOLTAGE=1.05VMIN_LINE_WIDTH=0.4 MMPP1V05_S0_MCP_PLL_CORE

PP3V3_S0_MCP_PLL_USBVOLTAGE=3.3V

PP1V05_S0_MCP_PLL_SATAVOLTAGE=1.05V

PP1V05_ENET_MCP_PLL_MACVOLTAGE=1.05V

MIN_LINE_WIDTH=0.4 MMPP1V2R1V05_ENET

MIN_LINE_WIDTH=0.4 MMPPCPUVTT_S0

PP1V05_S0_MCP_SATA_AVDDVOLTAGE=1.05V

MIN_LINE_WIDTH=0.4 MMPPCPUVTT_S0

PP1V05_S0_MCP_PLL_FSBVOLTAGE=1.05V

MIN_LINE_WIDTH=0.4 MMPP1V05_S0_MCP_PLL_PEXVOLTAGE=1.05V

Trang 25

APPLE INC.

NONESCALE

DRAWING NUMBER

SIZE

D

WF: Checklist says 0-ohm resistor placeholder for ferrite bead

NV: 1x 4.7uF 0603, 1x 0.1uF 0402 (4.8 uF)

95 mA (A01)

WF: Checklist says 0-ohm resistor placeholder for ferrite bead

NV: 1x 4.7uF 0603, 1x 0.1uF 0402 (4.8 uF)Apple: 1x 2.2uF 0402 (2.2 uF)

Current numbers from email Xiaowei Lin provided 11/12/2007 3:22pm (no official document number)

NO STUFF 0.1UFCERM40220%

2

1

C2620

NO STUFF 1KMF-LF402

1%

1/16W2

NO STUFF 0.1UFCERM40220%

2

1

C2630

4.7UFX5R20%

1

C2615

4.7UFCERM60320%

1

C2640

30-OHM-1.7A040221

L2640

0.1uFCERM40220%

2

2.2UFCERM402-LF20%

6.3V2

0MF-LF402

5%

1/16W2

1

R2651

1KMF-LF402

1%

1/16W2

2.2UFCERM402-LF20%

6.3V2

051-7892 A.0.0

97 25

MCP Graphics Support

NO_TEST=TRUEMAKE_BASE=TRUENC_MCP_RGB_RED

NC_MCP_RGB_HSYNC

NO_TEST=TRUEMAKE_BASE=TRUENC_MCP_RGB_VSYNC

NC_CRT_IG_R_C_PR

NO_TEST=TRUEMAKE_BASE=TRUENC_CRT_IG_HSYNC

NC_MCP_RGB_RED NC_MCP_RGB_GREEN

NC_CRT_IG_B_COMP_PB

NC_MCP_CLK27M_XTALIN NC_MCP_CLK27M_XTALOUT

MCP_IFPAB_VPROBE

NC_MCP_TV_DAC_RSET NC_MCP_TV_DAC_VREF

NO_TEST=TRUEMAKE_BASE=TRUENC_MCP_TV_DAC_VREF

NC_MCP_CLK27M_XTALIN

NC_MCP_CLK27M_XTALOUT

NC_MCP_TV_DAC_RSET NC_MCP_RGB_DAC_VREF

MCP_HDMI_VPROBE

NO_TEST=TRUEMAKE_BASE=TRUENC_MCP_RGB_BLUE NC_MCP_RGB_HSYNC

NC_MCP_RGB_VSYNC

NC_MCP_RGB_BLUE

NC_MCP_RGB_GREEN

NC_CRT_IG_R_C_PR

NC_MCP_RGB_DAC_RSET

NC_MCP_RGB_DAC_VREF

NC_CRT_IG_VSYNC NC_CRT_IG_VSYNC

NC_CRT_IG_HSYNC

NC_CRT_IG_B_COMP_PB

NO_TEST=TRUEMAKE_BASE=TRUENC_CRT_IG_G_Y_Y NC_CRT_IG_G_Y_Y

NO_TEST=TRUEMAKE_BASE=TRUENC_MCP_RGB_DAC_RSET

PP1V8_S0

MCP_HDMI_RSET

PP3V3_S0

MCP_IFPAB_RSET PPCPUVTT_S0

PP3V3_S0_MCP_VPLLVOLTAGE=3.3V

PP3V3_S0_MCP_DACVOLTAGE=3.3VMIN_LINE_WIDTH=0.4 MM

Trang 26

OUTIN

NCNC

OUT

OUTIN

IN

OUTOUT

OUT

OUTOUT

IN

ININ

OUT

Y B A

OUT

APPLE INC.

NONESCALE

Platform Reset Connections

SMC 99ms delay from ALL_SYS_PWRGD to IMVP_VR_ON plus IMVP6 delay for

MCPSEQ_SMC represents MCP79 ’MLB’ power sequencing connections,

MCPSEQ_MIX is cross between MLB and internal power sequencing, whichresults in earlier ROMSIP and MCP FSB I/O interface initialization

RTC Power Sources

LPC Reset (Unbuffered)

PCIE Reset (Unbuffered)

VR_PWRGOOD_DELAY should guarantee CPU_VLD does not go high beforeCPUVDD_EN (which is 40-100ms after PS_PWRGD assertion)

NOTE: If CPU_VLD deasserts during S0 MCP79 will take system to S5 immediately

50V

21

C2810

12pF

CERM402

5%

50V21

C2811

0

MF-LF5%

1/16W402

21

R2810

NO STUFF

MF-LF4025%

1/16W10M

MF-LF4025%

1/16W21

R2896

33

MF-LF402

5%

1/16W21

R2883

PLACEMENT_NOTE=Place close to U1400 33

MF-LF402

5%

1/16W21

R2881

0

MF-LF402

5%

1/16W21

R2890

SILK_PART=FP SYS RESET

OMIT 0MF-LF4025%

1/16W2

1/16W21

R2826

PLACEMENT_NOTE=Place close to U1400 33

MF-LF4025%

1/16W21

5%

50V21

C2815

12pF

CERM402

5%

50V21

C2816

CRITICAL 25.0000MSM-3.2X2.5MM

1/16W21

R2815

NO STUFF 1MMF-LF402

5%

1/16W2

22

MF-LF402

5%

1/16W21

R2899

NO STUFF 1UFX5R10%

5%

1/16W21

1/16W402

21

R2891

27

MF-LF5%

402

021

R2894

33

MF-LF4025%

1/16W21

MF-LF4025%

1/16W21

R2851

MCPSEQ_SMC 0.1UFCERM40220%

2

MCPSEQ_SMC 0

MF-LF4025%

1/16W21

R2850

21

MCPSEQ_SMC 0

MF-LF402

5%

1/16W21

R2853

21

MCPSEQ_MIX 0

MF-LF4025%

1/16W21

R2852 MCPSEQ_SMC

TC7SZ08AFEAPESOT665

4 5

3 1 2

U2850

40216V0.1UF10%

2

1

C2801

6.3V40220%

4.7UFX5R 2

1

C2802

X5R4.7UF40220%

1/16W21

PM_CLK32K_SUSCLK_R LPC_CLK33M_SMC_R

PM_SYSRST_L

PM_SYSRST_DEBOUNCE_L XDP_DBRESET_L

S0_AND_IMVP_PGOOD VR_PWRGOOD_DELAY

Trang 27

OUTOUT

V+

V-RESET*

A0A1A2

SCLSDA

P0P1P2

P5P6P7

P3P4

THRMVCC

GNDPAD

NCNC

IN

INBI

VDD

VOUTDVOUTCVOUTBVOUTASCL

SDAA0A1GND

INBI

QTY

APPLE INC.

NONESCALE

MEM A VREF CADAC channel A B A B C D

BOM options provided by this page:

Place close to U8500, U8550

Place close to U1000.AD26

Power aliases required by this page:

Required zero ohm resistors when no VREF margining circuit stuffed

SO-DIMM A and SO-DIMM B Vref settings should be margined separately (i.e not simultaneously) due to current limitation of TPS51116 regulator

Max Vref 1.250 V 1.250 V 1.250 V 1.250 V 1.044 V 1.426 VNominal Vref 0.75 V 0.75 V 0.75 V 0.75 V 0.70 V 1.248 VMax sink I -3.75 mA -3.75 mA -3.75 mA -3.75 mA -0.91 mA -59.04 mAMin DAC code 0x00 0x00 0x00 0x00 0x00 0x00

Max source I 5 mA 5 mA 5 mA 5 mA 0.52 mA 51.15 mA Max DAC code 0x87 0x87 0x87 0x87 0x55 0xFF

9 74

1/16W1%

402MF-LF49.9 VREFMRGN2

1

R2916

10 88

10V402CERM0.1UF VREFMRGN

2

1/16W1%

402MF-LF100 VREFMRGN2

1

R2914

1/16W5%

402MF-LF

1

R2903

1/16W5%

402MF-LF

1

R2917

UCSPMAX4253 VREFMRGN

B4

B1

C4C1C2

C3

U2902

B4

B1

A4A1A2

A3

U2903

B4

B1

A4A1A2

A3

U2902

B4

B1

C4C1C2

C3

U2903

B4

B1

A4A1A2

A3

U2904

B4

B1

C4C1C2

C3

U2904

1/16W1%

1

R2905

1/16W1%

1

R2909

1/16W1%

1

R2911

1/16W5%

402MF-LF

1

R2904

1/16W1%

1

R2906

1/16W1%

1

R2910

1/16W5%

402MF-LF

VREFMRGN

21

151413121110976

543

U2901

2

1/16W1%

1

R2912

1/16W5%

402MF-LF

76

3109

2

6.3V20%

402-LFCERM2.2UF VREFMRGN

2

SYNC_MASTER=DDR

FSB/DDR3/FRAMEBUF Vref Margining

R2905 1

R2911 1

R2909 1

R2903 1

VREFMRGN_CPUFSB_EN SMBUS_SMC_MGMT_SDA

VREFMRGN_FRAMEBUF_EN

VREFMRGN_DQ_SODIMM

PPVTTDDR_S3

MIN_NECK_WIDTH=0.2 mmPP0V75_S3_MEM_VREFDQ_A

VREFMRGN_CA_SODIMMB_BUF

VREFMRGN_CPUFSB_EN VREFMRGN_CPUFSB_BUF

VREFMRGN_FRAMEBUF_EN VREFMRGN_FRAMEBUF_BUF

VREFMRGN_FRAMEBUF

VREFMRGN_CA_SODIMMB_EN

VREFMRGN_CA_SODIMM

VREFMRGN_DQ_SODIMMA_EN VREFMRGN_DQ_SODIMMA_BUF

VREFMRGN_CA_SODIMMA_EN VREFMRGN_CA_SODIMMA_BUF VREFMRGN_DQ_SODIMMB_EN

VREFMRGN_CA_SODIMMA_EN

VREFMRGN_DQ_SODIMMB_EN

PCA9557D_RESET_L VREFMRGN_DQ_SODIMMA_EN SMBUS_SMC_MGMT_SCL

VREFMRGN_CA_SODIMMB_EN

CPU_GTLREF GPU_FB_B_VREF_DIV GPU_FB_A_VREF_DIV

SMBUS_SMC_MGMT_SDA SMBUS_SMC_MGMT_SCL

PP3V3_S3

VREFMRGN_CPUFSB

VREFMRGN_DQ_SODIMMB_BUF

MIN_NECK_WIDTH=0.1 mmPP0V75_S3_MEM_VREFCA_A

MIN_NECK_WIDTH=0.2 mmPP0V75_S3_MEM_VREFDQ_B

MIN_NECK_WIDTH=0.2 mmPP0V75_S3_MEM_VREFCA_B

Trang 28

A5

DQ33

VDDA10/AP

VDD

VSS

SA1VTT

VSS

DQS4*

DQS4VSS

DQ35

VSSCK0*

SA0

VSSDQ58DQ59DM7

VSS

DQ57DQ56

DQ50DQ51VSS

DQS6*

DQS6VSSDQ49DQ48

DQ43VSS

DM5VSSDQ42

SDASCLVTT

VSSEVENT*

DQ62VSS

DQ63

DQS7*

DQS7

DQ60DQ61VSS

VSSDQ55DQ54

DM6VSS

DQ53VSSDQ52

DQ47VSS

DQS5VSSDQ46DQ41

VSSDQ40DQ34VSSDQ32TESTVDD

VDDS1*

A13CAS*

WE*

BA0VDD

VDDCK0A1A3VDD

VDDA8A9A12/BC*

VDDBA2NCVDDCKE0

VSSDQS5*

VSSDQ44DQ45

DQ39DQ38VSS

VSSDM4

VSS

DQ37DQ36VREFCA

VDDODT1NC

S0*

ODT0

BA1RAS*

VDD

CK1*

VDD

VDDA0CK1

A2VDDA4VDD

VDDA14A15

CKE1VDD

BIIN

BIBI

IN

BIIN

BI

BIBI

IN

BIBI

DQ16

DM3DQ26DQ27

DQ4

DQ31DQ30DQS3DQS3*

DQ29DQ28DQ23DQ22DM2DQ21DQ20DQ15DQ14RESET*

DM1DQ13DQ12DQ7DQ6DQS0DQS0*

DQ5

DQ24DQ25

DQ19DQ18DQS2DQS2*

DQ17DQ11DQ10DQS1DQS1*

DQ8DQ9

DM0

DQ0DQ1VREFDQ

DQ3DQ2VSSVSS

BIBI

BI

BIBI

BI

BIBI

ININ

BIBI

IN

BIBI

IN

BIBI

IN

BIBI

BI

BIBI

BI

IN

BIBI

OUTBIIN

IN

ININ

BIBI

BI

INBI

BIBI

IN

BIBI

APPLE INC.

NONESCALE

Signal aliases required by this page:

516-0196

516-0196 SPD ADDR=0xA0(WR)/0xA1(RD)

- =PP1V5_S0_MEM_A

- =PPSPD_S0_MEM_A (2.5 - 3.3V)

DDR3 PLANE STITCHING CAPS (SPACE EVENLY ACROSS PLANE SPLIT)

"Factory" (top) slot

196195

190189

185

184179

178173

172168167

162161

156155

151

150145

144139

138

134133

128127

126

199

10099

9493

8887

8281

124123

118117

112111

106105

7675

125

200202201

197

121

114110

120116

12277

198

186188

169171

152154

135137

194192

182180

193191

183181

176174

166164

177175

165163

160158

148146

159157

149147

142140

132130

143141

131129

187

170153

136

7473

104102103

101

115

79

108109

6.3V20%

402-LFCERM2.2UF2

2019

1413

9

7271

6665

48

4443

3837

3231

3

21

30

6264

4547

2729

1012

2321

1816

64

7068

17

5856

6967

5957

5250

424015

5351

4139

3634

2422

3533

75

63

4628

6.3V20%

402-LFCERM2.2UF2

402MF-LF10K

2

1/16W5%

402MF-LF10K

2

6.3V20%

402-LFCERM2.2UF2

6.3V20%

60310UF2

6.3V20%

60310UF2

10V402CERM0.1UF2

28 97

A.0.0 051-7892

DDR3 SO-DIMM Connector A

SYNC_DATE=07/22/2008 SYNC_MASTER=DDR

Trang 29

BI

BIBI

OUTBIIN

IN

ININ

IN

ININ

BIBI

BI

IN

BIBI

IN

BIBI

BIBIIN

VDDA1A3VDDA5A8VDDA9

VDDA12/BC*

VSS

DQ42DQ43

DQ48DQ49VSS

VSSDQ41DQS4*

DM5

VDDCKE1

A15A14VDDA11A7A6VDD

A4A2

CK1

A0VDD

VDDCK1*

VDDRAS*

BA1

ODT0S0*

NCODT1VDD

VREFCAVDD

DQ36DQ37VSS

DM4VSS

VSSDQ38DQ39

DQ45DQ44VSS

DQS5*

VSS

CKE0VDDNCBA2

CK0

VDDBA0

WE*

A13S1*

VDD

VDDTEST

DQ33DQ32

VSS

DQ34

DQ40VSS

DQ46VSSDQS5

VSSDQ47

DQ52VSSDQ53

VSSDM6DQ54DQ55VSS

VSSDQ61DQ60

DQS7DQS7*

DQ63

VSSDQ62

EVENT*

VSS

VTTSCLSDA

VSS

DQS6DQS6*

VSS

DQ51DQ50

A10/APVDDCK0*

DQ35VSSDQS4VSSCAS*

VDD

DM7VSSDQ56

MTG PINMTG PIN

DQ58VSS

DQ59VSSVDDSPD

BIBI

IN

BIIN

BI

BIBI

IN

BIBI

BI

DQ2DQ3

VREFDQ

DQ1DQ0

DM0

DQ9DQ8

DQS1*

DQS1DQ10DQ11

DQ17

DQS2*

DQS2

DQ18DQ19

DQ25DQ24

DQ5

DQS0*

DQS0

DQ6DQ7DQ12DQ13DM1RESET*

DQ14DQ15DQ20DQ21

DM2

DQ22DQ23DQ28DQ29DQS3*

DQS3DQ30DQ31DQ4

DQ27DQ26DM3

DQ16

VSS

VSSVSSVSSVSSVSS

VSSVSS

KEY

VSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSS

VSSVSS

VSSIN

BIBI

BI

BIBI

BI

BIBI

ININ

IN

BI

IN

ININ

BIBI

IN

BIBI

IN

BIBI

IN

BI

BIBI

BIIN

BI

BIBI

BI

APPLE INC.

NONESCALE

DDR3 PLANE STITCHING CAPS (SPACE EVENLY ACROSS PLANE SPLIT)

402-LFCERM2.2UF2

1/16W5%

402MF-LF10K

2

1/16W5%

402MF-LF10K

2

6.3V20%

402-LFCERM2.2UF2

6.3V20%

60310UF2

6.3V20%

60310UF2

10V402CERM0.1UF2

15

10V402CERM0.1UF2

212211

210209

208207

206205

196195

190189

185

184179

178173

172168167

162161

156155

151

150145

144139

138

134133

128127

126

199

10099

9493

8887

8281

124123

118117

112111

106105

7675

125

200202201

197

121

114110

120116

12277

198

186188

169171

152154

135137

194192

182180

193191

183181

176174

166164

177175

165163

160158

148146

159157

149147

142140

132130

143141

131129

187

170153

136

7473

104102103

101

115

79

108109

2019

1413

9

7271

6665

48

4443

3837

3231

3

21

30

6264

4547

2729

1012

2321

1816

64

7068

17

5856

6967

5957

5250

424015

5351

4139

3634

2422

3533

75

63

4628

6.3V20%

402-LFCERM2.2UF2

PP0V9R0V75_S0_DDRVTT MEM_EVENT_L

Trang 30

APPLE INC.

NONESCALE

Required becaues MCP79 does not meet DDR3 spec power-up reset timing requirement.

must be high before 1.5V starts to 3.3V S5 is used because MEM_RESET rise to avoid glitch on MEM_RESET_L.

CRITICAL DMB53D0UDWSOT-363

2

1

R3300

10V0.1UF20%

CERM4022

4021/16W20K5%

MF-LF2

1

R3301

402

01/16W5%

12

R3309

16

5%

1/16W4021K

Trang 31

IN

INBI

Y B A

D

GS

5V S3 WLAN FET

Part Type Rds(on)

P-Channel

(C3420 & C3421) PLACEMENT_NOTEs:

BLUETOOTH

750 mA nominal max

AIRPORT

ALS CAMERA

L3404

0.1uF402CERM10V2

PLACEMENT_NOTE=Place close to J3401

0.1uF

40216V

21

312

U3401

26

SOT-55374LVC1G17DRL

45

132

U3402

Place close to Q3450.

20%

X5R10UF2

402MF-LF5%

CRITICAL

DLP11S90-OHM-100MA

PLACE_NEAR=J3401.8,2mm

21

L3403

SSM6N15FEAPESOT563

3

Q3455 1

5%

4021/16W21

R3455

CERM40220%

0.1uF2

XW3450

SM2

1

XW3451

SM2

C3450

10%

X5R0.033UF2

1

C3451

100K1/16W5%

402

21

Right Clutch Connector

31 97

A.0.0 051-7892

SYNC_MASTER=MUXGFX SYNC_DATE=12/08/2008

PP5V_WLAN_FMIN_LINE_WIDTH=1 mmVOLTAGE=5VMIN_NECK_WIDTH=0.5 mm

PP5V_WLAN_RVOLTAGE=5VMIN_NECK_WIDTH=0.5 mmMIN_LINE_WIDTH=1 mm

ISNS_AIRPORT_N ISNS_AIRPORT_P

PCIE_CLK100M_MINI_N PCIE_CLK100M_MINI_CONN_P

PCIE_MINI_R2D_N

PP3V3_S3_BT_F

MIN_LINE_WIDTH=0.5 mm MIN_NECK_WIDTH=0.25 mm VOLTAGE=3.3V

PP3V3_S3MIN_LINE_WIDTH=0.5 mm

PP5V_S3_BTCAMERA_F

MIN_NECK_WIDTH=0.25 mmVOLTAGE=5V

PP5V_S3

MIN_NECK_WIDTH=0.5 mmMIN_LINE_WIDTH=1 mmVOLTAGE=5VPP5V_WLAN

MINI_RESET_CONN_L

PCIE_MINI_D2R_P PCIE_MINI_D2R_N

PCIE_WAKE_L

SMBUS_SMC_A_S3_SCL SMBUS_SMC_A_S3_SDA

USB_CAMERA_CONN_N USB_CAMERA_CONN_P

CONN_USB2_BT_N CONN_USB2_BT_P

Trang 32

VDDWRITE_PROTECT_SW

CARD_DETECT_SWCARD_DETECT_GND

DAT6DAT7

DAT1

CD/DAT3DAT2

DAT4DAT5

VSSVSSCLKCMDDAT0

SHLD_PIN

SHLD_PINSHLD_PINSHLD_PINX2

D4D2

XD_CDZXD_CEXD_WEZXD_RBZXD_WPZMS_INS

SD_WPSD_CMDPDMOD

MS_BS

GND

NCNCNCNCNC

NCNCNCNCNCNCNC

D

SG

D

SGIN

IN

APPLE INC.

NONESCALE

10K LOW = POWER SAVING MODE ENABLE PDMOD: POWER DOWN MODES

(PDMOD)

10K HIGH = REMOTE WAKE UP ENABLE

MF-LF4021/16W5%

6036.3V10UF2

1C3500

40210V0.1UFCERM2

1C3501

NO STUFF

402MF-LF

1M5%

1/16W21

R3503

10VCERM20%

0.1UF4022

1C3505

10VCERM0.1UF4022

1C3506

60320%

CERM16.3V2.2UF2

1C3507

0.1UF20%

CERM40210V2

1C3508

0.1UFCERM40210V2

1C3502

0.1UFCERM40220%

2

1C3503

402

0.1UF10VCERM20%

33PF

402

21

C3511

12.000M-100PPM8X4.5X1.4-SM

CRITICAL

21

Y3500

40250V33PF

CERM5%

21

C3512

OMIT

F-RT-THSD-CARD-K19

16

63

4

20191817

1312111098725

1

1415

J3500

0.22UH0805-121

2

2433

464748

22

3832302829374340

10UF20%

2

1C3514

5%

MF-LF402

39K1/16W2

402CERM

NO STUFF0.1UF20%

2

1C3513

7151%

1/16W4022

1

R3506

MF-LF

10K5%

4022

1

R3507

1/16W5%

10K

NO STUFF

402MF-LF2

1

R3508

5%

402MF-LF10K

402

21

R3511

10K5%

MF-LF4021/16W2

1

R3512

10K1/16W5%

021

R3504

402-1CERM50V

NO STUFF

5%

10PF2

1C3515

SSM6N15FEAPESOT563

45

3

Q3500

SSM6N15FEAPESOT563

12

32 97

SYNC_DATE=01/30/2009SYNC_MASTER=VEMURI

SECUREDIGITAL CARD READER

A.0.0 051-7892

CARDREADER_PLT_RST_L

CARDREADER_PLT_RSTCARDREADER_RESET

SD_CLK

PP3V3_S3_CARDREADER_DVDD

CARDREADER_GPIO2CARDREADER_GPIO1

MIN_NECK_WIDTH=0.20MMPP3V3_S3MIN_LINE_WIDTH=0.40MM VOLTAGE=3.3V

PP3V3_S3_CARDREADER_DVDD

CARDREADER_PDMOD

SD_CMD

SD_WPSD_CD_L

PLACEMENT_NOTE=PLACE 402 NEAR EACH PIN

PP3V3_S3_CARDREADER_AVDD

PP1V8_S3_CARDREADER

MIN_LINE_WIDTH=0.30MM VOLTAGE=1.8V

VOLTAGE=3.3V MIN_NECK_WIDTH=0.20MM PLACEMENT_NOTE=PLACE 402 NEAR EACH PIN

Trang 33

IN

INBI

IN

BI

BIBI

BIBIBIBIBI

OUT

OUTOUTOUTOUT

MDI-[3]

LED1/PHYAD1LED2/RXDLYLED0/PHYAD0

CLOCKRESET

LED

APPLE INC.

NONESCALE

DRAWING NUMBER

SIZE

D

PLACE R3796 CLOSE TO U1400, PIN D24

Alias to GND for external 1.05V supply

Alias to =PP3V3_ENET_PHY for internal switcher

WF: Marvell numbers, update for Realtek

If internal switcher is used, must place inductor within 5mm

of U3700, and 1x 22uF & 1x 0.1uF caps within 5mm of inductor

NOTE: VDDREG rise time must be >1ms to avoid damage to switcher

1x 0.1uF caps within 5mm of U3700 pins 44 & 45

If internal switcher is used, must place 1x 22uF &

PHYAD = 01 (PHY Address 00001)

WF: Marvell numbers, update for Realtek

(221mA typ - 1000base-T)( 7mA typ - Energy Detect)

(19mA typ - Energy Detect)(43mA typ - 1000base-T)

If internal switcher is not used, VDDREG and REGOUT can float

Configuration Settings:

Hence, RC (R3725 and C3725) are made NOSTUFF

ENET_RESET_L is not asserted when WOL is active

per RealTek request

Reserved for EMI

TXDLY = 0 (No TXCLK Delay)

AN[1:0] = 11 (Full auto-negotiation)

RXDLY = 0 (RXCLK transitions with data)

1/16W5%

402MF-LF

021

R3724

10V402CERM0.1UF

1/16W1%

402MF-LF2.49K

2

1

R3730

1/16W5%

402MF-LF4.7K

2

1

R3720

0402-LFFERR-120-OHM-1.5A CRITICAL

2

1

L3705

16V4020.1UF2

2

1

R3752

1/16W5%

402MF-LF4.7K

2

1/16W5%

402MF-LF4.7K

2

1

R3750

1/16W5%

402MF-LF4.7K

2

16V4020.1UF2

1

C3715

16V4020.1UF2

1

C3716

0402-LFFERR-120-OHM-1.5A

1

C3711

16V4020.1UF2

1

C3710

16V4020.1UF2

1

C3714

50V5%

402CERM10PF2

1

C3790

1/16W5%

402MF-LF

26252423

27

22

18171614

1319

46

48

2931

1112

89

45

1230

383534

MIN_NECK_WIDTH=0.2 MMVOLTAGE=3.3VPP3V3_ENET_PHYAVDD

Trang 34

DS

OUT

D

SGIN

D

SG

D

SG

D

SGIN

D

SGIN

APPLE INC.

NONESCALE

ARB for alternate power options

=P3V3ENET_EN Nets separated onRecommend aliasing PM_SLP_RMGT_L and

1.05V ENET FET WLAN Enable Generation

Recommend aliasing PM_SLP_RMGT_L and

"WLAN" = ("S3" && "AP_PWR_EN" && ("AC" || "S0"))NOTE: S3 term is guaranteed by S3 pull-up on open-drain AP_PWR_EN signal

NOTE: MCP79 can provide 25MHz clock, but clock runs whenever RMGT rails are powered

Designs must ensure PHY is powered whenever RMGT rails are, or use separate crystal

Non-ARB:

Pull-up is with power FET

SOT-23-HFNTR4101P CRITICAL

2

13

Q3810

16V402CERM

0.01UF

C3810

16V4020.033UF2

1/16W5%

402MF-LF

100K21

R3810

18

1/16W5%

402MF-LF22

21

R3895

33 92

16V402CERM0.01UF2

10V402CERM0.1UF2

1

C3840

31

SOT563SSM6N15FEAPE

45

12

6

Q3805

SOT563SSM6N15FEAPE

12

6

Q3841

1/16W1%

402MF-LF69.8K

2

1

R3842

SOT23SI2312BDS CRITICAL

21

3

Q3840

1/16W5%

402MF-LF10K2

1

R3800

SOT563SSM6N15FEAPE

45

10K21

R3841

1/16W5%

402MF-LF

100K21

R3840

SYNC_DATE=07/01/2008SYNC_MASTER=SUMA_M98_MLB

34 97

A.0.0 051-7892

Ethernet & AirPort Support

P1V05ENET_EN_L_RC

PP1V2R1V05_ENET PP1V2R1V05_S5

Trang 35

RXTX

DRAWING NUMBER

SIZE

D

9 8 7 6

5 4 3 2

12 11 10

1/16W 5%

402 MF-LF 75 2

1

R3900

1/16W 5%

402 MF-LF 75 2

1

R3901

1/16W 5%

402 MF-LF 75 2

1/16W 5%

MF-LF 75 402 2

2KV 1206 1000PF CRITICAL 2 1

16V 402

0.1UF 2

16V 402

0.1UF 2

SM

TLA-6T213HF CRITICAL

9 8 7 6

5 4 3 2

12 11 10

16V 402

0.1UF 2

F-RT-TH

CRITICAL RJ45-M97-3 9

8 7 6 5 4 3 2

12 11

10 1

J3900

CRITICAL

402-1

10PF 50V 5%

50V 402-1

97

Ethernet Connector

SYNC_DATE=12/16/2008SYNC_MASTER=AMASON_M98_MLB

MIN_NECK_WIDTH=0.25 mm MIN_LINE_WIDTH=0.6 mm ENET_BOB_SMITH_CAP

Trang 36

ATBUSHATBUSN

VP25

OCR_CTL_V10

VAUX_DETECT

TMSTCKREFCLKNPCIE_TXD0P

AVREGCE

CLKREQN

FW_RESET*

FW620*

JASI_ENMODE_ANAND_TREE

OCR_CTL_V12

PCIE_RXD0NPCIE_RXD0PPCIE_TXD0N

SCLSDASE

SM

TDOTPA1N

TPA2NTPA2PTPB0NTPB0PTPB1NTPB1PTPB2NTPB2PTPBIAS0TPBIAS1TPBIAS2

DS0

TPA1P

VDD33VDD10

VREG_VSSVSS

CHIP RESETSCIF

1394 PHY

NCNCNC

NC

ININ

IN

NCNC

APPLE INC.

NONESCALE

NT-13

FIXME!!! - TYPO IN SYMBOL REGCTL

NT-3 (IPU)

NAND tree order

NOTE: NT-xx notes show

(Reserved)NT-9

(IPD) NT-19(IPD) NT-20

(IPU)

NT-12 (IPD)

NT-10 (IPD)

NT-7(IPD)

R4170

1

21/16W1%

402MF-LF191

2MF-LF5%

402470K

U4100

B13A13A11

A10L13

L2

F12E12E13

D12

K13D1J2K1

J12J13

N8N7N5N6

N4B11

N9N10

D13

L8

G2G1H1F2

N12M11M13

N13

M4N2M1M3

B8A8B5A5B3A3B9A9B6A6B4A4B7C3A2

B10

N1

E1D2

BGAFW643 CRITICAL OMIT

C4151

50V5%

402CERM22PF

C4150

50V5%

402CERM22PF

21/16W1%

402MF-LF200K

R4150

1/16W1%

402MF-LF412

R4163

1

21/16W5%

402MF-LF10K

R4164

1

21/16W5%

402MF-LF10K

21/16W5%

402MF-LF10K FW643_LDO

402X5R0.1UF

PLACEMENT_NOTE=Place C4176 close to U4000

402X5R0.1UF

R4166

1

21/16W5%

402MF-LF10K

402X5R0.1UF

26.3V10%

402CERM

26.3V10%

402CERM1UF

C4100

1

402CERM

1UF10%

26.3V10%

402CERM1UF

2 CERM6.3V10%

4021UF

26.3V10%

402CERM

26.3V10%

402CERM1UF

10%

402CERM1UF

26.3V10%

402CERM

26.3V10%

402CERM

26.3V10%

402CERM

26.3V10%

402CERM

26.3V10%

402CERM1UF

210V402CERM0.1UF

402MF-LF2.94K

L4135

0402-LF120-OHM-0.3A-EMI

37

L4110

0402-LF120-OHM-0.3A-EMI

R4100

402MF-LF

0.21%

TP_FW643_CE TP_FW643_JASI_EN

TP_FW643_TCK PCIE_CLK100M_FW_P PCIE_CLK100M_FW_N PCIE_FW_D2R_C_P PCIE_FW_D2R_C_N

TP_FW643_TDO

FW643_TPCPS TP_FW643_NAND_TREE

TP_FW643_SE

PP1V0_FW_FWPHY_AVDDMIN_LINE_WIDTH=0.4 MMVOLTAGE=1.0V

MIN_NECK_WIDTH=0.2 MMVOLTAGE=3.3VPP3V3_FW_FWPHY_VDDA

PCIE_FW_D2R_P PCIE_FW_D2R_N PCIE_FW_R2D_P

PCIE_FW_R2D_C_P PCIE_FW_R2D_N

PCIE_FW_R2D_C_N

NC_FW0_TPAN NC_FW0_TPAP

MIN_NECK_WIDTH=0.2 MMVOLTAGE=3.3VPP3V3_FW_FWPHY_VP25

FW643_REXT FW_CLK24P576M_XO_R

NC_FW2_TPBIAS NC_FW0_TPBIAS NC_FW2_TPBP FW_PORT1_TPB_P FW_PORT1_TPB_N NC_FW0_TPBN NC_FW2_TPAP NC_FW2_TPAN

FW_PORT1_TPA_N FW_PORT1_TPA_P

TP_FW643_VBUF TP_FW643_SM

TP_FW643_SCIFCLK

TP_FW643_FW620_L TP_FW643_AVREG

TP_FW643_TDI TP_FW643_TMS

FW643_VAUX_DETECT FW643_TRST_L

TP_FW643_VAUX_ENABLE FW643_REGCTL

FW_RESET_L TP_FW643_SDA FW643_WAKE_L

Trang 37

SG

IN IN

D

SG

V+

S

GD

S

IN

G

DS

D

SG

D

SG

D

SG

D

SG

IN

D

SG

D

SG

IN

GD

S

APPLE INC

NONE SCALE

II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

FireWire Port Power Switch

2.91V when late Vg event and port power is off 3.08V when port power is on

FWLATEVG Hysteresis:

- =PPVP_FW_SUMNODE (power passthru summation node)

- =PP3V3_FW_LATEVG_ACTIVE

- =PPBUS_S5_FWPWRSW (system supply for bus power)

Page Notes

Late-VG Event Detection

CERM402

0.1UF20%

2

MF-LF200K

4021%

1/16W21

R4210

10KMF-LF4025%

1/16W2

1

R4211

100pFCERM4025%

1

C4211

1/16W4021%

10K2

1

R4212

MF-LF1%

1/16W40280.6K

2

1

R4213

SOI-HFNDS9407 CRITICAL

321

4

8765

45

12

2 1

R4265 NOSTUFF

100

1%

402 1/16W 2 1

R4263

470K5%

1/16W4022

1

R4260

MF-LF402

330K5%

1/16W2

2

5

1 3

SOT-563

DMB54D0UV CRITICAL

2 1

F4260

CRS08-1.5A-30V

CRITICAL

SM 2 1

D4260

CRITICALBC847CDXV6TXGSOT563

1

6

2 Q4270

CRITICALSOT563BC847CDXV6TXG

4

3 5

Q4270

330K1/16W4025%

MF-LF2

1

R4270

56KMF-LF4025%

1/16W2

1

R4271

5%

402MF-LF100K1/16W2

1

R4274

12K402MF-LF5%

2

1

R4273

1/16W1K5%

402MF-LF2

1

R4272 CRITICAL

DMB53D0UV

SOT-563

12

6

Q4275

CRITICAL DMB53D0UV

6

Q4299

402 5%

MF-LF

10K

2 1

R4283

17 26

6.3V1UF10%

CERM402

2

1

DMB53D0UV CRITICAL

2 1

R4280

402

100K5%

MF-LF

2

10K5%

402MF-LF2

1

R4290

100K

MF-LF4025%

1/16W21

R4291

16V4020.033UF2

NTR4101PSOT-23-HFCRITICAL

2

13

Q4291

10%

402CERM

0.01UF

C4291

SSM6N15FEAPESOT563

45

3

Q4290

SSM6N15FEAPESOT563

45

3

Q4293

1/16W10KMF-LF4025%

2

1

R4295

1/16W402100K

MF-LF5%

21

R4296

220K1/16W4025%

21

R4297

SSM6N15FEAPESOT563

12

6

Q4293

NOSTUFF 0.068UFCERM40210%

2

CRITICAL

SI2312BDSSOT23

21

3

Q4295

36

SSM6N15FEAPESOT563

12

6

Q4264

SOT563SSM6N15FEAPE

45

402

2 1

C4296

402

1K5%

6

Q4276

4025%

1/16W100K

2

1

R4276

NOSTUFF 0.1UF

10%

402 2

051-7892 A.0.0

MIN_NECK_WIDTH=0.25 mmVOLTAGE=12.6V

PPBUS_FW_FWPWRSW_DMIN_LINE_WIDTH=0.5 mmPPBUS_FW_FWPWRSW_F

MIN_LINE_WIDTH=0.5 mmMIN_NECK_WIDTH=0.25 mmVOLTAGE=12.6VPPBUS_G3H

P1V0_FW_RC PP3V3_FW_FWPHY

FW_PLUG_DET PP1V2R1V05_ENET

FW_DET_MIRROR FW_PWR_EN_L

PP3V3_S0

P3V3FW_SS P3V3FW_EN_L

MAKE_BASE=TRUEPCIE_FW_PRSNT_L

FW_CLKREQ_L

PP1V2R1V05_ENET

PP1V0_FW P1V05FW_SS

P1V05_FW_EN_L_RC

PP3V3_FW_FWPHY

FW_CLKREQ_PHY_LMAKE_BASE=TRUEFW_CLKREQ_PHY_L

FW_PWR_EN PP3V3_S5

Trang 38

TPA+ TPA(R) VG

VP TPB+

TPB(R) TPB-

TPA-CHASSIS GND

DRAWING NUMBER

SIZE

D

constrained on this page It is

provide the appropriate constraints

Configures PHY for:

"Snapback" & "Late VG" Protection

NOTE: This page is expected to contain

- 1-port Portable Power Class (0)

- Port "1" Bilingual (1394B)

Page Notes

for snap-back diodes

Late-VG Protection Power

PP2V4_FWLATEVG needs to be biased

to at least 2.1V for FW signal integrityand should be biased to 2.4V for margin

assumed that FireWire PHY page will

to apply to entire TPA/TPB XNets

Termination

FW spec calls out 0.33uF

Place close to FireWire PHY

TI PHYs require 1uF even though

appropriate connectors and/or to

NOTE: FireWire TPA/TPB pairs are NOT

Cable Power

(GND_FW_PORT1_VG)(FW_PORT1_BREF)

AREF needs to be isolated from all

FireWire Design Guide (FWDG 0.6, 5/14/03)

1394b implementation based on Apple

the necessary aliases to map the

FireWire TPA/TPB pairs to their

- =GND_CHASSIS_FW_PORT1

PORT 1

properly terminate unused signals

R4390 should be 390 Ohms max for a 3.3V rail

FireWire PHY Config Straps

NC VP TPB+

VG TPA<R>

When a bilingual device is connected to a

Note: Trace PPVP_FW_PORT1 must handle up to 5A

local grounds per 1394b spec

SIGNAL_MODEL=EMPTY

56.2MF-LF402

1%

1/16W2

1

R4363

4.99KMF-LF4021%

1/16W2

1

R4364

SIGNAL_MODEL=EMPTY

56.2MF-LF402

1%

1/16W2

220pFCERM4025%

25V2

SIGNAL_MODEL=EMPTY

56.2MF-LF402

1%

1/16W2

1

R4361

0.33UFCERM-X5R40210%

6.3V2

SIGNAL_MODEL=EMPTY

56.2MF-LF402

1%

1/16W2

1

R4360

PLACEMENT_NOTE=Place C4319 close to connector pin 5.

0.1uFX7R603-110%

2

1

C4319

1MMF-LF402

5%

1/16W2

0.01UFX7R10%

2

CRITICAL FERR-250-OHMSM21

L4310

0.01uFX7R10%

2

1

C4310

CRITICAL BAV99DW-X-GSOT-363

62

1

DP4310

0.01uFX7R10%

2

1

C4311

35

4

DP4310

62

1

DP4311

35

1%

1/16W21

R4390

CRITICAL MMBZ5227BLT1HSOT23

3

1

D4390

CRITICAL 1394B-M97F-RT-TH

9

876

5432

13121110

1

J4310

10KMF-LF402

1%

1/16W2

1

R4381

10KMF-LF4021%

1/16W2

1

R4382

10KMF-LF4021%

1/16W2

6

Q4300

330KMF-LF4025%

1/16W2

1

R4312

470KMF-LF4025%

1/16W2

1

R4311

SYNC_DATE=08/14/2008SYNC_MASTER=SENSOR

FireWire Ports

051-7892 A.0.0

38 97

PPVP_FW_PORT1_FVOLTAGE=33VMIN_LINE_WIDTH=0.5 mmMIN_NECK_WIDTH=0.25 mm

FW_PORT1_TPA_P

FW_PORT1_AREF

PP2V4_FW_LATEVG

PPVP_FW_CPSVOLTAGE=12.6V

MAKE_BASE=TRUEMIN_LINE_WIDTH=0.4 mm

FW_P1_TPBIAS

FW_PORT1_TPB_PMAKE_BASE=TRUE

NC_FW0_TPBNMAKE_BASE=TRUE

NC_FW2_TPAPMAKE_BASE=TRUENC_FW0_TPANMAKE_BASE=TRUE

NC_FW0_TPBIAS NC_FW2_TPBIAS NC_FW0_TPAN

NC_FW2_TPAP

NC_FW2_TPANMAKE_BASE=TRUENC_FW0_TPAPMAKE_BASE=TRUE

NC_FW0_TPBIASMAKE_BASE=TRUENC_FW2_TPBIASMAKE_BASE=TRUE

NC_FW0_TPBN NC_FW2_TPBN

FW_PORT1_TPB_P

NC_FW0_TPBP

FW_PORT1_TPA_NMAKE_BASE=TRUE

FW_PORT1_TPA_PMAKE_BASE=TRUE

FW_PORT1_TPB_NMAKE_BASE=TRUE

PP2V4_FW_LATEVGVOLTAGE=2.4VMIN_LINE_WIDTH=0.38 mm

FW_PORT1_TPB_C FW_PORT1_TPB_N

PP3V3_S5

PPVP_FW

FW_PORT1_TPA_P

FWPHY_DS1MAKE_BASE=TRUE

FWPHY_DS2 FWPHY_DS1 FWPHY_DS0 PP3V3_FW_FWPHY

NC_FW0_TPBPMAKE_BASE=TRUE

NC_FW2_TPAN NC_FW0_TPAP

NC_FW2_TPBNMAKE_BASE=TRUE

FW_PORT1_TPA_N

PPVP_FW_CPS PPVP_FW

PP3V3_FW_FWPHY

CPS_EN_L CPS_EN_L_DIV

FW_PORT1_TPB_N FW_PORT1_TPB_P

Trang 39

INBI

ININ

D

SG

D

SG

SYM_VER-1

OUTOUT

ININ

OUT

OUTOUT

APPLE INC.

NONESCALE

ODD Power Control

ensure the drive is unpowered in S3/S5.

10%

0.001UF

CERM 402

2

1C4531

4.7

402 1/16W MF-LF 5%

FERR-220-OHM

040221

L4502

SM2

1

XW4503

SM21

XW4504

SM21

XW4505

SM21

XW4500

SM2

1

XW4502

SM2

1/16W33K

2

1

R4590

F-ST-SM54722-0164CRITICAL

98765432

161514131211101

J4500

21

PLACEMENT_NOTE=Place FL4520 close to J4500

CRITICAL 90-OHM-100MADLP11S43

FL4520

CRITICAL

90-OHM-100MADLP11S

PLACEMENT_NOTE=Place FL4525 close to J4500

21

45

3

Q4596

100KMF-LF5%

12

6

Q4596

100KMF-LF5%

1/16W21

R4595

0.068UFCERM40210%

21

C4526

0.01UF 10% 16V CERM402

PLACEMENT_NOTE=PLACE C4525 NEXT TO C4526

21

C4525

0603FERR-70-OHM-4A CRITICAL

21

L4500

0.1UF20%

CERM4022

CRITICAL 90-OHM-100MADLP11S43

FL4501

4020.1UFCERM20%

2

DLP11SCRITICAL 90-OHM-100MA

21

C4516

0.01UF 10% 16V CERM402

21

C4510

0.01UF 10% 16V CERM402

21

C4511

0.01UF 10% 16VCERM 402

21

222120

2

19181716151413121110

1

J4501

MF-LF 1/16W 5%

2

1C4532

051-7892 A.0.0

97 39

SATA Connectors

SYNC_MASTER=PWRSQNC SYNC_DATE=12/04/2008

PP5V_S0 PP5V_S0_HDD_R

MIN_NECK_WIDTH=0.4mmVOLTAGE=5V

ISNS_HDD_N ISNS_HDD_P

PP5V_SW_ODD_RVOLTAGE=5VMIN_LINE_WIDTH=0.6mm

ISNS_ODD_P

ISNS_ODD_N

PP5V_SW_ODDVOLTAGE=5VMIN_LINE_WIDTH=0.6mm

ODD_PWR_SS PP5V_S0

PP3V3_S0

ODD_PWR_EN

SATA_ODD_D2R_N SATA_ODD_R2D_UF_P

SATA_ODD_D2R_P

SATA_HDD_D2R_C_P

SATA_ODD_R2D_C_N SATA_ODD_R2D_C_P

SATA_HDD_R2D_UF_N

SATA_ODD_D2R_C_P SATA_ODD_D2R_C_N

SMC_ODD_DETECT

SATA_HDD_R2D_N SATA_HDD_R2D_P

MIN_NECK_WIDTH=0.4mmVOLTAGE=5VPP5V_S0_HDD_FLT

SMBUS_SMC_MGMT_SCL SMBUS_SMC_MGMT_SDA

PP1V8R1V5_S0_FET

VOLTAGE=1.5VMIN_NECK_WIDTH=0.3mmPP1V5_S0_HDD_FLT

Trang 40

EN2EN1OC2*

IN

VCC

GNDSELOE*

D+

D-Y+

M+

Y-

M-APPLE INC.

NONESCALE

We can add protection to 5V if we want, but leaving NC for now

Place L4600 and L4605 at connector pin

Left USB Port B

Port Power Switch

SEL=1 Choose USBSEL=0 Choose SMC

Left USB Port A

USB/SMC Debug Mux

0603FERR-220-OHM-2.5A CRITICAL

21

L4605

6.3V20%

CASE-B2-SMPOLY-TANT100UF CRITICAL

2

6.3V20%

60310UF2

1

C4695

10V402CERM0.1UF2

2

1

C4650

1/16W5%

402MF-LF10K

2

DLP11S90-OHM-100MA CRITICAL

21

R4651

1/16W5%

402MF-LF0 SMC_DEBUG_NO

21

R4652

16V402CERM0.01uF2

1

C4605

16V402CERM0.01uF2

0603FERR-220-OHM-2.5A CRITICAL

21

L4615

DLP11S90-OHM-100MA CRITICAL

21

L4610

6.3V20%

60310UF2

1

C4617

6.3V20%

CASE-B2-SMPOLY-TANT100UF CRITICAL

1

C4690

F-RT-TH-M97-4USB CRITICAL

87

65

4321

J4600

F-RT-TH-M97-4USB CRITICAL

87

65

4321

J4610

MSOPTPS2064DGN CRITICAL

967

582

143

Q4690

1/16W5%

402MF-LF5.1K

2

10V402

0.47UF2

1

C4692

TQFNPI3USB102ZLE CRITICAL

SMC_DEBUG_YES

SIGNAL_MODEL=USB_MUX

12

108

54

76

MIN_NECK_WIDTH=0.375 mmMIN_LINE_WIDTH=0.5 mmVOLTAGE=5V

PP5V_S3_RTUSB_A_F

USB2_LT1_N

USB2_LT1_P USB_EXTB_OC_L

USB_EXTA_N USB_EXTA_P

SMC_RX_L SMC_TX_L PP3V42_G3H

USB_PWR_EN

PP5V_S3 PM_SLP_S4_L

USB_EXTB_N

USB_EXTB_P

PP5V_S3_RTUSB_A_ILIM USB_EXTA_OC_L

USB_DEBUGPRT_EN_L

PP5V_S3_RTUSB_B_ILIM

USB_LT2_N USB_LT2_P

USB2_EXTA_MUXED_P USB2_EXTA_MUXED_N

Định dạng
Số trang	97
Dung lượng	1,92 MB