apple macbook a1181 k36

APPLE INC.NONESCALE II NOT TO REPRODUCE OR COPY ITIII NOT TO REVEAL OR PUBLISH IN WHOLE OR PART I TO MAINTAIN THE DOCUMENT IN CONFIDENCE NOTICE OF PROPRIETARY PROPERTY - ADD ISOLATION BU

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TABLE_TABLEOFCONTENTS_ITEM

TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM

II NOT TO REPRODUCE OR COPY ITIII NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

NOTICE OF PROPRIETARY PROPERTY

MATERIAL/FINISHNOTED ASAPPLICABLE

SIZE

D

THIRD ANGLE PROJECTION

DIMENSIONS ARE IN MILLIMETERS

XX

X.XX

X.XXX

DO NOT SCALE DRAWING

REV ZONE ECN

CK APPD DATE

ENG APPD DATE

1 ALL RESISTANCE VALUES ARE IN OHMS, 0.1 WATT +/- 5%.

2 ALL CAPACITANCE VALUES ARE IN MICROFARADS.

3 ALL CRYSTALS & OSCILLATOR VALUES ARE IN HERTZ.

REFERENCED FROM M70

MK

MM-MARY(YUAN) MA LD-LINDA DUNN LT-LAWRENCE TAN MK-MARC KLINGELHOFER RC-RAY CHANG

DK-DINESH KUMAR RX-RAYMOND XU

ES

Schematic / PCB #’s

LT LD RX

MK RX

RX

DK RX RX ES RX ES ES

MK MK MK

RX RX RX

ES ES LD

LD LD LT LT RX DK

LD

LT LT LT LT

RX RX

DK DK RX

LD ES

RX MK

ES RX

RX RX RX

LD

RX MK

MK RX

RX ES

RX

RX LD

FireWire & SMC Constraints

WFERRY105

Clock Constraints

WFERRY104

SB Constraints (2 of 2)

WFERRY103

SB Constraints (1 of 2)

WFERRY102

Memory Constraints

WFERRY101

NB Constraints

WFERRY100

CPU/FSB Constraints

EUGENE94

MINI-DVI CONNECTOR

GRAPHIC92

EXTERNAL TMDS

GPU90

INVERTER,LVDS,TMDS

SMC79

DSIMON-WF78

S3 FET & S3/S5 Control

ENET77

3.42V/1.25V Switcher

POWER76

5V/3.3V Supplies

POWER75

1.8V/0.9V Supplies

POWER73

1.5V / 1.05V Supplies

GPU72

Render VCore Supplies

POWER71

IMVP6 CPU VCore Regulator

DSIMON-WF70

S0 FETS & Power Sequencing

POWER69

DC-In & Battery Connectors

M70AUDIO68

AUDIO: JACK TRANSLATORS

M70AUDIO67

AUDIO: JACK

M70AUDIO66

AUDI0: SPEAKER AMP

M70AUDIO62

AUDIO: CODEC

WFERRY61

SPI ROMs

SMC59

SMS

ENET56

Fan

GPU55

TEMPERATURE SENSE

GPU53

CPU Current & Voltage Sense

WFERRY52

051-7455

WFERRY51

Trang 2

APPLE INC.

NONESCALE

PG 57-67

PG 57

1.05 - 1.25V Core

J4600

USB Connectors

J4601J4700

Pg 13

U5500U5520

Conns

Amps Speaker

U6600/10/20

TRANSLATORS JACK

J6702/03 INTERNAL SPEAKERJ6701 INTERNAL MICJ6750/00 LINE IN/OUTJ4300

FSB

x4 DMI2.5 GHz

Boot ROM

DC/Batt

Supply Conn

U400032-Bit

33 MHz

E-NET Conn

E-NET

NINEVEH

U3700

AirPort Mini PCI-E

Pg 33J3400

U6200

CPU Temp Sense

Power

J6900/50

LPC Conn

PrtSerFan

SPI

U6100/50

UC500U2900Clk GenDIMM’s

Conn UATA

Conn SATA

DIMM

1.8V - 64 BitsDDR2 - Dual Channel

SYNC_DATE=05/11/2006 System Block Diagram

2 SYNC_MASTER=WFERRY-WF

051-7455

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APPLE INC.

NONESCALE

17-1 PM_ENET_EN_L

PPBUS_G3H

SMC_BATT_ISENSE

01 U7970

ISL6263 (PAGE 60)

02

ENA VIN

21

(7.7A MAX CURRENT) PPVCORE_S0_NB_GFX_IMVP

(PAGE 62) TPS51116

1.8V 02

15

P1V8S0_EN

SMC_PM_G2_EN LOGIC

PPVBAT_G3H_CHGR_REG

IMVP_VR_ON

ENA2

TPS51120 (PAGE 63) PP1V2_ENET_REG

ENABLES VIN

ISL6257HRZ U7900 (PAGE 66)

12

Q3802 Q3801

PP1V05_S0_REG

VR_PWRGD_CK505_L

PGOOD_1V05S0

PGOOD2 VOUT2

PP3V42_G3H_REG

VOUT2VOUT1

WOL_EN

04-1

START SOFT

P25

06

(S5)

17 17

A

12

S3 U7870

15

17

SOFT START

U7500

PP0V9_S0_REG

U5300

PPVCORE_CPU_S0 (36A MAX CURRENT)

PGOOD_1V5S0 SMC_CPU_VSENSE

Q7000

Q7866

(5A MAX PP5V_S5_REG

24

29

28 27

26

30

23 22

U6201

TPS51124 U7300

15 15 15

14

GATE B

GATE D

P3V3S0_EN P1V8S0_EN RUNSS_GATE_D

PWR_BUTTON(P90) P17(BTN_OUT)

SLP_S3_L SLP_S5_L

BATTERY ONLY:

SMC_ONOFF_L ALL_SYS_PWRGD

U2801

PP1V8_S0_FET PM_SLP_S3_L PP3V3_S0_FET

PGOOD_1V8S3 PP5V_S0_FET

RSMRST*

PWRBTN*

PLTRST*

(PAGE 28) U2900 SLG8LP537V

CLOCK

PP1V05_S0_REG_R R7302

3.425V G3HOT

PGOOD1

VOUT1

1V5S0_RUNSS (S0) (S0) 1V05S0_RUNSS

(PAGE 13) U1400

CRESTLINE CPU

VIN

RESET*

PLT_RST_L

ENA1 ENA2

RN5VD30A-F SMC PWRGD

ENABLE

(PAGE 64)

(PAGE 45) LT3470

PBUS CONVERTER/

BATTERY CHARGER

23 01

3

01

SYNC_DATE=06/30/2005 SYNC_MASTER=POWER

Power Block Diagram

76

051-7455

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TABLE_5_ITEM

TABLE_5_ITEM TABLE_5_ITEM

TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARYPROPERTY OF APPLE COMPUTER, INC THE POSSESSORAGREES TO THE FOLLOWING

GOOD BEST

MLB STACKUP

-0.079

ODD_PWR_RESUME ODD_PWR_CORE STANDOFF FANCY NORMAL

INVERTER_BUF ALTERNATE

Power aliases required by this page:

BOM options provided by this page:

GROUND POWER POWER GROUND SIGNAL(High Speed) SIGNAL(High Speed) GROUND

GROUND SIGNAL

BOTTOM

11 10 9 8 7 6 5

3 2 Top

BOM TABLE FOR HF POSCAPS

0.014

2

CRITICAL1

1

CRITICAL

BETTERCRITICALU1000

11

U1000

U2300U1400

516-0162

338S0434

343S0448

LBL,P/N LABEL,PCB,28MMX6MMLBL,P/N LABEL,PCB,28MMX6MMLBL,P/N LABEL,PCB,28MMX6MM

IC,CYPRESS,CY7C63833,ENCORE_II,USB_CONTR

C2130,C2716,C7543

K36CRITICAL

3128S0164

HF VERSION OF 128S00731

3

128S0150128S0160128S0148128S0169

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APPLE INC.

NONESCALE

- ADD ISOLATION BUFFER FOR ODD_RESET_L SIGNAL, ADD 100K PULL-DOWN TO ODD_PWR_EN_L, ADD ’DRAG’ CIRCUIT TO

- LOWER RDS(ON) MOSFET (FDC606P - APN: 376S0552) FOR ODD AND LCD POWER - RADAR: TBD

- HIGH-PRECISION 0.1% RESISTORS TO INCREASE OUTPUT VOLTAGE REGULATION (5V, 3.3V, PBUS_LDO) ACCURACY - RADAR:4972500

- FIX LINDA CARD POWER ALIAS (NEED TO CONNECT TO PP3V42_G3HOT INSTEAD OF PP3V3_S5) - RADAR: 4927858

- CHANGE BOM STUFFING TO SPEED UP PORT POWER SHUT-OFF RESPONSE TIME DURING ACTIVE LATE-VG EVENT (RADAR: 4985252)

- CHANGE BOM STUFFING TO ENABLE ON-BOARD MICROPHONE CONNECTOR (M42/M42A SOLUTION) INSTEAD OF ROUTING

- CHANGE BEST CPU FROM 337S3465(2.4GHZ) TO 337S3464(2.2GHZ)

- ADD BOM OPTION TABLE FOR ALL SANYO POSCAP TO USE HF PARTS

- TEST POINT MOVEMENTS REQUESTED BY ICT AND MAC-1 GROUPS - RADAR: 4924481

- MODIFY FIREWIRE CONNECTOR SYMBOL TO SUPPORT MINI-DVI CONNECTOR WITH TAB

- CHANGE 10UF, 16V CPU VCORE CAPS TO 10UF, 6.3V CAPS - RADAR: 4952553

- CHANGE LOAD CAP STUFFING OPTION FOR RTC AND ETHERNET CRYSTALS TO MEET 5XESR (-R) REQUIREMENT

PROPERLY DISCHARGE ODD POWER WHEN IT’S TURNED OFF - RADAR: 4923903

M70 PROTO TO EVT CHANGES

- ADD 270K PULL-DOWN RESISTOR ON HTPLG - RADAR: 4888755

- MOVE SMC RESET BUTTON PAD TO TOP SIDE OF MLB - RADAR: 4920913

CSA PAGE 8:

- 4954357 BREAK OUT =PP3V3_S3_AIRPORT_AUX(J3400,PIN 24) FROM PP3V3_S3_AP_AUX AGAIN

- 4954357 MOVE C3409 AND C3410 FROM PP3V3_S3_AP_AUX RAIL TO =PP3V3_S3_AIRPORT_AUX RAIL

- NORMAL CHANGES FROM 514-0409 TO 514-0459, FANCY CHANGES FROM 514-0411 TO 514-0479

- CHANGE J6750 FROM 514-0408 TO 514-0458 (DIFFERENT JEDEC, SAME LANDPATTERN)

- UPDATE BOM OPTION TABLE FOR J6750

- CHANGE J6700 FROM 514-0409 TO 514-0459 (DIFFERENT JEDEC, SAME LANDPATTERN)

- CHANGE R9201 AND R9202 FROM 5.23K TO 2.94K

- CHANGE L7900 FROM 152S0302 TO 152S0670 FOR CORRECT AVL

- SMC PART NUMBER CHANGES FROM 341S2088 TO 341S2198

CSA PAGE 29:

- ADD ALIAS =PP3V3_S3_SMBUS_SMC_MGMT TO PP3V3_S3

- UPDATE EEE CODES, Z55 FOR GOOD, Z56 FOR BETTER, Z57 FOR BEST

- REMOVE NO_TEST=TRUE FOR 1V8S3_COMP, 1V8S3_FSET, 3V3S5_COMP, 3V3S5_FSET, 1V05S0_COMP, 1V05S0_FSET, IMVP6_RBIAS, IMVP6_COMP, 5VS5_RUNSS, 1V5S0_RUNSS

- REMOVE ALIASES FOR GND_CHASSIS_AUDIO_SPKRCONN,GND_CHASSIS_AUDIO_SHIELD1,GND_CHASSIS_AUDIO_SHIELD2,GND_CHASSIS_AUDIO_SHIELD3,MIC_SHIELD_LVDS_R,MIC_SHLD_CONN

- ADD FUNC_TEST=TRUE FOR THRM_FINSTACK_P/N

- ADDED L6771 AND L6773 TO MIC INPUT EMI FILTER

- CHANGED ALL TRANSIENT SUPPRESSORS TO 6.8V/100PF DEVICES (WERE ORIGINALLY 8V/100PF DEVICES)

CSA PAGE 67:

- ADDED SMALL 15PF COMPENSATION CAP TO U6201 FEEDBACK NETWORK (C6224)

- ADDED A NO STUFF PULL-UP TO CODEC_DVDD AT GPIO1

- RE-CONNECTED /SHDN INPUT OF U6801 SO THAT IT’S CONTROLLED BY U6200 PORTA VREF - DISCONNECTED GPIO1 AND TERMINATED IT WITH A 10K PULL DOWN

- CHANGE R2902 FROM 1OHM TO 0OHM

- CHANGE R2900, R2901 FROM 2.2OHM TO 0OHM

- NOSTUFF C2907, C2910, C2916, C2911, C2914

- CHANGE L2902 AND L2903 FROM 155S0302 TO 0OHM R2906 AND R2907

- ADD R2597 AND R2596 FOR 10K PU ON GPIO6 AND GPIO17(EXTGPU_RST_L)

- ADD SPN ALIASES FOR CK505_PCI2/4_CLK

- ADD SPN ALIASES FOR TP_CK505_SRC7_N/P

- REMOVE ALIAS FOR =FWPWR_PWRON

CSA PAGE 9:

- ADD FUNC_TEST=TRUE FOR PP1V05_S0_R

- REMOVE NO_TEST=TRUE FOR CK505_PCI4_CLK_SPN, CK505_SRC1_N/P_SPN, CK505_SRC3_N/P_SPN, CK505_SRC7_N/P_SPN, CK505_SRC_CLKREQ1/3_L?SPN

- ADD NOSTUFF R4660 AND R4661

- REMOVE MIN_NECK_WIDTH=0.3MM FROM PP5V_S3_USB2_EXTA/B

- CHANGE U4600 FROM 353S1245 TO 353S1728

CSA PAGE 46:

- EDIT BOM OPTION TABLE

CSA PAGE 39:

- CHANGE STRAPPING FROM 0010 ON GFX_VID<1:4> TO 0001 ON GFX_VID<0:3>

- CHANGE GFX_VID<1:4> TO GFX_VID<0:3>

- SIZING DOWN R2205 FROM 0603 TO 0402 FOR PLACEMENT

- 5282756 ADD C2207 (0.1UF, 0402)

CSA PAGE 22:

- ADD R1600 (0OHM, 0402) TO CONNECT GFX_VID<4> TO GND

- CONNECT GFX_VID<0:3> TO GFX_VID0:3 ON NB

- DISCONNECT GFX_VID<0> TO GND

CSA PAGE 16:

- CHANGE NB FROM 338S0426(500M) TO 343S0448(667M)

- CHANGE BEST CPU FROM 337S3457(2.2G) TO 337S3465(2.4G)

- CHANGE BETTER CPU FROM 337S3456(2.0G) TO 337S3464(2.2G)

- CHANGE GOOD CPU FROM 337S3471(1.8G) TO 337S3463(2.0G)

CSA PAGE 4:

CSA PAGE 49:

- 5040728 STUFF C9421 FOR EMI

3/5/2007

- 5048817 SYNC 1P25V REGULATOR CIRCUIT FROM M82, CHANGE R AND C TO 0402, CHANGE =PP3V3_S5_P1V25S0 TO =PP3V3_S5_1V25S0,

C7723 FROM 2.2NF TO 10000PF, C7724 FROM 22PF TO 100PF, C7728 FROM 2.2NF TO 10000PF,

AND REVERT REFERENCE DESIGNATORS (CHANGE FROM TPS62510 TO LTC3412A)

- ADD TEXT NOTE TO UPDATE J4700 FROM 516S0251 TO 516S0588 WHEN SYMBOL IS READY

- 4986074 CHANGE R9469 FOR CRT_TVO_IREF FROM 1.3K TO 1.21K

- ADD TEXT NOTE TO UPDATE J6900 FROM 518S0287 TO 518S0526 WHEN SYMBOL IS READY

- DELETE LVDS_VREFH AND LVDS_VREFL TO GROUND TO FIX LVDS GLITCH

- ADD TEXT NOTE TO CHANGE L9404 FROM 155S0303 TO 155S0348 WHEN SYMBOL IS READY

CSA PAGE 50:

- SMC MANAGEMENT SMBUS CONNECTION:

7/10/2007

- BOOTROM PART NUMBER CHANGES FROM 341S2085 TO 341S2196

- SMB_ME_CLK AND SMB_ME_DATA ON SOUTHBRIDGE DISCONNECTED FROM SMB_MGMT_CLK AND SMB_MGMT_DATA FROM SMC.B

- THE 10K PULL-UP RESISTORS (R5230 AND R5231), AND STILL REMAIN CONNECTED TO PP3V3_S5_SMBUS_SB_ME AND STAY ON THE SB SIDE

- ADD TWO NEW 10K PULL-UP RESISTOR (R5232 & R5233) TO =PP3V3_S3_SMBUS_SMC_MGMT.B CSA PAGE 59:

- ICH8-M ME SMBUS:

- CHANGE R5077 FROM PULL-UP TO A PULL-DOWN RESISTOR AND NAME IT SMC_SMS_INT

- REMOVE ALIAS FOR =SMC_SMS_INT TO SMC_PG1 - SIGNAL SHOULD JUST BE CALLED SMC_SMS_INT

- ADD R4670 & R4671 (USB BYPASS ROUTING)

- CHANGE U4675 FROM APN 353S1505 TO APN 353S1742 (SMALL PACKAGE)

- REMOVED NO STUFF RESISTORS R6730, R6731, AND R6732 ALSO REMOVED L6774

- MADE NO_TEST ATTRIBUTE VISIBLE FOR NET NC_VRP CONNECTED TO PIN 37 OF U6200

- CHANGED C6210 FROM A CASE-R 10UF TANT CAP TO A SMA-LF 3.3UF TANT CAP

-ADD 2ND SMS (U5930)

- THE PULL-UP RESISTORS SHOULD BE CONNECTED BETWEEN SMB_MGMT_CLK AND SMB_MGMT_DATA TO =I2C_SMS_SCL AND =I2C_SMS_SDA OF THE NEW ACCELEROMETER

- STUFF U5930 (DIGITAL ACCELEROMETER) CIRCUIT

- STUFF C3210 AND C3211

- REMOVE R5077 (BECOMES R5931)

- ADD R5931 (WAS R5077 BEFORE), 10K PD ON SMC_SMS_INIT

- ADD R5930, 10K PU ON SMC_SMS_INT

- UPDATE PN FOR FANCY RJ45 CONNECTOR, 514-0475

- CHANGE Z0901 AND Z0906 FROM 998-1178 TO 998-1186 (NON-PLATED)

- 4954357 ADD =PP3V3_S3_AIRPORT_AUX BACK TO PP3V3_S3 ALIAS

7/17/2007CSA PAGE 59:

- CHANGE BETTER AND BEST CPU TO G0 STEPPING PARTS (FROM 337S3464 TO 337S3500)

- CHANGE J4300 FROM 514-0289 TO 514-0456 (SAME JEDEC)

- UPDATE BOM OPTION TABLE FOR J4600 AND J4601

- ADD PAGE_TITLE AUDIO: CODEC

- CHANGE J4600 AND J4601 FROM 514-0288 TO 514-0457 (DIFFERENT JEDEC, SAME LANDPATTERN)

051-7455

Revision History

5 76

01 SYNC_MASTER=N/A SYNC_DATE=N/A

Trang 6

APPLE INC.

NONESCALE

MIC FUNC_TEST

USB FUNC_TEST Battery FUNC_TEST

SMC FUNC_TEST FIREWIRE FUNC_TEST SMBus FUNC_TEST

Other Func Test Points

Fan Connectors

SLEEP LED FUNC_TEST

Battery Digital Connector

Power Supply NO_TESTs

I156

I157I158I159I16

I160I161

I162I163I164

I166I167I168I169I17

I171I172I173I174

I175I176

I222

I223

I224I225

I226I227

I228

I229I23

I230

I231

I232I233I234I235

I236

I237I238I239

I24

I240I241

I242I243I244

I25

I29I3

I31I32

I33I36I38I4

I44I45

I46I47

I48

I57

I58

I59I60

I61I63

I71I72I73I74I75I76I77I78I79I80I81I82I83I84I85I86I87I88I89

I9

I90I91

FUNC TEST 1 OF 2

IMVP6_RBIAS

TRUE CK505_CPU1_N

CK505_DOT96_27M_N TRUE

TRUE CK505_DOT96_27M_P TRUE CK505_CPU2_ITP_SRC10_N TRUE CK505_CPU1_P

CK505_CPU2_ITP_SRC10_P TRUE

TRUE CK505_CPU0_P TRUE CK505_CPU0_N

TRUE SMC_TMS

DEBUG_RESET_L TRUE

SMC_TRST_L TRUE

TRUE LPC_AD<1>

TRUE =PP5V_S0_LPCPLUS TRUE LPC_AD<0>

TRUE ACZ_BITCLK TRUE ACZ_SDATAOUT

TRUE MIC_HI

MIC_LO TRUE

MIC_SHIELD TRUE

MIC_HI_CONN TRUE

TRUE INV_BKLIGHT_PWM_L TRUE PP5V_INV_F

PPVBAT_G3H_CHGR_OUT TRUE

TRUE ACIN_ENABLE_GATE

PPBUS_ALL_INV_CONN TRUE

TRUE USB2_3G_F_N TRUE USB2_BT_F_N TRUE USB2_BT_F_P TRUE TP_USB_EXTC_N TRUE TP_USB_EXTC_P

TP_USB_EXCARD_N TRUE

TP_USB_EXCARD_P TRUE

ACZ_RST_L TRUE

TRUE LVDS_B_DATA_P1_SPN

TRUE FW_C_TPA_P_SPN TRUE FW_B_TPBIAS_SPN

TRUE PP3V3_S5 TRUE PP1V8_S3

TRUE SMC_LID

SPKRCONN_R_P_OUT TRUE

SPKRCONN_L_N_OUT TRUE

SPKRCONN_L_P_OUT TRUE

TRUE PPFW_SWITCH

TRUE SYS_LED_ANODE

SMBUS_SMC_B_S0_SDA TRUE

SMBUS_SMC_B_S0_SCL TRUE

LINDACARD_GPIO TRUE

SMC_TDI TRUE

TRUE SMC_MD1 TRUE SMC_TX_L TRUE FWH_INIT_L

PCI_CLK33M_LPCPLUS TRUE

LPC_AD<2>

TRUE

INT_SERIRQ TRUE

PM_SUS_STAT_L TRUE

SMC_RESET_L TRUE

TRUE SMC_TDO TRUE BOOT_LPC_SPI_L

=PP5V_S0_FAN_RT TRUE

FAN_RT_PWM TRUE

FAN_RT_TACH TRUE

TRUE SMC_FAN_1_CTL

TRUE SMC_ADAPTER_EN TRUE SMC_BC_ACOK

GND_BT_F TRUE

TRUE PP0V9_S0

TRUE BATT_POS

SMBUS_BATT_SCL_F TRUE

SMBUS_BATT_SDA_F TRUE

TRUE BATT_NEG

SMC_FAN_3_TACH

TRUE

LVDS_B_DATA_P2_SPN TRUE

TRUE LVDS_B_DATA_N0_SPN TRUE FW_C_TPB_P_SPN

TRUE =PP3V3_S0_FAN_RT

TRUE FW_C_TPB_N_SPN

TRUE LVDS_B_CLK_N_SPN

LVDS_B_DATA_N1_SPN TRUE

TRUE FW_C_TPA_N_SPN TRUE FW_B_TPB_P_SPN

TRUE FW_C_TPBIAS_SPN

TRUE LVDS_B_CLK_P_SPN

TRUE FW_B_TPB_N_SPN TRUE FW_B_TPA_N_SPN

=PP5V_S0_AUDIO TRUE

GND_AUDIO_AMP TRUE

TRUE GND_AUDIO_CODEC

=PP5V_S0_AUDIO_AMP TRUE

TRUE SMC_BS_ALRT_L

TRUE LVDS_B_DATA_N2_SPN

SMC_BATT_CHG_EN TRUE

TRUE SMC_BATT_TRICKLE_EN_L

TRUE ACZ_SYNC TRUE ACZ_SDATAIN<0>

TRUE SMC_BATT_ISET

SMC_NMI TRUE

SMC_RX_L TRUE

TRUE =PP1V05_S0_REG

PP18V5_G3H TRUE

TRUE =PP3V42_G3H_LPCPLUS TRUE SMC_FAN_1_TACH

PM_CLKRUN_L TRUE

TRUE LPC_FRAME_L

TRUE CK505_SRC8_N

TRUE CK505_LVDS_P

TRUE CK505_SRC2_P TRUE CK505_SRC2_N

TRUE CK505_SRC4_N TRUE CK505_SRC4_P TRUE CK505_SRC5_N

CK505_SRC5_P TRUE

TRUE CK505_SRC8_P

TRUE CK505_SRC6_N

CK505_SRC6_P TRUE

TRUE THRM_DIMM_DX_F_N

SPKRCONN_SUB_P_OUT TRUE

SPKRCONN_SUB_N_OUT TRUE

MIC_SHLD_CONN TRUE

MIC_LO_CONN TRUE

THRM_HEATPIPE_P TRUE

THRM_HEATPIPE_N TRUE

PP5V_S5 TRUE

PPBUS_G3H TRUE

PP3V3_S3_BT_F TRUE

TRUE TRUE THRM_FINSTACK_P

THRM_DIMM_DX_F_P PP5V_S3

TRUE

PP3V3_S3 TRUE

SMC_MANUAL_RST_L TRUE

TRUE SMC_CPU_VSENSE

SPKRCONN_R_N_OUT TRUE

TRUE PP3V42_G3H

TRUE PP1V2_ENET_S0

PP5V_S0 TRUE

PP3V3_S0 TRUE

TRUE ALL_SYS_PWRGD

TRUE PP1V5_S0 TRUE PP1V8_S0 TRUE PP1V05_S0

PPVCORE_S0_CPU TRUE

TRUE PP1V05_S0_R

TRUE THRM_FINSTACK_N

IMVP6_COMP 5VS5_RUNSS 1V5S0_RUNSS

CK505_LVDS_N TRUE

46B4

57A8

45D5

44D5 57C7 54D8

45D5

46B6 75D3

75D3 75D3

75D3

75D3 75D3

46B6

46C6 46C6

44C5

75C3 46C4

46B4 46B4

46B4

46B6

38C6 57C3

56C4 54C8 57A2

66A4

66A3

44C5

44C5 46B6

75C3

75D3

75C3 75C3

75C3

75C3 75C3 75C3

75C3

75C3 75C3

29D6 29D6

29D6

29D6 29D6

45C5 46B6 46B6

44C8 46C6

44C8

53C7 53C7

56A6 56A6

55D3

66C2 66A6

24D5 45C5

46B6 44B8

46C4 44C8

44C8 44C5

45D7

45C5 46B6

50C4

50B4

35C7 45B6

44A8

50C4

53A7 54B8 45C5

45B6

53C7 53C7

37A5 44C8

29B6

29C6

29C6 29C6

29C6

29C6 29C6 29C6

29B6

29B6 29C6

55C2 55C2

55D3 55D3 48B1

28C4 28C4

28C4

28C4 28C4

44B5 27D1 44C1

22D4 7A7

22D4

8A5 8A5

55B3 55B3

55B1

67D2 67D3

66B5 57C3

67D3

43A4 43C2 43C2 8B2 8B2 8B2 8B2 8A5

7D1 7B4

24A7 44B5

44D1 41A8

46C5 29B3 22D4

24C8 24D5

44C3

44B5 23B5

7A7

50B3 50C3

44A8

33C7 44C5

43C2 7D7

57B5

57A5 57A5

57A5

44A4

8D5 8D5 8D1

8D1

8D5

8D1 8D1

7A7 8A4

8B4 7A7 44C5

8D5

44C8

8A5 8A5

24C8 22D4

28A4

28B4

28B4 28B4

28B4

28B4 28B4 28B4

28A4

28B4 28B4

49B6

54B1 54B1

55A1 55B1

49D6 49D6

7C1

7B1

43D2

49C6 49B6 7A4

7A4

45D8 44C5

54C1

7C1

7B5 7A7 7D4

27A5

7C7

7B7 7D7 7D7 7D7

49C6

59A4

63B5 58B1

28B4

28B6

8D1

Trang 7

APPLE INC.

NONESCALE

(REGULATOR OUTPUT CPU VCORE PWR)

(CPU VCOR PWRE)

"S3" RAILS

051-7455

76

SYNC_DATE=06/15/2006 Power Aliases

SYNC_MASTER=WFERRY

01 7

MIN_NECK_WIDTH=0.2 mmMAKE_BASE=TRUEMIN_LINE_WIDTH=0.6 mmVOLTAGE=3.3V

=PP1V8_S0_NB_DPLL

MAKE_BASE=TRUE

PP1V8_S0

MIN_LINE_WIDTH=0.4 mmVOLTAGE=1.8VMIN_NECK_WIDTH=0.2 mm

PP1V05_S0_R

=PPVCORE_S0_SB

MIN_NECK_WIDTH=0.2 mmVOLTAGE=1.05VMAKE_BASE=TRUE

=PP18V5_G3H_CHGR

MIN_LINE_WIDTH=0.6 mm

PPDCIN_G3H

MAKE_BASE=TRUEVOLTAGE=18.5VMIN_NECK_WIDTH=0.2 mm

=PPVIN_G3H_P3V42G3H

PPBUS_G3H

MIN_NECK_WIDTH=0.2 mmVOLTAGE=18.5VMAKE_BASE=TRUE

PP1V9_ENET_S0

MIN_LINE_WIDTH=0.6 mmVOLTAGE=2.5V

PP3V3_S0

MIN_NECK_WIDTH=0.2 mmVOLTAGE=3.3V

MIN_LINE_WIDTH=0.6 mmVOLTAGE=3.3VMAKE_BASE=TRUE

PP1V8_S3_MEM_NB

PP5V_S3

VOLTAGE=5VMIN_NECK_WIDTH=0.2 mmMAKE_BASE=TRUE

69C8

69C8 69C2

69C2

12C5

69B7

69B7 12B3

59D8

58C3

20A8

68B7 56B5

26D6

20D3 20D3

20D8 29C6 20B4

26C6

65C4 26D8

24B3

67C6 11D7

26B6 26C2 26D5 26C8 11B3

20B4 20A8 20B4

17C1 20C8 29B6 17D7

26D2 45D2

26B4

65A5 24A8

26D2 26B6 26B2 38A8

59C2 58C4

62C5

45A4 58D4

61B8

61C5

26D3 26B2

17D7

62C2 65C3

6D2 6D1 6D1

59D8

26D8 6A2

60D2 67D7

69D7 21D6 40C6

21A7 6B2 21D5 33D2 25A6 25B6 25B6 26A8 21D8 10B7 6B2 58A3 20B8 20A8 7C7 20D4 18C3 7C7

17B3 18D3 13B7 17D3 20D5

6B2 25D3

6B2 32D4

25C3

6A2

58C5 24A3 24D8 23C8 27C5

25A3 25A3 25B3 38A6

47A7 52C6

67C7

64B6 33C7

6A2

26D8

41C8

65B6 58B3

6A2

44D4

45C8 47C3 57C4

57A8 65C7 27D7

41A6 6D2

6A2

66D8

64C6

6A2 57D3

66C2

39D6

62C5

33C6 26D8

6A2

34D6 25B6

45D4

46C4 47D8

67B5

45A6 61B3 61B5

63A6 63B3 62B3 67D4

39C2

47D5

47C5 38C6 25C3

6B2 59D1

62B8

10B5

60C2 48D7

60C2

68D6 58B8

61B1

43D8 42D6 40B6

64C4 63B8

58A3

15B7

25C3

65B4 25B6

6A2

23A3 7C4

53A7 6D2 8A4

59D8 60C7

36D8

34C7 35D4

30B2

15D2 62B2

20A4

62A2 47D3

6A2 35D7 65A4

43D3 51C7 35C3 6A2

Trang 8

TABLE_5_ITEMREFERENCE DESIGNATOR(S) BOM OPTION

TABLE_5_HEADQTY DESCRIPTION

PART#

TABLE_5_ITEM

APPLE INC.

NONESCALE

DRAWING NUMBER

SIZE

D

FOR LAYOUT PLACEMENT

BUT, NEED CHANGE TO HIGH STANDOFF SYMBOL

CPU HEATSINK STANDOFF SCREW HOLE

DCIN CONNECTOR CHASSIS GND

NO-CONNECT UNUSED LVDS INTERFACE PORTS (EMI PAD FOR INVERTER GONNECTOR)

DIP DIMM CONNECTOR CHASSIS GND

USB PORT [0] = External USB2.0 Port A USB PORT [1] = PCI-E Mini Card USB PORT [2] = 3G USB

USB PORT [3] = CAMERA USB PORT [4] = IR CONTROLLER USB PORT [5] = Trackpad(Geyser) USB PORT [6] = BLUETOOTH

NO-CONNECT UNUSED FIREWIRE INTERFACE PORTS

ANALOG SWITCH GPIO

NB ALIASES

USB PORT [9] = Unused USB PORT [8] = Unused USB PORT [7] = External USB2.0 Port B SO-DIMM ALIASES

PCI_EXP ALIASES

SATA ALIASES NO-CONNECT UNUSED SATA INTERFACE PORTS

NO-CONNECT UNUSED PCI_EXP INTERFACE PORTS

NO-CONNECT UNUSED SDVO INTERFACE PORTS

NO-CONNECT UNUSED ADDRESS INTERFACE PORTS

FIREWIRE ALIASES

DIP DIMM CONNECTOR CHASSIS GND

I/O CONNECTOR CHASSIS GND

PCI_EXPRESS GRAPHICS ALIASES

AIRPORT CARD STANDOFF SCREW HOLE

7X7R2P3-5B OMIT

C09081

2

0.01UF 10%

CERM 402

C09071

5R2P3-7SQB OMIT

Z09111

OMIT 5R2P3-7B

Z09101

OMIT 5R2P3-7SQB

OMIT STDOFF-4.2OD3.95H-5.52R3.37-6B

Z09121

OMIT STDOFF-4.2OD2.15H-1.2-3.2-TH

Z09081

OMIT 5P0R2P3-7BLB

ZS0920

CLIP-SM-M42

Z09041

OMIT STDOFF-4.2OD3.95H-5.52R3.37-7SQB

Z09211

Z09071

OMIT 6P5R2P6-7SQB

Z09031

OMIT STDOFF-4.2OD3.95H-5.52R3.37-6B

C09301

2

0.1UF

X5R10%

402

C09101

40210%

0.1UF 1C0911

2

402 CERM 16V 0.01UF

C09161

240216V

0.1UF

X5R

C09171

2

0.01UF 10%

402 CERM

C09141

2

10%

402

0.01UF 16V CERM

2

402 10%

0.01UF CERM 16V

C09181

240210%

X5R

0.1UF 1C0919

2

0.01UF 10%

CERM 402

R09101

2MF-LF5%

1/16W402

0

R09211

21/16W4025%

0

Z09051

051-7455

SYNC_DATE=07/17/2006

76 01 8

SIGNAL ALIAS /RESET

=GND_CHASSIS_LVDS

=GND_CHASSIS_3GPOWER

MAKE_BASE=TRUELVDS_B_CLK_P_SPN LVDS_B_DATA_N0_SPN

MAKE_BASE=TRUE

=GND_CHASSIS_FW_DOWN

=GND_CHASSIS_USB

USB_EXTA_PUSB_EXTA_N

HDN_SPIN3_SPN MAKE_BASE=TRUEHDN_SPIN2_SPN MAKE_BASE=TRUEHDN_SDIN1_SPN

MAKE_BASE=TRUEACZ_SYNC

MAKE_BASE=TRUECLINK_MPWROK

SATA_C_R2D_C_N_SPN

MAKE_BASE=TRUE

MAKE_BASE=TRUEPCIE_A_D2R_N_SPN

TP_PCIE_A_D2R_N

=NB_CLINK_MPWROK

DIMM_OVERTEMPA_LDIMM_OVERTEMPB_L

MAKE_BASE=TRUELVDS_A_DATA_N3_SPN

HDA_SDOUT

PEG_R2D_C_P<15>

HDA_RST_L HDA_SDIN0

MAKE_BASE=TRUEPEG_R2D_C_P7_SPN

MAKE_BASE=TRUEPEG_R2D_C_P8_SPN PEG_R2D_C_P9_SPN

MAKE_BASE=TRUE

MAKE_BASE=TRUEPEG_R2D_C_P4_SPNMAKE_BASE=TRUEPEG_R2D_C_N15_SPN

MAKE_BASE=TRUEPEG_R2D_C_N8_SPN

MAKE_BASE=TRUEPEG_D2R_P13_SPN

TP_PCIE_FW_R2D_C_P

MAKE_BASE=TRUEPEG_D2R_N14_SPN

MAKE_BASE=TRUEPCIE_D_R2D_C_P_SPNMAKE_BASE=TRUEPCIE_D_R2D_C_N_SPN

MAKE_BASE=TRUEPCIE_C_D2R_P_SPN

TP_PCIE_B_D2R_N

MAKE_BASE=TRUEPCIE_B_R2D_C_P_SPN

MAKE_BASE=TRUEPCIE_C_D2R_N_SPN

MAKE_BASE=TRUE

SATA_B_D2R_P

MAKE_BASE=TRUESATA_B_D2R_P_SPN

SATA_B_D2R_N

PEG_D2R_N2_SPN

MAKE_BASE=TRUE

PEG_R2D_C_P<7>

MAKE_BASE=TRUELVDS_B_DATA_P0_SPN

FW_C_TPB_N

PEG_D2R_P4_SPN

MAKE_BASE=TRUEPEG_D2R_P<6>

FW_B_TPBIAS_SPN

MAKE_BASE=TRUEMAKE_BASE=TRUEFW_B_TPA_P_SPN

MAKE_BASE=TRUEFW_B_TPB_N_SPN FW_C_TPA_P

FW_C_TPA_N FW_C_TPB_P

GND_CHASSIS_CPU

MAKE_BASE=TRUEFW_C_TPB_N_SPN FW_C_TPB_P_SPN

MAKE_BASE=TRUEFW_B_TPA_N_SPN FW_B_TPB_N

FW_C_TPBIAS FW_B_TPB_P

FW_B_TPBIAS FW_B_TPA_N

USB_IR_PUSB_IR_N

USB_BT_PUSB_BT_N

USB_EXCARD_PUSB_EXTB_OC_L

MAKE_BASE=TRUE

=USB2_3G_N

USB_CAMERA_PUSB_CAMERA_N

=USB2_CAMERA_P

MAKE_BASE=TRUE VOLTAGE=0V GND_CHASSIS_RIGHT

=EXTBUSB_OC_L

=USB2_EXTB_P

=USB2_BT_P

=USB2_GEYSER_PTP_PCIE_A_D2R_P

NB_RIGHT_DOWN_SCREW

CPU_THERMAL_SCREW_DOWN

GND_CHASSIS_CENTER MAKE_BASE=TRUE VOLTAGE=0V

VOLTAGE=0V GND_CHASSIS_IO

LVDS_B_DATA_N<0>

LVDS_B_CLK_P

MAKE_BASE=TRUELVDS_B_DATA_P1_SPN

LVDS_B_DATA_N1_SPN

MAKE_BASE=TRUELVDS_B_DATA_N<1>

MAKE_BASE=TRUE

SATA_C_R2D_C_P SATA_C_R2D_C_N

TP_PCIE_FW_D2R_P

TP_HDA_SDIN1

HDA_SYNC HDA_BIT_CLK

MAKE_BASE=TRUE

TP_USB_EXTC_P

PEG_R2D_C_P12_SPN

MAKE_BASE=TRUE

TP_NB_CFG<4>

MAKE_BASE=TRUEMAKE_BASE=TRUETP_NB_CFG<6>

MAKE_BASE=TRUETP_NB_CFG<7>

MAKE_BASE=TRUETP_NB_CFG<8>

LVDS_B_DATA_P<2>

MAKE_BASE=TRUE VOLTAGE=0V

GND_CHASSIS_SATA

VOLTAGE=0V GND_CHASSIS_IO1 MAKE_BASE=TRUE

PEG_D2R_N7_SPN

MAKE_BASE=TRUE

MAKE_BASE=TRUEACZ_RST_L

MAKE_BASE=TRUEACZ_SDATAIN<0>

MAKE_BASE=TRUEACZ_SDATAOUT

=GND_AUDIO_CODEC

MEM_A_A<15>

TP_MEM_CLKP5TP_LVDS_A_DATAN3

CPU_THERMAL_SCREW_RIGHT

MAKE_BASE=TRUEFW_B_TPB_P_SPN

USB_EXTB_P

=NB_TDB_SENSE

MAKE_BASE=TRUELVDS_B_DATA_P3_SPNMAKE_BASE=TRUELVDS_B_DATA_P2_SPN

MAKE_BASE=TRUELVDS_A_DATA_P3_SPN

PEG_D2R_N4_SPN

MAKE_BASE=TRUEPEG_D2R_N<5>

PEG_D2R_N<4>

PEG_D2R_N<3>

PEG_D2R_N<2>

VOLTAGE=0V INVT_CHGND MAKE_BASE=TRUE

TP_MEM_CLKN2TP_MEM_CLKP2

MAKE_BASE=TRUEPCIE_D_D2R_P_SPNMAKE_BASE=TRUEPCIE_D_D2R_N_SPN

PCIE_C_R2D_C_P_SPN

MAKE_BASE=TRUE

TP_PCIE_EXCARD_D2R_PTP_PCIE_EXCARD_R2D_C_N

PEG_D2R_N13_SPN

MAKE_BASE=TRUE

PEG_D2R_N9_SPN

MAKE_BASE=TRUEMAKE_BASE=TRUEPEG_D2R_N10_SPN TP_PCIE_FW_R2D_C_N

TP_PCIE_FW_D2R_N

MAKE_BASE=TRUEPCIE_C_R2D_C_N_SPN

MAKE_BASE=TRUEPCIE_B_R2D_C_N_SPNMAKE_BASE=TRUEPCIE_B_D2R_P_SPN

MAKE_BASE=TRUECLINK_MPWROK

=SB_CLINK_MPWROK MAKE_BASE=TRUE

VR_PWRGD_CK505 VR_PWRGD_CLKEN

MAKE_BASE=TRUESB_CLK100M_SATA_OE_L SB_SATA_CLKREQ_L

MAKE_BASE=TRUETP_SB_GPIO17

EXTGPU_RST_L

TP_CK505_SRC1_N TP_CK505_SRC1_P TP_CK505_SRC3_N

MAKE_BASE=TRUECK505_SRC1_N_SPN

MAKE_BASE=TRUECK505_SRC7_P_SPN

MAKE_BASE=TRUECK505_PCI2_CLK_SPN

MAKE_BASE=TRUECK505_SRC7_N_SPN

CK505_PCI2_CLK TP_CK505_SRC7_P CK505_PCI4_CLK TP_CK505_SRC7_N

CK505_SRC3_P_SPN

MAKE_BASE=TRUETP_CK505_SRC3_P

MAKE_BASE=TRUEPEG_D2R_N12_SPNMAKE_BASE=TRUEPEG_D2R_N11_SPN

TP_PCIE_EXCARD_D2R_NTP_PCIE_B_R2D_C_PTP_PCIE_B_R2D_C_N

MAKE_BASE=TRUEENET_CLKREQ_L

=ENET_CLKREQ_L

=GND_CHASSIS_DIPDIMM_RIGHT

56C4 56B8 56B5 56B4 56B1 56A8 56A4 55B3 54C8 54B8

73B3 73B3

53D3

69C4

67A4 43B5

41A4

73B3 73B3

8C1

53C7 53C7

44B8

75B3 75B3 75B3 44B8

54A8

73B3

73B3 73C3 73C3

31A5

73B3

23C2 23C2

73B3

73B3 73B3

73B3

73C3 73C3

53B7 53C7 53C7 53B7

73B3 27A6

24C5

75D3 75D3

43A4

43C4

7C4

34C7 22C8

15B6

15B6 15B6 15B6

69A3

38B1

6C1 6C1

19C2 19D2 15C3 15B3 15B7 6C1 41A8

15C6

14C3 14C3 14C3 14C3 14C3

14C3 14C3 14C3 14D3 15C6

15C3

19C2

15C3

29C3 29B3 29B3 8B3 60C6 15B7

22B6

6C1

6C1 43C3 23D5

15A3

30C4

31C4 6A7

14B3 14B3 14B3

14B3 14B3

22B6 22B6 22B6

14B3

37B3

14C3

6B7 6B7

6B7

37B3

37B3 37B3

6B7 6B7 6B7 6B7 6B7 6B7

37B3 37B3 37B3 37B3

8C2 8B2

23C2 23C8

23C8 41A8

41C8

23C2 23C2 33B3

33B3

23C2 23C2

43A4

23C2 23C2 67B4

41C8 41B5 43C3 42C7

6A7

6A7 14C5

14C5 15C6

14C5

14D3

14D3 14D3 14C3

14C3 14C3

14C3

14C3 14C3

14C3 14C3 14C3

14B3 14B3

14B3

14B3 14B3 14B3

14B3 14B3

14B3 14B3 14A3 14A3

14A3

22B6

22B6 22B6

23D5

22C8

22C8 22C8

6C1

14C5

40C8

6C1 6D1 6D1 53A7

15C6 15C6

34C2

6D1 6D1 31C4

23D5

23D5 23D5

8B1 24C3

27A8 24C5

28B4 24C5

24B5

28B4

28B4 28B4

28B6 28B4

28B6

28B4 28B4

23D5 23D5 23D5

28A4

31D4

Trang 9

BIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBI

INININ

INOUTIN

BIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBI

OUTOUTOUT

BIBIBIBIBIBIBIBIBIBIBIBIBIBIBI

BIBIBIBIBI

BIBIBIBIBIBIBIBIBIBIBIBIBIBIBI

BI

BIBIBI

BI

BIBI

BIBIBIBIBI

ININ

OUT

ININ

IN

INININ

INOUT

BIBIBIBI

THERMTRIP*

THERMDAPROCHOT*

DBR*

TRST*

TMSTDOTDITCKPREQ*

LINT1LINT0STPCLK*

BSEL0BSEL1BSEL2

DPRSTP*

DPSLP*

DPWR*

PWRGOODSLP*

MAKE TRACE LENGTH SHORTER THAN 0.5"

COMP0,2 CONNECT WITH ZO=27.4OHM,

MAKE TRACE LENGTH SHORTER THAN 0.5"

COMP1,3 CONNECT WITH ZO=55OHM,

0.5" MAX LENGTH FOR CPU_GTLREF

R10051

21/16W1%

MF-LF

2.0K

1/16W402

R1019

1%

MF-LF54.9

402

R1018

27.4

1/16W 1%

402

R1017

1%

MF-LF54.9

402

R1016

1%

MF-LF27.4

402

13C5 70C3

13C5 70C3 13C5 70C3 13C5 70C3

13B5 70C3 13B5 70C3 13B5 70C3

13B5 70C3 13B5 70C3 13B5 70C3 13B3 70C3

13A3 70C3 13B3 70C3

13B5 70C3 13B5 70C3

13B5 70C3 13B5 70C3 13B5 70C3

13B5 70C3 13B5 70C3 13B3 70C3 13A3 70C3

13B3 70C3

15B6 22C4 59C7 70B3 22C4 70B3 13B3 70D3

13A5 70B3 27B3 12B1 22C4 70C3

13D5 70D3

13D5 70D3 13D5 70D3 13D5 70D3

13C5 70D3 13C5 70D3 13C5 70D3 13B3 70D3

13B3 70D3 13B3 70D3

13C5 70C3 13C5 70C3

13C5 70C3 13C5 70C3 13C5 70C3

13C5 70C3 13C5 70C3 13B3 70C3 13B3 70C3

13B3 70C3

29B6 70B3 29A6 70B3 29C6 70B3

13D3 70C3 13D3 70C3 13D3 70C3

13D3 70C3 13D3 70C3 13D3 70C3 13D3 70C3

13D3 70C3 13D3 70C3 13D3 70C3

13C3 70C3 13C3 70C3

13A3 70C3 13A3 70C3 13A3 70C3 13A3 70C3

13A3 70C3

13C3 70C3

13C3 70C3 13C3 70C3 13C3 70C3

13C3 70C3 13C3 70C3

13C3 70C3

13C3 70D3 13C3 70D3 13C3 70D3

13B3 70D3 13B3 70D3 13B3 70D3

13B3 70D3

13B3 70D3 13B3 70D3

12B2 70A3 12B2 70A3

12B2 70A3 12B3 70A3 12B2 70A3

9A7 12B2 12B3 70B3 9B7 12B3 70B3

9B7 12B2 70B3 9A7 12B3 70A3

49C7

29D3 75C3 29D3 75C3

22C4 70C3

22C4 70B3

22C4 70C3 22C4 70C3

22C4 70B3

22C2 70C3

R1030

0

1/16W 5%

NOSTUFF

402 1R1007

21/16W5%

MF-LF

1KNOSTUFF

402

R10031

21/16W1%

402

R1021

54.9

1/16W 1%

402

R1022

54.9

1/16W 1%

402

13C3 70C3 13C3 70C3

R1023

649

1/16W 1%

402

R10121

21/16W5%

1KNOSTUFF

MF-LF402

C1000

1

NOSTUFF0.1uF10%

402

U1000

N3P5P2L2P4P1R1

Y2U5R3W6

A6

U4Y5U1R4T5T3W2W5Y4J4

U2V4W3AA4AB2AA3

L5L4K5M3N2J1

H1

M1

V1

A22A21

E2

AD4AD3AD1AC4

G5

F1

C20

E1H5F21

A5

G6E4D20

C4

B3

C6B4

H4

B1

AC2AC1

D21

K3H2K2J3L1

C1F3F4G3

M4N5T2V3B2C3D2D22D3F6

A3D5

AC5AA6AB3

A24B25C7AB5G2

AB6

OMIT

MEROMFCBGA

U1000

B22B23C21

R26U26AA1Y1

E22F24

J24J23H22F26K22H23

N22K25P26R23E26

L23M24L22M23P25P23P22T24R24L25G22

T25N25

Y22AB24V24V26V23T22U25U23F23

Y25W22Y23W24W25AA23AA24AB25

AE24AD24G25

AA21AB22AB21AC26AD20AE22AF23AC25AE21AD21E25

AC22AD23AF22AC23

E23K24G24

M26H25

N24

U22

AC20

E5B5D24

C23D25C24AF26AF1A26

OMIT

MEROMFCBGA

R1024

1%

MF-LF54.9PLACEMENT_NOTE=Place R1024 near ITP connector (if present)

402

SYNC_DATE=11/12/2006SYNC_MASTER=T9_MLB_NOME

PM_THRMTRIP_L

CPU_THERMD_PCPU_PROCHOT_L

XDP_DBRESET_LXDP_TRST_LXDP_TMSXDP_TDOXDP_TDIXDP_BPM_L<4>

XDP_BPM_L<3>

XDP_BPM_L<1>

XDP_BPM_L<0>

FSB_HITM_LFSB_HIT_LFSB_TRDY_LFSB_RS_L<2>

FSB_RS_L<1>

FSB_RS_L<0>

FSB_CPURST_L

CPU_IERR_LFSB_BREQ0_LFSB_DBSY_LFSB_DRDY_LFSB_DEFER_LFSB_BNR_L

TP_CPU_RSVD9TP_CPU_RSVD8TP_CPU_RSVD7TP_CPU_RSVD6TP_CPU_RSVD5TP_CPU_RSVD4TP_CPU_RSVD3TP_CPU_RSVD2TP_CPU_RSVD1TP_CPU_RSVD0CPU_SMI_LCPU_NMICPU_INTRCPU_STPCLK_LCPU_FERR_L

9C6 9C6

Trang 10

OUTOUTVCC

VSSSENSEVCCSENSE

VID6VID5VID4VID3VID2VID1VID0VCCAVCCP

30.4 A (LFM)25.5 A (SuperLFM)

9.4 A (Enhanced Deeper Sleep)

Standard Voltage:

(CPU CORE POWER)

130 mA

(CPU IO POWER 1.05V)

(CPU INTERNAL PLL POWER 1.5V)

17.0 A (Design Target)23.0 A (Design Target)

21.0 A (HFM)18.7 A (LFM)TBD A (SuperLFM)TBD A (Auto-Halt/Stop-Grant HFM)TBD A (Auto-Halt/Stop-Grant SuperLFM)TBD A (Sleep HFM)

TBD A (Sleep SuperLFM)TBD A (Deep Sleep HFM)TBD A (Deep Sleep SuperLFM)TBD A (Deeper Sleep)

TBD A (Deeper Sleep)TBD A (Deep Sleep HFM)TBD A (Sleep HFM)TBD A (Auto-Halt/Stop-Grant HFM)

TBD A (HFM)TBD A (LFM)

Current numbers from Merom for Santa Rosa EMTS, doc #22221

CPU Power & Ground

051-7455 01

10 76

MF-LF402PLACEMENT_NOTE=Place within 1 inch of CPU, no stub

1/16W1%

OMIT

V25V22V5V2U24U21U6U3T26T23B8

T4T1R25R22R5R2P24P21P6

P3B6

N26N23N4N1M25M22M5M2L24L21AF2

L6L3K26K23K4K1J25J22J5J2A23

H24H21H6H3G26G23G1G4F25F22A19

F2F19F16F13F11F8F5E24E21E19A16

E16E14E11E8E6E3D26D23D19D16A14

D13D11D8D4D1C25C22C2C19C16A11

C14C11C8

AF25A25AF21C5

AF19AF16AF13AF11AF8AF6A2AE26AE23AE19B24

AE16AE14AE11AE8AE4AE1AD25AD22AD19AD16B21

AD13AD11AD8AD5AD2AC24AC21AC19AC16AC14B19

AC11AC8AC6AC3AB26AB23AB19AB16AB13AB11B16

AB8AB4AB1AA25AA22AA19AA16AA14AA11AA8B13

AA5AA2Y24Y21Y6Y3W26W23W4W1B11

A8A4

U1000

FCBGAMEROM

AE7

AE2AF3AE3AF4AE5AF5AD6

AF7

N6N21M21K21J21M6K6J6

W21V21T6T21R6R21

V6G21

C26B26

AF20AF18AF17AF15AF14AF12AF10AF9AE20AE18B7

AE17AE15AE13AE12AE10AE9AD18AD17AD15AD14A20

AD12AD10AD9AD7AC18AC17AC15AC13AC12AC9

A18

AC7AB7AB20

AB18AB17AB15AB14AB12AB10AC10A17

AB9AA20AA18AA17AA15AA13AA12AA10AA9AA7A15

F20F18F17F15F14F12F10F9F7E20A13

E18E17E15E13E12E10E9E7D18D17A12

D15D14D12D10D9C18C17C15C13C12A10

C10C9B20B18B17B15B14B12B10B9

A9A7

U1000

70A3 59A5 59A4

70A3 59C7

PLACEMENT_NOTE=Place within 1 inch of CPU, no stub

MF-LF402

100

1%

1/16W2

1R1101

70A3 59C7 70A3 59C7 70A3 59C7 70A3 59C7 70A3 59C7 70A3 59C7

OMIT

12C5 12B3 11A3

7D7

7C7 7C7

Trang 11

APPLE INC.

NONESCALE

CPU VCORE HF AND BULK DECOUPLING

C1250, C1251, C1252 AND C1253 NEED TO USE 6mOHM CAPS.

PLACE ON BOTTOMSIDE PLACE INSIDE SOCKET CAVITY (ON BOTTOMSIDE)

PLACE ON BOTTOMSIDE LAYOUT NOTE:

LAYOUT NOTE:

PLACE C1235 CLOSE TO CPU

PLACE INSIDE SOCKET CAVITY (ON BOTTOMSIDE)

4x 330uF 20x 10uF 0805

1X 330UF, 6X 0.1UF

VCCP (CPU I/O) DECOUPLING

VCCA (CPU AVdd) DECOUPLING

PLACE C1281 NEAR PIN B26 OF U1000 LAYOUT NOTE:

1x 10uF, 1x 0.01uF

C12351

CRITICAL 330uF10%

2.5VD2T

C1237

1

220%

C1239

1

220%

C1210

1

2805-26.3VX5R

10UF CRITICAL

10%

C1216

1

2805-26.3VX5R

CRITICAL 10UF

10%

C1202

1

2805-26.3VX5R

10UF CRITICAL

10%

C1203

1

2805-26.3VX5R

CRITICAL 10UF

10%

C1204

1

2805-26.3VX5R

10UF CRITICAL

10%

C1205

1

2805-26.3VX5R

10UF CRITICAL

10%

C1206

1

2805-26.3VX5R

10UF CRITICAL

10%

C1207

1

2805-26.3VX5R

10UF CRITICAL

10%

C1208

1

2805-26.3VX5R

CRITICAL 10UF

10%

C1209

1

2805-26.3VX5R

CRITICAL 10UF

10%

C1214

1

2805-26.3VX5R

CRITICAL

10%

10UF C1213

1

2805-26.3VX5R

10UF CRITICAL

10%

C1212

1

2805-26.3VX5R

10UF CRITICAL

10%

C1211

1

2805-26.3VX5R

10UF CRITICAL

10%

C1219

1

2805-26.3VX5R

CRITICAL 10UF

10%

C1200

1

2805-26.3VX5R

10UF CRITICAL

10%

C1236

1

2402

0.1UF

CERM10V

C1215

1

2805-26.3VX5R

10UF CRITICAL

10%

C1218

1

2805-26.3VX5R

10UF CRITICAL

C12501

23D2T2.0V330UF10%

CRITICAL

TANT

C12511

23D2T2.0V330UFTANT10%

CRITICAL

C12521

2

330UF CRITICAL

TANT10%

D2T

C12531

23D2T2.0V330UFTANT10%

CRITICAL

CPU Decoupling & VID

76 01

SYNC_DATE=04/26/2006SYNC_MASTER=MSARWAR

9D5 48B3

9C5 10D7

9B6 10B5

9B5 10B7 7D7

7C7 7C7

Trang 12

ININOUTOUTOUT

OUT

IOIN

OUTIN

IOIOIOIOIO

APPLE INC.

NONESCALE

INDICATE THAT ITP IS USING TAP I/F, NC IN 965GM CHIPSET SYSTEM.

TO ICH8M SYS_RST*, AND WITH SYSTEM RESET LOGIC

ROUTE THE TCK SIGNAL FROM ITP700FLEX CONNECTOR’S TCK PIN TO CPU’S ITP TCK SIGNAL LAYOUT NOTE:

CONNECTOR’S FBO PIN.

TCK PIN AND THEN FORK BACK FROM CPU TCK PIN AND ROUTE BACK TO ITP700FLEX

(DBA#) (DEBUG PORT ACTIVE) (DBR#)

(DEBUG PORT RESET)

ITP 16V 402

R1302

ITP 22.6

1%

1/16W402

R13011

2

NOSTUFF

54.9

MF-LF4021/16W1%

R1300

ITP

MF-LF402

202122232425262728293

30

3132

3334

456789

ITP

M-ST-SM

CRITICAL QT500306-L021-9F

=PP1V05_S0_CPU ITPRESET_L

ITP_TDO

XDP_TMS LVDS_CTRL_DATA LVDS_CTRL_CLK XDP_TCK

XDP_TDI

12B3

12C5 11A3

11A3 10C7

10C7 9D5

9D5 9C5

9C5

70B3 70B3

70B3 9B5

9C6

70A3

22C4 70A3

9B5

9C6

67A7 67A7

9C6

70A3

70A3 27C6

70A3

9C6 9C6 7C7

9A7

9C6

9B2 9C6

7C7

9B7

14D5 14D5

9A7

9C5

9C6 9C6

9C6 29D3 29D3 9A7 9B7

Trang 13

BIBI

OUTOUTBI

BI

BIBIBI

BIBIBIBI

BIBIBI

BIBIBIBIBIBI

BIBI

OUTBI

OUTOUTOUT

BIBIBIBIBI

BIBI

(1 OF 10)

BIBIBIBIBI

IN

ININ

OUTOUT

BIBIBIBIBIBIBIBIBIBIBIBIBIBI

BI

BIBIBIBIBI

BIBIBI

BI

BIBI

BI

BIBIBI

BIBI

BI

BIBI

BI

BIBI

BI

BIBI

BI

BIBIBI

BI

BIBI

BI

BIBIBI

BIBI

BI

APPLE INC.

NONESCALE

9D6 70D3 9D6 70D3 9D6 70D3

9D6 70D3

9B2 70D3

9D6 70D3 9D8 70C3

C1425

1

240216V

0.1uF

X5R

R14261

24021/16W1%

MF-LF

2.0K

R14251

24021/16W1%

MF-LF

1K

9C4 70D3

9B4 70C3 9C2 70C3 9B2 70C3

9C4 70D3 9B4 70C3 9D8 70C3

9C2 70C3 9B2 70C3

9C4 70D3

9B4 70C3 9C2 70C3 9B2 70C3

9C6 70D3 9C6 70D3

9D6 70D3 9D8 70C3

9D6 70D3 9D6 70D3 9D6 70D3

9D8 70C3 9D8 70C3 9D8 70C3

9D8 70C3 9C8 70C3

MF-LF

54.9

R14151

24021/16W1%

MF-LF

24.9

R14101

24021/16W1%

MF-LF

221

R14111

24021/16W1%

MF-LF

100 1C1410

240216V

B15E17C18A19B19N19

B11C11M11C15F16L13

G12H17G20

B9

C8E8F12

B6E5

E2G2

M10N12N9H5P13K9M2W10Y8V4G7

M3J1N5N3W6W9N2Y7Y9P4M6

W3N1AD12AE3AD9AC9AC7AC14AD11AC11H7

AB2AD7AB1Y3AC6AE2AC5AG3AJ9AH8H3

AJ14AE9AE11AH12AJ5AH5AJ6AE7AJ7AJ2G4

AE5AJ3AH2AH13

F3N8H2

C10D6

K5L2AD13AE13

H8K7

M7K3AD2AH11L7K2AC2AJ10

A9

E4C6G10

C2

M14E13A11H13B12E12D7D8

W1W2B3

B7

AM5AM7

FCBGA

CRESTLINEOMIT

9C8 70C3 9C8 70C3 9C8 70C3

9C8 70C3 9C8 70C3

R14211

24021/16W1%

MF-LF

54.9

9D6 70D3

29D3 75C3 29D3 75C3

9D6 12B5 70D3 9A2 70B3

9C8 70C3

9C8 70C3 9C8 70C3 9C8 70C3 9C8 70C3

9C8 70C3 9C8 70C3 9C8 70C3

9C4 70D3

9D8 70C3 9D8 70C3 9D8 70C3 9D8 70C3 9C4

70D3

9C4 70D3 9C4 70D3 9C4 70D3

9C4 70D3

9C4 70D3 9C4 70D3 9C4 70D3

9C4 70D3

9C4 70D3 9C4 70D3

9C4 70C3

9B4 70C3 9C4 70C3 9C4 70C3

9B4 70C3 9B4 70C3

9B4 70C3

9D8 70C3

9B4 70C3

9B4 70C3 9B4 70C3

9C2 70C3

9D8 70C3

9C2 70C3

9C2 70C3 9C2 70C3

9C2 70C3

9D8 70C3

9C2 70C3

9C2 70C3 9C2 70C3

9C2 70C3

9B2 70C3

9C2 70C3 9C2 70C3

9B2 70C3 9B2 70C3

9B2 70C3

9D8 70C3

9B2 70C3

9B2 70C3 9B2 70C3 9B2 70C3

9B2 70C3

9B2 70C3 9B2 70C3

FSB_ADSTB_L<1>

FSB_BPRI_LFSB_BNR_L

FSB_BREQ0_LFSB_DEFER_LFSB_DBSY_L

FSB_DPWR_L

FSB_CLK_NB_PFSB_CLK_NB_N

FSB_DRDY_LFSB_HIT_LFSB_HITM_L

FSB_TRDY_LFSB_LOCK_L

Trang 14

IN

OUTOUTOUT

ININ

OUTOUTOUTOUT

CRT_DDC_DATA

L_CTRL_DATA

LVDSB_DATA1LVDSB_DATA2LVDSB_DATA0LVDSB_DATA2*

LVDSB_DATA1*

LVDSB_DATA0*

LVDSA_DATA2

LVDSA_DATA0LVDSA_DATA1

LVDSB_CLK*

LVDS_VREFLLVDS_IBG

TVC_RTNTVA_RTNTVB_RTN

TVC_DACTVB_DACTVA_DAC

CRT_RED*

CRT_REDCRT_GREEN*

CRT_GREENCRT_BLUE*

CRT_BLUE

CRT_VSYNCCRT_TVO_IREFCRT_HSYNCCRT_DDC_CLK

L_BKLT_EN

L_DDC_CLK

TV_DCONSEL0TV_DCONSEL1

LVDS_VREFHL_CTRL_CLK

OUTOUT

IN

ININ

IN

INININ

IN

INININININ

ININ

IN

ININ

IN

INININ

OUT

OUTOUT

OUT

OUTOUT

OUT

IN

OUT

OUTOUT

OUT

OUTOUT

IN

BIBI

OUTOUTOUTOUT

OUTOUT

IN

OUT

OUTOUTOUTOUTOUTOUT

OUT

OUTOUT

IN

OUTOUTOUT

OUT

BIBI

APPLE INC.

NONESCALE

DRAWING NUMBER

SIZE

D

rails must be filtered except for VCCA_CRT

Tie DPLL_REF_CLK* and DPLL_REF_SSCLK* to VCC (VCore)

decoupling Otherwise, tie VCCD_LVDS to GND also

Can leave all signals NC if LVDS is not implemented

S-Video: DACB & DACC only

Unused DAC outputs must remain powered, but can

share filtering with VCCA_CRT_DAC

Tie R/R#/G/G#/B/B#, HSYNC and VSYNC to GND

Tie TVx_DAC, TVx_RTN, R/R#/G/G#/B/B#, HSYNC,CRT & TV-Out Disable

All CRT/TVDAC rails must be powered Allomit filtering components Unused DAC outputs

VCCA_CRT_DAC, VCCA_DAC_BG, VCCA_TVx_DAC,VCCD_CRT, VCCD_QDAC and VCC_SYNC

NOTE: Must keep VDDC_TVDAC powered and filtered at all times!

Internal Graphics Disable

Follow instructions for LVDS and CRT & TV-Out Disable above

TV_DCONSELx to GND

Can also tie CRT_DDC_*, L_CTRL_*, L_DDC_*, SDVO_CTRL_* and

Tie DPLL_REF_CLK and DPLL_REF_SSCLK to GND

Tie VCCA_DPLLA and VCCA_DPLLB to VCC (VCore)

Tie VCC_AXG and VCC_AXG_NCTF to GND

Leave GFX_VID<3 0> and GFX_VR_EN as NC

Tie TVx_DAC and TVx_RTN to GND Must power allTV-Out Disable / CRT Enable

CRT Disable / TV-Out Enable

VSYNC and CRT_TVO_IREF to GND

Can tie the following rails to GND:

TV-Out Signal Usage:

Composite: DACA onlyComponent: DACA, DACB & DACC

should connect to GND through 75-ohm resistors

TVDAC rails VCCA_TVx_DAC and VCCA_DAC_BG can

Tie VCC_TX_LVDS and VCCA_LVDS to GND

LVDS Disable

If SDVO is used, VCCD_LVDS must remain powered with proper

SDVOC_REDSDVOC_GREENSDVOC_BLUESDVOC_CLKP

SDVOB_BLUESDVOB_CLKP

SDVOB_RED#

SDVOB_GREEN#

SDVOB_BLUE#

SDVOB_CLKNSDVOC_RED#

SDVOC_GREEN#

SDVOC_BLUE#

SDVOC_CLKN

SDVOB_REDSDVOB_GREEN

SDVO_FLDSTALLSDVO_INTSDVO_TVCLKIN

R1510

1

MF-LF 1%

24.9

67B8

8C6

69B8 69A8

69A8

69D7 69D8 69D7 69A8

8C6

69B8

69A8

67A8 71C3

U1400

H32G32

K33G35

K29J29

F33

F29E29

C32E33

J40H39E39E40C37D35K40L41L43N41N40C45D46

G50G51

E50E51

F48F49

E42D44

E44G44

A47B47

A45B45

N43M43

J50J51

L50L51

AC45AD44

AC41AD40

AH47AG46

AG49AH49

AH45AG45

AG42

AG41

M47N47

U44T45

T49T50

T41U40

W45Y44

W41Y40

AB50AB51

Y48W49

M45N45

T38U39

AD47AC46

AC50AC49

AD43AC42

AG39AH39

AE50AE49

AH43

AH44

T46U47

N50N51

R51R50

U43T42

W42Y43

Y47W46

Y39W38

AC38

AD39

M35P33

E27

F27G27

J27K27

69C8 69C8

8C6 8C6

8C6

8C6 8C6 8D6

68B6 71D3

8C6 8C6 8C6

8C6 8C6

8C6

8C6 68B6 71D3

8C6

8B6 8B6 8B6

68C6 71D3

68C6 71D3 8B6

8A6 8B6

8B6

8C6

8B6

8B6 8B6

8B6

8C6

8B6

8B6 8B6

8B6

8C6

68B6 71D3

68B6 71D3 68B6 71D3

68B6 71D3 68C6 71D3

8D6

67B2 71D3

8C6

67B2 71D3

8D6 8D6

8D6

67B2 71D3 67B2 71D3 67B2 71D3

8D6 8D6

8D6

8C6

69D8 69D8 69D8

69D7

69B8 69B8

20D3 18B3

Trang 15

THERMTRIP*

PM_BM_BUSY*

RSVD4RSVD3

RSVD7

SM_CKE1SM_CK0*

SM_CKE0

SM_ODT0

SM_ODT2

SM_RCOMPSM_RCOMP*

SM_VREF0SM_VREF1SM_RCOMP_VOL

SM_CS1*

SM_CS0*

RSVD14

RSVD11RSVD10RSVD9RSVD5

RSVD8RSVD2

DPLL_REF_CLK*

DPLL_REF_SSCLK

PEG_CLK

DMI_RXN1DMI_RXN0

DMI_RXN3DMI_RXN2

DMI_RXP0DMI_RXP1DMI_RXP2

DMI_TXN0DMI_RXP3

DMI_TXN2DMI_TXN1

DMI_TXP0DMI_TXN3

DMI_TXP1DMI_TXP2DMI_TXP3PEG_CLK*

RSVD12

CL_DATA

CL_VREF

SDVO_CTRL_CLKSDVO_CTRL_DATA

ICH_SYNC*

TEST1TEST2

GFX_VID0GFX_VID1GFX_VID2

GFX_VR_ENGFX_VID3

RSVD20RSVD21

RSVD24RSVD25

RSVD27

RSVD34RSVD35RSVD36RSVD37RSVD38RSVD39

RSVD41RSVD42RSVD40

RSVD43RSVD44RSVD45CFG0CFG1CFG2CFG3CFG4CFG5CFG6CFG7CFG8CFG9CFG10CFG11CFG12CFG13

CFG16CFG15CFG14

CFG17CFG18CFG19CFG20

PM_DPRSTP*

PM_EXT_TS0*

PWROKPM_EXT_TS1*

RSTIN*

DPRSLPVR

NC2

NC4NC3

NC5

NC7NC6

NC10NC9

NC12NC11

NC13NC14NC15NC16

DPLL_REF_CLK

SM_RCOMP_VOHSM_ODT3SM_ODT1

RSVD13

SM_CS2*

SM_CS3*

SM_CK3SM_CK4

SM_CK4*

SM_CKE3RSVD1

SA_MA14

RSVD22RSVD23

RSVD26

SB_MA14

SM_CK2SM_CK2*

SM_CK5SM_CK5*

BIBIINOUT

BIBIOUTOUT

ININ

OUT

OUTOUT

INININOUT

OUTOUTOUTBI

OUTBI

OUT

OUTOUTOUT

OUTOUT

OUTOUTOUTOUTOUTOUTOUT

IN

ININ

ININININININ

ININ

OUT

OUTOUTOUT

OUTOUT

APPLE INC.

NONESCALE

IPDIPDIPU

RESERVED

See Below See Below

Low = DisabledHigh = Enabled

10 = All-Z Mode Enabled

01 = XOR Mode Enabled

0.1uF10V

C16151 2 402 CERM 20%

0.1uF10V

U1400

P27N27

R24L23J23E23E20K23M20M24L32N33N24

L35

C21C23F23N23G23J20C20

AM49AK50AT43AN49AM50

G39

AN47AJ38AN42AN46AM47AJ39AN41AN45AJ46AJ41AM40AM44AJ47AJ42AM39AM43

B42C42H48H47

G36

E35A39C38B39E36

G40

BJ51

E1A5C51B50A50A49BK2

BK51BK50BL50BL49BL3BL2BK1BJ1

K44K45

G41L39L36J36AW49AV20

P36

AR37AM36AL36AM37D20P37

H10B51BJ20BK22BF19BH20BK18BJ18R35

BH39AW20BK20C48D47B44N35

C44A35B37B36B34C34

AR12AR13AM12AN13J12

BJ29BE24

H35K36

AV29

AW30BB23

BA23

BF23BG23

BA25

AW25AV23

AW23

BC23BD24

BE29AY32BD39BG37BG20BK16BG16BE13BH18BJ15BJ14BE16BL15BK14BK31BL31AR49AW4

A37R32N20

24C3 74A3 24C3 74A3

8B2 24C3 74A3

68A6

68A6 28B4 24B5

R16911

2 40220K

MF-LF 5%

24C3 59D8 70B3

8B2 44B8

1/16W

C16251 20.01UF10%

CERM 402

C1624

1

2 6032.2UF6.3V CERM1 20%

R1624

1

21K

MF-LF 1%

1/16W 402

C1622

1

2 603 6.3V CERM12.2UF20%

C16231 20.01UF10%

CERM 402

R1620

1

21K

402 1/16W 1%

R1640

1

MF-LF1K1%

C16401 2 402 20%

CERM0.1uF

60C6

30C4 32C6 72D3 31C4 32A5 72B3

29C8 70B3

29B8 70B3 29B8 70B3 8A6

8A6

8A6 8A6 15D7

24D5 8A6

R1600

5%

1/16W402

9C6 22C2 45B3 70B3

8B2 44B8

9B2 22C4 59C7 70B3

27B5 59C7

30D4 72D3

31A4 72B3 31D4 72B3 30A4 72D3

30D4 72D3

31A4 72B3 31D4 72B3 30A4 72D3

30C6 32D6 72D3 30C4 32D6 72D3 31C6 32D6 72B3

30B4 32D6 72D3 31C4 32D5 72B3

30B6 32D6 72D3 31B4 32D6 72B3

31B6 32D6 72B3

30B4 32D6 72D3 30B6 32D6 72D3

31B4 32D6 72B3 31B6 32D6 72B3

R16101

2MF-LF1%

20

402

R16111

21/16W1%

8B2 8B2

23D2 71D3

23D2 71D3 23D2 71D3 23D2 71D3

23D2 71D3 23D2 71D3

23D2 71D3

23D2 71D3 23D2 71D3 23D2 71D3

23D2 71D3 23D2 71D3

R16301

2402MF-LF5%

10K

051-7455 01

76 15

NB Misc InterfacesGFX_VID<4>

DMI_N2S_P<0>

DMI_N2S_P<2>

CLINK_NB_CLKCLINK_NB_DATA

=NB_CLINK_MPWROKCLINK_NB_RESET_L

TP_MEM_CLKN2TP_MEM_CLKP5TP_MEM_CLKN5

PM_BMBUSY_LCPU_DPRSTP_L

VR_PWRGOOD_DELAYPM_THRMTRIP_L

MEM_RCOMP

=PP1V8_S3M_MEM_NB

MEM_RCOMP_VOHNB_CFG<9>

15C7 15C7

8B4 8B4 8B4 8B4

8D6

8D6 8D6

Trang 16

BIBIBIBIBI

OUTOUTOUTOUTOUT

BI

OUTOUT

BIBIBIBI

BIBIBIBIBI

BIBIBIBI

BI

BIBIBIBIBIBIBIBIBIBI

BI

BIBIBI

BIBI

BIBIBIBI

BI

BIBI

BIBIBIBIBI

BIBI

BI

BIBIBIBI

BIBIBI

OUTOUTOUT

BI

OUTOUTOUTOUTOUTOUT

OUTOUTOUTOUT

BI

OUTOUTOUTBIBI

BIBIBIBIBI

BI

BIBIBI

BIBIBIBIBI

OUT

BI

OUTOUT

OUTOUTOUTOUTOUTOUTOUTOUT

BI

OUTSA_DQ0

SA_DQ1SA_DQ2

SA_BS1SA_BS0

SA_DQ45

SA_DM0SA_DM1

SA_DM3SA_DM2

SA_DM5SA_DM4

SA_DM7SA_DM6

SA_DQS0SA_DQS1SA_DQS2SA_DQS3SA_DQS4SA_DQS5SA_DQS6SA_DQS7

SA_MA9SA_MA8

SA_MA10SA_MA11SA_MA12SA_MA13

SB_CAS*

SB_BS2SB_BS0SB_BS1

SB_DQ63SB_DQ62

SB_DQ59SB_DQ58SB_DQ56SB_DQ55SB_DQ54SB_DQ53SB_DQ52SB_DQ51SB_DQ50SB_DQ49SB_DQ48SB_DQ47SB_DQ45SB_DQ46SB_DQ44SB_DQ43SB_DQ42SB_DQ41SB_DQ40SB_DQ39SB_DQ38SB_DQ37SB_DQ36SB_DQ34SB_DQ35SB_DQ33SB_DQ32SB_DQ31SB_DQ30SB_DQ28SB_DQ29SB_DQ27SB_DQ26SB_DQ25SB_DQ24SB_DQ23SB_DQ22SB_DQ21SB_DQ20SB_DQ19SB_DQ18SB_DQ17SB_DQ16SB_DQ15SB_DQ14SB_DQ13SB_DQ11SB_DQ12SB_DQ10SB_DQ9SB_DQ8SB_DQ3

SB_DQ57

SB_DQ61SB_DQ60

SB_WE*

SB_RCVEN*

SB_RAS*

SB_MA13SB_MA12SB_MA11SB_MA10SB_MA8SB_MA9SB_MA7SB_MA6SB_MA5SB_MA4SB_MA3SB_MA2SB_MA1SB_MA0SB_DQS7*

SB_DM6SB_DM7

SB_DM4SB_DM5

SB_DM2SB_DM3SB_DM1(5 OF 10)

BIBIBIBIBIBIBI

BI

BIBIBIBIBIBIBI

OUTOUTOUT

BI

OUTOUTOUTOUTOUTOUTOUTOUT

OUTBI

BI

APPLE INC.

NONESCALE

30C6 72C3

30B6 72C3 30B4 72C3 30A4 72C3

30A6 72C3

30A4 72C3 30A6 72C3 30B6 72C3 30B4 72C3 30C4 72C3

30A6 72D3

30C6 72C3 30D4 72C3

31A6 72B3

31A4 72B3 31A6 72B3

31A4 72B3

31A6 72B3 31A6 72B3 31A4 72B3

31A4 72B3

30A6

31A6 72B3 31A4 72B3

31A6 72B3 31A4 72B3 31A4 72B3

31B6 72B3 31A6 72B3

31A4 72B3

30A4 72D3

31B6 72B3 31A6 72B3 31B4 72B3 31B4 72B3 31A4 72B3 31A6 72B3 31B6 72B3 31B6 72B3 31B4 72B3 31B4 72B3

30A4 72D3

31B6 72B3

31C6 72B3 31C6 72B3 31B6 72B3

31B4 72B3 31B4 72B3

31C4 72B3

31C6 72B3 31C4 72B3 31C6 72B3

30A6 72D3

31C4 72B3 31C4 72B3 31C4 72B3 31C6 72B3 31C4 72B3 31C6 72B3 31C4 72B3 31C6 72B3 31C6 72B3 31C4 72B3

30A6 72D3

31D4 72B3 31D4 72B3

31D4 72B3 31D6 72B3

31D4 72B3 31D6 72B3 31D6 72B3

31D6 72B3 31D6 72B3

30A4 72D3

31D4 72B3 31D4 72B3 31D6 72B3

31D4 72B3

31D6 72B3 31D4 72B3 31D6 72B3

31B6 32A6 72B3 31B4 32A6 72B3 31B4 32A5 72B3

30A6 72D3

31C6 32A5 72B3 31B6 32B5 72B3

31C4 32A5 72B3 31C6 32B5 72B3 31C6 32B5 72B3 31C4 32B5 72B3 31B6 32B5 72B3 31C4 32B5 72B3 31B4 32B5 72B3 31B6 32B5 72B3

30A4 72D3

31B4 32B5 72B3 31B6 32B5 72B3 31B4 32B5 72B3 31A4 72A3 31A6 72A3

31C4 72A3

31B6 72A3 31B4 72A3

31C6 72A3 31D6 72A3

30A4 72D3

31A6 72A3 31A4 72A3 31D6 72A3

31B6 72A3 31A4 72A3 31C4 72A3 31D6 72A3 31C6 72A3

31A6 72A3

31D6 72A3

30A6 72D3

31A6 72B3 31A4 72A3

31C6 72B3 31B4 72B3 31C4 72B3 31D4 72B3 31D4 72B3 31B6 32A6 72B3 31C6 32A6 72B3 31B6 32A6 72B3

30A4 72D3

31B4 32A6 72B3

U1400

BB19BK19BF29BL17AT45BD44BD42AW38AW13BG8AY5AN6

AR43AW44

BG47BJ45BB47BG50BH49BE45AW43BE44BG42BE40BA45

BF44BH45BG40BF40AR40AW40AT39AW36AW41AY41AY46

AV38AT38AV13AT13AW11AV11AU15AT11BA13BA11AR41

BE10BD10BD8AY9BG10AW9BD7BB9BB5AY7AR45

AT5AT7AY6BB7AR5AR8AR9AN3AM8AN10AT42

AT9AN9AM9AN11

AW47BB45BF48

AT46

AT47BE48

BD47BB43

BC41BC37

BA37BB16

BA16BH6

BH7BB2

BC1AP3

AP2BJ19BD20

BC19BE28BG30BJ16

BK27BH28BL24BK28BJ27BJ25BL28BA28

BE18AY20BA19

AP49AR51

BA49BE50BA51AY49BF50BF49BJ50BJ44BJ43BL43AW50

BK47BK49BK43BK42BJ41BL41BJ37BJ36BK41BJ40AW51

BL35BK37BK13BE11BK11BC11BC13BE12BC12BG12AN51

BJ10BL9BK5BL5BK9BK10BJ8BJ6BF4BH5AN50

BG1BC2BK3BE4BD3BJ2BA3BB3AR1AT3AV50

AY2AY3AU2AT2

AV49BA50BB50

AT50

AU50BD50

BC50BK46

BL45BK39

BK38BJ12

BK12BL7

BK7BE2

BF2AV2

AV3BC18BG28

BG17BE37BA39BG13

BG25AW17BF25BE25BA29BC28AY28BD37

AV16AY18BC17

OMIT

CRESTLINE

FCBGA

30B4 72D3 30A6 72D3 30B6 72D3 30B6 72D3 30B4 72D3 30B6 72D3 30B6 72D3

30D4 72D3

30B4 72D3 30B6 72D3 30B4 72D3 30B4 72D3 30B6 72D3 30B4 72D3 30C6 72D3 30C4 72D3 30D4 72D3 30C4 72D3

30A6 72D3

30C6 72D3 30C4 72D3 30C6 72D3 30D6 72D3 30C6 72D3 30C4 72D3 30C6 72D3 30C4 72D3 30C6 72D3 30C6 72D3

30A4 72D3

30C4 72D3 30C4 72D3 30D4 72D3 30D4 72D3 30D6 72D3 30D4 72D3 30D4 72D3 30D6 72D3 30D6 72D3 30D6 72D3

30A4 72D3

30D6 72D3 30D4 72D3 30D4 72D3 30D4 72D3 30D6 72D3 30D6 72D3 30D6 72D3

30B6 32C6 72D3 30B4 32C6 72D3 30C6 32C6 72D3

30A4 72D3

30A6 72D3

30C6 32C6 72D3 30C4 32C6 72D3 30C4 32C6 72D3 30B6 32C6 72D3 30B4 32C6 72D3 30B6 32C6 72D3 30B4 32C6 72D3 30B6 32C6 72D3

30B4 32C6 72D3 30D6 72C3

30A4 72D3

30D6 72C3 30C4 72C3

30C6 72C3 30B6 72C3 30B4 72C3

30A4 72C3 30A6 72C3 30D6 72C3

30D6 72C3 30C4 72C3

Trang 17

VCC_AXG_NCTF42

VCC_SM9VCC_SM10

VCC_SM17VCC_SM16

VCC3

VCC_SM5

VCC_SM8

VCC_AXG_NCTF1VCC_AXG_NCTF2VCC_AXG_NCTF3VCC_AXG_NCTF4VCC_AXG_NCTF5VCC_AXG_NCTF6

VCC_AXG_NCTF8VCC_AXG_NCTF7

VCC_AXG_NCTF11VCC_AXG_NCTF12VCC_AXG_NCTF13VCC_AXG_NCTF14VCC_AXG_NCTF15VCC_AXG_NCTF16

VCC_AXG_NCTF29VCC_AXG_NCTF20VCC_AXG_NCTF31VCC_AXG_NCTF32VCC_AXG_NCTF33VCC_AXG_NCTF34VCC_AXG_NCTF35VCC_AXG_NCTF36

VCC_AXG_NCTF41

VCC_AXG_NCTF43VCC_AXG_NCTF44VCC_AXG_NCTF45VCC_AXG_NCTF46

VCC_AXG_NCTF49VCC_AXG_NCTF50VCC_AXG_NCTF51

VCC_AXG_NCTF55

VCC_AXG_NCTF59

VCC_SM_LF1VCC_SM_LF2VCC_SM_LF3VCC_SM_LF4VCC_SM_LF5VCC_SM_LF6VCC_SM_LF7

VCC_AXG_NCTF56VCC_AXG_NCTF54VCC_AXG_NCTF53VCC_AXG_NCTF52

VCC_AXG1VCC_AXG2VCC_AXG3VCC_AXG4VCC_AXG5VCC_AXG6VCC_AXG7VCC_AXG8VCC_AXG9VCC_AXG10VCC_AXG11VCC_AXG12VCC_AXG13VCC_AXG14VCC_AXG15VCC_AXG16VCC_AXG17VCC_AXG18VCC_AXG19VCC_AXG20VCC_AXG21VCC_AXG22VCC_AXG23VCC_AXG24VCC_AXG25VCC_AXG26VCC_AXG27VCC_AXG28VCC_AXG29VCC_AXG30VCC_AXG31VCC_AXG32VCC_AXG33VCC_AXG34

VCC_SM1VCC_SM2VCC_SM3VCC_SM4

VCC_SM6VCC_SM7

VCC_SM11VCC_SM12VCC_SM13VCC_SM14VCC_SM15

VCC_SM18VCC_SM19

VCC_SM21VCC_SM22VCC_SM23

VCC_SM26VCC_SM27VCC_SM28VCC_SM29VCC_SM30VCC_SM31VCC_SM32VCC_SM33VCC_SM34VCC_SM35VCC_SM36

VCC_SM25VCC_SM24

VCC1VCC2

VCC7VCC8VCC9VCC10VCC11VCC12

VCC13

VCC6VCC5VCC4

VSS_SCB6VSS_SCB5VSS_SCB4VSS_SCB3VSS_SCB2VSS_SCB1

VCC_NCTF11VCC_NCTF12VCC_NCTF13VCC_NCTF14

VSS_NCTF21VSS_NCTF20VSS_NCTF19VSS_NCTF18VSS_NCTF17VSS_NCTF16VSS_NCTF15VSS_NCTF14VSS_NCTF12VSS_NCTF11

VSS_NCTF13

VSS_NCTF10VSS_NCTF9VSS_NCTF8VSS_NCTF7VSS_NCTF6VSS_NCTF5VSS_NCTF4VSS_NCTF3VSS_NCTF2VSS_NCTF1

VCC_NCTF22

VCC_NCTF27

VCC_NCTF50

VCC_NCTF47VCC_NCTF48

VCC_NCTF34VCC_NCTF35VCC_NCTF33VCC_NCTF32VCC_NCTF31VCC_NCTF29VCC_NCTF28VCC_NCTF26

VCC_NCTF3VCC_NCTF4

VCC_NCTF45

VCC_AXM_NCTF1VCC_AXM_NCTF2VCC_AXM_NCTF3VCC_AXM_NCTF4VCC_AXM_NCTF5VCC_AXM_NCTF6VCC_AXM_NCTF7VCC_AXM_NCTF8VCC_AXM_NCTF9VCC_AXM_NCTF10VCC_AXM_NCTF11VCC_AXM_NCTF12VCC_AXM_NCTF13VCC_AXM_NCTF14VCC_AXM_NCTF15VCC_AXM_NCTF16VCC_AXM_NCTF17VCC_AXM_NCTF18VCC_AXM_NCTF19

VCC_NCTF8

VCC_NCTF20

VCC_NCTF1

VCC_NCTF5VCC_NCTF6VCC_NCTF7

VCC_NCTF36VCC_NCTF30VCC_NCTF9

impacting part performance

These connections can break without

NCTF balls are Not Critical To Function

Current numbers from Crestline EDS, doc #21749

U1400

AT35

AH31AH29AF32

R30

AT34AH28AC31AC32AK32AJ31AJ28AH32

R20

AB21AB24AB29AC20AC21AC23AC24AC26AC28AC29T14

AD20AD23AD24AD28AF21AF26AA31AH20AH21AH23W13

AH24AH26AD31AJ20AN14

W14Y12AA20AA23AA26AA28

T17

U17U19U20U21U23U26V16V17V19V20T18

V21V23V24Y15Y16Y17Y19Y20Y21Y23T19

Y24Y26Y28Y29AA16AA17AB16AB19AC16AC17T21

AC19AD15AD16AD17AF16AF19AH15AH16AH17AH19T22

AJ16AJ17AJ19AK16AK19AL16AL17AL19AL20AL21T23

AL23AM15AM16AM19AM20AM21AM23AP15AP16AP17T25

AP19AP20AP21AP23AP24AR20AR21AR23AR24AR26U15

V26V28V29Y31

U16

AU32

BA35BB33BC32BC33BC35BD32BD35BE32BE33BE35AU33

BF33BF34BG32BG33BG35BH32BH34BH35BJ32BJ33AU35

BJ34BK32BK33BK34BK35BL33AU30

AV33AW33AW35AY35BA32BA33

AW45BC39BE39BD17BD4AW8AT6

AL24

AP29AP31AP32AP33AL29AL31AL32AR31AR32AR33

AL26AL28AM26AM28AM29AM31AM32AM33

AB33

AF36AH33AH35AH36AH37AJ33AJ35AK33AK35AK36AB36

AK37AD33AJ36AM35AL33AL35AA33AA35AA36AP35AB37

AP36AR35AR36Y32Y33Y35Y36Y37T30T34AC33

T35U29U31U32U33U35U36V32V33V36AC35

V37

AC36AD35AD36AF33

T27

AD19AD37AF17AF35AK17AM17AM24AP26AP28AR15T37

AR19AR28

U24U28V31V35AA19AB17AB35

A3B2C1BL1BL51A51

OMIT

CRESTLINE

FCBGA

C18061 2 4020.1uF10V CERM 20%

C18071 2 4020.1uF10V CERM 20%

C18041 2 4020.22UF6.3V20%

C18051 2 4020.22UF6.3V20%

C18021 2 402 10%

CERM1uF6.3V

C18031 2 402 10%

0.47UF6.3V CERM-X5R

C18011 2 402 10%

CERM1uF6.3V

NB_VCCSM_LF7NB_VCCSM_LF5

=PP1V05_S0M_NB_VCCAXM

31D2

20D8 48B3

30D2 20D8

21C5

20D8 17D7

17C1

17B7

15D2 17D3

17D5

17B3 7C7

7C7

7B7

7A4 7C7

7B7

7C7

Trang 18

VTT7VTT8

VCC_AXD_NCTF

VCCD_CRT

VCC_RXR_DMI1VCC_RXR_DMI2

VTT1

VCC_HV2

VCC_PEG1VCC_PEG2VCC_PEG3

VCC_AXF2

VCC_AXD1VCC_AXD2VSSA_LVDS

VCCA_SM5VCCA_PEG_PLL

VCCA_MPLL

VTT17VTT15

VCCD_LVDS2VCCD_LVDS1VCCD_PEG_PLLVCCD_HPLLVCCD_QDACVCCD_TVDAC

VCCA_TVC_DAC1VCCA_TVC_DAC2VCCA_TVB_DAC2VCCA_TVB_DAC1VCCA_TVA_DAC2VCCA_TVA_DAC1VCCA_SM_CK1

VCCA_SM2VCCA_SM1

VCCA_SM_NCTF2VCCA_SM_NCTF1VCCA_SM11VCCA_SM10VCCA_SM9VCCA_SM8VCCA_SM7

VCCA_SM4VCCA_SM3

VSSA_PEG_BGVCCA_PEG_BGVCCA_LVDS

VCCA_DPLLBVCCA_DPLLAVSSA_DAC_BGVCCA_DAC_BG

VCC_SM_CK3VCC_SM_CK2VCC_SM_CK1

VCC_SM_CK4VCC_DMIVCC_AXF1

VTT22

VCC_AXD6VCC_AXD5VCC_AXD4VCC_AXD3VTT19

VTT2

VTT6VTT5

VTT11VTT10VTT9

VTT13VTT12

VTT14

VTT18

VTT21VTT20

VTT3VTT4VCCA_CRT_DAC2

CERM-X5R 402 6.3V

C1913

1

20.47UF10%

6.3V CERM-X5R 402

C1912

1

20.47UF10%

6.3V CERM-X5R 402

U1400

AT23AU28AU24AT29AT25AT30AR29

B23B21A21

AJ50

C40B40

AD51W50W51V49V50

AH50AH51

BK24BK23BJ24BJ23J32

A43

A33B33A30

B49H49AL2

A41AM2

K50

U51

AW18

AT18AT17

AV19AU19AU18AU17AT22AT21AT19

BC29BB29

AR17AR16

C25B25C27B27B28A28

M32

AN2

J41H42U48

N28L29

R3R2R1

U11U9U8U7U5U3U2

A7F2AH1

NB Power 2

SYNC_DATE=10/30/2006SYNC_MASTER=T9_MLB

PP3V3_S0_NB_VCCA_TVDACCPP1V25_S0_NB_VCCA_DPLLB

20A6

20C8

21C3 21B5

20C3

20D5 15A2

21C1 21A3

21C1

7C7

18B3

21D1 7C4

20B5

20B2

20A2 20B5

7C4

Trang 19

VSS197VSS98

VSS196VSS97

VSS195VSS96

VSS194VSS95

VSS193VSS94

VSS192VSS93

VSS191VSS92

VSS190VSS91

VSS189VSS90

VSS188VSS89

VSS187VSS88

VSS186VSS87

VSS185VSS86

VSS184VSS85

VSS183VSS84

VSS182VSS83

VSS181VSS82

VSS180VSS81

VSS179VSS80

VSS178VSS79

VSS177VSS78

VSS176VSS77

VSS175VSS76

VSS174VSS75

VSS173VSS74

VSS172VSS73

VSS171VSS72

VSS170VSS71

VSS169VSS70

VSS168VSS69

VSS167VSS68

VSS166VSS67

VSS165VSS66

VSS164VSS65

VSS163VSS64

VSS162VSS63

VSS161VSS62

VSS160VSS61

VSS159VSS60

VSS158VSS59

VSS157VSS58

VSS156VSS57

VSS155VSS56

VSS154VSS55

VSS153VSS54

VSS152VSS53

VSS151VSS52

VSS150VSS51

VSS149VSS50

VSS148VSS49

VSS147VSS48

VSS146VSS47

VSS145VSS46

VSS144VSS45

VSS143VSS44

VSS142VSS43

VSS141VSS42

VSS140VSS41

VSS139VSS40

VSS138VSS39

VSS137VSS38

VSS136VSS37

VSS135VSS36

VSS134VSS35

VSS133VSS34

VSS132VSS33

VSS131VSS32

VSS130VSS31

VSS129VSS30

VSS128VSS29

VSS127VSS28

VSS126VSS27

VSS125VSS26

VSS124VSS25

VSS123VSS24

VSS122VSS23

VSS121VSS22

VSS120VSS21

VSS119VSS20

VSS118VSS19

VSS117VSS116VSS17

VSS115VSS16

VSS114VSS15

VSS113VSS14

VSS112VSS13

VSS111VSS12

VSS110VSS11

VSS109VSS10

VSS108VSS9

VSS107VSS8

VSS106VSS7

VSS105VSS6

VSS104VSS5

VSS103VSS4

VSS102VSS101VSS100VSS1

VSS18

VSS2VSS3

(9 OF 10)

VSS202

VSS289VSS290VSS291VSS292

VSS293VSS294

VSS217VSS218

VSS220VSS221

VSS223VSS224

VSS226VSS227VSS228

VSS245VSS246VSS247VSS248VSS249VSS250VSS251VSS252VSS253VSS254VSS255VSS256VSS257VSS258VSS259VSS260VSS261VSS262VSS263VSS264VSS265VSS266VSS267VSS268VSS269VSS270VSS271VSS272VSS273VSS274VSS275VSS276VSS277VSS278VSS279VSS280VSS281VSS282VSS283VSS284VSS285VSS286

VSS207VSS206VSS205

(10 OF 10)

APPLE INC.

NONESCALE

alias these nets directly to GND

Mainly for investigation If not used,

NOTE: TDB = _NTDB_SENSE

Crestline Thermal Diode Pins

AY47AY50B10B20B24B29B30B35B38AB31

B43B46B5B8BA1BA17BA18BA2BA24BB12AC10

BB25BB40BB44BB49BB8BC16BC24BC25BC36BC40AC13

BC51BD13BD2BD28BD45BD48BD5BE1BE19BE23AC3

BE30BE42BE51BE8BF12BF16BF36BG19BG2BG24AC39

BG29BG39BG48BG5BG51BH17BH30BH44BH46BH8AC43

BJ11BJ13BJ38BJ4BJ42BJ46BK15BK17BK25BK29AC47

BK36BK40BK44BK6BK8BL11BL13BL19BL22BL37AD1

BL47C12C16C19C28C29C33C36C41

A15

AD21AD26AD29AD3AD41AD45AD49AD5AD50AD8A17

AE10AE14AE6AF20AF23AF24AF31AG2AG38AG43A24

AG47AG50AH3AH40AH41AH7AH9AJ11AJ13AJ21AA21

AJ24AJ29AJ32AJ43AJ45AJ49AK20AK21AK26AK28AA24

AK31AK51AL1AM11AM13AM3AM4AM41AM45AN1AA29

AN38AN39AN43AN5AN7AP4AP48AP50AR11AR2AB20

AR39AR44AR47AR7AT10AT14AT41AT49AU1AU23AB23

AU29AU3AU36AU49AU51AV39AV48AW1AW12AW16

W11W39W43W47W5W7Y13Y2Y41Y45Y49Y5Y50Y11P29

Trang 20

APPLE INC.

NONESCALE

DRAWING NUMBER

SIZE

D

this is "1 of 2" 1.8V bulk decoupling caps.

spec requires "3.9uH ferrite,1A,32mohm max".

5.6nH,0.9A,45mohm max.no bigger than 0603

WF: Matanzas has 270uF

Layout Note: Route to caps, then GND

WF: Should be 1.0, 1%

100 mA

??? mA

1200 mA Layout Note:

be close to MCH

on opposite side.

Analog PLL Voltage for PCI-E GPU

need to find "1uH,220mA,150mohm max"

I/O voltage Supply

350 mA

1450 mA Layout Note:

??? mA WF: "Place where LVDS

Place L and C close to MCH GMCH ME Core Power

GMCH Memory I/O Rail

250 mA

RX and I/O Logic for DMI

10uF caps should Analog,I/O logic,and Term Voltage for PCI-E Graphics

C21241

2CERM-X5R10%

0.47UF

6.3V402

C21231

26.3VCERM1603

C2112

1

24026.3V20%

0.22uF C2111

1

24026.3V20%

X5R

C21221

220%

4.7uF

6.3V603

C2131

1

2805CERM

22UF

6.3V20%

PLACEMENT_NOTE=Place close to U1400

C2135

1

2 CERM20%

0.1UF

10V

R21831

21/16W4021%

0.51

R21901

2MF-LF1%

4021.1

C21901

2X5R6.3V

C2173 1

220%

10uF

X5R

C21961

2CERM

22UF

80520%

6.3V

C2171

1

2402

C2151

1

1UF

402CERM10%

C21501

2

10uF

6.3VX5R20%

NOSTUFF

C2142

1

2805CERM

C2145

1

2805CERM

22UF

6.3V20%

0.1UF

R2186

402MF-LF1%

1

2

4021K

R21101

2

1%

MF-LF1K402

R21111

2

4021K

0.1UF

CERM10V402

CERM402

402CERM10V

C2182

1

2402

0.1UF

CERM10V

C2110

1

2805CERM

01/16W5%

D218612

402

0.22uF C2102

1

2402

6.3V

C2101

1

2805CERM

22UF

PLACEMENT_NOTE=Place in GMCH cavity

6.3V20%

76 01 20

SYNC_DATE=06/15/2006 SYNC_MASTER=WFERRY

NB Standard Decoupling

051-7455

PP1V25_S0M_NB_VCCA_SM

MIN_LINE_WIDTH=0.4 MMVOLTAGE=1.25V

PP1V8_S3_NB_VCCSMCK_RC

=PP1V8_S3_MEMVREF

PP1V25_S0M_NB_VCCA_MPLL

=PP1V25_S0M_NB_VCCD_HPLL

MAKE_BASE=TRUEMIN_NECK_WIDTH=0.2 mmVOLTAGE=0.9VMIN_LINE_WIDTH=0.4 MM

PP0V9_S3M_MEM_NBVREFB

=GND_NB_VSSA_PEG_BG

=PP1V25_S0_NB_VCCDMI

MIN_NECK_WIDTH=0.2 mmMAKE_BASE=TRUE

MIN_LINE_WIDTH=0.25 MMVOLTAGE=1.25VMIN_NECK_WIDTH=0.2 MM

PP1V25_S0_NB_PEGPLL

MIN_NECK_WIDTH=0.2 MMVOLTAGE=1.05V

=PP1V25_S0_NB_PLL

PP1V25_S0_NB_VCCAXF =PP1V25_S0_NB_VCCAXF

=PP1V05_S0_NB_PCIE

MIN_NECK_WIDTH=0.2 MMVOLTAGE=1.8VMIN_LINE_WIDTH=0.25 MM

PP1V8_S3M_NB_VCCSMCK

VOLTAGE=1.25VMIN_NECK_WIDTH=0.2 MM

PP1V25_S0M_NB_MPLL_RC

MIN_LINE_WIDTH=0.3 MM

PP1V25_S0M_NB_VCCAXD

6.3V2

0603

FERR-220-OHM-2.5A L2190

VOLTAGE=3.3VMIN_NECK_WIDTH=0.2 MM

PP3V3_S0_NBCORE_FOLLOW_R

PP1V05_S0_NB_VCCRXRDMI

PP1V05_S0_NB_VCCPEG CRITICAL

=PP1V8_S3M_MEM_NB

CRITICAL20%

POLY330UF2.0VCASE-B22

1C2140

18D6 18A6

18C6 7C7

18B6

7C4

Trang 21

EN NR/FB IN GND

THRMLNCEN

NR

PADGND

OUTOUTOUTOUT

APPLE INC.

NONESCALE

DRAWING NUMBER

SIZE

D

WF: Matanzas has 2x 330uF

NEED TO FIND A "1#GH, 500MA, 78MOHM" INDUCTOR WF: Should be 1uH, 30%

260 mA

Layout Note: Route to cap, then GND

WARNING VOLTAGE DROP

VCCD_TVDAC also powers internal thermal sensors.

0011=1.21025V 1000=1.08150V VID<3:0>=1001=1.05575V

80 mA

WF: Is this the best part to use?

These 2 caps should be within 6.35 mm of NB edge

80 mA

125 mA

80 mA

Layout Note:

These 8 caps should be

Layout Note: Route to caps, then GND

Current numbers from Crestline EDS Addendum, doc #20127.

WF: Check C2266 value, R2267 value

GMCH Graphics Core Power These 4 caps should be

R22051

2MF-LF5%

100

1/16W402

C2207

1

2402

0.1UF

CERM10V

R22811

1/16W5%

C22801

2402CERM

NFM1816V

C2293

1

240220%

NFM1816V

C2297

1

240220%

C2201

2

22000pF-1000mA CRITICAL

16VNFM18

C2200

1

240220%

1UF

10V402

POLYCRITICAL

0.1UF C2216

1

240220%

1UF

CERM402

R22661

FF

0.3005%

1/10W

C22661

2603

10UF20%

X5R6.3V

C2230

1

210VCERM40220%

0.1UF

C2285

1

220%

10UF

6036.3V

U2265

3 2

1

4 5

CERM

0.01UF

16V402

D228512

R2245

1

21/16W5%

22K

402

NO STUFFR2243

NO STUFF

R2249

2MF-LF5%

22K

4021

21/16W402

22K

NB Graphics Decoupling

01 76 SYNC_MASTER=WFERRY SYNC_DATE=06/15/2006

PP1V5_S0_NB_QDAC

VOLTAGE=3.3VMIN_NECK_WIDTH=0.2MM

PP3V3_S0_NB_TVDAC

PP1V8_S0_NB_VCCTXLVDS

MIN_NECK_WIDTH=0.2 MMVOLTAGE=1.8VMIN_LINE_WIDTH=0.2 MM

=PP3V3_S0_NB_VCCHV

=GND_NB_VSSA_DAC_BG P3V3TVDAC_EN_RC

=PP1V8_S0_NB_DPLL

PP3V3_S0_NB_VCCA_TVDACC

PP3V3_S0_NB_VCCA_DAC_BG

PP3V3_S0_NB_TVDAC_F

PP1V25_S0_NB_VCCA_DPLLB

PP3V3_S0_NB_VCCA_TVDACB

P3V3TVDAC_NOISE

PP3V3_S0_NB_TVDAC_FOLLOW

PP1V25_S0_NB_DPLL_RF P1V25S0NBDPLL_FB

PP1V5_S0_NB_VCCD_CRT

PP1V5_S0_NB_VCCD_TVDAC

VOLTAGE=1.5VMIN_LINE_WIDTH=0.3 MM

1.0UH-0.5A-0.675A

=PP1V8_S0_NB_LVDS

OMIT20A8 18B3

21D6 18B6

18C6

18A6 7B7

7C4

18D6 7B7

7B7

Trang 22

RTCRST*

HDA_BIT_CLK

DDREQ

RTCX1RTCX2

DCS1*

DCS3*

IDEIRQDDACK*

IORDY

DIOR*

DIOW*

DD11DD12

DD4DD2

DD14DD0

DD9

LDRQ0*

FWH2/LAD2FWH3/LAD3FWH1/LAD1

LDRQ1*/GPIO23

FWH0/LAD0

FWH4/LFRAME*

HDA_SDIN0HDA_SYNC

SATA1TXNSATA1TXP

HDA_SDIN1HDA_SDIN2

RCIN*

SATA0TXPSATA0TXN

CPUPWRGD/GPIO49

SMI*

A20M*

SATA1RXPSATA1RXN

SATARBIASSATARBIAS*

SATA2TXNSATA2TXP

DA2DD6

STPCLK*

TP8

DA0DA1HDA_DOCK_RST*/GPIO34

INTRUDER*

LAN_TXD0

LAN100_SLP

LAN_RSTSYNCLAN_RXD0LAN_RXD1LAN_RXD2

DD7

LAN_TXD2LAN_TXD1

GLAN_DOCK*/GPIO13

GLAN_COMPIGLAN_COMPO

ININ

BI

BIBIBI

BIOUT

OUT

ININ

OUTOUT

ININOUTOUT

ININ

OUTOUT

ININ

OUTOUT

IN

OUT

OUTOUTOUTINININ

BI

BIBI

BI

BIBI

BI

BIBI

BIBIBI

BIBI

OUTOUTOUT

OUT

OUTOUT

OUTOUTOUT

ININ

OUTOUT

APPLE INC.

NONESCALE

INT PDINT PU

INT PDINT PDINT PDINT PDINT PDINT PD

INT PUINT PU

INT PU

U2300

AF13AG26

AG29

AA4AA1AB3

Y6Y5

V1U2

T4V6V5U1V2U6

V3T1V4T5AB2T6T3R2

Y2

W5

W4W3

AF26AE26AD24

E5F5G8F6C4

B24

D25C25AH21

AJ16

AE10AG14

AE14AJ17AH17AH15AD13AE13AJ15

Y3

AF27AE24AC20

AD22AF25

Y1

AD21

D22C21B21C22D21E20C20

G9E6

AD23AH14

AF23

AG25AF24

AF6AF5AH5AH6AG3AG4AJ4AJ3AF2AF1AE4AE3AB7AC6AF10

AG2AG1

AG28AA24AE27AA23

OMIT

BGAICH8M

27C8 27C8

6C2 44C8 46B6

9C8 70C3

R23041

2 402 MF-LF 5%

332K

MF-LF 402 1/16W

40C4 73D3 40D4 73D3

40D4 73D3 40D4 73D3

8D4 8D4 8D4

8D4

8D4 8D4

29C3 75B3 29C3 75B3

40D2 40D2

9B2 15B6 59C7 70B3 9B2 70B3

9C8 70C3

9B2 12B1 70C3

39C3 73D3 39B5 73D3 39B3 73D3

39B5 73D3 39B5 73D3 39C3 73D3

39C5 73D3

39C5 73D3 39C5 73D3

39C5 73D3

39C5 73D3 39C5 73D3

39C3 73D3

39C3 73D3 39C3 73D3

39C3 73D3 39C3 73D3 39C3 73D3

39C3 73D3 39C3 73D3

39B5 73D3

39B5 73D3 39B3 73D3

9B8 70B3

9B8 70C3 9B8 70B3

9C8 70B3

9D6 46B2 70B3 9B8 70C3

402 8A6

73C3

R23001

2 1/16W 1%

332K

402 MF-LF

R23031

2

8.2K5%

1/16W 402

8A6 73C3 8A6 73C3

8A6 73B3

8A6 73C3

R23101

2 402 MF-LF 5%

402

33

MF-LF1/16W5%

39B3 73D3 39B5 73D3

HDA_DOCK_EN_LLAN_ENERGY_DET

=PP3V3_S0_SB_GPIO

PP1V5_S0_SB_VCC1_5_B

GLAN_COMP

SB_INTVRMENSB_LAN100_SLPSB_SM_INTRUDER_L

CPU_A20M_L

CPU_DPSLP_LCPU_DPRSTP_L

CPU_PWRGDCPU_IGNNE_LCPU_INIT_LCPU_INTR

CPU_NMICPU_SMI_LCPU_STPCLK_L

IDE_PDIOW_LIDE_PDIOR_L

IDE_PDDACK_LIDE_IRQ14IDE_PDIORDYIDE_PDDREQ

=PP1V05_S0_SB_CPU_IO

=PP3V3_S0_SB_GPIO

CPU_FERR_L

SB_A20GATETP_LPC_DRQ0_L

SB_RCIN_L

TP_SB_TP8TP_LAN_D2R<2>

SATA_A_D2R_PTP_SB_SATALED_L

SATA_A_R2D_C_PSATA_A_R2D_C_N

SATA_B_D2R_PSATA_B_D2R_NTP_HDA_DOCK_RST_L

TP_LAN_R2D<0>

TP_LAN_RSTSYNCTP_LAN_D2R<0>

TP_LAN_R2D<1>

SATA_B_R2D_C_NSATA_B_R2D_C_P

SATA_C_D2R_PSATA_C_D2R_N

SATA_C_R2D_C_NSATA_C_R2D_C_P

SB_CLK100M_SATA_PSB_CLK100M_SATA_N

SATA_RBIAS_PSATA_RBIAS_N

HDA_BIT_CLK_RHDA_SYNC_RHDA_RST_L_R

HDA_SDOUT_R

HDA_SYNCHDA_BIT_CLK

HDA_RST_L

HDA_SDOUT

SATA_A_D2R_NTP_HDA_SDIN1

TP_ENET_GLAN_CLK

TP_LAN_D2R<1>

HDA_SDIN0

TP_HDA_SDIN3TP_HDA_SDIN2

26A5

22D2

25D6

25C3 22D7

73C3 73C3

73C3

73B3

8A6

8A6 8A6

Trang 23

PETN1PERP1

OC4*/GPIO43OC5*/GPIO29OC6*/GPIO30OC7*/GPIO31OC8*

OC9*

SPI_MOSI

OC0*

OC1*/GPIO40OC2*/GPIO41OC3*/GPIO42

PERN5

DMI1RXNDMI1RXPDMI1TXNDMI1TXP

DMI_CLKNDMI_CLKPPETP1

USBP9NUSBP9P

PERN2

USBP7NUSBP7PUSBP8NUSBP8P

PETN2

USBP6NUSBP6P

PERP3

PETN3PETP3

USBP3NUSBP3P

PERN4PERP4

PETN4PETP4

USBP0NUSBP0PPERP5

SPI_MISO

USBRBIASUSBRBIAS*

PETP5

PERN6/GLAN_RXNPERP6/GLAN_RXPPETN6/GLAN_TXNPETP6/GLAN_TXP

SPI_CLKSPI_CS0*

DMI_IRCOMPDMI_ZCOMP

ININOUTOUT

ININ

BIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBI

ININOUTOUT

BIBI

AD4AD5

AD9

PIRQF*/GPIO3PIRQE*/GPIO2

AD0AD2

AD3

AD6AD8

FRAME*

AD14AD12AD10

AD24AD23(3 OF 6)

INTERRUPT I/F

PCI

BIBI

BIBIBI

BIBI

BIBIBI

BIBI

BIBIBI

BIBI

BIBIBI

BIBI

BIBIBI

BIBI

BIBIBI

BIBI

BI

BIBI

BI

ININ

IN

BIBIBIBI

BIBIOUTBIBIBI

BIBIBI

BI

OUTIN

BIBI

IN

INININ

OUTIN

DRAWING NUMBER

SIZE

D

PCIe Mini Card

rises, or PCIe ports 5 & 6 will be disabled

NOTE: GNT[0-3]# have internal 20K pull-ups

Provide a pull-down on this GPIO if not used

R2415 pull-down on GNT0#

Nineveh-GLCIYukon-PCIE

enabled only when PCIRST# = 0 and PWROK = 1

If used, ensure GNT2# is not low when PWROK

INT PU INT PU

FireWire INT*

SPI

I/F LPC

SB BOOT BIOS SELECT

GNT0# HAS INT PU; ENABLED ONLY WHEN PCIRST#=0 AND PWROK=HSPI_CS1# HAS INT PU (NOMINAL=20K, SIMULATION=15K-35K)

high for x2)pull HDA_SYNC(x2-capable,

Ethernet(AirPort)FireWireExpressCardSpares

INT PD INT PD INT PD

INT PU INT PU INT PU INT PU

INT PD

INT PD INT PD

INT PD

INT PD INT PD INT PD INT PD INT PD

INT PD INT PD INT PD

External C

CameraAirPort (PCIe Mini-Card)

ExpressCardExternal BGeyser Trackpad/Keyboard

External A

External D / WWAN

BluetoothIR

NOTE: USBP[0-9]P/N have internal 15K pull-downs

selects SPI ROM by default

R24081

25%

10K

4021/16W

R2407

1

21/16W402

1/16W

R2409

1

21/16W402MF-LF5%

10K

R2401

1

2MF-LF4025%

10K

1/16W

R24021

24025%

1/16W

10K

R24041

24021/16W

U2300 V27

V26U29U28Y27Y26W29W28AB26AB25AA29AA28AD27AD26AC29AC28T26T25

Y24Y23

AJ19AG16AG15AE15AF15AG17AD12AJ18AD14AH18

F21D23

G3G2H5H4H2H1J3J2K5K4K2K1L3L2M5M4M2M1N3N2

F3F2

BGAICH8M

OMIT

15B3 71D3 15B3 71D3 15C3 71D3

15B3 71D3

15B3 71D3 15B3 71D3

15C3 71D3 15B3 71D3

15B3 71D3 15B3 71D3 15B3 71D3

15B3 71D3

15B3 71D3 15B3 71D3

29C3 75B3 29C3 75B3

8C1 8C1 8C1 73B3

8C1 73B3 8C1 8C2 73B3 8C1 8C2 73B3

8C1 73B3 8C1 73B3 8B1 8B2 73B3 8C1 8C2 73B3

8B1 73B3 8B1 73B3 8B1 73B3

R2414

MF-LF4021%

1/16W

33B6 33B6 33B6 33B6

34C8 34C8

52C7 73A3 52C7 73A3

52C3 73A3 52C3 73A3

U2300

D20E19

A12E16A14G16A15B6C11A9D11B12D19

C12D10C7F13E11E13E12D8A6E8A20

D6A3

D17A21A19C19A18

E15F16E17

D16

A17

D7C18F18C10

C8D9

B10

G6A7

F9B5C5A10

F8G11F12B3

B7

AG24G7

A4E18B19A11

F10C16C9

OMIT

BGAICH8M

23A4 74D3

37B5 74D3 37B5 74D3 37B5 74D3 37B5 74D3

23A4 37A5 74D3 37B5 74D3

37A6 23A4 37A5 74D3 23A4 37A5 74D3 23A4 74D3

23A4 37A5 74D3 23A4 37A5 74D3 23A4 37A5 74D3

10K

R24061

2

1/16W5%

R2441 1 2 8.2K

8C1

8B1

23A4 39C8 68A4 68B8

USB_EXTB_OC_LEXCARD_OC_L

SB_GPIO40USB_EXTD_OC_L

USB_EXTC_OC_L

ODD_PWR_EN_LINT_PIRQF_LINT_PIRQE_L

PCI_FRAME_LPCI_TRDY_LPCI_STOP_LPCI_LOCK_LPCI_PERR_LPCI_RST_LPCI_PAR

PCIE_MINI_R2D_C_PPCIE_MINI_R2D_C_N

TP_SPI_CE_R_L<1>

PCI_DEVSEL_LPM_LATRIGGER_L

PCI_C_BE_L<3>

PCI_SERR_L

PCI_REQ1_LPCI_TRDY_L

INT_PIRQE_LINT_PIRQD_LINT_PIRQB_LINT_PIRQA_LPCI_REQ2_L

PCI_STOP_LPCI_IRDY_LPCI_FRAME_L

PCI_FW_REQ_LPCI_LOCK_L

INT_PIRQF_LINT_PIRQC_L

ODD_PWR_EN_L

PCI_SERR_LPCI_DEVSEL_LPCI_PERR_L

=PP3V3_S0_SB_PCI

USB_RBIASDMI_IRCOMP_R

TP_PCIE_A_R2D_C_NTP_PCIE_A_D2R_P

SPI_SI_RPCIE_MINI_D2R_N

TP_PCIE_B_D2R_N

TP_PCIE_B_R2D_C_N

TP_PCIE_EXCARD_D2R_PTP_PCIE_EXCARD_R2D_C_NTP_PCIE_EXCARD_R2D_C_PTP_PCIE_FW_D2R_NTP_PCIE_FW_D2R_PTP_PCIE_FW_R2D_C_NTP_PCIE_FW_R2D_C_P

PCIE_MINI_D2R_P

PCIE_ENET_D2R_N

SPI_SCLK_RSPI_CE_R_L<0>

TP_PCIE_A_D2R_N

TP_PCIE_B_D2R_PTP_PCIE_B_R2D_C_P

TP_PCIE_EXCARD_D2R_N

USB_EXTC_P

USB_EXCARD_PUSB_EXTC_NUSB_EXCARD_NUSB_EXTB_PUSB_EXTB_NUSB_BT_P

USB_TPAD_PUSB_BT_NUSB_TPAD_NUSB_IR_PUSB_IR_N

USB_CAMERA_NUSB_CAMERA_PUSB_EXTD_PUSB_EXTD_NUSB_MINI_PUSB_MINI_NUSB_EXTA_PUSB_EXTA_N

SB_CLK100M_DMI_PSB_CLK100M_DMI_NDMI_S2N_P<3>

PCI_CLK33M_SBTP_PCI_PME_L

74D3

74D3 74D3

26A4

74D3 37A5

74C3 37A5 74C3 74C3 74D3

37A5 37A5 37A5

37A5 74D3

74C3 74C3

39C8

37A5

37A5 37A5

25D6

7D1

8D4

23B6 23A6

23A6 23A8 23A8 23A8 23B6

23A6 23A6 23A6

23B6 23A6

23A6 23A8

23A6

23A6 23A6

7C4

22D7

73B3

8D4 8D4

8D4

8C4

8C4 8C4

8C4

8C4 8C4

8D4

8C4

Trang 24

ININ

SMBALERT*/GPIO11STP_PCI*/GPIO15BMBUSY*/GPIO0SYS_RESET*

SUS_STAT*/LPCPD*

QRT_STATE0/GPIO27THRM*

SMLINK0

GPIO12

SPKRSDATAOUT1/GPIO48QRT_STATE1/GPIO28

SLP_S5*

GPIO20GPIO8WAKE*

CL_DATA1SLP_S4*

EC_ME_ALERT/GPIO14TACH0/GPIO17

CLK14

SCLOCK/GPIO22

SATA3GP/GPIO37

SATACLKREQ*/GPIO35STP_CPU*/GPIO25

CLK48

SMBCLKSMBDATA

OUT

OUTIN

IN

ININ

BIBI

OUTININ

BIBI

OUTBI

BIBIBI

IN

OUTOUT

OUT

IN

OUTOUT

APPLE INC.

NONESCALE

PLACE R2511-16 WHERE PHYSICALLY ACCESSIBLE

See note below

have been up for at least 1ms

PM_LAN_ENABLE must remain deasseteduntil VccCL3_3, VccLAN3_3 and VccLAN1_05

INT PU

NOTE: ICH CLPWROK input must be PWRGD signal for PP3V3_S0M, PP3V3_S0MWOL, PP1V8_S3M, PP1V25_S0M, PP1V05_S0M, PP0V9_S3M and PP0V9_S0M

If ME/AMT is not used, short CLPWROK to PWROK

INT PU INT PU

INT PU

INT PD

INT PU

for XOR chain testing

Test access required

28C4 29C2

6C2 37A5

MF-LF 402

R2516

1

2 1/16W 5%

ARB_ONLY

MF-LF0

402

R2511

1

2 MF-LF10K1/16W 5%

1/16W 402NOSTUFF

R25021

2 1/16W 5%

10K

MF-LF 402

R2504

1

10K5%

1/16W 402

R25071

2 402

8.2K5%

1/16W

R2506

1

210K

402 5%

1/16W

R25051

2 402 1/16W8.2K5%

MF-LF

U2300

AE21AG12

E1

F23AE18F22AF19

AJ23

D24AH23

AG9G5

AH11

E3AJ14

AF22

AC19AH12AE11AE16

AH20AG21

AJ27

C2AE23

AH25AD16

AF17

AG27AH27

AJ12AJ10AF11AG11

AG13AG10

AJ11AD10

AF12

AF9

AJ25

AG23AF21AD18AG22

AJ26AD19AC17AE19

AD9

AG18AE20

AD15

AG8

AJ8AJ9AH9AC13

AJ21

AJ22AJ20AE17

AG19

OMIT

BGAICH8M

1KNO_REBOOT_MODE

MF-LF

44C5 45C3

15A6 59D8 70B3 27A6

24A5 44B8

44C8 44C8

47D8 73A3 47D8 73A3

6C2 44C5 46B4 27C5 44B8

15B6

8B4

24A5 37A5

15A3 74A3 74A3

R2526

1

3.24K1%

1/16W

C25001 2 402 16V0.1uFX5R

R2529

1

1/16W 1%

MF-LF453

R2528

1

3.24K1%

1/16W

C25011 2 402 16V0.1uF

1/16W 402 MF-LF

47A8 73A3 47A8 73A3 74A3

24A5

R2536

1/16W10K

MF-LF 1%

402 R2544

5%

MF-LF8.2K

402

R2545

MF-LF10K

1/16W 1%

402

R2530

1/16W 1%

402

R2525

1

210K

MF-LF 5%

402

6C2 24A7 46B4

24A5

8B4 24B5

8B4

R2534

2

1 MF-LF 5%

10K

402

R25521

2 402 MF-LF10K5%

R25501

210K

MF-LF 5%

1/16W 402

R2553

1

MF-LF 5%

8.2K

R2551

1

2 1/16W8.2K5%

MF-LF 402

402

R25322

110K

MF-LF 402 5%

1/16W

R25332

1 402 1/16W 5%

MF-LF10K

R2535

2

1 1/16W10K

402 5%

69A6

R25472

1 1/16W 5%

MF-LF10K

402

R25241

2100K

402 5%

1/16W

R2597

1/16W 1%

=PP3V3_S5_SB_GPIO

PM_BATLOW_L

ARB_DETECT_LSB_CLINK_VREF1

PM_CLKRUN_LPM_STPCPU_L

PM_STPPCI_L

=PP3V3_S5_SB

PM_LAN_ENABLEPM_RSMRST_L

=SB_CLINK_MPWROK

CLINK_NB_CLKPM_RI_L

CLINK_NB_RESET_L

=PP3V3_S5_SB_CLINK1

SB_CLK48M_USBCTLRSUS_CLK_SBCLINK_WLAN_RESET_L

PM_PWRBTN_L

SMC_RUNTIME_SCI_L

SMB_ME_CLKSMB_CLK

PCI_PME_FW_L

LAN_PHYPCEXTGPU_RST_LSB_GPIO18TP_SB_GPIO20

SB_SDATAOUT<1>

PM_DPRSLPVR

CLK_PWRGDTP_SB_GPIO6

PM_RI_L

SB_GPIO10_CL1LAN_PHYPC

SB_GPIO14_CL2

=PP3V3_S0MWOL_SB_CLINK0

SATA_B_PWR_EN_LFWH_MFG_MODETP_SB_TP7

SMB_ME_DATA

PM_SYSRST_L

TP_PM_SLP_S4_LPM_SLP_S5_LPM_S4_STATE_L

PM_BATLOW_L

CLINK_NB_DATA

PM_BMBUSY_LLINDACARD_GPIO

SB_CLINK_VREF0CLINK_WLAN_DATASATA_B_DET_L

NB_SB_SYNC_LSB_SPKR

CLINK_WLAN_CLKTP_PM_SLP_M_LINT_SERIRQ

24C3

74A3

7D1

7C1 24B5

24D5

24B3 24C5

24B3

7C4

24A5 24A7

35B7

24A5 24A5 74A3

7D4

24C5 24C5

24C5

7D4

8B4

7D1

Trang 25

VCC_DMI

VCC3_3

VCC1_05V5REF

VCCCL1_5VCCGLANPLL

VCC1_5_A

VCCUSBPLL

VCC1_5_AVCC1_5_AVCC1_5_A

Current numbers from ICH8M Max Power Estimates Rev 2.0, doc #610194

Current figures provided assume 1.5V

depending on VIO of HD Audio interface

VccHDA and VccSusHDA can be 1.5V or 3.3VNOTE:

402

C2601

1

2 402 CERM 10V0.1uF

M16M17M23M28M29M3N1N11N12N13AD17

N14N15N16N17N18N26N27N4N5N6AD20

P12P13P14P15P16P17P23P28P29R11AD28

R12R13R14R15R16R17R18R28R4T12AD29

T13T14T15T16T17T2U12U13U14U15AD3

U16U17U23U26U27U3U5V13V15V28AD4

V29W2W26W27Y28Y29Y4AB4AB23AB5AD6

AB6AD5U4W24

A1A2

B1B29

A28A29AH1AH29AJ1AJ2AJ28AJ29

ICH8MBGA

OMIT

U2300

A16T7G4

AC23AC24

A13B13

L14L16L17L18M11M18P11P18T11T18C13

U18V17V14V11U11V18V16V12

C14D14E14F14G14L11L12

AE7AF7

AC10AC9AA5AA6G12G17H7AC7AD7

F1AG7

L6L7M6M7W23

AH7AJ7AC1AC2AC3AC4AC5

AA25AA26

E27F24F25G24H23H24J23J24K24K25AA27

L23L24L25M24M25N23N24N25P24P25AB27

R24R25R26R27T23T24T27T28T29U24AB28

W25V24U25Y25V25V23

AB29D28D29E25E26

AF29AD2

W6W7Y7A8B15B18B4B9C15D13AC8

D5E10E7F11

AD8AE8AF8AA3U7V7W1

AE28AE29

G22A22

F20G21

R29

B27A27B28B26A26B25A24

AC12

F17G18

F19G20

AD25

AJ6

J6AF20AC16J7C3AC18

P1P2P3P4P5R1R3R5R6

AC21AC22AG20AH28P6P7C1N7

AD11

D1

BGAICH8M

OMIT

SYNC_MASTER=T9_MLB

051-7455

76 25

=PP3V3_S0_SB_VCC3_3_DMI

=PP3V3_S0_SB_VCC3_3_SATA

=PP3V3_S0_SB_VCC3_3_VCCPCOREPP5V_S0_SB_V5REF

VCCCL1_5V

=PPVCORE_S0_SB

=PP3V3_S0_SB_VCC3_3_IDEPP1V5_S0_SB_VCC1_5_B

=PP3V3_S0_SB_VCCGLAN3_3

TP_VCCCL1_05_INTERNAL_REG

TP_VCCSUS1_05_INTERNAL_REG1

TP_VCCSUS1_5_INTERNAL_REG2TP_VCCSUS1_05_INTERNAL_REG2

TP_VCCLAN1_05_INTERNAL_REG2TP_VCCLAN1_05_INTERNAL_REG1

26D2

27D4

22D2 26A6

26A8

26B8

26A6 26D2

26B4 23C2

26B6

26B4

7D7 7C7 26A6

7D4

22D7

7B7

7D4

Trang 26

APPLE INC.

NONESCALE

PLACE < 2.54MM OF SB ON SECONDARY OR

ON SECONDARY SIDE OR 3.56MM ON PRIMARY DISTRIBUTED BETWEEN AA25 V23

M70 DOES NOT USE GIGABIT IN SB, SO NO NEED FOR PLL FILTERING

L2703 NEED CHANGE TO 1UH PART

PLACEMENT NOTE:

3.56MM ON PRIMARY NEAR PIN AC1 AC5

DISTRIBUTE IN PCI SECTION OF SB

PLACEMENT NOTE:

PLACE < 2.54MM OF SB ON SECONDARY

OR 3.56MM ON PRIMARY NEAR PIN AC12

(ICH CPU I/O 1.05V PWR)

PLACE NEAR PINS AC23,AC24 OF SB

ICH IDE/VCC3_3 BYPASS

ON SECONDARY SIDE OR 3.56MM ON PRIMARY

PLACEMENT NOTE:

PLACE < 2.54MM OF SB ON SECONDARY OR 3.56MM ON PRIMARY NEAR PIN AH11 3.56MM ON PRIMARY NEAR PIN AJ6

L2702 MAY HAVE CHANGE TO 1.0UH PART

PLACE CAP UNDER SB NEAR PINS F19 AND G20

OR 3.56MM ON PRIMARY NEAR PIN AD11

OR 3.56MM ON PRIMARY NEAR PIN AE29

PLACE CAPS NEAR PINS

ICH VCC1_5A BYPASS PLACEMENT NOTE:

ICH VCCDMIPLL BYPASS

PLACEMENT NOTE:

P6 R6

ICH VCCSUS3_3 BYPASS

OR 3.56MM ON PRIMARY NEAR PIN AF29

PLACEMENT NOTE:

ICH VCC1_5_A/ARX BYPASS

PLACE C2715 NEAR PIN D1 OF SB

PLACE CAP NEAR PINS

PLACEMENT NOTE:

PLACE CAP < 2.54MM OF SB ON SECONDARY

PLACEMENT NOTE:

(ICH LOGIC&IO 1.5V PWR) (ICH LOGIC&IO[ARX] 1.5V PWR)

3.56MM ON PRIMARY NEAR PINS F20,G21 PLACE < 2.54MM OF SB ON SECONDARY OR PLACEMENT NOTE:

PLACE < 2.54MM OF SB ON SECONDARY OR

ICH USB/VCCSUS3_3 BYPASS (ICH SUSPEND USB 3.3V PWR)

3.56MM ON PRIMARY NEAR PINS F1 M7

ICH VCC3_3/VCCHDA BYPASS (ICH INTEL HDA CORE 3.3V PWR)

ICH USB CORE/VCC1_5_A BYPASS (ICH USB CORE 1.5V PWR)

AC10 AD7 OF SB PLACE CAP NEAR PINS

ICH VCC3_3 BYPASS

PLACE < 2.54MM OF SB ON SECONDARY

PLACE CAPS NEAR PIN AD25 OF SB

PLACE CAP NEAR PIN B27 A26 NEAR PINS A8 F11

(ICH LAN I/F BUFFER 3.3V PWR) ICH VCC_PAUX/VCCLAN3_3 BYPASS

ICH VCCRTC BYPASS (ICH RTC 3.3V PWR)

ICH V_CPU_IO BYPASS

PLACEMENT NOTE:

FOR 270UF

(ICH DMI PLL 1.5V PWR)

(ICH LOGIC&IO[ATX] 1.5V PWR)

PLACE CAPS NEAR PIN C2 AH28

(ICH PCI I/O 3.3V PWR) ICH PCI/VCC3_3 BYPASS

3.56MM ON PRIMARY NEAR PINS AA3 Y7 PLACE < 2.54MM OF SB ON SECONDARY OR PLACE CAPS < 2.54MM OF SB ON SECONDARY

OR 3.56MM ON PRIMARY NEAR PIN A24

ICH V5REF BYPASS (ICH REFERENCE FOR 5V TOLERANCE ON CORE WELL INPUT) ICH CORE/VCC1_05 BYPASS

(ICH CORE 1.05V PWR) PLACEMENT NOTE:

PLACE CAPS AT EDGE OF SB

PLACE < 2.54MM OF SB ON SECONDARY OR 3.56MM ON PRIMARY NEAR PINS AE7 AJ7

PLACE C2703 < 2.54MM OF PIN A16 T7 OF SB PLACEMENT NOTE:

ICH V5REF_SUS BYPASS (ICH REFERENCE FOR 5V TOLERANCE ON RESUME WELL LOGIC)

PLACEMENT NOTE:

PLACE C2704 < 2.54MM OF PIN G4 OF SB

ON SECONDARY SIDE OR 3.56MM ON PRIMARY

ICH VCCA3GP(VCC1_5_B BYPASS (ICH IO,LOGIC 1.5V PWR) L2700 MAY HAVE CHANGE TO 0.5UH PART

1

2 2.5VPOLY20%

1

C2724

1

26036.3V

4.7UF

CERM20%

2

6036.3V20%

X5R

10UF

1

210%

C2740

1

210%

X5R

0.1UF

16V402

C27421

2NOSTUFF

22.2uF60320%

6.3VCERM1

C27361

24.7uF20%

6.3V603

C27331

603CERM20%

4.7uF

C2741

1

210%

2805CERM22UF20%

40216V

X5R

0.1UF

16V402

402

C2709

1

210%

X5R

0.1UF

16V402

C2723

1

210%

0.1UF

16V402

C2722

1

210%

X5R

0.1UF

16V402

X5R

0.1UF

16V402

C2728

1

210%

X5R

0.1UF

16V402

52

C27061

20%

22UF8056.3VC27071

22.2UF6036.3VCERM120%

C2701

1

240210%

603

10UF

6.3V

C271710%

1UF6.3V402

C2716

1

2 2.5VCASE-C2POLY20%

330UF CRITICAL

402

C2729

1

2 X5R10%

0.1UF

16V402

C27301

210%

X5R

0.1UF

16V402

=PP1V5_S0_SB_VCC1_5_A_ATX

PP1V5_S0_SB_VCCDMIPLL_F

VOLTAGE=1.5VMIN_LINE_WIDTH=0.5MMMIN_NECK_WIDTH=0.25MM

PP1V5_S0_SB_VCCGLANPLL

MIN_NECK_WIDTH=0.25MMMIN_LINE_WIDTH=0.5MMVOLTAGE=1.5V

=PP3V3_S0_SB_VCC3_3_SATA

MIN_NECK_WIDTH=0.25MMVOLTAGE=5V

MIN_LINE_WIDTH=0.5MMMIN_NECK_WIDTH=0.25MMVOLTAGE=1.5V

=PP1V05_S0_SB_CPU_IO

=PP1V5_S0_SB_VCCGLAN1_5

MIN_NECK_WIDTH=0.25MMMIN_LINE_WIDTH=0.3MMVOLTAGE=5V

4

C2703 0.1UF

26D2

24A8

25B6 26A8

25C3

23C2

22D2 39C8

25A6

25B6

23C2 25C3

25A3

25D3

25A3

25B3 25C3

24A3

25B6

7B7 7B7

7B7

25C3

7B7

22D7 7D4

7D1

7D7

7C4

7D4 7D4 7D1

7B7

Trang 27

A

BVCC

OUT

ININY

BAIN

OUTINOUT

OUT

APPLE INC.

NONESCALE

Pulled a new APN for U2803(0.6mm max

CPU VCORE PSI

MIN_LINE_WIDTH=0.3MM

it provides a set of pads

Initial resistor values are based on CRB,

This part is never stuffed, Silk: "SYS RST"

Platform Reset Connections

This will allow us to sequence this part under wireless card

to solder a reset button.

In CLOSE=12.5pF Change Y2800 to 197S019 -7.0mmx1.5mmx1.4mm

2402

0.1UF

402

J28003

4

12

M-RT-SM

78171-0002 CRITICAL

R2801

4025%

5

4 SON TC7SH00FEF CRITICAL

1 2 402

1UF 6.3V 10%

CERM

C2805

1 2 1UF 6.3V 402 10%

R2800

1/16W4025%

MF-LF

D2800

2SOT-363

HN2S02JE

R28061

2MF-LF4025%

1/16W402

2

13

54

TC7SZ08AFEF SOT665 CRITICAL

R28801

2

100K

1/16W5%

402MF-LF

2CERM40220%

0.1UF

2 MF-LF 402 1/16W 10K 5%

R28111

2MF-LF4021/16W5%

1.8K

U28012

13

54

TC7SZ08AFEF SOT665

CRITICAL

R28121

2MF-LF

10K

5%

402

R28071

2

1K

5%

1/16W402

R2896125%

MF-LF402

1K

1/16W

C2808

1 2 402

10PF

CERM 50V 5%

Y2800 1

4 7X1.5X1.4-SM

10M

MF-LF

051-7455

76 01

PLT_RST_BUF_L

IMVP6_PSI_L

VR_PWRGOOD_DELAY

PP3V3_G3C_SB_RTC_D MAKE_BASE=TRUE

VR_PWRGD_CK505

DEBUG_RESET_L AIRPORT_RST_L NB_RESET_L

CPU_PSI_L

MAKE_BASE=TRUE

ALL_SYS_PWRGD PM_SB_PWROK

22D8

24D5

8B3

6C2 33C3 15B6

9A2

6B2 24C3

8B1 22D8

Trang 28

OUT

OUTOUT

OUT

OUTOUTOUTOUT

INBI

IN

OUTOUT

INVSS_PCI

SRC_8*

SRC_8

PCI_5/FCT_SELPCIF_0/ITP_EN

CPU_1_MCH*

CPU_1_MCHCPU_ITP*/SRC_10*

CPU_ITP/SRC_10

VSS_SRCVSS_REF

VSS_CPUVSS_48SDAPCIF_1

PCI_4PCI_3PCI_2PCI_1

OUT

OUTOUT

OUTIN

BI

APPLE INC.

NONESCALE

(PORT80 LPC 33MHZ)

(ICH SM BUS)

(FW PCI 33MHZ) (TPM LPC 33MHZ) (SMC LPC 33MHZ)

STUFF R2905 FOR CK410M MODE

(GMCH D_REFCLKIN DISPLAY PLL A 96MHZ)

(FROM ICH8M) (ICH8M USB 48MHZ) (ICH8M,SIO,LPC REF 14.318MHZ) (DB400 SRC )

(SLOT D - 4 LANE PCI-E FOR EXPRESSCARD)

(ICH SATA 100 MHZ)

(FROM ICH8M GPIO35)

(GMCH G_CLKIN 100 MHZ )

(FROM GMCH CLK_REQ*) U2900 HAS INTERNAL PU ON PGMODE

(WIRELESS PCI-E 100 MHZ )

SPREAD

DOT96C PIN 7

(FROM ICH8M GPIO15 STPPCI* ) (FROM ICH8M GPIO25 STPCPU* )

(SLOT F - GPU PCI-E 100 MHZ ) (GMCH D_REFSSCLKIN DISPLAY PLL B 100MHZ)

SRCT0

PIN 11 100MC_SST

* FOR EXT GRAPHIC SYSTEM

* FOR INT GRAPHIC SYSTEM FCTSEL1

SPREAD

SRCC0 100MT_SST

ORIGINAL DESIGN:

USE 2.2OHM FOR R2900,R2901 AND 1OHM FOR R2902 USE 155S0302 FOR L2902(R2906) AND L2903(R2907) R2901,L2902,C2916,C2911,C2914 and R2902

NEED TO CHECK CAP VALUE

6.3VNOSTUFF

C2915

1

240216V

0.1UF

X5R10%

24C8 29C2 24C8 29C2

6C7 29D6 75D3 6C7 29D6 75D3

6C7 29D6 75D3

6C7 29C6 75C3 6C7 29C6 75D3

8C4 8C4

6C7 29C6 75C3

6C7 29C6 75C3 6C7 29C6 75C3

6C7 29B6 75C3 6C7 29C6 75C3

6C7 29C6 75C3

C2990

1

240250VCERM

18PF

5%

29B6 75D3 8C4 75D3

29A6 75D3 8C4 75D3

47D6 47D6

C2907

1

2 X5R6036.3V20%

10UF

NOSTUFF

29B8

29B2 75D3

C2911

1

26.3V10%

402CERM

1UF

NOSTUFF

C29011

26.3V60320%

10UF 1C2902

240216V

1UF

40210%

10K

6C7 29B6 75D3 29B6

75D3

8B3

8C4 8C4

8C4

6C7 29C6 75C3 6C7 29C6 75C3

C2916

1

2 X5R6036.3V20%

0.1UF

16V402

0.1UF

16V402

U2900

4 2

42 41

37 36 55

6 7 8

53

57 58 63 64 65

56

68 1

54

47 48

10 13 14

15 16

18 19

21 22

23 24

26 27

29 30

33 32 69

38

43 61 67 49 12 17 28 35

5 39

46 62 66 52 31

51 50

SLG2AP101

QFN CRITICAL

8C4 34B8 6B7 29B6 75C3

6B7 29B6 75C3

6C7 29B6 75D3

29D8 75D3 29D8 75D3

PP3V3_S0_CK505_VDDA_R

MIN_LINE_WIDTH=0.5mm

PP3V3_S0_CK505_VDD_PCI

MIN_NECK_WIDTH=0.2mmVOLTAGE=3.3V

=PP3V3_S0_CK505

CK505_PCIF0_CLK

=PP3V3_S0_CK505

CK505_XTAL_IN CK505_XTAL_OUT

CK505_REF1 CK505_CLK14P3M_TIMER

MIN_NECK_WIDTH=0.2mmVOLTAGE=3.3VMIN_LINE_WIDTH=0.5mmPP3V3_S0_CK505_VDD48

CK505_SRC4_N

CK505_CPU1_N CK505_CPU1_P CK505_CPU2_ITP_SRC10_N CK505_CPU2_ITP_SRC10_P

CK505_PCI4_CLK CK505_PCI3_CLK CK505_PCI2_CLK CK505_PCI1_CLK

CK505_SRC_CLKREQ1_L

CK505_CPU0_P

TP_CK505_SRC1_P CK505_SRC2_N

VOLTAGE=3.3VMIN_LINE_WIDTH=0.5mm

PP3V3_S0_CK505_VDD_REF

PM_STPPCI_L

PP3V3_S0_CK505_VDDA

VOLTAGE=3.3VMIN_NECK_WIDTH=0.2mm

CK505_FSB_TEST_MODE

TP_CK505_SRC1_N

CK505_CPU0_N PM_STPCPU_L

CK505_SRC2_P

TP_CK505_SRC3_P CK505_SRC_CLKREQ3_L CK505_SRC4_P

NB_CLKREQ_L

TP_CK505_SRC7_N CK505_SRC_CLKREQ6_L CK505_SRC6_P CK505_SRC6_N CK505_SRC5_N

CLK_PWRGD CK505_DOT96_27M_N CK505_SRC8_N

CK505_DOT96_27M_P CK505_USB48_FSA

Trang 29

ININ

IN

OUT

OUTIN

IN

OUTIN

OUT

OUTIN

IN

OUTIN

ININ

OUT

OUTIN

IN

ININ

APPLE INC.

NONESCALE

(TO SMC PCI 33MHZ)

(Int Gfx LVDS 100MHz) (ITP HOST 133/167MHZ) (GMCH HOST 133/167MHZ)

(ICH8M DMI 100MHZ)

Place close to CLK Gen For reducing noise coupling to wireless frequencies (FOR YUKON 100MHZ)

0

FS_A 0

FS_B 0

0 1 1

1 0

0

1

0 1

(TO ICH8M USB 48MHZ)

(TO MCH FS_A)

1 1

0 1

(FROM CPU FS_C)

CPU 266M 133M 166M 200M 400M

100M 333M

CLKREQ Controls CLK Termination

Resrvd 0

CPU speed is currently set to 200MHz

(ICH8M SATA 100MHZ)

(GMCH PEG/DMI 100MHZ)

(WIRELESS PCI-E MINI 100MHZ)

6C7 28C4 75D3

6C7 28A4 75D3

15C3 75B3

6C7 28B4 75C3

23D2 75B3

6C7 28B4 75C3

28B6 75D3

6C7 28B6 75D3

29A5 37A5 75B3

29A5 44C8 75B3

23A6 29A5 75B3

33C5 75A3

33C5 75B3 6C7

28B4 75C3

6C7 28B4 75C3

6C2 46C4 75C3 28B8

NOSTUFF 10K

5%

1/16W

R30831

24025%

1K

28C6

28B6 75D3

22B6 75B3

6C7 28B4 75C3

R3080

1

2

NOSTUFF 1K

4021/16W5%

R3082

4021/16W5%

1K

5%

1/16W15C6

70B3

R3085

4021/16W5%

1K

15C6 70B3

6C7 28B4 75C3

402

0

MF-LF5%

MF-LF

R3028

MF-LF5%

R3046

4021/16W

MF-LF5%

10K R3047

NOSTUFF402R3051

4021/16W

5%

10K

NOSTUFFMF-LF

R3066

1

25%

MF-LF402

10K

C30001

2

3.3PF NOSTUFF

CERM50V0.25%

402

C30011

2402

NOSTUFF 3.3PF

0.25%

50VCERM

C30021

2

NOSTUFF

40250V0.25%

3.3PF

CERM

C30031

28A4 75C3

6B7 28A4 75C3

C30041

2 50V0.25%

3.3PF NOSTUFF

402CERM

6C7 28C4 75D3

051-7455

29

SYNC_DATE=06/06/2006 Clock Termination

01 76 SYNC_MASTER=DSIMON-WF

SB_CLK48M_USBCTLR

CK505_CPU0_N

NB_CLK96M_DOT_P CK505_DOT96_27M_N

SB_CLK100M_SATA_P

NB_CLK100M_DPLLSS_N NB_CLK100M_DPLLSS_P

SB_CLK100M_DMI_P

NB_CLK100M_PCIE_P

PCIE_CLK100M_MINI_P

PCIE_CLK100M_ENET_P CK505_SRC6_N

CK505_SRC8_P CK505_SRC6_P CK505_SRC5_P CK505_SRC2_P

CK505_SRC5_N

CK505_LVDS_N

CK505_SRC2_N

CK505_SRC4_P CK505_SRC4_N

CK505_CPU0_P

CK505_CPU1_N CK505_CPU2_ITP_SRC10_P CK505_CPU2_ITP_SRC10_N

FSB_CLK_CPU_N

PCI_CLK33M_LPCPLUS

NB_CLK96M_DOT_N

CK505_PCIF0_CLK CK505_PCIF1_CLK CK505_DOT96_27M_P

PCI_CLK33M_SB PCI_CLK33M_FW FSB_CLK_NB_N

PCI_CLK33M_SMC

CK505_FSB_TEST_MODE

SB_CLK100M_DMI_N

CK505_CLK14P3M_TIMER CK505_USB48_FSA

CK505_SRC_CLKREQ3_L

NB_CLK100M_PCIE_N

CK505_PCI1_CLK

CK505_PCI3_CLK CPU_BSEL<1>

PCI_CLK33M_FW

PCI_CLK33M_SMC

SB_CLK14P3M_TIMER SB_CLK48M_USBCTLR PCI_CLK33M_SB

75B3

13B7 75B3

37A5

44C8

29D6 29D6 29B3

29C8

7C7 29A8

28B4

29B3

29A3

24D3 24D3 23A6

Trang 30

VSS2DQ5

SA1SA0VSS58DQ63DQ62VSS56DQS7DQS7*

VSS54DQ60VSS52DQ54VSS50VSS48CK1*

CK1VSS46DQ53DQ52VSS44VSS42DQS5DQS5*

VSS39DQ45DQ44VSS37DQ39DQ38VSS35DM4VSS34DQ37DQ36VSS32NC3VDD11NC/A13ODT0VDD9S0*

RAS*

BA1VDD7A0A2A4VDD5A6A7A11VDD3NC/A14NC/A15VDD1NC/CKE1VSS30DQ31DQ30VSS28DQS3DQS3*

VSS26DQ29DQ28VSS24DQ23DQ22VSS22DM2NC0VSS19DQ21DQ20VSS17VSS15DQ15DQ14VSS13CK0*

CK0VSS11DQ13VSS7DQ7VSS5DM0DQ4VSS0

DM1DQ12DQ6

DQ47DQ46

DQ61DQ55DM6

VDDSPDSCLSDAVSS57DQ59DQ58VSS55DM7VSS53DQ56VSS51DQ50VSS49DQS6*

VSS47NC_TESTVSS45DQ49DQ48VSS43VSS41DM5VSS40DQ41VSS38DQ35VSS36DQS4DQS4*

VSS33DQ33DQ32VSS31NC/ODT1VDD10NC/S1*

CAS*

VDD8WE*

BA0A10/APVDD6A1A3A5VDD4A8A9A12VDD2BA2NC2VDD0CKE0VSS29DQ27DQ26VSS27NC1DM3VSS25DQ25DQ24VSS23DQ19DQ18VSS21DQS2DQS2*

VSS18DQ17DQ16VSS16VSS14DQ11DQ10VSS12DQS1DQS1*

DQ9DQ8VSS8DQ3DQ2VSS6DQS0DQS0*

VSS4VSS1VREF

DQ0DQ1

DQ34

DQ40

DQ42DQ43

DIP DIMM CONN

One 0.1uF per connector DDR2 VRef

Yellow uses 10K divider and TLV2463

(See Capell Valley pg 47)

Page Notes

NC

516-0135

NC NC

when they get cheaper.

Power aliases required by this page:

(For return current)

Signal aliases required by this page:

to drive MCH and DIMM connectors.

The 4.7uF and 1.0uF caps can be changed to 5x 2.2uF caps,

C3109

1

220%

6.3V

4.7uF

603CERM

402

C31001

2

0.1UF

20%

CERM402

C31211

2

0.1UF

CERM10V402

C31201

24024VX5R20%

2.2UF

C31221

2 4V40220%

J3101

102101

105

9089

10099

9897

949293

91

107

10685

113

3032

164166

3537

2022

3638

4345

5557

17

4446

5658

6163

7375

626419

7476

123125

135137

124126

1341364

141143

151153

140142

152154157

159

6

173175

158160

174176

179181

189191

14

180182

192194

16

2325

1311

3129

5149

7068

131129

148146

169167

188186201

202

116

868480

119115

198200197

138139

1449

196

15

1821

24

109

CRITICAL F-RT-TH3

402CERM

C3113

1

220%

10VCERM

402

C3115

1

220%

10VCERM

R3103

5%

1/16W402

R3102

402MF-LF5%

10K

R3100

1

21/16W1%

1K

MF-LF402

R3101

1

21%

1K

1/16W402

SYNC_MASTER=MEMORY

DDR2 SO-DIMM Connector A

01 30

31D4

31B2

20C8 31B2

31B2

72D3

72D3 72D3

72D3 72D3 30D4

72D3

31A7

72D3

72D3 72D3

72D3 72D3 72D3

17D7

72D3

72D3 72D3 72D3

72D3

72D3 72D3 72D3

30D6

32D6

32C6 32C6

72D3 72D3

72D3

32D6 32C6

72D3

32D6 32B6

32C6 32C6

72D3 72D3 72C3

72D3 72C3 72C3

72D3

72C3 72C3

72D3 72D3

30B2

32C6

72C3

72D3 72D3 72D3

31A3

72C3 72D3 72D3 72D3 72D3 72C3 72C3 72D3 72D3

72D3 72D3 72D3

72D3 72D3

32B6

32C6 32C6

32C6 32C6 32C6

72D3

72D3 72C3

72D3

72D3 72D3

72C3 72D3

72C3 72C3

72C3 72D3 72D3

72C3 72C3

32C6

72D3 32D6

72D3

72C3 72D3 72C3

72D3

32C6 32C6

32D6 72D3

72D3 72D3

72C3

72D3 72D3

72D3

32C6 32C6 32C6

72D3

30B2

72D3 72D3

30D4

15C3

16D5 16B5

16B8 16B8

16A8

30A4

15D3 16B5

16A8

15D3 16D5

16B5 16D5

16C8 16C8 16C5

30D1

30A4

30A4 30A4

16A8 16C5 16C5

16B8

16C5 16C5

16B8 16B8

7B4

15C6

16C5

16C8 16C8 16C8

7C4

16C5 16B8 16B8 16A8 16B8 16C5 16C5 16B8 16B8

16B8 16B8 16B8

16B8 16B8

16B5

16C5 16B5

16B5 16B5 16B5

16B8

16C8 16D5

16B8

47D6 16B8 16B8

16C5 16C8

16C5 16C5

16C5 16C8 16C8

16C5 16C5

8D8

16B5 8B1

15D3

8B4

15C3 16C8

47D6

16C8

16C5 16C8 16D5

16C8

16B5 16B5

15D3 16C8

16C8 16C8

16C5

15D3 15D3

16D8

16D5 16C5 16B5

16D8

7B4

16D8 16D8

7B4

Trang 31

VSS2DQ5

SA1SA0VSS58DQ63DQ62VSS56DQS7DQS7*

VSS54DQ60VSS52DQ54VSS50VSS48CK1*

CK1VSS46DQ53DQ52VSS44VSS42DQS5DQS5*

VSS39DQ45DQ44VSS37DQ39DQ38VSS35DM4VSS34DQ37DQ36VSS32NC3VDD11NC/A13ODT0VDD9S0*

RAS*

BA1VDD7A0A2A4VDD5A6A7A11VDD3NC/A14NC/A15VDD1NC/CKE1VSS30DQ31DQ30VSS28DQS3DQS3*

VSS26DQ29DQ28VSS24DQ23DQ22VSS22DM2NC0VSS19DQ21DQ20VSS17VSS15DQ15DQ14VSS13CK0*

CK0VSS11DQ13VSS7DQ7VSS5DM0DQ4VSS0

DM1DQ12DQ6

DQ47DQ46

DQ61DQ55DM6

VDDSPDSCLSDAVSS57DQ59DQ58VSS55DM7VSS53DQ56VSS51DQ50VSS49DQS6*

VSS47NC_TESTVSS45DQ49DQ48VSS43VSS41DM5VSS40DQ41VSS38DQ35VSS36DQS4DQS4*

VSS33DQ33DQ32VSS31NC/ODT1VDD10NC/S1*

CAS*

VDD8WE*

BA0A10/APVDD6A1A3A5VDD4A8A9A12VDD2BA2NC2VDD0CKE0VSS29DQ27DQ26VSS27NC1DM3VSS25DQ25DQ24VSS23DQ19DQ18VSS21DQS2DQS2*

VSS18DQ17DQ16VSS16VSS14DQ11DQ10VSS12DQS1DQS1*

DQ9DQ8VSS8DQ3DQ2VSS6DQS0DQS0*

VSS4VSS1VREF

DQ0DQ1

DQ34

DQ40

DQ42DQ43

DRAWING NUMBER

SIZE

D

The 4.7uF and 1.0uF caps can be changed to 5x 2.2uF caps,

Resistor prevents pwr-gnd short

NC

when they get cheaper.

516-0135

NC NC

NC

- =I2C_MEM_SDA Signal aliases required by this page:

- =PP1V8_S3_MEM

(See Capell Valley pg 47)

to drive MCH and DIMM connectors.

Yellow uses 10K divider and TLV2463

DDR2 VREF (FOR CONNECTOR B)

One 0.1uF per connector

NC NC

(For return current)

ADDR=0xA4(WR)/0xA5(RD)

DIP DIMM CONN

20%

6.3VCERM

2402CERM10V

0.1UF

R3201

1

2402MF-LF1%

1K

R3202

1

2402MF-LF

10VCERM

0.1UF

C32201

2

2.2UF

20%

4VX5R

C3231

1

2402-LF6.3VCERM

2.2UF

CERM6.3V20%

C3232

1

2402-LF6.3V20%

2.2UF

CERM

C32211

2402CERM10V

0.1UF

C32221

2 X5R402

2.2UF

20%

4V

R32001

MF-LF5%

10K

J3201

102101

105

9089

10099

9897

949293

91

107

10685

113

3032

164166

3537

2022

3638

4345

5557

17

4446

565861

63

7375

626419

7476

123125

135137

124126

1341364

141143

151153

140142

152154157

159

6

173175

158160

174176

179181

189191

14

180182

192194

16

2325

1311

3129

5149

7068

131129

148146

169167

188186201

202

116

868480

119115

198200197

138139

1449

196

15

1821

40210V

C3216

1

2402-LFCERM6.3V

MEM_B_A<2>

=I2C_SODIMMB_SCL

=I2C_SODIMMB_SDA MEM_B_DQ<63>

30D6

20C8 30D6

30D4

72B3

30D4

72B3 72B3

31A7

72B3

72B3 72B3 72B3

72B3 72B3

31A3

17D7

72B3

72B3 72B3

72B3

72B3 72B3 72B3

72B3 72B3

30D4

72B3 72B3

72B3

72A3 72B3

30A7

72A3

72B3 72A3

72B3

72B3 72B3 72A3 72B3 72B3 72B3

72B3 32A6 72A3

72B3 72B3 72B3

32B5 32A5

32D6 72B3 72B3

72B3

72B3 72B3

72B3

32B5

72B3 72B3 32A5

72A3 72A3 72B3 32D6 32D6

32B5 32B5

32B5 32A6 72B3

32A6

32D6

72B3 72B3

72A3 72A3

72B3 72B3

32D5

32A5 32B5 32B5

32D6 32A5

72B3 72B3

72B3

72A3

72B3 72B3 72B3 72B3 30B2

72B3

32B5 32B5

32B5

72B3 72B3

7B4

16D1

7B4

16B1 16D1

16C4 16C4

16C4

16C1 16C4

7C4

16C1

16B4 16C1

16B4

16B4 16B4 16C1 16A4 16A4 16B4

16C4 16B1 16C1

16B4 16B4 16C4

16B1 16B1

15D3 16C4 16C1

16B4

16D4 16D4 31D1

16C4

8B1

16B1

16B4 16B4 15C6

16C1 16C1 16B4 15C3 15C3

16B1 16C1

16B1 16D1 16C4

16D1

15D3

16C4 16C4

16C1 16C1

8B4

16C4 16C4

15D3

16B1 16B1 16B1

15C3 16B1

16B4 16B4

16B4

16C1

16C4 16D4 16D4 16D4 7B4

16D4

16B1 16B1

16C1

16B4 16B4

15D3 15D3

31A3 16D4

16D4

Trang 32

IN

ININININININININININININININ

INININ

APPLE INC.

NONESCALE

One cap for each side of every RPAK, one cap for every two discrete resistors

1/16WMF-LF4025%

1/16W

56

402MF-LF5%

402MF-LF5% 1/16W

4025% 1/16W

16D1 31B6 72B3 16B1 31B4 72B3

16D1 31B4 31B6 31C6 72B3

16B1 31B6 72B3

SM-LF1/16W5%

SM-LF5% 1/16W

SM-LF

56

1/16W5%

SM-LF1/16W

56

1/16W

SM-LF5%

56

1/16W

SM-LF5% 1/16W

SM-LF

56

1/16W5%

16C1 31B4 72B3 16B1 31B6 72B3 16B1 31B4 72B3 16B1 31B6 72B3

16B1 31B4 72B3 16B1 31B6 72B3 16B1 31C4 72B3 16B1 31C4 72B3

16B1 31C6 72B3 16B1 31C6 72B3 16C1 31B6 72B3

16B1 31C4 72B3 16B1 31C6 72B3 16B1 31B4 72B3

C33001

240220%

CERM0.1UF 1C3301

20.1UFCERM10V402

C33021

240220%

CERM0.1UF 1C3303

20.1UFCERM10V402

C33041

240220%

CERM0.1UF 1C3305

20.1UFCERM10V402

C33061

240220%

CERM0.1UF

C33071

24020.1UFCERM10V

C33081

402CERM

0.1UF20%

C33091

20.1UFCERM10V402

C33101

240220%

CERM0.1UF 1C3311

20.1UFCERM10V402

C33121

220%

0.1UF10VCERM402

C33131

20.1UFCERM10V402

C33141

240220%

0.1UFCERM

C33151

20.1UFCERM10V402

C33161

20.1UF40220%

CERM

C33171

20.1UFCERM10V402

C33181

240220%

CERM0.1UF 1C3319

20.1UFCERM10V402

C33201

240220%

CERM0.1UF

C33211

20.1UFCERM10V402

C33221

240220%

CERM0.1UF

C33231

20.1UFCERM10V402

C33241

240220%

CERM0.1UF

C33251

240220%

CERM0.1UF

15D3 30C4 72D3 15D3 31C6 72B3

1 0

2

0 1 2 3

4 5 6

7

10

11 9 8

13 12

15C3 15D3 30B4 30B6 31B4 31B6 72B3 72D3

15D3 30C6 72D3

15C6 16B5 16C5 30B4 30B6 30C4 30C6 72D3

16D5 30B4 30B6 30C6 72D3

16B5 30B4 72D3 16D5 30B6 72D3 16B5 30B6 72D3

2 3

0 1 2

3

15C3 30B4 30B6 31B4 31B6 72B3 72D3

01 76

Memory Active Termination

MEM_A_WE_L MEM_A_RAS_L

Trang 33

D

SG

D

SG

D

SG

D

SG

ININ

OUTOUT

IOIO

ININOUT

IOIO

IN

KEY

APPLE INC.

NONESCALE

SB HAS INTERNAL 15K PULL-DOWNS

AIRPORT CONN

C34061

20.1UF40220%

CERM10VC3408

1

0.1UF10V402

C34071

240210V0.1UF20%

CERM

R3403

12NOSTUFF

5%

8051/8W0MF-LF

5%

1/16W402

C34111

2

0.033UF

16V40210%

Q3401

1256

34

40220%

0.1UF C34091

210UF20%

X5R6.3V603

20.1UFCERM10V402

CK505_SRC_CLKREQ6_L

R3401

4025%

1/16W

R3402

402MF-LF1/16W5%

20.1UF20%

402CERM

=PP1V5_S0_AIRPORT

PM_WLAN_EN_L_SS

VOLTAGE=3.3VMIN_NECK_WIDTH=0.2MM

SMB_AIRPORT_CONN_CLK PCIE_E_R2D_N

PCIE_E_R2D_P PCIE_E_D2R_N

PM_S4_STATE_L

PCIE_E_R2D_C_N

MAKE_BASE=TRUEWOW_EN

MAKE_BASE=TRUEPCIE_E_R2D_C_P

PCIE_E_D2R_P

MAKE_BASE=TRUE

=PP3V3_S5_AIRPORT_AUX

PCIE_MINI_D2R_PPCIE_MINI_D2R_N

65C4

45A6 44D5

65A6 33D7

33D6

33C7

35C7

74C3 74B3

7D4

33B5

24C8

29B3 29C3

33B5

8C2

47C3

47C3 33B5

24D3

33B5

33C7

33B6 33B5 7C1

23C5 23D5

7C1

6C1

33B5

Trang 34

BIBI

ININ

THRML_PAD

VMAIN_AVLBLSWITCH_VAUXVAUX_AVLBL

LED_DUPLEX*

RSVD_43RSVD_29RSVD_25RSVD_24

MDIP2MDIN2

MDIP3

XTALIMDIN3

XTALO

REFCLKPREFCLKN

RX_NRX_P

SPI_DO

SPI_CLKSPI_CS

VPD_DATAVPD_CLK

SPI LED

TWSI MEDIA

MAIN CLK

TEST/RSVD

IN

OUTOUT

E2

WC*

NC0 NC1 VCC

VSS SCL SDA

APPLE INC.

NONESCALE

YUKON_ULTRA - Selects Yukon Ultra RSET.

YUKON_EC - Selects Yukon EC RSET value.

- =ENET_CLKREQ_L (NC/TP for Yukon EC)

Signal aliases required by this page:

No link: 4 mA

16pF

too small, make R3765 smaller

If characterization shows eye height is

- Use YUKON_EC and YUKON_ULTRA BOMOPTIONs to select stuffed part

NOTE: See bottom of page for

Yukon Ultra schematic support.

instructions for dual Yukon EC /

on this page Proper part numbers

- =ENET_VMAIN_AVLBL

must be called out elsewhere.

NOTE: Yukon IC and EEPROM are OMITted

NC NC NC

EC:CTRL25

(IPU)(IPU)

(IPU)(IPU)(IPU)(IPU)

(IPD)

NC NC NC NC

(2.5V / GND) (EC / Ultra)

- =PP1V2_ENET_PHY

Yukon Ultra

1000 Mbps: 150 mA Yukon EC (2.5V)

- Use 0-ohm resistors or variable supply to provide 1.8V or 2.5V to =PP1V8R2V5_ENET_PHY

- Alias =YUKON_EC_PP2V5_ENET to PP1V8R2V5_ENET_PHY_AVDD, add 1x 0.1uF and 1x 0.001uF caps

To support Yukon EC and Ultra on the same board:

C3751

1

2 CERM50V5%

R37411

2

SIGNAL_MODEL=EMPTY

1/16W1%

49.9

402

36B7 74B3 36B7 74B3

36C7 74B3 36C7 74B3

36B7 74B3 36C7 74B3

36C7 74B3

23C5

C37401

210%

402CERM50V0.001UF 1C3742

210%

402CERM50V0.001UF 1C3744

210%

402CERM50V0.001UF 1C3746

210%

402CERM50V0.001UF

C3735 1 2

0.1UF 16V 402C3736 1 2

0.1UF 16V 402C3730 1 2

0.1UF 16V 402

23C5

27C1 24C8 33C5 8C4 28A4

59

63626010

16

24252943

5354

37363534

1514

88E8058 CRITICAL

R37651

2

YUKON_ULTRA 4.99K1%

1/16W402

C37201

2603

4.7UF20%

6.3V

C37101

220%

6.3V4.7UF603CERM

C3701

1

2 X5R10%

0.1UF

16V402

C37001

2CERM20%

4.7UF603

C3706

1

210%

402CERM50V

0.001UF

U3780

3

12

658

4.7K1/16W402

R37811

25%

4.7K1/16W402

R37601

25%

4.7K1/16W402

L3720

FERR-120-OHM-1.5A0402-LF

402

C3703

1

2 X5R10%

0.1UF

16V402

CERM50V

0.001UF

C3708

1

240210%

CERM50V

0.1UF

16V402

C3713

1

2 X5R10%

0.1UF

16V402

C3714

1

240210%

CERM50V

0.001UF

C3715

1

210%

402CERM50V

0.001UF

C3721

1

2 X5R10%

0.1UF

16V402

402CERM50V

0.001UF

Y3750

2413

CRITICAL 25.0000MSM-3.2X2.5MM

C37501

2CERM50V5%

15PF

402

Ethernet (Yukon)

76 01 SYNC_MASTER=USB SYNC_DATE=10/07/2006

PCIE_ENET_R2D_N PCIE_ENET_R2D_P

PCIE_ENET_D2R_C_N PCIE_ENET_D2R_C_P

=YUKON_EC_PP2V5_ENET

PP1V8R2V5_ENET_PHY_AVDD

MIN_LINE_WIDTH=0.4 mmVOLTAGE=1.8VMIN_NECK_WIDTH=0.22 mm

ENET_MDI0 ENET_MDI1 ENET_MDI2

YUKON_VPD_CLK

PCIE_ENET_D2R_N PCIE_ENET_R2D_C_P PCIE_ENET_R2D_C_N

7B3

Trang 35

OUT1IN1

THRML

D

SGD

SG

IN1

ENIN2

OUT1OUT2NR/FBGND

D

SG

D

SG

G

DS

IN

APPLE INC.

NONESCALE

Power

S0 on Battery S3 on Battery S3 on AC

High (3.3V)

High (3.3V) Low (0V)

Yukon Power

N/A

Low (0V)

Power Low (0V)

Low (0V) N/A PM_ENET_EN_L

N/A N/A

Name Logic S0

High (3.3V) Power

Power

PM_SLP_S3_L High (3.3V)

Low (0V)

High (3.3V) High (3.3V) PM_ENET_EN

No Power

ENET Enable Generation

Low (0V) SMC_ADAPTER_EN

3.3V ENET FET

4.7UF

20%

6.3VC3832CERM60321

R38301

24021%

2 3

4 5 10

8 9

22UF

80520%

5

3 4

30.1K

C38231

2402CERM10%

1UF

2CERM5%

40250V

27PF

R38231

25%

402

15K

MF-LF

R38241

21/16W402MF-LF

33K

5%

R38321

2MF-LF

NOSTUFF

10%

0.01UF

CERM402

Q3810

3

12

NTR4101PSOT-23CRITICAL

100K

MF-LF

24D3 33C7 44C5 45A6 58B7 62B8

6C1 33C7 38C6 44D5 45B3 57C4

35

SYNC_DATE=10/07/2006 SYNC_MASTER=USB

051-7455 01

76 Yukon Power Control

PP1V2_S3_FB

=PP1V8_ENET_P1V8ENETFET SMC_ADAPTER_EN

Trang 36

IOIO

OUT

RXTXRXTX

TABLE_5_HEAD

TABLE_5_ITEM TABLE_5_ITEM

APPLE INC.

NONESCALE

F-RT-TH

RJ45-M71

876543219

10

J3900

C39021

0.1UF C3900

1

0.1UF16V402

C39011

210%

0.1UF402

C39031

20.1UF10%

0.001UF

40210%

C39051

20.001UF

50VCERM40210%

C39061

0.001UF

40210%

C39071

0.001UF

40210%

C39101

2

CRITICAL 1000PFCERM2KV1206

C39111

0.001UF

40210%

C39121

0.001UF

40210%

L3950

FERR-120-OHM-1.5A0402-LF

T39021

1011122

TLA-6T213LF

CRITICAL

SM

T39011

1011122

3

45

89

Trang 37

IOIOIOIOIOIOIOIO

IOIOIOIO

IOIOIOIOIOIOIOIO

IOIOIO

IOIOIOIOIOIO

IOIO

IO

OUTIN

IN

OUTOUT

IOIOIOIO

IO

IOIOIOIOIO

MPCI_ACTN_323

TPB0_PTPBIAS0PCI_AD12

R1

R0

TPA0_NTPA0_P

TPB0_NTPBIAS1TPA1_P

TPB1_PTPA1_N

TPA2_PTPA2_NTPB2_PTPB2_N

MODE_AMODE_420

TEST0TEST1PTESTSESM

PCI_AD2

PCI_AD4PCI_AD5PCI_AD3

PCI_AD6

PCI_AD11

PCI_AD16PCI_AD17PCI_AD18PCI_AD19PCI_AD20

PCI_AD23PCI_AD22

PCI_AD25

PCI_AD28PCI_AD26

PCI_AD29PCI_AD30

PCI_GNT*

PCI_PERR*

PCI_SERR*

PCI_CLKCLKRUN*

PCI_AD27PCI_AD24

PCI_AD7

PC1

IOIOIOIOIO

IO

IN

APPLE INC.

NONESCALE

PCI_CLK_FW - NEED TO REFERENCE TO ALIAS PAGE

FW_PC0 - FIREWIRE POWER CLASS IDENTIFIER

PCI_DEVSEL_L, PCI_STOP_L, PCI_PAR, PCI_PERR_L, PCI_SERR_L

CONNECT TO VDD FOR 3.3V OPERATION

PLACE R4032 VERY CLOSE TO SB THIS IS FROM ICH-8

7/26/2005 - CONNECTED PIN E10 TO GND

5/19/2005 - FIRST REVISION OF PAGE

6/21/2005 - CHANGED INT* TO INT_PIRQD_L (PER ARCHITECTURAL DEFINITION)

FW_A_TPA_P/N, FW_A_TPB_P/N, FW_A_TPBIAS - PORT 0 FIREWIRE DIFF PAIRS

6/20/2005 - BGA VERSION OF FW323-06 ADDED

6/21/2005 - CHANGED PCI_ID TO AD19 (PER ARCHITECTURAL DEFINITION)

6/22/2005 - ADDED 510K PULL-DOWN ON RST* AND REMOVED CONNECTION TO PLT_RST_L

6/22/2005 - REMOVED CONSTRAINT SETS AS THEY WILL BE MANAGED ON BOARD SIDE

INT_PIRQD_L - INTERRUPT TO SB

PCI_PME_FW_L - DEDICATED PME FOR FIREWIRE (SB GPIO1)

PCI_RST_L - PCI RESET FROM SB

PCI_REQ3_L - PCI REQUEST TO SB

PM_CLKRUN_L - CLOCK-RUN PCI PROTOCOL

NEED TO CHECK CRYSTAL LOAD CAPACITANCE

MODE FOR EXTERNAL LINK

FW_B_TPA_P/N, FW_B_TPB_P/N, FW_B_TPBIAS - PORT 1 FIREWIRE DIFF PAIRS

6/22/2005 - BRING OUT PC0 CONNECTION TO BE CONNECTED ON PORT PAGE

197S0030 3.2MMX2.5MM

PLACE ONE CAP PER TWO PINS STARTING WITH C4016 ON VDDA0

PLACE ONE CAP PER TWO PINS STARTING WITH C4024 ON VDD0

0.001A DURING SLEEP MOBILE TURNS OFF CONTROLLER POWER DURING SLEEP

=PP3V3_S0_PCI - 3.3V POWER FOR PCI FIREWIRE (MOBILE: OFF DURING SLEEP)

=PP3V3_S0_FW - 3.3V POWER FOR FIREWIRE (MOBILE: OFF DURING SLEEP)

INPUT

6/22/2005 - CHANGED CLK,PME,DIFF PAIR NAMES TO BE RE-USE COMPLIANT

DUAL PORT DEVICES ARE POWER CLASS 4 (’100’) SINGLE PORT DEVICES ARE POWER CLASS 0 (’000’) SPEC RECOMMENDS 2.49K

MANUFACTURING TEST PINS

6/21/2005 - CHANGED REQ/GNT TO REQ3/GNT3 (PER ARCHITECTURAL DEFINITION)

PCI_AD<0 31>,PCI_C_BE_L<0 3>,PCI_FRAME_L,PCI_IRDY_L,PCI_TRDY_L,

PCI_GNT3_L - PCI GRANT FROM SB

LOW = PCI OPERATION LOW = NOT BUS MANAGER

C4016

1 2 10UF X5R 20%

6.3V

R40521

2

1%

MF-LF 2.1K

402

C4018

1 2 402 20%

CERM 0.1UF

C4029

1 2 402 16V 0.1UF 1 C4025

2 402 16V 0.1UF

C4017

1 2 402 16V 0.1UF

C4020

1 2 402 16V 0.1UF

R4000

MF-LF 402

390 5%

C40241

2

10UF X5R 20%

E10

E12 F13 F12

F10 G10

L11 M12 M11 N12 M10 N11 M4 N5 N4 M3 H10

M2 N3 K4 M1 K2 J4 K1 J2 J1 H2 H12

H4 H1

J13 J12 K13 K10 L12 M13

K12 M9 L3 L1

G2

N8 N6

E1 L2

D2

M6 N10

M8

F2

E2

F1 N9

M7 N7 G13

A4

B7 A6 B4

A3 B3

C2 C1

B9 A9

B11 A11

C12 C11

A10 B10

A12 B12

D12 D13

FW32306

BGA CRITICAL

R40201

24021/16W5%

C4022

1 2 0.1UF CERM 10V 402

C4026

1 2 402 20%

CERM 0.1UF 1 C4028

2 0.1UF CERM 10V 402

C4030

1 2 402 20%

CERM 0.1UF 1 C4032

2 0.1UF CERM 10V 402

R40371

2402

47

5%

MF-LFR4035

2 402 50V CERM

15PF 5%

C4012

1 2 402 50V CERM

15PF 5%

FIREWIRE CONTROLLER

01 76 SYNC_MASTER=ENET

PP3V3_S3_FW_AVDD

FW_C_TPB_N FW_C_TPB_P FW_C_TPA_N FW_C_TPA_P

FW_B_TPA_N FW_B_TPB_P FW_B_TPA_P FW_A_TPB_N

FW_A_TPA_P FW_A_TPA_N FW_R0

FW_C_TPBIAS PCI_AD<19>

PCI_PME_FW_L INT_PIRQD_L PCI_CLK33M_FW PCI_SERR_L PCI_FW_REQ_L

FW_PCI_RST_L PCI_RST_L

PCI_STOP_L PCI_DEVSEL_L

PM_CLKRUN_L

FW_B_TPBIAS

FW_R1

FW_XO FW_XI

FW_PWRON_RST_L

FW_PC0

FW_PTEST PCI_AD<13>

FW_SE FW_TEST0

FW_SM FW_TEST1

=PP3V3_S3_FW

46B6

74C3 75B3 74D3 74D3

74D3 74D3 74D3

74D3 74D3

74D3

44C5

74D3 74D3

74D3

24C5 23A8

29B3 23A6 23B6

74D3

74D3 74D3

74D3 23A6 23A6 23A6

23A6 23A6

74D3 74D3 74D3 74D3

74D3

74D3 74D3

74D3 74D3 74D3 74D3

74D3 74D3

74D3

74D3 74D3

74D3

74D3 74D3 74D3

23B8 23B8 7A4

8D2

8D2 8D2 8D2 8D2

8D2 8D2 8D2 38B6

38B6

8D2 23A8

24A5 23A4

29A5 23A4 23A4

23A6

23A8

23B6 23B6

23A6 23A4 23A4 23A4

23A4 23A4

23A8 23A8 23A8 23A8

23A8

23A8 23A8

23A8 23A8 23A8 23A8

23B8 23B8

23B8

23A8 23A8

7A4

Trang 38

SG

D

SG

NCV-

OUT

TPO#

TPI TPO

TPI#

VGND VP

"Snapback" & "Late VG" Protection

(TPB-)(TPB+)(TPA-)(TPA+)

1394A PORT 0

CURRENT THROUGH THE BIAS RESISTOR SHOULD BE 5MA FOR A VOLTAGE DROP TO 2.2V

IT IS 2.2V INSTEAD OF 2.7V BECAUSE THE SNAPBACK ESD DIODES HAVE A 0.5V DROP

LATE-VG DETECTION CIRCUIT

FireWire Design Guide (FWDG 0.6, 5/14/03)

1394b implementation based on Apple

7/26/05 - UPDATED SIGNAL NAMES FOR FW PORT POWER ENABLE

7/26/05 - SWITCHED TO 514-0124 FOR PRE-PROTO CONNECTOR

6/22/05 - CHANGED DIFF PAIR NAMES TO MATCH REUSE

PAGE HISTORY

OUTPUT:

FW_TPA0_P/N,FW_TPB0_P/N,FW_TPBIAS0 - FIREWIRE DIFF PAIRS

=FWPWR_PWRON - ADDITIONAL POWER CONTROL

INPUT/OUTPUT:

7/26/05 - CHANGED FL4590 TO 1.1A VERSION

7/26/05 - REMOVED R4520 - IT HASN’T BEEN STUFFED FOR MANY PRODUCTS

7/26/05 - CHANGED CONNECTOR PORT NAMING TO PORT0

7/26/05 - UPDATED LATE-VG POWER RAIL CIRCUIT FROM M1

6/22/05 - REMOVED CONSTRAINTS BECAUSE USING ALLEGRO CONST MANAGER

6/22/05 - CONNECTED FW_PC0 FOR SINGLE PORT

7/26/05 - REMOVED ETHERNET LOW-POWER MODE CIRCUIT

1 FOR DUAL PORT

0 FOR SINGLE PORT

5/19/05 - INITIAL REVISION

(PPFW_PORT0_VP) (GND_FW_PORT0_VGND)

[LATE VG NOTES]

PLACEHOLDER FOR SMALL PACKAGE DIODE

PORT POWER CLASS

machine AC Adapter is plugged

NC

Enables port power whenever

INPUT:

FW_PC0 - POWER CLASS IDENTIFIER (SINGLE PORT - TIE LOW)

or system at run state with battery only

=GND_CHASSIS_FW_PORT0 - CHASSIS GROUND

CERM25V

2

0.01UF

CERM40216V

C43551

2MF-LF

2.0M

4021/16W5%

C43541

2

0.1UF

10%

X5RR4352

R43511

21/16W5%

10K

MF-LF402

R4354

1%

1/16W402

R43531

2

80.6K

1/16W1%

MF-LF402

C43531

2

100PF

CERM50V5%

2

402

0.001UF

50VCERM

23

678

63

CERM50V

CRITICAL BAV99DW-X-F

SOT-363

D4320

4

53

2

40225V

0.01UF R43901

56.2

1/16W1%

R43951

F-RT-TH3

4

65

3

21

1394A

CRITICAL OMIT J4300

Q4390

1256

34

CRITICAL

SM-LF

FDC638P

C43241

2603-150V

0.01UF R4304

1

2

4.99K

4021/16W1%

2

0.01UF

40210%

216V40210%

0.01UF

CERM

01

VOLTAGE=19V

PPFW_SWITCH

MIN_LINE_WIDTH=0.5MMMIN_NECK_WIDTH=0.25MM

PPFW_PORT0_VP_F

MIN_LINE_WIDTH=0.5MMMIN_NECK_WIDTH=0.25MMVOLTAGE=16.5V

MIN_LINE_WIDTH=0.5MMVOLTAGE=16.5V

PPFW_PORT0_VP

MIN_NECK_WIDTH=0.25MM

FW_PORT0_TPA_P_FL FW_PORT0_TPA_N_FL

FW_PORTPWR_EN

FW_A_TPA_P FW_A_TPA_N FW_A_TPB_P

FW_PORT0_TPB

FW_PORT0_TPA_N FWPWR_EN_AND

MIN_NECK_WIDTH=0.25MMVOLTAGE=3.3V

LATEVG_EVENT_L

FW_PORT0_TPB_P_FL FW_PORT0_TPB_N

SMC_ADAPTER_EN FWPWR_ACIN

FWPWR_EN

=PP3V3_S0_FW

FW_PORT0_TPB_P FW_PORT0_TPA_P FW_A_TPBIAS

57C4 45B3 44D5 35C7

37B3

38C5 7D1

Tiêu đề	Apple Macbook A1181 K36
Trường học	Apple University
Chuyên ngành	Computer Engineering
Thể loại	Báo cáo
Năm xuất bản	2007
Thành phố	Cupertino

Định dạng
Số trang	76
Dung lượng	1,42 MB