IEC TR 6301 8 Edition 1 0 201 5 1 2 TECHNICAL REPORT Flexible printed circuit boards (FPCBs) – Method to decrease signal loss by using noise suppression materials IE C T R 6 3 0 1 8 2 0 1 5 1 2 (e n )[.]
Trang 1IEC TR 6301 8
Edit io 1.0 2 15-12
Flex ible printed circuit boards (FPCBs) – Met hod t o decrease signal loss by
using noise suppression mat erials
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Trang 3IEC TR 6301 8
Edit io 1.0 2 15-12
Flex ible print ed circuit boards (FPCBs) – Method t o decrease signal loss by
INT R NATIONAL
ELECTR OT C NICAL
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Trang 4FOREWORD 3
INTRODUCTION 5
1 Sco e 6
2 Normative ref eren es 6
3 Test g idel ne 6
3.1 Ap aratu 6
3.1.1 Network analy er
6 3.1.2 Bloc diagram for sig al los me s rin 6
3.2 Test sp cimen 7
3.2.1 Stru ture 7
3.2.2 Pre aration 8
3.2.3 Test method 8
3.2.4 Calc lation 9
3.2.5 Test res lt 9
3.2.6 Analy is 12 3.3 Improvement method of sig al los f or a s ield FPCB 13 An ex A (normative) Bloc diagram of sig al los test s stem 14 Fig re 1 – Bare/s ield FPCB 5
Fig re 2 – In rement of sig al los u in NSMs 5
Fig re 3 – Sig al los test s stem 6
Fig re 4 – Sc ematic diagram for two typ of test sp cimen 7
Fig re 5 – Cros -section of s ield FPCB 8
Fig re 6 – Dif feren e of sig al los b twe n b re an s ield FPCBs 9
Fig re 7 – Sig al los value of the b re an s ield FPCB 10 Fig re 8 – Sig al los variation ac ordin to the Cu con u tive layer thic nes 1
Fig re 9 – Sig al los variation ac ordin to the Cu sig al l ne width 1
Fig re 10 – Two typ s of stru ture for FPCB 12
Fig re 1 – Electric f ield diagram for two typ s of s ield FPCB 13
Fig re A.1 – Bloc diagram of sig al los test s stem 14
Fig re A.2 – Sig al los test s stem ac ordin to the Agi ent network analy er N5 3 A 14
Ta le 1 – Comp rison of c t-of f feq en y with b re/s id FPCB 10
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Trang 7In recent ye rs, sin e the u e of smart phones, an other mo i e an display devices has
in re sed sig if i antly, the s p ly of FPCBs has also b en largely exten ed Sp cifical y,
sin e the FPCB devices se k hig sp ed p rorman e, the req irements with resp ct to
electromag etic interf eren e (EMI) s p res ion in the devices has also grown in imp rtan e
Therefore, FPCBs u ed in ide smart phones employ noise s p res ion materials (NSMs) to
solve EMI pro lems, as s own in Fig re 1
Figure 1 – Bare/s ield FPCB
However, an a plcation of noise s p res ion materials (NSMs) for FPCBs re c es the l mit
con ernin the pro lem of in rementation of sig al los Therefore, FPCB an NSMs
man f acturers ne d to analy e sig al los variation of FPCBs s ielded by NSMs, as s own
in Fig re 2
Fig re 2 – Increme t of signal los u ing NSMs
As FPCBs are u ed with hig feq en y, the pro lem of sig al los b comes more signif i ant
As the u er of FPCBs has a deman for the lowest value of sig al los by u in NSMs,
s p l ers of FPCBs have to anticip te an a pro riate desig in order to ac ieve an adeq ate
sig al los value
IE C
Fre u n y (GHz)
Bare FP B
Shield FP B
IE C
Trang 8FLEXIBLE PRINTED CIRCUIT BOARDS (FPCBs) – METHOD TO DECREA SE
This Tec nical Re ort sp cifies a g idel ne for improvement of sig al los by u in noise
s p res ion materials (here fter ref er ed to as NSMs) f or FPCBs
This Tec nical Re ort also in icates a me s rin method of sig al los variation of FPCBs
u in NSMs u in network analy er eq ipment In ad ition, this method only meas res the
value of the sig al los variation by u in NSMs f or FPCBs This re ort, however, neither
determines nor in icates the stru ture or material of FPCBs
The f ol owin doc ments, in whole or in p rt, are normatively ref eren ed in this doc ment an
are in isp n a le f or its a pl cation For dated ref eren es, only the edition cited a ples For
u dated referen es, the latest edition of the referen ed doc ment (in lu in an
amen ments) a pl es
IEC 6 3 3-1:2 0 , Noise su pres ion sh et for d igital de ic s a d e uipme t – Part 1:
Definitions and g n ral pro ert ies
3 Test guidel ne
3.1.1 Network a alyzer
A network analy er is uti zed to identify sig al los data at a sp cif i feq en y ran e of
FPCBs
3.1.2 Bloc dia ram for signal los me s ring
Fig re 3 in icates one of the examples of the network analy er setup
Figure 3 – Signal los te t s stem
IEC
Network a aly er
In id nt
Re e tio S1
Tra smis io S21
Trang 93.2 Te t spe ime
Test sp cimen s al b desig ed by two stru tures, i.e with an without NSMs in one FPCB
b ard The p rt without u in NSMs is cal ed b re FPCB The p rt u in NSMs is cal ed
s ield FPCB, as s own in Fig re 4 This test coup n s al also b desig ed as two typ s in
order to have an o ject of comp rison The first desig s al b comp sed of one b re FPCB
with one s ield FPCB A desig of this stru ture al ows to comp re the b re FPCB with the
s ield FPCB, as s own in Fig re 4 a The secon desig s al b comp sed of one b re
FPCB with two over s ield FPCBs This stru ture al ows to comp re the b re FPCB with the
two over s ield FPCBs, as s own in Fig re 4 b
Fig re 4 a – Te t spe imen for comparin o e bare F C with an ther shield F C
Fig re 4 b – Te t spe imen for comparin o e bare F C with two o er shield F C s
Figure 4 – Sc ematic dia ram for two type of te t spe ime
The test sp cimen s al b divided into two halves with one b ard (b re FPCB an s ield
FPCB) f or eq ita le estimation with the same Cu l ne (LW1, LW1’…) This stru ture has the
merit of u iformly me s rin at on e a b re an a s ield FPCB u der the same con ition
IE C
Bare FP B
Shield FP B LW1
> ㎝
Via h le
LW1’
IEC
Bare FP B
Shield 1 FP B LW1
>5㎝
Via h le
LW1’
Shield 2 FP B
LW1’
Shield 3 FP B
LW1’
•
•
Shield n FP B
Trang 10The Cu l ne is f ormed with a l ne r distan e of direction, b cau e the variation of s ield eff ect
is very we k for the c rved l ne The width of Cu lne s al b c osen f e ly in the al owan e
range of a man f acturin proces The size an sp cin of via holes s al not b l mited
Esp cial y, via holes of fer an imp rtant role to contact the NSMs with the grou d plan of
s ield FPCB, as s own in Fig re 2 However, the size, sp cin an amou t of via holes s al
b as agre d b twe n u er an s p l er (AABUS)
The len th of test sp cimen s al b over 5 cm in order to o tain sta le values f rom
me s rin eq ipment The width an thic nes of test sp cimen s al b in ac ordan e with
the ne d of the en u er
Fig re 5 in icates one of the examples of a cros -section of a s ield FPCB, where the s ield
region s al b f ormed ju t a ove the b re FPCB The s ield region contain the s ield
in ulation layer, the s ield con u tive layer an the s ield con u tive ad esive layer Where
the s ield con u tive layer play a role in an EMI a sorb r, the s ield con u tive ad esive
layer play a role f or electric intercon ection b twe n the s ield con u tive layer with the
grou d layer, an the s ield in ulation layer play a role to protect the s ield con u tive layer
f rom direct contact with the external device
Figure 5 – Cros -s ction of s ield FPCB
However, general y the stru ture of a test coup n s al also b as agre d up n b twe n u er
an s p l er (here f ter refer ed to as AABUS) The stru ture an materials of the test
sp cimen is req ired de en in on the u er’s sample sp cification But the variation of
these test sp cimen is not imp rtant, b cau e the u er for FPCBs s al c ec only the sig al
los variation eff ect by u in NSMs
3.2.2 Preparation
The fol owin ste s are ne ded to pre are the test
a) First, pre are a 5 cm over len th for a b re FPCB Then, a ply NSMs lamination to half of
the FPCB
b) Eac en of the test sp cimen s al con ist of SMA (s bminiature A) con ectors
c) To desig ate the Cu lne width, write the n mb r (or s mb l) to the b re side en (or
s ield side end) of test sp cimen ne r the SMA con ector
3.2.3 Te t method
In order to me s re the pro er sig al los value, the f ol owin proced res s al b
resp cted
a) The sig al los values of the test sp cimen s al b me s red by comp sition of a
network analy er, a test sp cimen an a co xial ca le
IEC
Shield region
Bare FPCB
Shield in ulatio la er – 5µm
Shield c n u tiv la er – 0,1/2µm
Shield c n u tiv a h siv la er – 10µm
C/L PI – 12 µm
C/L a h siv – 2 µm
Cu – 2 µm
PI – 5 µm
Cu – 2 µm