We have stated that the logic block can detect errors in frequency by using the infor- mation that it is provided. We have a couple of options for adding frequency detection to the standard Alexander circuit. One technique is to use a start-up sequence. This allows frequency acquisition to occur before the random data is sent, and the frequency error can be detected easily with virtually no additional hardware. The second alterna- tive adds complexity to the receiver design, but does not rely on a start-up sequence to establish frequency acquisition. Both of these techniques will now be briefly described.
Frequency Detection Using a Start-up Sequence
If during a start-up phase we send a sequence of alternating ones and zeros (a periodic waveform at a frequency ofBT=2), we will have no trouble detecting a frequency error using the samples that are already available. In fact, we can see that the Alexander circuit is actually the front-end of a quantized quadricorrelator, provided that the input signal is periodic with a period of2T. We can therefore use the samples (b) and (c) as the quadrature and in-phase samples of the waveform respectively. This technique was used by Walker et al. [13, 14] in a 1.5-Gb/s serial data link.
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b0 c0 t0
bs cs CLOCK TOO SLOW Periodic T
Preamble
ts t
(b)
(c)
(c) Leads (b)
b0 c0 t0
bs cs CLOCK TOO FAST Periodic T
Preamble
ts t
(b)
(c)
(b) Leads (c)
(a) (b)
Figure 5.17 Sample of an Alexander circuit for a start-up sequence of a square-wave at a frequency ofBT
=2. (A) When the clock is too slow, the sampling points move to the right and (c) leads (b). (B) When the clock it too fast, the sampling points move to the left, and (b) leads (c).
∆ f ε
(b)
(c) U M
X
+ - D Q
D Q
Figure 5.18 Conceptual block diagram of a frequency detector of Alexander’s circuit when a start-up sequence is used.
Consider the case illustrated in Fig. 5.17. The frequency error is detected easily with one flip-flop and a multiplexer. When (b) makes a positive transition we pass (c) to the output, and when (b) makes a negative transition, we pass the negative of (c). This is shown conceptually in Fig. 5.18.
Rotational Four-Quadrant Frequency Detector
In many cases, it may be undesirable from a systems standpoint to use a start up se- quence to insure frequency acquisition. In these instances, we need to obtain frequency error information from the random data itself. The quadricorrelator of the previous section will be confused by random polarity variation in the data. Therefore, we need to adopt a different approach, and we turn again to the rotational analogy. One alterna- tive is too add two more sampling flip-flops at the front-end. If we offset these samples (x) and (y) byT=4from the original samples, then we can arrive at the sampling
Practical High-Speed Clock Recovery 279
(b) (c) (a)
T
(x) (y) A B C D
Figure 5.19 Illustration of ordering of samples in a modified Alexander circuit with additional samples (x) and (y) added at an offset ofT=4from (a) and (b) respectively.
(b) (c) (a)
(x) (y)
A
B C
D
Early Late
Figure 5.20 Rotational analogy of data transitions
order illustrated in Fig. 5.19. We can also represent four quadrants, [A,B,C,D], as the time intervals between successive samples. In normal operation there will either be no transitions, or one transition between the samples (a) and (c). When the loop is in phase-lock, the transition should fall precisely at the sample (b). We can represent a clock-cycle of lengthT on a circle, and consider the transition location, as if it were rotating. This circle is shown in Fig. 5.20, which illustrates the locked condition, where the data-transition occurs at sample (b). In normal locked operation this transition will fall either in quadrant B or C. We can devise our frequency detection circuit so as not to interfere with the normal locked condition. Therefore, we can set the frequency error to zero whenever the data-transition is in quadrant B or C. A cycle-slip is detected when the transition crosses into quadrant A or D, at which time, the frequency error signal is activated. This provides a time-offset range of[;T=4;T=4]over which the frequency error is always equal to zero.
The cases of a clock that is too slow, and one that is too fast are shown in Figs. 5.21(a) and (b) respectively. We can now use the direction of the rotation of the transition to derive a frequency error. A conceptual circuit for obtaining this error is shown in Fig. 5.22. The output of the SR flip-flop is a series of positive pulses. The signal is equal to zero in quadrants B or C, and is high in quadrants A or D. This signal is
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(b) (c) (a)
(x) (y)
A
B C D
(b) (c) (a)
(x) (y)
A
B C D
(b) (c) (a)
(x) (y)
A
B C D
Cycle-Slip B A CLOCK TOO SLOW
(b) (c) (a)
(x) (y)
A
B C D
(b) (c) (a)
(x) (y)
A
B C D
(b) (c) (a)
(x) (y)
A
B C D
Cycle-Slip C D CLOCK TOO FAST
(a) (b)
Figure 5.21 Rotational analogy of cycle-slipping: (a) clock is too slow, (b) clock it too fast.
∆fε
(b) Direction
M U X
+ - R Q
S
-
0 1
Slow Clock Positive Pulses
0 -1
Fast Clock Negative Pulses (x)
(y)
(x) (a)
(y) (c)
Quadrant B or C
Quadrant A or D Cycle-Slip Locked
Figure 5.22 Conceptual block diagram of a frequency error detector for NRZ random data based on a four-quadrant rotational analogy.
Practical High-Speed Clock Recovery 281
either passed directly to the output, or is inverted and then passed, depending on the direction of the rotation. In this diagram we have shown that the direction signal should be set high when a B-to-A transition occurs, indicating that the clock is slow, and the transition is rotating backward. When the clock is fast, the signal is set low on a C-to-D transition. We will not show a complete schematic here. Once the rotational concept is understood, the implementation is straight forward. In the following section we will discuss a further modification to the Alexander circuit, showing how the throughput can be increased by using bit-interleaving.