digital logic design mini projects using gates

... decimal digit is also shown in Fig Using the truth table and K-Map, design the BCD-to-seven-segment decoder using the minimum number of gates 15 Problem (Mano) Design a combinational circuit that ... represent the decimal digit is also shown in Fig Using the truth table and K-Map, design the BCD-to-seven-segment decoder using the minimum number of gates 10 Problem (Mano) An ABCD-to-seven segment ... represent the decimal digit is also shown in Fig Using the truth table and K-Map, design the BCD-to-seven-segment decoder using the minimum number of gates 11 Problem (Mano) An ABCD-to-seven segment

Ngày tải lên: 12/02/2020, 13:52

... +d(10,11,12,13,14,15) 28 Minimize K-Maps ° W minimization ° Find W = A + BC + BD 29 Minimize K-Maps ° X minimization ° Find X = BC’D’+B’C+B’D 30 Minimize K-Maps ° Y minimization ° Find Y = CD + C’D’ 31 Minimize ... Lecture 11 Combinational Design Procedure Overvie w ° Design digital circuit from specification ° Digital inputs and outputs known • Need to determine logic that can transform data ° Start ... solution reached is minimal ° Have seen five ways to represent a function: • Boolean expression • truth table • logic circuit • minterms/maxterms • Karnaugh map Combinational logic design ° Use multiple

Ngày tải lên: 12/02/2020, 14:29

... Table 26 Design a serial adder using a sequential-logic procedure 27 Design a serial adder using a sequential-logic procedure 28 Design a serial adder using a sequential-logic procedure 29 Design ... combin logic 25 Design a serial adder using a sequential-logic procedure Two shift registers are required to store the binary numbers to be added serially serial outputs from the registers are designated ... registers can be used with adders to build arithmetic units ° Remember: most digital hardware can be built from combinational logic (and, or, invert) and flip flops • Basic components of most computers

Ngày tải lên: 12/02/2020, 15:09

... Boolean Algebra and Logic Simplification Trang 25Simplification Using Boolean Algebra.Gate Network for Example 1: Trang 26Simplification Using Boolean Algebra.Trang 27Simplification Using Boolean Algebra.Example ... Simplification Trang 23Simplification Using Boolean Algebra.Gate Network for Example 1: ABAB Boolean Algebra and Logic Simplification Trang 24Simplification Using Boolean Algebra.Gate Network for ... B A CCB A C B A C C B C B Simplification Using Boolean Algebra. Example 2: Solution: C B A C Trang 29Simplification Using Boolean Algebra.Example 3: Using Boolean algebra techniques, simplify

Ngày tải lên: 12/02/2020, 15:12

... Lecture More Logic Functions: NAND, NOR, XOR and XNOR Overvie w ° More 2-input logic gates (NAND, NOR, XOR) ° Extensions to 3-input gates ° Converting between sum-of-products ... °eDetermine the output expression for the below circuit and simplify it using DeMorgan’s Theorem Combinational Logic Using Universal Gates X = ( (AB)’(CD)’ )’ = ( (A’ + B’) (C’ + D’) )’ = (A’ + B’)’ ... sum-of-products and NORs • SOP to NORs • NORs to SOP ° Positive and negative logic • We use primarily positive logic in this course Logic functions of N variables ° Each truth table represents one possible

Ngày tải lên: 12/02/2020, 15:41

... Trang 1Digital Logic DesignLecture 2 More Number Systems/Complements Trang 2w ° Hexadecimal numbers • Related ... 8 By using the division system: 08 5 58 44 448 Trang 12Binary to Octal Conversion:Example:- [110101] 2 = [ ? ] 8 Here we will take 3 bits and convert it from binary to decimal by using ... can be use to add (and subtract) binary numbers. ° Digital electronics requires frequent addition and subtraction of numbers You know how to design an adder, but what about a subtracter? ° A

Ngày tải lên: 12/02/2020, 15:41

... Algebra, Logic and Gates° Logical operators operate on binary values and binary variables. ° Basic logical operators are the logic functions AND, OR and NOT. ° Logic gates implement logic functions. ... the basic logic operations: 1 1 1 0 0 1 0 1 0 0 0 0 Z = X·Y Y Trang 15° Using Switches• Inputs: - logic 1 is switch closed - logic 0 is switch open • Outputs: - logic 1 is light on - logic 0 ... logic 1 is light on - logic 0 is light off. • NOT input: - logic 1 is switch open - logic 0 is switch closed Trang 16° Example: Logic Using Switches ° Light is on (L = 1) for L(A, B, C, D) =

Ngày tải lên: 12/02/2020, 15:51

... Transfer° Data can move from register to register. ° Digital logic used to process data ° We will learn to design this logic Register C Digital Logic Circuits Trang 31Transfer of Information ° Data ... Trang 1Digital Logic DesignLecture 3 Complements, Number Codes and Registers Trang 2w ° Complement of numbers ... Process and store all forms of data in binary format ° Conversion to computer-usable representation using data formats Define the different ways human data may be represented, stored and processed

Ngày tải lên: 12/02/2020, 18:08

... decoder outputs and OR gates Otherwise there is no connection. Trang 21Same Example° Here is an alternative presentation of the same 8 x 3 ROM, using “abbreviated” OR gates to make the diagram ... right. Trang 19• A blank ROM just provides a decoder and several OR gates.• The connections between the decoder and the OR gates are “programmable,” so different functions can be implemented. ... organization similar to SRAM ° ROMs are effective at implementing truth tables • Any logic function can be implemented using ROMs ° Multiple single-bit functions embedded in a single ROM ° Also used

Ngày tải lên: 12/02/2020, 18:25

... Arithmetic Logic Unit (ALU) Programmable Logic Array ° A ROM is potentially inefficient because it uses a decoder, which generates all possible minterms No circuit minimization is done ° Using a ... with n inverters and 2n n-input AND gates • An OR gate with up to 2n inputs • The number of gates roughly doubles for each additional ROM input ° A programmable logic array, or PLA, makes the decoder ... are simpler to program, but contain more gates • PLAs use less hardware, but it requires some effort to minimize a set of functions Also, the number of AND gates available can limit the number of

Ngày tải lên: 12/02/2020, 19:02

... circuit can have any number of AND gates each with any number of inputs. A B C D AB CD X=AB+CD SOP Trang 13Basic Combinational Logic CircuitsTrang 14° The logic gates accept signals from the inputs ... information-processing operation fully specified logically by a set of Boolean functions Trang 11Sequential circuitselements (binary cells) in addition to logic gates. ° Their outputs are a function of ... truth table - Create a minimized circuit ° Approaches • Boolean expression approach • Truth table approach ° Leads to minimized hardware ° Provides insights on how to design hardware Trang 3Gate

Ngày tải lên: 12/02/2020, 20:23

... cascaded gates • Simplest gate component: inverter • Basis for commercial static RAM designs • Cross-coupled NOR gates and NAND gates also possible Static Memory Cell Trang 6The story so far ° Logical ... describe flip-flops using characteristic table. SR Flip-Flop operation (BUILT WITH NOR GATES) Characteristic table Excitation table Trang 22°1 °0 Review: Steering Gates ° The flow of logic can be controlled ... outside logic signal inputs to the circuit Typically, the clock is not consider part of the signal inputs of the circuit. ° Outputs – The logic signal outputs. ° Present State – the logic value

Ngày tải lên: 12/02/2020, 20:43

... Trang 1717 Draw the logic diagram of a two-to-four-line decoder using a NOR gates only including and enable input.Trang 18Problem (Mano) Using a decoder and external gates, design the combinational ... Show that the circuit can be constructed using XOR gates Can you predict what the output functions are for a 5-bit 2’s complementer? Trang 10Problem Design a 4-bit combinational circuit 2’s complementer ... constructed using XOR gates Can you predict what the output functions are for a 5-bit 2’s complementer? Try it yourself Trang 11(a circuit that adds 1 to a four-bit binary number. (b) Design a four-bit

Ngày tải lên: 12/02/2020, 22:25

... Asynchronous ° Asynchronous design is often unavoidable: • User interfaces • Different speed devices • Clocks are difficult to distribute over long distances ° More difficult to design, design tools generally ... asynchronous design tools are being developed ° Most current devices us synchronous logic inside local blocks, and asynchronous communication between blocks ° What constitutes a “block” is shrinking as logic ... timing of their signals Combinational Adder • 4-bit adder (ripple-carry) • Notice how carry-out propagates • One adder is active at a time • full adders are needed Sequential Adder  1-bit memory and

Ngày tải lên: 12/02/2020, 23:39

... comparison • Can be built using and-or gates ° Greater/less than requires more hardware than equality ° Multiplexers are fundamental digital components • Can be used for logic • Useful for datapaths ... outputs: A>B, A=B, A<B ° Design Approaches • the truth table - 2 2n entries - too cumbersome for large n • use inherent regularity of the problem - reduce design efforts - reduce human ... C3 C2 Trang 21D01  D23 Therefore, one term in thelogic equation for A > B isA3 . B3’ Find A > B Trang 22Therefore, the next term in thelogic equation for A > B is C3 . C2 . A1 . B1’

Ngày tải lên: 12/02/2020, 23:58

... one e) Using the extracted Minterms, write the Of-Products logic expression. Trang 23Analyze the logic circuit shown below to determine the logic expression for the output F 2. Using the logic ... feedback or storage elements). Trang 28Digital Design Overview° Design digital circuit from specification ° Digital inputs and outputs known • Need to determine logic that can transform data ° Start ... the following Boolean expression using only 2-input AND gates and 2-2-input OR gates. F(A,B,C) = m(0, 5, 6) Trang 50Multilevel Logic Circuitsequivalent two-level logic circuit. Reduced (silicon)

Ngày tải lên: 13/02/2020, 00:14

... circuit and the combinational logic which realizes the input functions for the flip-flops and the output functions. The combinational logic may be implemented with gates, with a ROM, or with a ... the present state ° A logic diagram is recognized as a clocked sequential circuit if it includes flip-flops. ° Logic diagram may or may not include combinational circuit gates. Trang 7° It is ... the above function using criteria table for the used flip-flop Trang 2424Trang 25Analysis Vs Design°Analysis: Start from circuit diagram, build state table or state diagram °Design: Start from

Ngày tải lên: 13/02/2020, 00:30

... This memory is confusingly called PC1600 and PC2100 RAM, because • 200MHz x 8 bytes/cycle = 1600MB/s • 266MHz x 8 bytes/cycle = 2100MB/s. ° DDR-RAM has lower power consumption, using 2.5V instead ... parity bit The four check bits are evaluated as follows: A 0 check bit designates an even parity over the checked bits and a 1 designates an odd parity Since the bits were stored with even parity, ... read and write cells ° Random access memory (RAM) contains words of information ° Data accessed using a sequence of signals • Leads to timing waveforms ° Decoders are an important part of memories

Ngày tải lên: 13/02/2020, 00:35

... random example. Trang 21Converting to a NAND° Step 1: Convert all AND gates to NAND gates and convert all OR gates to NAND gates. Trang 22Converting to NAND° Step 2: Cancel all pairs of inverters ... • In a typical circuit, inversion is done once and signal distributed Trang 13Two-level Logic using NAND Gates (cont’d)Trang 14° Convert from networks of ANDs and ORs to networks of NANDs and ... D B B C’ F introduction and conservation of  C D B B C’ B C’ F Conversion of Multi-level Logic to NAND Gates ° F = A (B + C D) + B C' Trang 19A X B C D Trang 20Making  NAND circuits (Ex)° The

Ngày tải lên: 13/02/2020, 00:36

... Need to make sure all 1’s are covered° Try to minimize total product terms ° Design could be implemented using NANDs and NORs Trang 9Don’t cares° In digital systems it often happens that certain ... • Larger examples exist ° Don’t care conditions help minimize functions • Output for don’t cares are undefined ° Result of minimization is minimal sum-of-products ° Result contains prime implicants ... Objective: • Grow implicant into prime implicants (minimize literals per term) • Cover the K-map with as few prime implicants as possible (minimize number of product terms) Trang 18A 11 1 F,

Ngày tải lên: 13/02/2020, 01:04