5 chapter 5 2 input capture

• Input capture module has the task of capturing the curent value of the timer counter upon an input event.. This module has multiple operating modes selectable via the ICxCON register

CHAPTER 5

INPUT CAPTURE MODULE

Dr Vo Tuong Quan

 2011 – Vo Tuong Quan

INPUT CAPTURE

What is Input Capture?

• Input capture module has the task of capturing the curent value of the timer counter upon an input event

• This module is mainly used for the frequency or time period measurements and pulse measurements (e.g mean count rate measurement)

• Example: dsPIC30F4013 contains 4 input capture modules, whereas dsPIC30F6014A contains 8 input capture modules

This module has multiple operating modes selectable via the

ICxCON register (control bit ICM<2:0>):

• Select by external input signal mode

• Interrupt by external input signal mode

INPUT CAPTURE

Input

Capture

function

diagram

 2011 – Vo Tuong Quan

INPUT CAPTURE

EXTERNAL SIGNAL CAPTURE INPUT MODE

1 On every falling edge of input signal applied at the ICx pin

2 On every rising edge of input signal applied at the ICx pin

3 On every risinig and every falling edge of input signal

applied at the ICx pin

4 On every fourth rising edge of input signal applied at the ICx pin

5 On every 16th rising edge of input signal applied at the ICx pin

INPUT CAPTURE

EXTERNAL SIGNAL CAPTURE INPUT MODE

SIMPLE CAPTURE MODE

- On every rising edge or every falling edge of the external input signal at the input pin ICx

- Captures the value of the counter TMR2 or TMR3 and puts it into the FIFO buffer memory The prescaler operates wth the

ratio 1:1, i.e without reduction

PRESCALER CAPTURE MODE

- The operation of the input capture module the external signal

is prescaled by the ratio 1:4 or 1:16 by setting the control bit ICM<2:0> to the values 100 or 101 respectively

- The input capture module captures total value of the counter TMR2 or TMR3 for 4 or 16 periods of the external signal at the pin ICx

 2011 – Vo Tuong Quan

INPUT CAPTURE

EXTERNAL SIGNAL CAPTURE INPUT MODE

EDGE DETECTION MODE

- Capturing the value of TMR2 or TMR3 counter can be done

on every rising and every falling edge of the external input signal applied to the ICx pin

- The edge detection mode is selected by setting the ICM<2:0> (ICxCON<2:0>) control bits to 001

- In this mode the prescaler counter can not be used

- The input capture module interrupt request is generated on every rising and every falling edge (ICxIF bit is set)

INPUT CAPTURE

An example of setting the captured value delayed by 1 or

2 instruction cycles TCY

 2011 – Vo Tuong Quan

INPUT CAPTURE

EXTERNAL SIGNAL INTERRUPT MODE

- Bits ICM<2:0> are set to 111

- The input pins ICx on rising edge generate an interrupt request ICxIF

 If the interrupt enable bit ICxIE is set and the interrupt priority level ICxIP<2:0>is defined, the microcontroller enters

an interrupt

INPUT CAPTURE

Example

Pin diagram of dsPIC30F4013

 2011 – Vo Tuong Quan

INPUT CAPTURE

0x0000 ICM<2:0>

ICBNE ICOV

ICI<1:0>

ICTMR

-ICSID L

-0x015

E IC8CON

0xuuuu Input 8 Capture Buffer Register

0x015

C IC8BUF

0x0000 ICM<2:0>

ICBNE ICOV

ICI<1:0>

ICTMR

-ICSID L

-0x015

A IC7CON

0xuuuu Input 7 Capture Buffer Register

0x015

8 IC7BUF

0x0000 ICM<2:0>

ICBNE ICOV

ICI<1:0>

ICTMR

-ICSID L

-0x014

6 IC2CON

0xuuuu Input 2 Capture Buffer Register

0x014

4 IC2BUF

0x0000 ICM<2:0>

ICBNE ICOV

ICI<1:0>

ICTMR

-ICSID L

-0x014

2 IC1CON

0xuuuu Input 1 Capture Buffer Register

0x014

0 IC1BUF

RESET STATE 0

1 2

3 4

5 6

7 12-8

13 14

15 ADR

NAME

Register

INPUT CAPTURE

ICSIDL – Input capture module stop in IDLE control bit

(ICSIDL=0 input capture module will continue to operate in IDLE mode,

ICSIDL=1 input capture module will halt in IDLE mode)

ICTMR – Input capture timer select bits (ICTMR=0 TMR3

contents are captured on capture event,

ICTMR=1 TMR2 contents are captured on capture event)

ICI <1:0> - Select number of captures per interrupt bits

00 – interrupt on every capture event

01 – interrupt on every second capture event

10 – interrupt on every third capture event

11 – interrupt on every fourth capture event

 2011 – Vo Tuong Quan

INPUT CAPTURE

ICOV – FIFO buffer overflow status flag (read only) bit

ICBNE – FIFO buffer buffer empty status (read only) bit

(ICBNE=0 FIFO buffer empty, ICBNE=1 FIFO buffer contains at least one capture value

ICM <2:0> - Input capture mode select bits

000 – Input capture module turned off

001 – Capture mode, every edge (rising or falling)

010 – Capture mode, every falling edge

011 – Capture mode, every rising edge

100 – Capture mode, every 4th rising edge

101 – Capture mode, every 16th rising edge

110 – Unused (module disabled)

111 – Input capture module in external signal interrupt

mode

(external source of interrupt requests)

INPUT CAPTURE

Using Input Capture in CCS-C

setup_ccp1 (mode) or setup_ccp1 (mode, pwm)

setup_ccp2 (mode) or setup_ccp2 (mode, pwm)

setup_ccp3 (mode) or setup_ccp3 (mode, pwm)

 Read more about the function of this in the Catalog of

CCS-C CCS-Compiler

 2011 – Vo Tuong Quan

INPUT CAPTURE

Example:

#int_ccp1

void isr()

{

}

setup_ccp1(CCP_CAPTURE_RE); // Configure CCP1 to capture rise

setup_ccp2(CCP_CAPTURE_FE); // Configure CCP2 to capture fall