MOSFET MODELING FOR VLSI SIMULATION - Theory and Practice Episode 8 potx

6.4 Piece-Wise Drain Current Model for Enhancement Devices 251 MOSFET capacitance calculations, where small error in Q b can cause large errors in the capacitances.. In the subthreshold

256 6 MOSFET DC Model

Though accurate, this is a complicated expression and not suitable for

CAD models However, the following simplified form of Eq (6.76) has been used in the drain current model [28]

(6.77)

This approximation, though accurate, has 6 as a function of the variable

V ; so 6 must be calculated for each V

The effect of approximating the function F(V, V,) with different 6 expressions

is most sensitive at zero Vsb Therefore, a comparison is made between the exact and approximate functions at zero vsb by calculating the relative errors between them using different 6 expressions The results are shown

in Figure 6.12 where the error E , is defined as

Fe x a c t - Fapprox

F e x a c t

E, = 100 x

where Fexac, and Fapprox are values of F given by Eqs (6.68) and (6.69),

respectively Note from this figure that the simplest approximation for 6

[cf Eq (6.71)] has maximum error, therefore this approximation will underestimate the depletion layer charge Q b the most However, the result- ing error in I d s calculations is not usually significant because Qb is much smaller than Qi In fact, for Id, calculations, any of the 6 functions discussed above can be used depending upon the desired accuracy and speed of calculation However, accuracy in 6 approximations are important for

6.4 Piece-Wise Drain Current Model for Enhancement Devices 251

MOSFET capacitance calculations, where small error in Q b can cause large errors in the capacitances For this reason Eqs (6.73) or (6.74) are most appropriate for circuit design, although these expressions can create problem in the capacitance calculations as we shall see in Chapter 7

6.4.4 Drain Current Equation with Square-Root Approximation With the square-root approximation (6.69), Eq (6.63) for Q h ( y ) becomes

and integrating we get the current in the linear region as

3 [23] and Level 4 [25] use Eq (6.81) for Zds; however, Level 3 uses 6 given

by Eq (6.71), while Level 4 (BSIM model) uses 6 given by Eq (6.73) Differentiating Eq (6.81) and equating the resulting expression to zero gives

the following simple expression for V,,,,, namely

It is worth pointing out that the charge-sheet model, discussed in section

6.3, can also be simplified using the square root-approximation In this

case, the final equation for I,, in the linear region looks similar to Eq (6.81)

This can be seen as follows: replacing the square-root dependence of Qb in

Eq (6.27) with a linear approximation [cf Eq (6.69)] we get

Q ~ Y ) - Y C A & + 6(4,(~) - 4so)l (6.85)

where 6 is given by any of the expressions discussed earlier in section

6.4.3 Using this value of Q b ( y ) in Eq (6.28) yields

Vgs > vth, v,, I V,,,, Vgs > vh, Vd, > Vd,,,

I d s =

(6.86)

where

Vn = ~ 1 , + ~ 6 4 s O - Y

and ct is given by Eq (6.80) Substituting Qi from Eq (6.86) in Eq (6.33)

and carrying out the integration under the boundary conditions given in

extra term ctVt(4,, - 4so) in Eq (6.87) This is due to the diffusion compo- nent of the current that is neglected in Eq (6.81)

Figure 6.13 shows comparison of the calculated I,, - Vds characterstics using the charge-sheet model, the rudimentary (first order) model and the bulk-charge model The model parameters used are those shown in Table

6.1 Note that the piece-wise models (rudimentary and bulk-charge models) overpredict the drain current compared to the charge-sheet model This can be explained as follows In deriving the piece-wise drain current models

in the previous sections we assumed that in strong inversion the potential drop 4s across the silicon was pinned at 24f + v& In reality this is not

6.4 Piece-Wise Drain Current Model for Enhancement Devices 259

Fig 6.13 Comparison of the MOSFET output characteristics using (a) charge-sheet model, (b) bulk-charge model and (c) rudimentary (classical model) The classical model overpredicts

current

true and indeed the potential does increase by few times the thermal voltage

(- 4Vt) as was discussed in chapter 5 This shows that piece-wise models underestimate 4, and hence the bulk charge Qb For a given gate voltage, underestimating 4, means overestimating V,,, the voltage across the oxide [cf Eq (4.16)] Overestimating V,, leads to an overestimation of silicon charge Q,, which in turn means overestimating Q i because Qb is being

underestimated The overestimation of inversion charge Q i in the channel results in an overestimation of drain current Indeed it has been found that the piece-wise multisection model overestimates the drain current by 15-20% [ 111 In spite of its inaccuracy, the multisection (piece-wise) model [cf Eq (6.84)] is the one used in today’s widely used circuit simulators because of its simplicity

6.4.5 Subthreshold Region Model

While deriving I,, Eqs (6.62) and (6.84), it was assumed that the current flow is due to drift only (assumption 6) This resulted in I, = 0 for Vgs < Vth,

that is, there is no current flow for V,, below threshold In reality this is not true and I,, has small but finite values for V,, < V r h For the device shown in Figure 6.5 this current is of the order A when

V,, approaches Vr, and then decreases exponentially below Vth In fact the

A to

260 6 MOSFET DC Model

device behavior changes from square law to exponential when V,, approa-

ches Vth This current below V,, is called the subthreshold or weak inversion current and occurs when V,, < Vth, or 4s> 4,> 24s Unlike the strong inversion region where drift current dominates, the subthreshold region

conduction is dominated b y diflusion current It should be emphasized that the transition from weak to strong inversion is not well defined, as was discussed in chapters 4 and 5 This region of device (subthreshold) current

is important in that it is a leakage current that affects dynamic circuits and determines CMOS standby power In this region of operation, Eqs (6.62)

or (6.84) are no longer valid

In the subthreshold region of operation, the surface potential 4,, or the band bending, is nearly constant from the source to the drain end because the inversion charge density Q i is several orders of magnitude smaller than the bulk charge density Q b (cf section 4.2) This means that we can replace

4,(y) in subthreshold region by some constant value, say $J~, With this assumption, the bulk charge Q b can be expressed as

This shows that 4s, is nearly linearly dependent on VgS It should be

emphasized that the surface potential 4,s in the subthreshold region is

constant from source to drain only for a long channel device As the channel

length become shorter, 4s, no longer remains constant over the whole channel length

Because @,, is constant, the electric field by is zero Hence, the only current

that can flow is diffusion current as can be seen from Eq (6.2) and is given by

Integrating this equation across the channel of thickness t,, and making

use of Eq (6.13) we can write the drain current I,, (due to diffusion) in the

dn

dY

6.4 Piece-Wise Drain Current Model for Enhancement Devices 26 1

inversion region Following the MOS capacitor case, the inversion charge

density Qi(y) in weak inversion [cf Eq (4.43)] is given by

(6.94) where we have replaced 4, by q5s, and have made use of Eq (6.23) for y

and Eq (6.22) for Vq! Remembering that Vcb(y = 0 ) = V,b and Vcb(y = L ) =

V,b+ V,,, the inversion charge Q i s and Qid at the source and drain ends, respectively, can be written as

(6.9 5a)

Qi,(drain end) = & I/,e(d’ss- 26f- v s b ~ Vds)lVt

Using these values of Qis and Qid in Eq (6.93) yields

I - psWCoxy I / : e ( 6 ” ’ - 2 6 f f - V , b ) / V , ( 1 - e - Vds/Vf)

(6.9 5 b)

(6.96a)

Above equation takes the following form, after eliminating 4J using Eq

(2.15) and making use of Eq (6.50) for B,

d s - 2 L J Z

(6.96b)

This is the current equation for the subthreshold region For each Vgs we

first calculate q5ss from Eq (6.90), which in turn is used to calculate I,, from

Fig 6.14 Typical device I,, - V,, characteristics in the subthreshold or weak inversion

region for two different back bias

Eq (6.96) The following conclusions about subthreshold conduction can

be drawn from Eq (6.96):

0 The subthreshold current increases exponentially with the surface potential 4ss and hence Vgs [cf Eq (6.90)] This is evident from

Figure 6.14 where measured I d , is plotted against Vgs for different values

of V,, and Vd, for a nMOST fabricated using 1 pm CMOS technology The current is dependent upon an exponentially decreasing term which for Vd, larger than 4Vt ( - 100mV) is negligible, becoming independent

of Vds It should be pointed out that this is true only for long channel devices In fact for short channel devices, this region of drain current exhibits a significant dependence on the drain voltage as we will see in

section 6.9

The subthreshold current is strongly dependent on temperature due to

its dependence on the square of the intrinsic carrier concentration ni,

resulting in steeper slopes at low temperatures The temperature depen-

dence of subthreshold current is discussed in section 6.9

Often Eq (6.96) is written in terms of the surface concentration n, as6

(6.97)

Equation (6.97) can be derived as follows: The inversion channel is confined by the

potential well created by the oxide to the silicon interface on one side and on the other side by the perpendicular electric field gS at the surface in the substrate Since Qi << Qb

in weak inversion, is equal to the depletion field, that is

(Continued next page)

6.4 Piece-Wise Drain Current Model for Enhancement Devices 263 Most of the expressions reported in the literature for I d , in weak inversion region are variations of Eq (6.96) [4], [29]-[32] For circuit simulation

models, often a simplified form of this equation is used Since Qb is a weak

function of 4,,, we can expand Qb using Taylor series around 4so which lies between 4f and 24r Retaining the first two terms of the Taylor series,

we get

From Eq (6.88) we get

(6.98)

(6.99)

where Cd is called the depletion region ~ a p a c i t a n c e ~ Combining Eqs (6.98)

and (6.99) with (6.89) yields

The average thermal energy of the carriers for motion perpendicular to the surface is

kT The average thickness t,,, of the weak inversion channel is, therefore, given by

thickness of the depletion region under the channel

clearly shows Cd as the depletion layer capacitance

(6.103)

This is the equation for r] used in SPICE model Levels 2 and 3 In this equation Cif, called the surface state capacitance, is normally regarded as

an adjustable parameter through qo and is used to fit the value of q to

measured characteristics Combining Eqs (6.96), (6.99) and (6.101) yields

or

where I,, = b(cd/c,,)V: = b(r] - l)V:, is a prefactor term This is the most commonly used drain current equation for the subthreshold region of device operation It clearly shows that the subthreshold current ( V,, < Vth) increases

exponentially with Vgs and for V,, larger than about 3Vr, the current becomes independent of Vds Further, since the parameter is inversely proportional

to the square root of Vsb, the subthreshold slope becomes steeper at higher values of Vsb This indeed is the case as can be seen from Figure 6.14 which

is a plot of log(Zds) versus Vg, for an experimental device Note that the

curve is linear (on the log scale) until the device starts to turn on When

V,, approaches Vfh, Eq (6.104) is no longer valid and the current will increase either linearly (linear region) or as the square of (V,, - Vrh) (saturation

region) depending upon the value of Vd,

Very often the following simpler version of Eq (6.104) is used for circuit models [34]

(6.105)

6.4 Piece-Wise Drain Current Model for Enhancement Devices 265 where Vd, dependence is ignored because its effects on I,, is negligible for

made in the derivation of Eq (6.104) and is calculated in the same way as

qo, that is, by curve fitting the experimental data

Subthreshold Slope An important parameter characteristic of the sub- threshold region is the gate voltage swing required to reduce the current from its ‘on’ value to an acceptable ‘off’ value This gate voltage swing, also called the subthreshold slope S, is dejined as the change in the gate voltage V,, required to reduce subthreshold current Ids by one decade For a device to

have good turn-on characteristics, S should be as small as possible Clearly,

S is a convenient measure of the turnoff characteristics of a MOSFET By this definition

where the factor 2.3 accounts for the conversion from “log” (logarithm to the base 10) to “ln” (logarithm to the base e) Strictly speaking, S varies with the current level However, this variation is small over one decade of

current so that S can be taken as gate swing per decade [32] We can rewrite Eq (6.106) for S as

d(log Ids) Ids)

Differentiating Eq (6.89) we get

we have made use of Eq (6.99) for C, Assuming vd, > 31/, and

the logarithm of both sides of Eq (6.96b), we get

266 6 MOSFET DC Model and (6.111) in Eq (6.107), we get

For y >> Cd&IC,,, the subthreshold swing becomes

(6.113)

where we have made use of Eq (6.102) for r This shows that the theoretical

minimum swing Smin is given by

that is, the minimum attainable subthreshold slope for any device is approxi- mately 60mV per decade at room temperature Since q lies in the range

1-3, typical values of S lie in the range of 60 to 180mV/decade If there is

a substantial interface trap density, then cd in Eq (6.1 13) should be replaced

by ( C , + Cit) Thus, the subthreshold slope is a convenient measure of the importance of the interface traps on device performance

Note that C , is a function of $,, and the value of 4,, chosen to calculate

C , affects S to some degree For circuit models, we can assume that

+,, = b4f + V,, where 2 > b > 1 However, Brews [32] determined 4ss in terms of current level Therefore, to find 4,, we first choose a certain current level, say I,, = 10- l o A Rearranging Eq (6.109), we get

(6.115)

Assuming a certain current level, Eq (6.115) is used to calculate +,, by iteration This iterative procedure converges very rapidly [32]

The plot of subthreshold swing S as a function of bocy factor y for three

different gate oxide thicknesses (tax = 100,300 and 500 A) is shown in Figure 6.15 In these curves c dis calculated using Eq (6.99) with = 1.54f + VSb,

although one can also use Eq (6.115) for 4,, Note that even for y = 0, there is a minimum swing of 60mV/decade The swing varies linearly' with

y and is substrate bias dependent The higher the Vsb, the higher the 4ss,

and therefore the lower the depletion capacitance C , which then results in

S being lower This shows that use of substrate bias can improve sub- threshold turn off

* Increased y means higher substrate doping N, The higher the N,, the lower the depletion width; this, in turn leads to a higher value for C, which results in higher value for S

6.4 Piece-Wise Drain Current Model for Enhancement Devices 267

BODY FACTOR, r CVb)

Fig 6.15 Subthreshold slope S versus body factory for different substrate bias Variation in S

at contrast y , when oxide thickness to, varies from l O O A to 500A, is also shown

In the multisection drain current model developed above we have assumed

that Id, in the subthreshold region (weak inversion) consists of a diffusion component only, whereas in the linear and saturation regions (strong inversion) it consists of a drift component only Hence, one can not expect

a smooth transition between the two regions The non-continuous transition between these (weak and strong inversion) regions is a severe drawback of the simplified model discussed so far For the model to be implemented in

a circuit simulator it is necessary that there be a smooth transition between the two respective regions The simplest way to achieve a continuous transition is to assume that the charge Q i in the weak inversion region is

a tangent to the strong inversion region charge [30] The point of tangency

V,, is the dividing point above which strong inversion region equations will be valid and below which weak inversion region equations will be

valid, as shown in Figure 6.16 Under the assumption of low Vds( - 4VJ,

using Eqs (6.95) and (6.101), the weak inversion charge Q i becomes

Qi = CdV, exp ) " , g ; ' ( (weak inversion, Vds - 0.1 v) (6.116)

Under the same conditions, that is low V,,, the strong inversion charge,

from Eq (6.79), becomes

(6.117)

Q i = Cox(Vgs - Vth) (strong inversion, Vd, - 0.1 V)

268

A

6 M O S F E T DC Model

Fig 6.16 Gate voltage V,,, dividing the weak and strong inversion region model, (a) linear

scale, and (b) log scale

Thus, equating Eqs (6.116) and (6.1 17) and their derivatives with respect

to V,,, we get at V,, = V,, [30]

(6.118)

When Vgs 2 V,,,, the drain current i d s is given by (6.84) while, for V,, < V,,, I d ,

can be calculated from Eq (6.105) by replacing Vfh with V,, Thus,

I = Vrh + 't I

I,,(subthreshold) = I,,exp ( Vg~v;fV~~) Vgs < v,, (6.1 19) where I , , is the current calculated from Eq (6.84) using V = V,,, Thus, V,, acts as a point at which behaviors of strong and weak inversion are pieced together This is the approach used in SPICE Levels 2 and 3 Combining

Eqs (6.1 19) with (6.84) we now have a complete long-channel DC MOSFET

model, which is continuous in all regions,

shown in Figure 6.17, where continuous line is calculated based on

Eq (6.120) while symbols are experimental data

Although Eq (6.1 18) results in a continuous transition from weak to strong

inversion (see Figure 6.17), there are large errors in the I,, calculations

around the transition region, often called the moderate inversion region [ 151

6.4 Piece-Wise Drain Current Model for Enhancement Devices 269

However, for most of the digital applications this error is not significant due to the low magnitude of the current in this region

A slightly different approach, that ensures continuity of the weak and strong inversion current and its derivative, is to replace V,, in Eq (6.120)

by an effective gate voltage V,,, defined as [34]

(6.121)

When the gate voltage is a few V , above V,,,, V,,, reduces to V,, as is required

When the gate voltage is a few V, below v , h , the effective gate voltage becomes

(6.122)

which indicates the exponential dependence of V,,, on V,, when Vqs < Vth

Thus, replacing V,, in Eq (6.84) by V,,, ensures continuity of the current

In fact the two approaches are not very different The large errors in the middle inversion region still exist However, the advantage of using (6.121)

is that we need only two equations instead of three in (6.120)

270 6 MOSFET DC Model

6.5 Drain Current Model for Depletion Devices

Strictly speaking, the drain current models developed in the previous sections are valid for enhancement devices only However, in SPICE these models have been used for depletion type devices also simply by changing the sign of the threshold voltage as was pointed out in section 5.2.2 If the depletion device is used only as a load element (source and gate tied together) in a circuit, then this zero order model is quite satisfactory However, for device to be used in a more general configuration requires a separate model Although a general model, similar to the charge sheet model for the enhance- ment devices, has been developed [35] but it will not be discussed here due to its complexity Moreover, such models are not very suitable for circuit simulators Here we will discuss only piece-wise models that are normally used for circuit simulations [36]-[45]

Recall that depletion devices have a deep channel implant which is of opposite type to that of the substrate, thereby forming a pn junction under- neath the gate Unlike the enhancement devices, the depletion devices

conduct even at zero V,, and have many modes of operation depending

upon the applied gate and drain voltages, channel doping concentration and implant depth [38]-[45] These different modes of operation are named according to the condition at the silicon surface Thus, if the entire surface

is accumulated, depleted or inverted, the device is said to be operating in accumulation, depletion or inversion mode, respectively, as shown in Figure 6.18 In addition, there can be mixed mode of operation such as accumulation

at the source end and depletion at the drain end, called the accumulation/ depletion mode In this section we will develop a drain current model for different modes of operation of the depletion devices

Figure 6.19a shows the cross-section of an n-channel depletion MOSFET

in the direction of the channel current flow The implanted or buried n-type channel region is approximated by a step profile of depth X i and uniform concentration N , This is the approximation we had used earlier to calculate the threshold voltage of depletion devices (cf section 5.2.2) The boundaries

'9 < 'f b "9' 'thi

Fig 6.18 Different modes of operation in depletion devices (a) accumulation (b) depletion

and (c) inversion

6.5 Drain Current Model for Depletion Devices 27 1

Fig 6.19 (a) Cross-section of a n-channc iepletion

for the device in (a)

vice, (b) deF-.tion widths and charges

of the two space charge regions, one at the surface and the other due to

the p n junction formed by the channel and the substrate, are shown as dotted lines The channel p n junction depletion width X , is controlled by the channel voltage Vcb The surface space-charge region X, is due to the combined effect of the gate and channel voltage An elemental section of the device at a position y together with the charge and potential distribution

in the x direction is shown in Figure 6.19b For the sake of algebraic mani- pulation it is convenient to define the following modified voltages

(6.123)

where V ( y ) is the channel voltage which is zero at the source end and Vd,

at the drain end, 4 j is the built-in potential of the channel p n junction

Using the GCA we can write the mobile charge density Qm in the channel

as [38]

(6.124)

212 6 MOSFET DC Model

where Qim, Q j , and Q,, are the implanted layer charge density, the channel

p n junction space-charge density and the surface space-charge density,

respectively The implanted layer charge density Q i m is simply [cf Eq (5.50)]

(6.127b) (surface inversion)

(6.127~)

where y , is given by Eq (5.57a)

The sets of equations (6.125)-(6.127) are valid at any point along the surface between the source and drain Whether all the conditions mentioned in Eqs (6.127) actually occur in a given device depends on the doping concentration in the implanted layer, the thickness of the layer and the channel voltage

Knowing the mobile charge density Qm, we can now calculate the drain

current in the depletion devices Neglecting the diffusion current, the drain current can be written as [cf Eq (6.14)]

(6.128)

Note that here p is not the surface mobility, but rather more closer to bulk mobility because in this case current is flowing away from the surface in the burried channel

Substituting Q , from Eq (6.124) into (6.128) and integrating we obtain [38]

(6.129)

where F , is the contribution of the surface space-charge region to the drain

6.5 Drain Current Model for Depletion Devices 213

current, and is defined as

Vrnd

The function F , takes different values depending upon the condition existing

at the surface We now evaluate the function F , for different conditions at

the surface ranging from inversion to accumulation

1 Inversion Along the Entire Surface This condition exists for the gate

voltages satisfying V,, Iy S K In this case using Eqs (6.127~) and (6.130)

where V, = Vi, = (V,,/Y,)~ Beyond this point and up to the drain, the surface

is depleted In this case, using Eqs (6.127b and c) in (6.130) yields

4 Accumulation at the Source, Depletion at the Drain This condition exists

for the gate voltages satisfying V,, < V,, I Vmd In this case using Eqs

It should be noted that in the surface accumulation case the surface mobility

ps should be used instead of the bulk mobility p It has been found that

ps required to fit the data is about one half the bulk mobility value [38]

However, to better fit the data it is more appropriate to use the following empirical expression for the mobility at the surface (when surface is partly

or fully accumulated) [42]

F S = c O X [ k ( V i , - ‘2,) - ‘mg(‘md - Vms)l’

which is gate bias dependent (see section 6.6.1)

It is important to note that depending upon the implanted region, some

of the conditions at the surface may not be encountered For example, for shallow implants, inversion may not occur at the surface, and in this case, the whole range of device currents are covered by conditions (3)-(5) above Such would also be the case if the surface region is completely isolated from the substrate Also note that unlike in enhancement devices, the threshold voltage V,, does not appear explicitly in the drain current equations for depletion devices In spite of this drawback, the model fairly accurately represents the measured I- V characteristics for long channel depletion devices Although this is the most commonly used drain current model based on a step profile in the channel; there are other more accurate but more complex models based on linearly graded profiles [27], [36]

Saturation Voltage Similar to the case of enhancement devices, the saturation voltage V,,,, for depletion devices is also defined as the drain

voltage at which the drain current reaches its maximum value for a fixed gate voltage With no velocity saturation effect, it is equivalent to setting

6.5 Drain Current Model for Depletion Devices 215

Q,= 0 in Eq (6.124) and replacing V, by V,,,, = Vd,,, + Vs, + 4j If the

surface at the drain end is depleted, then Vd,,, is obtained by solving the

following equation

+ Vmsat - Vmg)"'] = Qim (6.136) However, if the drain end is inverted, then one has to use the following equation for vd,,, calculation

Note that in this case V,,,, is independent of the gate voltage, because the gate is screened from the channel by the inversion layer However, if the region is accumulated the saturation of the drain current does not occur Figure 6.20 shows a comparison of the calculated and measured drain current for an n-channel depletion device fabricated using an NMOS

Fig 6.20 Measured and calculated transfer and output characteristics at different back bias

for an n-channel depletion device (After Divekar and Dowell [42])