The folded cascode stage comprises current sources and current mirrors (fig. 6-2). This stage is necessary to achieve single-supply input capability. It also provides the differential to single-ended signal conversion. The stage should be designed with the goal to minimizing the detrimental effects to the accuracy and dynamic parameters of the OpAmp. The folded cascode can also be used for the OpAmp voltage gain boost, and it is more convenient to transfer the boost circuits into this stage than to use them in the input stage.
The noise and mismatch in the current mirrors M2/M3 and M4/M5 of the folded cascode can significantly increase the overall OpAmp noise and offset.
The sum of the voltage Vnmr noise/offset of the mirror transistors causes the equivalent noise/mismatch in the folded cascode output current Inmr = Vnmrgm2, and equivalent input-referred noise/offset equal to 2Inmr/gm1.
Figure 6-7. Voltage limitations in the folded cascode
The voltage offset and flicker noise of the MOS transistors is inversely proportional to the square root of their area. To reduce the contribution of the mirror transistors M2/M3 and M4/M5 in the overall noise/offset their overall area should be comparable with that of the input differential pair(s).
In order to decrease gm2, these mirror transistors should have longer channels and operate in strong inversion.
The current through the mirror transistors also affects gm2, and the choice of a smaller current decreases the noise contribution Inmr. Another method to decrease gm2is to use the source (emitter) degeneration resistors (fig. 6-7).
To be efficient, the voltage drop across these resistors should be equal to at least to 4VT (i.e. >100 mV at 20oC).
To achieve the single-supply capability, the voltages at the folded cascode inputs a, b should be Va,b <(VgsMO,M1 – Vsat)≈ 0.5 V.
A voltage drop of 100-150 mV across the resistors leaves about 300 mV for the drain source voltage Vds of M2/M3. At the same time, the triode operation of M2/M3 should be avoided because it will cause an increase of the input-referred noise and a drop of the OpAmp open-loop gain. This means that M2/M3 should be in strong inversion but the overdrive (Vgs – VTH) can be only 200-300 mV. There is little room for VdsM3 variations and Va,b
must be tightly controlled. The design of high voltage side of the folded cascode (transistors M4/M5-M8/M9 in fig. 6-2) should be based on similar considerations.
The drains of M7 and M9 are often connected directly to the gates of the output devices MN and MP (fig. 6-7). The sizes of MN and MP are usually chosen to provide the maximum load current with relatively small Vds and Vgs voltages. In the absence of a load, these transistors operate in weak inversion with Vgs < VTH. Whether the triode operation of M7 and M9 is acceptable or not depends on the gain boost scheme. For example, it should be avoided with the gain boost as in fig. 4-21, as transistor M7 (M0 in fig. 4- 21) is part of the gain boost feedback loop and its triode operation will effectively break this loop. The triode operation can lower an already tight value of Va,b, especially on the low side as VTH NMOS < VTHPMOS.
Figure 6-8. Control of the input voltage of folded cascode
The drain-source voltages on cascoding transistors are defined by the reference current Iref and voltage sources VP and VN (see fig. 6-7). These voltages can be obtained using a current source and diode-connected MOS transistor (fig. 6-8a).
If this simple circuit does not provide good control of the drain-source voltages over temperature and process variations, then the circuit shown in fig. 6-8b, where the voltage VdsM2does not depend on VN, may help to solve the problem.
In this circuit, M6, M2 and R0 belong to the folded cascode circuit. The current ratio I10/IF should be equal to the aspect ratio of M20and M6. The current I11 should be equal to I11 = I10 + I12/2 so that the drain current of M22
is also equal to I12/2. If transistors M21/M22 are matched then:
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| gsM22 gsM21 THM22 THM21 THM22 THP
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dsM V V V V V V
V = − = − = − .
But the threshold voltage of M22 is larger than |VTHP|. Therefore the voltage drop across M2 is equal to VdsM2 =γ( Vbe+|2φf |− |2φf |)≈150−300 mV.
Small capacitors similar to C0 (about 0.5 pF) should be routinely added to every voltage source in the circuit to avoid deterioration of high-frequency behavior and unnecessary delays in transistors in the common-gate configuration. The decision to remove them in the final design steps depends on simulation results, especially on transient simulations.
Both input and current mirror transistors have a large area. This results in large equivalent parasitic capacitances at the folded cascode input nodes a and b (see fig. 6-2), with Ca ≈Cb =Cgd1+Cdb1+Cgd3+Cdb3+Cgs7. This capacitance, in combination with the source resistance 1/gm7of M7 (or 1/gm9 of M9), creates an additional pole in the signal transfer path and can convert the folded cascode into a gain stage ifgm7/Ca <2GBW.
Hence, to preserve good dynamic properties of the OpAmp, the transconductances gm7and gm9 of M7 and M9 should be high, but the area of each transistor M7or M9 should be small. The transistors M7 and M9 should have minimal gate length and be wide enough to operate with Vgs ≈ VTH. Any further increase of transistor width does not noticeably improve gm7,9
and only increases the parasitic capacitances. The gain boost using the scheme of fig. 4-7 will also decrease the source resistance and improve the high-frequency behavior of M7 or M9.
During the OpAmp slewing or during sharp changes of the input voltages, the tail current of the input stage and the capacitive currents through Cgd of the input devices flow through the folded cascode inputs (fig.6-9). The values of these currents can exceed IF.
Any realistic value of current can be sourced through (flow into) the input b. Such current acts to turn off M6 by increasing the potential at b, so M2 is turned on by IF and runs (sinks) the current IF and all required extra current.
Figure 6-9. Effects of the large current through folded cascode inputs
Any value of the sinking current can flow from the input a. This happens when it is necessary to charge the capacitance Cgdof M1. In this case, the source of M7 acts as the voltage clamp in common-gate configuration, providing the required extra charge current for the capacitance.
Figure 6-10. Voltage clamp at the folded cascode input
Sinking a large current from the input b can cause a drop of potential at this input below the negative rail. This results in activation of the parasitic body diode of M2. Layout precautions (guard ring, spacing) must be taken to prevent a latch-up or other detrimental effect. In most layouts, a guard ring is
already in place in order to improve the matching of M2, M3, and the drop of potential of input b may even stay unnoticed.
Sourcing a current that exceeds IF through the input a results in the shutdown of M7 and an uncontrollable rise of the voltage at this input. To provide a faster recovery time and prevent a delay after the end of the transient (and possible conditional instability), the voltage at this input should be clamped. An example of such clamping is shown in fig. 6-10a.
The diode-connected transistor M30 in the circuit of fig. 6-10a limits the voltage rise at the input b by the value that is somewhat above VTH. It may leak some current during normal operation, if Va is close to VTH, increasing the OpAmp offset. In this case, a dedicated feedback (always feedback!) circuit (fig. 6-10b) will help [44]. This feedback also sharpens the clamp operation. The voltage V1 sets the threshold voltage of this loop. The amplifier A1 can be implemented as a current-input amplifier (fig. 2-4), with the threshold voltage source realized as the offset voltage of two mismatched input transistors. When the voltage at the node a exceeds that at b more than the value of this offset, M30 is turned on and sources all the extra current to the input b.