Iec 61189 5 1 2016

T est methods for electrical materials, printed boards and other interconnection structures and assembl es – Part 5-1: General test methods for materials and assembl es – Guidance for pr

T est methods for electrical materials, printed boards and other interconnection

structures and assembl es –

Part 5-1: General test methods for materials and assembl es – Guidance for

printed board assembl es

Méthodes d'essai pour les matériaux électriques, les cartes imprimées et autres

structures d'interconnexion et ensembles –

Partie 5-1: Méthodes d'essai générales pour les matériaux et les assemblages –

Lignes directrices pour les assemblages de cartes à circuit imprimé

THIS PUBLICATION IS COPYRIGHT PROT CTED

Copyright © 2 16 IEC, Ge e a, Switzerla d

Al rig ts reserv d Unles oth rwise sp cifie , n p rt of this p blc tio ma b re ro u e or uti ze in a y form

or b a y me ns,ele tro ic or me h nic l in lu in p oto o yin a d microfim, with ut p rmis io in writin from

eith r IEC or IEC's memb r Natio al Commite in th c u try of th re u ster If y u h v a y q estio s a o t IEC

c p rig t or h v a e q iry a o t o tainin a ditio al rig tsto this p blc tio , ple se c nta t th a dres b low or

y ur lo al IEC memb r Natio al Commite for furth r informatio

Droits d re ro u tio réserv s Sa f in ic tio c ntraire, a c n p rtie d c te p blc tio n p ut être re ro uite

ni uti sé so s q elq e forme q e c soit et p r a c n pro é é, éle tro iq e o mé a iq e, y c mpris la p oto o ie

et les microfims, sa s la c rd é rit d l EC o d Comité n tio al d l EC d p ys d d ma d ur Si v usa ez d s

q estio s sur le c p rig t d l EC o si v us d sirezo te ir d s droits su pléme taires sur c te p blc tio , uti sez

les c ord n é s ci-a rès o c nta tez le Comité n tio al d l EC d v tre p ysd résid n e

Th Intern tio al Ele trote h ic l Commis io (IEC) is th le din glo al org nizatio th t pre ares a d p blsh s

Intern tio al Sta d rds for al ele tric l ele tro ic a d relate te h olo ies

Ab ut IEC publ c tio s

Th te h ic l c nte t of IEC p blc tio s is k pt u d r c nsta t re iew b th IEC Ple se ma e sure th t y u h v th

latest e itio , a c rig n a or a ame dme t mig t h v b e p blsh d

IEC Catalog e - webstore.ie c / catalog e

Th sta d-alo e a plc tio for c nsultin th e tire

biblo ra hic l infor matio o IEC Inter natio al Sta d rds,

Te h ic l Sp cific tio s, Te h ic l Re orts a d oth r

d c me ts Av ia le for PC, Ma OS, An r oid Ta lets a d

iPa

IEC publc tio s s arc - w w.ie c /se rc pub

Th a v n e se rc e a les to fin IEC p blc tio s b a

v riety of crite a (r efer en e n mb r, te t, te h ic l

c mmite ,…) It also giv s informatio o pr oje ts, re la e

a d w ith r awn p blc tio s

Sta u to d te o al n w IEC p blc tio s Just Pu lsh d

d tais al n w p blc tio s rele se Av ia le o ln a d

also o c a mo th b emai

Ele to edia - ww w.ele to edia.org

Th w or l 's le din o ln dictio ary of ele tro ic a d

ele tr i al terms c ntainin 2 0 0 ter ms a d d finitio s in

En lsh a d Fre c , w ith e uiv le t terms in 15 a ditio al

la g a es Also k now n as th Inter natio al Ele tr ote h ic l

Vo a ulary (IEV) o ln

6 0 0 ele trote h ic l ter min lo y e tr i s in En lsh a d

Fre c e tr acte from th Terms a d Definitio s cla se of

IEC p blc tio s is u d sin e 2 0 Some e tr i s h v b e

c le te fr om e r lier p blc tio s of IEC TC 3 , 7 , 8 a d

CIS R

IEC Cu tomer Serv ic Cente - webstore.ie c / cs

If y u w ish to giv us y our fe d a k o this p blc tio or

n e furth r as ista c ,ple se c nta t th Customer Ser vic

Ce tr e: csc@ie c

A pro os de lIEC

L Commis io Ele trote h iq e Intern tio ale (IEC) est la première org nisatio mo diale q i éla ore et p ble d s

Normes intern tio ales p ur to t c q i a trait à léle tricité, à léle tro iq e et a x te h olo ies a p re té s

A pro os de publc tio s IEC

L c nte u te h iq e d s p blc tio s IEC est c nstamme t re u Ve i ez v us as urer q e v us p s é ez lé itio la

plus ré e te, u c rig n um o ame d me t p ut a oir été p blé

Catalog e IEC - webstore.ie c / catalog e

Ap lc tio a to ome p ur c nsulter to s les r enseig eme ts

biblo ra hiq es sur les Normes intern tio ales,

Sp cific tio s te h iq es, Ra p r ts te h iq es et a tr es

d c me ts d l EC Disp nible p ur PC, Ma OS, ta letes

An roid et iPa

Re h rc e de publc tio s IEC - w w.ie c / se rc pub

L r ec er ch a a c e p rmet d tr ou er d s p blc tio s IEC

e uti sa t difér ents c tères (n mér o d référe c , te te,

c mité d’étu es,…) Ele d n e a s i d s infor matio s sur les

pr ojets et les p blc tio s rempla é s o r etir ées

Restez infor mé sur les n u eles p blc tio s IEC Just

Pu lsh d d tai e les n u eles p blc t io s p r ues

Disp nible e lg e et a s i u e fois p r mois p r emai

Ele to edia - ww w.ele to edia.org

L pr emier dictio n ir e e lg e d ter mes éle tro iq es et

éle tr i u s I c ntie t 2 0 0 termes et d finitio s e a glais

et e fr an ais, ainsi q e les ter mes é uiv le ts d ns 15

la g es a ditio n les Eg leme t a p lé Vo a ulair e

Ele tr ote h iq e Inter natio al (IEV) e lg e

Glos aire IEC - std.ie c / glos ary

6 0 0 e tré s termin lo iq es éle tr ote h iq es, e a glais

et e fr an ais, e tr aites d s articles Ter mes et Définitio s d s

p blc tio s IEC p r ues d p is 2 0 Plus c rtain s e tr ées

a té e res e traites d s p blc tio s d s CE 3 , 7 , 8 et

CIS R d l EC

Serv ic Clents - webstore.ie c / cs

Si v us d sir ez n us d n er d s c mme tair es sur c te

p blc tio o si v us a ez d s q estio s c nta tez-n us:

T est methods for electrical materials, printed boards and other interconnection

structures and assembl es –

Part 5-1: General test methods for materials and assembl es – Guidance for

printed board assembl es

Méthodes d'e sai pour les matériaux électriques, les cartes imprimées et autres

structures d'interconnexion et ensembles –

Partie 5-1: Méthodes d'essai générales pour les matériaux et les assemblages –

Lignes directrices pour les assemblages de c rtes à circuit imprimé

Warnin ! Mak e s re th t y ou o tain d this publc tion from a a thorize distributor

Ate tion! Ve i ez v ou a s r er qu v ou av ez o te u c te publc tion via u distribute r a ré

FOREWORD 4

INTRODUCTION 6

1 Sco e 8

2 Normative referen es 8

3 Ac urac , precision an resolution 8

3.1 General 8

3.2 Ac urac 8

3.3 Precision 9

3.4 Resolution 10 3.5 Re ort 10 3.6 Stu ent’s t distribution 10 3.7 Su gested u certainty l mits 1

4 Catalog e of a proved test method 12 5 List of contents of the IEC 61 8 -5 series 12 An ex A (informative) Tests 1

3 An ex B (informative) Guidan e doc ments an han b o s 15 B.1 General 15 B.2 Han b o an g ide to s p lement IPC-J-STD-0 1 15 B.3 Guidel nes for Electrical y Con u tive Surface Mou t Ad esives (IPC-3 0 ) 15 B.4 Users Guide for Cle nl nes of Unp pulated Printed Bo rd (IPC-5 01) 15 B.5 Guidel nes for OEM’s in Determinin Ac e ta le L vels of Cle nl nes of Unp pulated Printed Bo rd (IPC-5 0 ) 15 B.6 Surface In ulation Resistan e Han b o (IPC-9 01) 16 B.7 Material an Proces Characterisation / Qualfication Test Protocol for As es in Electroc emical Performan e (IPC-9 0 ) 16 B.8 User Guide for the IPC/IEC B5 Proces Qual fication Test Vehicle (IPC-9 0 ) 16 B.9 PWB As embly Solderin Proces Guidel ne for Electronic Comp nents (IPC-9 0 ) 16 B.10 Aq e u Post Solder Cle nin Han b o (IPC-AC-6 A) 17 B.1 Guidel nes for Cle nin of Printed Bo rd an As embl es (IPC-CH-6 A) 17 B.12 Han b o (IPC-J-STD-0 5) 17 B.13 Ac e ta i ty of Electronic As embl es (IPC-HDBK-610) 18 B.14 Guidel nes for Desig , Selection an Ap l cation of Conformal Co tin s (IPC-HDBK-8 0) 18 B.15 Solder mask Han b o (IPC-HDBK-8 0) 18 B.16 Guidel nes an Req irements for Electrical Testin of Unp pulated Printed Bo rd (IPC-9 5 ) 19 B.17 In-Proces DPMO an Estimated Yield for PCAs (IPC-9 61A) 19 B.18 As embly Solderin Proces Guidel ne for Electronic Comp nents (IPC-9 0 PWB) 20 B.19 Users Guide for IPC-TM-6 0, Method 2.6.2 , Thermal Stres , Con ection Reflow As embly Simulation (IPC-9 31) 2

B.2 Hig Temp rature Printed Bo rd Flatnes Guidel ne (IPC-9 41) 2

B.21 User Guide for the IPC-TM-6 0, Method 2.6.2 , Con u tive Anodic Fi ament

B.2 Mec anical Shock Test Guidel nes for Solder Joint Rel a i ty (IPC-JEDEC

-9 0 ) 21

B.2 Printed Circ it As embly Strain Gage Test Guidel ne (IPC-JEDEC-9 0 A) 2

Bibl ogra h 2

Ta le 1 – Stu ent’s t distribution 1

Ta le A.1 – General test method for materials an as embl es 13

INTERNATIONAL ELECTROTECHNICAL COMMISSION

STRUCTURES AND ASSEMBLIES –

Part 5-1: General test methods for materials and assembl es –

Guidance for printed board assembl es

1) Th Intern tio al Ele trote h ic l Commis io (IEC) is a worldwid org nizatio for sta d rdizatio c mprisin

al n tio al ele trote h ic l c mmite s (IEC Natio al Commite s) Th o je t of IEC is to promote

intern tio al c -o eratio o al q estio s c n ernin sta d rdizatio in th ele tric l a d ele tro ic fields To

this e d a d in a ditio to oth r a tivities, IEC p blsh s Intern tio al Sta d rds, Te h ic l Sp cific tio s,

Te h ic l Re orts, Pu lcly Av ia le Sp cific tio s (PAS) a d Guid s (h re fer refer e to as “IEC

Pu lc tio (s)”) Th ir pre aratio is e truste to te h ic l c mmite s; a y IEC Natio al Commite intereste

in th su je t d alt with ma p rticip te in this pre aratory work Intern tio al g v rnme tal a d n

n-g v rnme tal org nizatio s laisin with th IEC also p rticip te in this pre aratio IEC c la orates closely

with th Intern tio al Org nizatio for Sta d rdizatio (ISO) in a c rd n e with c n itio s d termin d b

a re me t b twe n th two org nizatio s

2) Th formal d cisio s or a re me ts of IEC o te h ic l maters e pres , as n arly as p s ible, a intern tio al

c nse sus of o inio o th rele a t su je ts sin e e c te h ic l c mmite h s re rese tatio from al

intereste IEC Natio al Commite s

3) IEC Pu lc tio s h v th form of re omme d tio s for intern tio al use a d are a c pte b IEC Natio al

Commite s in th t se se Whie al re so a le eforts are ma e to e sure th t th te h ic l c nte t of IEC

Pu lc tio s is a c rate, IEC c n ot b h ld resp nsible for th wa in whic th y are use or for a y

misinterpretatio b a y e d user

4) In ord r to promote intern tio al u iformity, IEC Natio al Commite s u d rta e to a ply IEC Pu lc tio s

tra sp re tly to th ma imum e te t p s ible in th ir n tio al a d re io al p blc tio s An div rg n e

b twe n a y IEC Pu lc tio a d th c resp n in n tio al or re io al p blc tio sh l b cle rly in ic te in

th later

5) IEC itself d es n t pro id a y atestatio of c nformity In e e d nt c rtific tio b dies pro id c nformity

as es me t servic s a d, in some are s, a c s to IEC marks of c nformity IEC is n t resp nsible for a y

servic s c rie o t b in e e d nt c rtific tio b dies

6) Al users sh uld e sure th t th y h v th latest e itio of this p blc tio

7) No la i ty sh l ata h to IEC or its dire tors, emplo e s, serv nts or a e ts in lu in in ivid al e p rts a d

memb rs of its te h ic l c mmite s a d IEC Natio al Commite s for a y p rso al injury, pro erty d ma e or

oth r d ma e of a y n ture wh tso v r, wh th r dire t or in ire t, or for c sts (in lu in le al fe s) a d

e p nses arisin o t of th p blc tio , use of, or rela c u o , this IEC Pu lc tio or a y oth r IEC

Pu lc tio s

8) Ate tio is drawn to th Normativ refere c s cite in this p blc tio Use of th refere c d p blc tio s is

in isp nsa le for th c re t a plc tio of this p blc tio

9) Ate tio is drawn to th p s ibi ty th t some of th eleme ts of this IEC Pu lc tio ma b th su je t of

p te t rig ts IEC sh l n t b h ld resp nsible for id ntifyin a y or al su h p te t rig ts

International Stan ard IEC 61 8 -5-1 has b en pre ared by IEC tec nical commite 91:

Electronic as embly tec nolog

The text of this stan ard is b sed on the fol owin doc ments:

Ful information on the votin for the a proval of this stan ard can b fou d in the re ort on

votin in icated in the a ove ta le

A l st of al p rts in the IEC 61 8 series, publ s ed u der the general title Test meth ds for

ele ctrical m aterials, printed b oards a d oth rinterco n cto structure s a das emb lies, can

b fou d on the IEC we site

The commit e has decided that the contents of this publ cation wi remain u c an ed u ti

the sta i ty date in icated on the IEC we site u der "htp:/we store.iec.c " in the data

related to the sp cific publ cation At this date, the publ cation wi b

• reconfirmed,

• with rawn,

• re laced by a revised edition, or

• amen ed

IEC 61 8 relates to test method for printed b ard an printed b ard as embl es, as wel as

related materials or comp nent ro u tnes , ir esp ctive of their method of man facture

The stan ard is divided into se arate p rts, coverin information for the desig er an the test

methodolog en ine r or tec nician Eac p rt has a sp cific foc s Method are group d

ac ordin to their a pl cation an n mb red seq ential y as they are develo ed an rele sed

In some in tan es test method develo ed by other tec nical commit e s ( or example, TC

10 ) have b en re rod ced from existin IEC stan ard in order to provide the re der with a

comprehen ive set of test method When this situation oc urs, it wi b noted on the sp cific

test method If the test method is re rod ced with minor revision , those p ragra h that are

dif erent are identified

This p rt of IEC 61 8 contain test method for evaluatin printed b ard as embl es as wel

as materials u ed in the man facture of electronic as embles The method are self

contained, with s ficient detai an des ription so as to ac ieve u iformity an re rod cibi ty

in the proced res an test methodologies

It was decided by TC 91 that the contents of IEC 61 8 -5 an IEC 61 8 -6 b merged into a

series of doc ments in the fol owin way:

IEC 61 8 -5-1, Test meth ds for electrical materials, p rinted b oards a d oth r

interco ne cto structures a d as emb lie s – Part 5-1: G en ral te st meth ds formaterials a d

as emb lies – G u ida ce for p rinted b oard as emb lie s

IEC 61 8 -5-2:2 15, Test meth ds for e le ctrical mate rials, p rinted b oards a d oth r

interco n cto structure s a d as e mb lies – Part 5-2: Gene ral test meth ds formaterials a d

as emb lie s – Solde rin flux for p rinted b oard as emb lie s

IEC 61 8 -5-3:2 15, Test meth ds for electrical materials, p rinted b oards a d oth r

interco ne cto structures a d as emb lie s – Part 5-3: G en ral te st meth ds formaterials a d

as emb lies – Solderin p ste for p rinted b oard as emb lies

IEC 61 8 -5-4:2 15, Test meth ds for e le ctrical mate rials, p rinted b oards a d oth r

interco n cto structure s a d as e mb lies – Part 5-4: Gene ral test meth ds formaterials a d

as emb lie s – Solde r alo s a d fluxed a d n n-fluxed sold wire for p rinted b oard as emb lie s

IEC 61 8 -5-5 1:—, Te st meth ds for ele ctrical mate rials, p rinted b oards a d oth r

interco n cto structure s a d as e mb lie s – Part 5-50 1: G en ral te st meth ds for mate rials

a d as emb lie s – Surface insulato resista ce (SIR) te stn of solde r fluxes

1

IEC 61 8 -5-5 2:—, Test meth ds for electrical materials, p rinted b oards a d oth r

interco ne cto structures a d as emb lies – Part 5-50 2: G e neral test m eth ds formaterials

a d as emb lies – SIR testn of as emb lies

1

IEC 61 8 -5-5 3:—, Test meth ds for electrical materials, p rinted b oards a d oth r

interco ne cto structures a d as emb lies – Part 5-50 3: G e neral test m eth ds formaterials

a d as emb lies – Conductv An dic Fiame nts (CAF) te stn of circu it b ard

1

IEC 61 8 -5-5 4:—, Test meth ds for ele ctrical mate rials, p rinted b oards a d oth r

interco n cto structure s a d as e mb lie s – Part 5-50 4: G ene ral te st meth ds formaterials

a d as emb lie s – Proce ss io ic co tamin to te stn

1

The tests s own in this stan ard are group d ac ordin to the fol owin prin iples:

P: pre aration/con itionin method

V: vis al test method

D: dimen ional test method

C: c emical test method

M: mec anical test method

E: electrical test method

N: en ironmental test method

X: mis el ane u test method in lu in proces control tests for the as embly proces

To faci tate referen e to the tests, to retain con isten y of presentation an to provide for

future exp n ion, e c test is identified by a n mb r (as ig ed seq entialy) ad ed to the

prefix (group code) let er s owin the group to whic the test method b lon s

The test method n mb rs have no sig ifican e with resp ct to an eventual test seq en e

This resp n ibi ty rests with the relevant sp cification that cal s for the method b in

p rformed The relevant sp cification, in most in tan es, also des ribes p s / ai criteria

The leter an n mb r combination are for referen e purp ses to b u ed by the relevant

sp cification Th s, "5-2C01 re resents the first c emical test method des rib d in

TEST METHODS FOR ELECTRICAL MATERIALS,

STRUCTURES AND ASSEMBLIES –

Part 5-1: General test methods for materials and assembl es –

Guidance for printed board assembl es

1 Sc pe

This p rt of IEC 61 8 is a catalog e of test method re resentin methodologies an

proced res that can b a pl ed to test printed bo rd as embl es

This p rt of IEC 61 8 contain the typ s of content of the IEC 61 8 -5 series, as wel as

g idan e doc ments an han b o s for printed b ard as embles

The folowin doc ments are refer ed to in the text in s c a way that some or al of their

content con titutes req irements of this doc ment For dated referen es, only the edition

cited a pl es For u dated referen es, the latest edition of the referen ed doc ment (in lu in

an amen ments) a pl es

There are no normative referen es in this doc ment

3 Ac urac , precision a d res lution

Me s rement er ors an u certainties are in erent in al me s rement proces es The

information given b low ena les val d estimates of the amou t of er or an u certainty to b

ta en into ac ou t

Test data serve a n mb r of purp ses whic in lu e

• monitorin of a proces ;

• en an in of confiden e in q al ty conforman e;

• arbitration b twe n c stomer an s p l er

In an of these circ mstan es, it is es ential that confiden e can b placed up n the test data

in terms of

• ac urac : cal bration of the test in truments an /or s stem;

• precision: the re e ta i ty an u certainty of the me s rement;

• resolution: the s ita i ty of the test in trument an /or s stem

3.2 Ac ura y

The regime by whic routine calbration of the test eq ipment is u derta en s al b cle rly

stated in the q al ty doc mentation of the s p l er or agen y con u tin the test an s al

The cal bration s al b con u ted by an agen y havin ac reditation to a national or

international me s rement stan ard in titute There s ould b an u inter upted c ain of

cal bration to a national or international stan ard

Where cal bration to a national or international stan ard is not p s ible, rou d-ro in

tec niq es may be u ed an doc mented to en an e confiden e in me s rement ac urac

The cal bration interval s al normal y b one ye r Eq ipment con istently fou d to b

outside ac e ta le l mits of ac urac s al b s bject to s ortened cal bration intervals

Eq ipment con istently fou d to b wel within ac e ta le l mits may b s bject to relaxed

cal bration intervals

A record of the cal bration an maintenan e history s al b maintained for e c in trument

These record s ould state the u certainty of the cal bration tec niq e (in ±% deviation) in

order that u certainties of me s rement can b ag regated an determined

A proced re s al b implemented to resolve an situation where an in trument is fou d to b

outside calbration l mits

3.3 Pre ision

The u certainty bu get of an me s rement tec niq e is made up of b th s stematic an

ran om u certainties Al estimates s al b b sed up n a sin le confiden e level, the

minimum b in 9 %

Sy tematic u certainties are u ual y the predominant contributor an wi in lu e al

u certainties not s bject to ran om flu tuation These in lu e

• cal bration u certainties;

• er ors d e to the u e of an in trument u der con ition whic dif er from those u der

whic it was calbrated;

• er ors in the grad ation of a s ale of an analog e meter (s ale s a e er or)

Ran om u certainties res lt from n merou sources but can b ded ced from re e ted

me s rement of a stan ard item Therefore, it is not neces ary to isolate the in ivid al

contribution These may in lu e

• ran om flu tuation s c as those d e to the variation of an influen e p rameter

Typicaly, c an es in atmospheric con ition red ce the re e ta i ty of a me s rement;

• u certainty in dis rimination, s c as set in a p inter to a fid cial mark or interp latin

b twe n grad ation on an analog e s ale

Ag regation of u certainties: Ge metric ad ition (ro t s m-s uare) of u certainties may b

u ed in most cases An interp lation er or is normal y ad ed se arately an may be ac e ted

as b in 2 % of the diferen e b twe n the finest grad ation of the s ale of the in trument

i2

r2

st

+)+(

Determination of ran om u certainties: Ran om u certainty can b determined by re e ted

me s rement of a p rameter an s bseq ent statistical manipulation of the me s red data

The tec niq e as umes that the data ex ibits a normal (Gau sian) distribution

t is the p rcentage p int of the t distribution as s own in Ta le 1;

σ is the stan ard deviation (σ

n–1

3.4 Re olution

It is p ramou t that the test eq ipment u ed is ca a le of s ficient resolution Me s rement

s stems u ed s ould b ca a le of resolvin 10 % (or b t er) of the test l mit toleran e

It is ac e ted that some tec nologies wi place a ph sical l mitation up n resolution ( or

example, o tical resolution)

e) an estimate of me s rement u certainty an res ltant workin l mit s) for the test;

f the detai ed test res lts;

g) the test date an o erators’ sig ature

3.6 Stude t’s t distribution

Ta le 1 gives values of the factor t for 9 % an 9 % confiden e levels, as a fu ction of the

Table 1 – Stud nt’s t distribution

t Microsection: ± 2 µm

u) Ionic contamination: ± 10 %

4 Catalogue of approved test methods

This stan ard provides sp cific test method in complete detai to p rmit implementation with

minimal cros -referen in to other sp cific proced res The u e of generic con itionin

exp s res is ac ompl s ed in the method by referen e, for example, to those des rib d in

IEC 61 8 -1 an IEC 6 0 8-1, an , when a pl ca le, is a man atory p rt of the test method

stan ard

Eac method has its own title, n mb r an revision statu to ac ommodate updatin an

improvin the method as in u try req irements c an e or deman new methodolog The

method are organized in test method groups an in ivid al tests

5 List of contents of the IEC 61 89-5 serie

The typ s of content of existin an plan ed stan ard in the IEC 61 8 -5 series is des rib d

in An ex A

Annex A

(informative)

Tests

Ta le A.1 gives a s mmary of the existin tests an of the tests u der develo ment

Table A.1 – Ge eral te t method for materials a d a s mbl e

5-2C0 Qu ntitativ d termin tio of h ld c nte t in flu es (c lorid a d bromid )

5-2C0 Qu ltativ a alysis of flu rid s a d flu es b sp t test

5-2C0 Qu ntitativ d termin tio of flu rid c n e tratio in flu es

IEC 61 8 -5-3 X: Misc la e us test meth ds

5-3X01 Paste flu visc sity – T-Bar spin le meth d

5-3X0 Spre d test, e tra te sold r flu , p ste flu a d sold r p ste

5-3X0 Sold r p ste visc sity – T-Bar spin spin lemeth d (a plc ble f or 3 0 Pa•s to

1 6 0 Pa•s)

5-3X0 Sold r p ste visc sity – T-Bar spin le meth d (a plc ble to 3 0 Pa•s)

5-3X0 Sold r p ste visc sity – Spiral p mpmeth d (a plc ble f or 3 0 Pa•s to

5-3X12 Sold r p wd r p rticle size distrib tio – Me surin microsc p meth d

5-3X13 Sold r p wd r p rticle size distrib tio – Optic l ima e a alyser meth d

5-3X14 Sold r p wd r p rticle size distrib tio – Me surin laser difra tio meth d

5-3X15 Determin tio of ma imum sold r p wd r p rticle size

5-3X16 Sold r p ste metal c nte t b weig t

IEC stan ard De ignatio Te t

IEC 61 8 -5-4 C: Ch mic l test meth ds

5-4C01 Determin tio of th p rc nta e of flu o /in flu -c ate a d/or flu -c re

sold r

X: Me h nic l test meth ds

5-4X01 Spre d test, e tra te c re wires or preforms

5-4X0 Spitin test of flu -c re wire sold r

electrical con ection , as lon as the method u ed wi prod ce completed solder joints

conformin to the ac e ta i ty req irements of the IPC-J-STD-0 1

This han b o des rib s materials, method , an verification criteria that, when a pl ed as

recommen ed or req ired, wi prod ce q al ty soldered electrical an electronic as embles

The intent of this han b o is to explain the ‘ how- o,’ the ‘wh ,’ an fu damentals for these

proces es, in ad ition to implementin control over proces es rather than de en in on en

-item in p ction to determine prod ct q al ty

B.3 Guidel nes for Electrical y Conductive Surface Mount Adhesive (IPC-340 )

This doc ment covers g idel nes for selectin electrical y con u tive ad esives for u e in

as embly of comp nents to printed circ it b ard (PCB) or simi ar wirin inter-con ect

s stems The foc s is on the u e of ad esives as solder alternatives The proces dis u sion

at empts to stay within the b u d of the existin solder as embly infrastru ture as mu h as

p s ible Both major typ s of ad esives, isotro ic (con u tin eq al y in al direction ) an

anisotro ic (u idirectional con u tivity), are covered The two major division of p lymer

ad esives, thermosets an thermo lastic , are des rib d

B.4 Users Guide for Cleanl ness of Unpopulate Printed Boards (IPC-5 01)

If you are in the electronic in u try, so ner or later you have to, wi , or s ould de l with the

is ue of the cle nl nes of the u p pulated printed circ it b ard (b re b ard ) Resid es on

circ it b ard are directly related to the rela i ty of the prod ced hardware an can res lt in

seriou fai ures if not monitored an control ed

This doc ment is the prod ct of the IPC Bare Bo rd Cle nl nes As es ment Task Group an

was drafed to provide in ivid als who de l with these is ues some g idan e on how the

is ues s ould b a pro c ed an sp cified in purc ase doc ments

B.5 Guidel nes for OEM’s in Determining Acce table Levels of Cleanl ne s of

Unpopulated Printed Boards (IPC-5702)

Every electronic man facturer, whether an original eq ipment man facturer (OEM) or

contract man facturer (CM), wi b faced with determinin if the u p pulated printed b ard

u ed in the finis ed as embly have an adeq ate level of cle nl nes The q estion of ‘ how

cle n is cle n enou h’ has b en ask d re e tedly in the last decade in man IPC commite s

This is a very complex to ic, with man critical con ideration For this re son there is not an

u iq e methodolog that determines ac e ta i ty This doc ment was develo ed as g idan e

IPC-5 01 covers man asp cts of how cle nlnes is me s red on printed b ard , as wel as

man critical factors to con ider when sp cifyin b ard cle nl nes in purc asin doc ments

This referen e, an as ociated tec nical pa ers, s ow the man inadeq acies of c r ent test

methodologies, as wel as explainin wh there are no ‘ golden n mb rs’ for cle nlnes

What is ac e ta ly cle n for one segment of the in u try may b u ac e ta le for more

deman in segments of the in u try (e.g medical or a rosp ce)

B.6 Surfac Insulation Resistance Handbook (IPC-9201)

This doc ment is inten ed to cover the bro d sp ctrum of temperature-h midity (TH) testin ,

as ociated terminolog , an s g ested tec niq es for pro er s rface in ulation resistan e

testin as defined in IEC 61 8 -5-5, Test Method 5E01 an 5E0

B.7 Material a d Proces Characterisation / Qual fication Test Protocol for

Ass ssing Electroc emical Performa ce (IPC-9202)

This material an proces c aracterization/q al fication test record c an es in s rface

in ulation resistan e (SIR) on a re resentative sample of a printed circ it as embly (PCA) It

q antifies an deleteriou efects that mig t arise from solder flu or other proces resid es

lef on external s rfaces afer solderin , whic can cau e u wanted electro-c emical

re ction that gros ly afect rela i ty

It u es test vehicles that are inten ed to b re resentative of the electronic circ its that are in

prod ction It is a test yieldin b th q antitative an q al tative data

This test may b u ed for Proces Qu alficato , demon tratin that a pro osed man facturin

proces or proces c an e can prod ce hardware with ac e ta le en -item p rforman e

related to cle nl nes Chan es may in olve an as embly proces ste , or a c an e in the

printed b ard s p l er, solder mask or metal zation, solderin material s p l er, conformal

co tin , etc The test vehicle con tru tion wi vary de en in up n the typ of c an e b in

evaluated

B.8 User Guide for the IPC/IEC B52 Proce s Qual fic tion Te t Vehicle

(IPC-9203)

The electronic man facturin proces is of en very complex, with dozen of varia les that

imp ct the q al ty an rela i ty of the man factured as embl es in the en u e en ironment

Two of the imp rtant varia les for con ideration are the kin s of resid es that remain on the

electronic as embly an the ef ects that these resid es have on rel a i ty These two

varia les are most of en refer ed to in dis u sion on as embly “cle nlnes ”

Whi st there are several diferent way to me s re resid es an their efects on electrical

p rforman e, the two most common a pro c es in the in u try are ionic cle nl nes testin ,

for determination of ionic resid es, an s rface in ulation resistan e (SIR) testin , for the

evaluation of electroc emical faiures in humid en ironments

This doc ment foc ses on the IPC-B-5 stan ard test as embly an how it is u ed as an

evaluation to l for electronic man facturin proces es from a “cle nl nes ” p rsp ctive

B.9 PWB Assembly Soldering Proc ss Guidel ne for Ele tronic Components

(IPC-95 2)

This doc ment des rib s man facturin solder proces lmits that components s bjected to

IPC-9 01, IPC-9 0 , IPC-9 0 an J-STD-0 0 would s rvive It do s not in lu e o timum

This doc ment a ples to b th s rface-mou t (SM) an throu h-hole (TH) comp nents that

are wave soldered, reflowed or han soldered This doc ment is inten ed to complement

other in u try doc ments, lsted in a pl ca le doc ments

B.10 Aqueous Post Solder Cleaning Handbook (IPC-AC-62A)

This han b o ad res es aq e u cle nin of electrical/electronic p rts an a pl cation to ls

af er solderin

The content of the text is inten ed to provide a b sic u derstan in of the s bject an to

serve as a g ide to u ers or prosp ctive u ers of aq e u cle nin tec nolog , al owin

selection or improvement of aq e u cle nin proces es

B.11 Guidel nes for Cle ning of Printed Boards and Assembl es (IPC-CH-65A)

This man al is a ro d ma for c r ent an develo in cle nin is ues, rather than to fu ction

as a hig ly detai ed doc ment for al are s tou hed up n In are s of cle nin where recent

detai ed IPC man als alre d exist, the relevant section in IPC-CH-6 A wi contain only

s f icient information to ma e the re der re sona ly knowled e ble This g idel ne manual

refers the re der to a pro riate existin IPC doc ments (where they exist for in-de th

information on the p rtic lar s bject An example of s c a referen e IPC man al is IPC-AC

-6 , Aqu e ous Cle nin Ha db oo It is only where existin IPC doc ments are not avaia le

that IPC-CH-6 A wi exp n information b yon the b sic in order to cover what is c r ently

known a out the s bject A b nefit of this a pro c is that the man al do s not b come

u wield an ten s to foster a u er- rien ly en ironment

Both b re b ard fa rication an as embly cle nl nes is ues are ad res ed The fa rication

an as embly section are se arated for e se of ac es In the original IPC-CH-6 , these

section were very mu h intertwined However, it was recog ized that for a s bject s c as

the req ired cle nl nes of finis ed b re b ard , b sicaly red n ant te c in s are req ired

for b th the fa rication an as embly section

B.12 Handbook (IPC-J-STD-005)

This han b o is a comp nion to the solder p ste stan ard J-STD-0 5 an s ould b

con idered to b a g ide to help as es the a pl ca i ty of a solder p ste for its u e in

s rface-mou t tec nolog (SMT) proces es This doc ment also s g ests some test method

that can help with desig in an testin solder p stes It is inten ed for u e by b th ven ors

an u ers of solder p ste

Solder p stes are u iq e materials, whose p rforman e in a s rface-mou t proces de en s

on a variety of varia les, man of them interactin J-STD-0 5 provides test method for

clas ification of solder p ste b sed on the u e of a variety of testin tec niq es However,

these solder p ste clas ification do not have a direct cor elation to identify the typ an

c aracteristic of a sp cific solder p ste that is ne ded in an given SMT as embly proces

This doc ment has b en writen as a g ide to as es the a pl ca i ty of a solder p ste for a

sp cific proces , given the tremen ou n mber of p rmutation of diferent materials,

atmospheres an proces varia les c r ently avai a le

Where a pro riate, referen es are given to p p rs an doc ments with further information

Due to the s e r n mb r of p s ible interactin factors, sp cific solder p ste selection criteria

can ot b given The solder p ste selected an the as embly proces u ed wi ne d to form

solder con ection that me t the req irements of in u try stan ard s c as J-STD-0 1

B.13 Acc ptabi ity of Electronic As embl es (IPC-HDBK-610)

This han b o is a comp nion referen e to IPC-A-610C an IPC-A-610C Amen ment 1 an

was pre ared u in them The amendment provides ad itional criteria an clarification

statements The amen ment is in lu ed with this han b o fol owin Ap en ix C an can b

downlo ded fre of c arge from the IPC we site at the fol owin lnk:

The intent of this han b o is to explain the tec nical rationale for selected ac e ta i ty,

proces in icator an defect criteria an to provide information regardin as embly

tec nolog Ad itional information is provided to give a bro der u derstan in of the proces

con ideration ne ded for the prod ction of ac e ta le hardware

B.14 Guidel nes for Design, Selection and Appl cation of Conformal Coatings

(IPC-HDBK-830)

Conformal co tin s are u ed in conju ction with printed circ it as embl es (PCAs) The

desig er an the u ers of conformal co tin s for electronic a pl cation s ould b aware of

the pro erties of variou typ s of conformal co tin s an their interaction with PCAs to

protect the PCAs in the en -u e en ironment for the desig -l fe of the PCA (or b yon ) This

doc ment has b en writen to as ist the desig ers an u ers of conformal co tin s in

u derstan in the c aracteristic of variou co tin typ s, as wel as the factors that can

modify those pro erties when the co tin s are a pl ed Un erstan in an ac ou tin for

these materials can en ure the rel a i ty an fu ction of electronic

The purp se of this han b o is to as ist the in ivid als who either ma e c oices regardin

conformal co tin or who work in co tin o eration This han b o re resents the compi ed

knowled e an exp rien e of the IPC Conformal Co tin Han b o Task Group It is not

enou h to u derstan the pro erties of the variou conformal co tin s The u er ne d to

u derstan what is to b ac ieved by a plyin the conformal co tin an how to verify that

the desired res lts have b en re l zed

B.15 Solder ma k Ha dbook (IPC-HDBK-840)

Solder masks are p rmanent protective co tin s that p rform a n mb r of fu ction d rin

the fa rication, as embly an en u e of printed circ its One of the main purp ses of solder

mask is to protect the circ itry from interactin with solder d rin the as embly proces A

solder mask’s jo is ’t solely restricted to the solder o eration however, as it also helps to

protect the laminate, holes an traces from col ectin contaminants an from degradin

d rin the service l fe of the circ it It also acts as an in ulator of known dielectric pro erty

b twe n comp nents an traces

The main req irements of the solder mask (as a material q al fication) are tested within the

IPC-SM-8 0 However, in re sin tec nical diversification cre ted further testin ne d Not

every tec nical req irement is relevant for every a pl cation an th s these req irements wi

not b p rt of a general material q al fication These pro erties are u ual y req ired for

sp cific original eq ipment man facturer’s (OEM) a provals This solder mask han b o

provides the re der with the b ckgrou d knowled e to ma e an ed cated decision if sp cific

pro erties are req ired an how to test them It also provides sig ificant ed cational

information a out proces influen es

The purp se of this han b o is to provide ad itional s p ortin information for IPC-SM-8 0

regardin solder mask typ s, proces es, c aracteristic an pro erties in order to as ist with

the cor ect selection an u e of the most a pro riate material for the inten ed a plcation It

s ould b re d in conju ction with the solder mask man facturer’s tec nical information an

other solder mask sp cification doc ments, whic may b relevant, s c as those l sted in

B.16 Guidel nes and Re uirements for Electrical Testing of Unpopulated

Printed Boards (IPC-9 52)

This doc ment is presented to as ist in selectin the test analy er, test p rameters, test data,

an fixturin req ired to p rform electrical test s) on al u p pulated printed b ard without

emb d ed comp nents (i.e resistors, ca acitors, etc.)

The u ers s al determine the test p rameters an fixturin req irements to test for contin ity

(o en), isolation (le k ge/s ort , an other sp cial c aracteristic (i.e imp dan e, hip t,

ca acitan e, c r ent car yin ca acity, etc.) that wi satisfactori y evaluate the critical

electrical c aracteristic of sp cific printed b ard The testin levels l sted in this doc ment

define some of these p rameters

Electrical testin verifies that the printed networks on the b ard are intercon ected

ac ordin to desig req irements

Electrical test do s not en ure that the b ard can b as embled or that the b ard me ts al of

the c stomer’s req irements Man ph sical c aracteristic of the con u tors (dimen ional

ac urac , solder mask, con u tor ge metry an nomen lature registration, presen e of holes,

etc.) can’t b determined by electrical test Other c ecks s ould b employed to confirm these

c aracteristic

B.17 In-Proc ss DPMO and Estimated Yield for PCAs (IPC-9261A)

This doc ment defines stan ard methodologies for calc latin defects p r mi ion

o p rtu ities (DPMO) metric related to electronic printed b ard as embly proces es It is

inten ed for u e in me s rin in-proces as embly ste s rather than en prod ct

determination Calc lation of completed item DPMO is ad res ed in IPC-7 12

Ad itional y, a g ide to defect categorization is provided that when u ed with J-STD-0 1 an

IPC-A-610 can serve as a b se for s mmarizin an re ortin in-proces defects

Note that this doc ment do s not dictate the n mb r of as embl es or data p ints ne ded to

calc late DPMO metric

The purp se of this doc ment is to define con istent methodologies for computation of in

-proc s DPMO metric for an defect evaluation stage in the as embly proces

This o jective anticip tes the fol owin con ition in defect re ortin an analy is

• To faci tate proces improvement, defects dis overed at an stated in p ction or test

p int s ould b as ig ed to their a pro riate proces ste

• Al defects s al b re orted at the in p ction p int they are fou d, even thou h one

u detected previou defect may have cau ed the s bseq ent defects

• Regardles of how these defects are as ig ed, the defect s al b atributed to either a

comp nent, placement, termination or as embly defect

• The as umption is that e c printed b ard as embly that is in p cted wi b 10 %

in p cted for al defects

• The as umption of 10 % in p ction eficien y is made Care s ould b ta en when

comp rin proces es u in man al in p ction to those u in automated vision in p ction

• When u in a sampl n in p ction plan, the n mb r of PCAs in p cted determines the

B.18 Ass mbly Soldering Process Guidel ne for Electronic Compone ts

(IPC-95 2 PWB)

This doc ment des rib s man facturin solder proces lmits that comp nents s bjected to

IPC-9 01, IPC-9 0 , IPC-9 0 an J-STD-0 0 would s rvive It do s not in lu e o timum

con ition for as embly, but rather g ides to en ure comp nents are not damaged

This doc ment a ples to b th s rface-mou t (SM) an throu h-hole (TH) comp nents that

are wave soldered, reflowed or han soldered This doc ment is inten ed to complement

other in u try doc ments, lsted in a pl ca le doc ments

B.19 Users Guide for IPC-TM-65 , Method 2.6.27, Thermal Stres , Conv ction

Reflow As embly Simulation (IPC-9631)

The intention of this doc ment is to aid u ers of IPC-TM-6 0, Method 2.6.2 , The rmal Stre ss,

Co ve cto Reflow As emb ly Simulato This test method has b en develo ed b cau e

IPC-TM-6 0, Method 2.6.8, Th rmal Stres , Plated-Through Holes ( hermal stres by solder

flo t is no lon er con idered adeq ate for simulatin the as embly proces an stres es that

man prod cts now have to s p ort Over man ye rs the as embly proces has contin ed to

diverge from wave solderin , with the ad ition of to , an then b t om, s rface-mou t devices,

large BGA p ck ges where solder joints are hid en, an ever in re sin den ity of devices

whic in re se the thermal mas an thermal stres ne ded to melt solder, an more recently

the switc to hig er melt temp rature, le d- re solders In s mmary, ad in more an more

c cles of the Method 2.6.8 solder float was no lon er s f icient to s re n out printed b ard

that would then fai d rin as embly d e to the very dif erent thermal stres es en ou tered

This doc ment was develo ed by the IPC D-3 , Thermal Stres Test Method Subcommite ,

that develo ed IPC-TM-6 0, Method 2.6.2 , with the u derstan in that the test method wi

req ire sp cial eq ipment an the pro er set up an cal bration of that eq ipment

The IPC-TM-6 0, Method 2.6.2 , is inten ed to esta l s a relative a i ty of printed b ard ,

or re resentative coup n , to s rvive the thermal ex ursion as ociated with as embly an

rework in a tin/le d or le d- re a plcation u in a con ection oven, or alternate eq ipment

with the ca a i ty to matc the reflow profi e of a con ection oven The test embraces relative

ro u tnes of the co p r intercon ection an dielectric materials s bjected to the strain an

res ltin stres as ociated with a stan ardized thermal profi e The purp se is to esta l s an

o jective me s rement of relative ro u tnes rankin or comp rin varia les, or esta l s in

minimum rel a i ty req irements for co p r intercon ection an dielectric material in a

printed b ard The purp se of the test method is to provide the proced re for con itionin an

reflowin of the test sp cimen prior to evaluation for compl an e to the a pl ca le

p rforman e sp cification, i.e IPC-6 12, IPC-6 13, IPC-6 18, etc

The primary purp se of this doc ment is to ad res con ern an con ideration related to

IPC-TM-6 0, Method 2.6.2 This doc ment embraces how this test method was inten ed for

u e an the rationale b hin some of the protocols an req irements This doc ment

provides an adju ct doc ment that improves the u derstan in , a pl cation, an the

impl cation of res lts from u in this test method

B.20 High Temperature Printed Board Flatnes Guidel ne (IPC-9641)

Durin the s rface mou t as embly proces of an electronic p ck ge to a printed b ard

throu h a reflow temp rature profie, the flatnes b havior of b th the p ck ge an printed

b ard are critical for the integrity of solder joint formation an rel a i ty Whi e the deviation of

the p ck ge from planarity d rin this proces is critical, control n the printed b ard flatnes

is eq al y imp rtant for preventin s bseq ent as embly-related is ues, in lu in o en or

brid in joints, whic ultimately cau e prod ct fai ure Bo rd flatnes is largely driven by a

c an e in intrin ic pro erties throu h exp s re to c an es in temp rature, with the final

flatnes state b comin a fu ction of the entire temp rature history or reflow profi e an

b lan in The worst case deviation of the printed b ard from flatnes may b at ro m

temp rature, p a temp rature d rin reflow, or at an temp rature in b twe n Therefore,

printed b ard flatnes s al b c aracterized durin the entire reflow thermal c cle, an not

solely at ro m temp rature at the b gin in an en of the proces This doc ment aims to

provide g idan e on method an proced res for criticaly evaluatin printed b ard flatnes

d rin a simulated temp rature reflow c cle

The purp se of this test method is to me s re the s a e an relative c an e in s a e of a

local are of interest (e.g fl p-c ip b l grid ar ay (FCBGA) lan are ) of printed b ard

throu h a ran e of temp ratures typical d rin s rface-mou t an throu h-hole bui d of

integrated circ it p ck ges to printed b ard The u e of s a e me s rements an relative

c an es in s a e wi de en on the sp cific a plcation an interest of the u er p rformin

the me s rement This g idel ne dif ers from an do s not s p rsede IPC-TM-6 0, Method

2.4.2 , whic is u ed for in p ction of b w an /or twist of b re printed b ard at ro m

temp rature

B.21 User Guide for the IPC-TM-6 0, Method 2.6.25, Conductive Anodic

Fi ament (CAF) Re istance Test (Electrochemical Migration Testing) (IP

C-9691A)

This doc ment is the prod ct of the IPC Electroc emical Migration (ECM) Task Group It was

drafed to provide g idan e regardin how the IPC-TM-6 0, Method 2.6.2 , Con u tive

Anodic Fiament (CAF) Resistan e test can b st b u ed for evaluatin the ef ects of

mec anical stres , laminate material fracturin , ionic contamination, moisture content prior to

pres lamination, an other material proces in c aracteristic on con u tive anodic fi ament

(CAF) resistan e test method res lts This CAF test method provides a proven stan ard for

determinin the risk of temp rature, h midity an bias (THB) fai ure within rather than on the

s rface of printed circ it b ard (PCBs), typical y fi ament formation alon the b u dary

b twe n the resin an laminate reinforcement

B.22 Me hanic l Shock Test Guidel nes for Solder Joint Rel a i ity (IPC-JEDE

C-9703)

With the growth of electronic an the in re sed ac es ibi ty an p rta i ty, dro s ock an

other mec anical imp cts are in re sin ly a con ern This doc ment at empts to improve p st

mec anical s ock test method , an ties test con ition b ck to the u e-con ition A method

is pro osed s c that regardles of what level (s stem, b ard as embly, simpl fied sin le

comp nent b ard testin , etc.) of testin is con u ted, there s ould b a cor elation b ck to

the u e-con ition In order to fulfi this go l, ad itional metrologies are introd ced to aid in

these cor elation

Fol owin the req isite introd ctory section , the con e t of u e-con ition is introd ced an

s g estion are made on how u e-con ition data may b ac uired an a pl ed Next, the

testin method for fuly as embled s stems are introd ced Option for test con ition are

dis u sed an the data that s ould b col ected is outlned

Testin of s b s embles an comp nents imitate actual u e config ration les than the

testin of ful y as embled s stems However, the next two doc ment section outl ne

con ideration to en ure that testin car ied out at these levels remain relevant to the

inten ed u e-con ition

Sp cific metric to aid in cor elation are outl ned in Section 8 The informative an exes that

close the doc ment dis u s the common con ideration of al mec anical s ock testin

method These in lu e a sample re ortin format for test data, u e an a plcation of strain

gau es, ac elerometers, an hig sp ed photogra h A section on faiure analy is is given

Final y, a review of finite element method that may b a pl ed to mec anical s ock analy is

This doc ment esta l s es mec anical s ock test g idel nes to as es solder joint rel a i ty

of printed circ its

The thre main categories dis u sed within are the fol owin :

• method to define mec anical s ock u e-con ition ;

• method to define s stem level, s stem b ard level an comp nent test b ard level

testin that cor elate to the u e-con ition ;

• g idan e on the u e of experimental metrologies for mec anical s ock tests

B.23 Printed Circuit As embly Strain Gage Test Guidel ne (IPC-JEDEC-9704A)

This doc ment is me nt to b u ed as a methodolog for strain gau e placement an

s bseq ent testin of printed circ it as embl es (PCAs) u in strain gau es The method

des rib s sp cific g idel nes for strain gage testin of PCAs d rin the printed b ard

man facturin proces , in lu in as embly, test, s stem integration, an other typ s of

o eration that may in u e b ard flex re

The s g ested proced re enables printed b ard as emblers to con u t strain gau e testin

in e en ently, an provides a q antitative method for me s rin b ard flex re, an

as es in risk levels

The to ic covered in lu e:

• test setup an eq ipment req irements;

• strain me s rement

• re ort format

This doc ment as umes the methodolog is b in u ed to test a s rface-mou t device s c

as b l grid ar ay (BGA), smal outl ne p ck ge (SOP), c ip s ale (size) p ck ge (CSP), an

are -ar ay s rface-mou t (SMT) con ectors/sock ts In certain cases, the des rib d test

a pro c may b u ed for non-are -ar ay dis rete (SMT) devices s c as ca acitors or

resistors

Bibl ography

Intern tion l Sta d rds

IEC 6 0 8 (al p rts), En iro me ntal testn

IEC 6 0 8-1:2 13, En iro me ntal testn – Part 1: Gene ral a d gu ida ce

IEC 6 0 8-2-2 , En iro me tal testn – Part 2-20 : Tests – Te st T: Test meth ds for

solde rab il y a d resista ce to solderin h at ofde ices wih le ds

IEC 6 0 8-2-5 :2 15, En iro me ntaltestn – Part 2-5 : Tests – Test Td: Test meth ds for

solderab il y, re sista ce to dis olutio of metal zato a d to solde rin he at of surface

mou ntn de vice s (SMD)

IEC 61 8 -1, Te st meth ds for electrical mate rials, interco ne cto structures a d

as emb lie s – Part 1: G en ral test meth ds a d meth dolo y

IEC 61 8 -5 (al p rts), Te st meth ds forelectrical materials, interco ne cto structu res a d

as emb lies

IEC 61 8 -5, Test meth ds for ele ctrical materials, inte rco n cto structures a d

as emb lies – Part 5: Test meth ds for p rinted b oard as emb lies

IEC 61 8 -5-1:2 16, Te st meth ds for ele ctrical materials, p rinted b oards a d othe r

interco n cto structure s a d as emb lies – Part 5-1: G en ral test meth ds formaterials a d

as emb lies – G u ida ce for p rinted b oard as emb lie s ( his doc ment

IEC 61 8 -5-2:2 15, Test meth ds for electrical mate rials, p rinted b oards a d oth r

interco ne cto structures a d as e mb lie s – Part 5-2: G ene ral te st meth ds formate rials a d

as emb lies – Solde rin flux for p rinte d b oard as emb lies

IEC 61 8 -5-3:2 15, Test meth ds for electrical mate rials, p rinted b oards a d oth r

interco ne cto structures a d as emb lie s – Part 5-3: G en ral te st meth ds formaterials a d

as emb lies – Solderin p ste for p rinte d b oard as emb lies

IEC 61 8 -5-4:2 15, Te st meth ds for ele ctrical materials, p rinted b oards a d othe r

interco n cto structure s a d as e mb lies – Part 5-4: Gene ral test meth ds formaterials a d

as emb lie s – Solderalo s a d fluxe d a d n n-fluxed sold wire for p rinte d b oard as emb lies

IEC 6118 -5-5:—, Te st meth ds for electrical materials, p rinted b oards a d oth r

interco n cto structure s a d as em b lies – Part 5-5: XXX

2

IEC 61 8 -5-5 1:—, Test meth ds for ele ctrical mate rials, p rinted b oards a d oth r

interco n cto structure s a d as e mb lie s – Part 5-50 1: Ge ne ral te st meth ds formaterials

a d as emb lie s – Surface insulato re sista ce (SIR) testn of solder fluxes

2

IEC 61 8 -5-5 2:—, Te st meth ds for electrical mate rials, p rinted b oards a d oth r

interco ne cto structures a d as emb lies – Part 5-50 2: G e neral test m eth ds formaterials

a d as emb lies – SIR testn of as emb lies

2

IEC 61 8 -5-5 3:—, Te st meth ds for electrical materials, p rinted b oards a d oth r

interco n cto structure s a d as e mb lie s – Part 5-50 3: G en ral test m eth ds formate rials

a d as emb lies – Conductv An dic Fiame nts (CAF) te stn of circuit b ard

3

IEC 61 8 -5-5 4:—, Test meth ds for ele ctrical mate rials, p rinted b oards a d oth r

interco n cto structure s a d as e mb lies – Part 5-50 4: Gene ral te st meth ds formaterials

a d as emb lie s – Proce ss io ic co tamin to testn

3

IEC 61 8 -6 Test meth ds for electrical materials, interco ne cto structu res a d

as emb lies – Part 6: Te st meth ds formate rials used in ma u facturin ele ctro ic as emb lies

IEC 61 9 -1-1, Atachme t materials for electro ic as emb ly – Part 1-1: Re u ireme ts for

solde rin fluxes forhigh-qual y interco ne cto s in ele ctro ic as emb ly

IEC 61 9 -1-2, Atachme t materials for ele ctro ic as em b ly – Part 1-2: Re u ire me ts for

solder p stes forhig -qual y interco ne cto s in electro nic as emb ly

IEC 61 9 -1-3, Atachme t materials for ele ctro ic as em b ly – Part 1-3: Re u ireme ts for

electro ic grade solderalo s a d fluxed a d n n-fluxe d sold solders for ele ctro ic solderin

ap plcato s

IEC 612 9-2-7, Materials for p rinted b oards a d othe r interco n ctn structure s – Part 2-7:

Reinforced b ase materials clad a d unclad – Ep xide wo e E-glas lamin ted she et of

defin d flammab il y (v rtcal b u rnin test, cop pe r-clad

IEC 6 13 :2 0 , En iro me tal a d e dura ce testn – Test meth ds for surface-mount

b oards of are ara typ e p ack ge s FBGA, BG A, FLG A, LG A, SON a d QFN

ISO 5 2 -2, Ac uracy (truene ss a d p recisio ) of me sureme t me th ds a d re sults –

Part 2: Basic method forth determin to of re pe tabil y a d rep roducib il y ofa sta dard

me sureme t meth d

ISO 9 01, Qual y ma ageme t systems – Re uireme ts

ISO 9 5 -1, Soft solde rin fluxes – Te st meth ds – Part 1: Determin to of n n-v lat e

mater, gra imetric m eth d

ISO 9 5 -2, Soft solderin fluxes –Test meth ds – Part 2: Determin to of n n-v lat e

mate r, e b u llometric meth d

IPC doc me ts

IPC-J-STD-0 1, Re uirem ents for Solde re d Electrical a d Electro ic As emb lies Trainin

a d Certficato Program

IPC-J-STD-0 5, Re quirem ents for Solderin Pastes

IPC-J-STD-0 0, Moistu re/Reflow Sensi viy Clas ificato forNo he rmetc Sold State

Surface Mount D e vice s

IPC-JEDEC-9 0 , Mech nical Sh ck Test G u ideln s forSolder J int Relab il y

IPC-JEDEC-9 0 A, Printed Circu it As emb ly Strain G ag Te st G u ideln

IPC-HDBK-0 1, Ha db oo a d G u ide to Suppleme t J-STD-0 01

IPC-HDBK-610, Ac ep tab il y ofEle ctro ic As e mb lies

IPC-HDBK-8 0, Gu idelne s for Design, Selecto a d Ap plcato of Co formal Co tngs

IPC-HDBK-8 0, Solde r Mask Ha db oo

IPC-A-610, Ac e tab il y of Electro ic As emb lies Trainin a d Certficato Program

IPC-A-610C, Daco Clas 3 Electro ic As emb ly

IPC-AC-6 A, Aqu e ous Post Solde r Cle anin Ha db oo

IPC-CH-6 A, G u idelne s for Cle nin ofPrinte d Boards a d As emb lie s

IPC-SM-8 0, Qu alficato a d Pe rform ance Sp e cificato ofPe rma e nt Solde r Mask

IPC-TM-6 0, Te st Meth ds Ma u al

IPC-3 0 , G uideln s for Ele ctricaly Co ductv Surface Mount Adhe sive s

IPC-5 01, Users G u ide for Cle nlne ss ofUnp opulated Printed Bo rds

IPC-5 0 , G uideln s for OEM’s in D eterminin Ac e tab le Le vels of Cle anln s of

Unp opulated Printed Board

IPC-6 12, Qualficato a d Performa ce Sp ecificato for Rigid Printe d Boards

IPC-6 13, Qualficato a d Performa ce Sp ecificato for Fle xib le Printed Boards

IPC-6 18, Qualficato a d Performa ce Sp ecificato for High Fre uency (Microwa e )

Printed Bo rds

IPC-7 12, Calcu lato of D PMO a d Ma u facturin Indices for Printed Bo rd As emb lies

IPC-9 01, Surface Insulato Re sista ce Ha db oo

IPC-9 0 , Mate rial a d Proce ss Ch racte risato /Qualficato Test Protocol forAs es in

IPC-9 0 , Users G u ide to IPC-9 0 2 a d th IPC-B-5 Sta dard Test Ve hicle

IPC-9 5 , G uidelne s a d Re uireme ts for Electrical Testn of Unp opulated Printed

Boards

IPC-9 61A, IPC-B-5 , In-proces D PMO a d e stmated yield for PCAs

IPC-9 01, PWB As em b ly Proce ss Simu lato for Ev luato of Ele ctro ic Comp on nts

IPC-9 0 , PWB As emb ly Solderin Proce ss G u ideln for Electro ic Comp n nts

IPC-9 0 , Moisture Se nsi viy Clas ificato for No -C Comp n nts

IPC-9 0 , As embly Proces Simulation for Evaluation of Non IC Comp nents

IPC-9 31, Users Gu ide for IPC-TM-6 0 , Meth d 2.6.27, Th rmal Stres , Co v cto Reflow

As emb ly Simulato

IPC-96 1, Hig Temp erature Printed Board Flatne ss G u ide lin

IPC-96 1A, User G u ide for th IPC-TM-6 0 , Meth d 2.6.2 , Conductv An dic Fiame t

(CAF) Re sista ce Te st (Electroch mical Migrato Testn )

Al IPC doc ments are avai a le from IPC at 3 0 L k side Drive, Suite 3 9 S, Ban ock urn,

IL 6 015-12 9 Tel 8 7-615-710 or from the IPC we site: www.ipc.org

_ _ _ _ _