THE INVERTERS DIGITAL GATES Fundamental Parameters  Functionality  Reliability, Robustness  Area  Performance » Speed (delay) » Power Consumption » Energy Digital Integrated Circuits © Prentice Hall 1995 Introduction Introduction Noise in Digital Integrated Circuits V DD v(t) i(t) (a) Inductive coupling (b) Capacitive coupling (c) Power and ground noise Digital Integrated Circuits © Prentice Hall 1995 Introduction Introduction DC Operation: Voltage Transfer Characteristic V(x) V(y) V OH V OL V M V OH V OL f V(y)=V(x) Switching Threshold Nominal Voltage Levels V(y)V(x) Digital Integrated Circuits © Prentice Hall 1995 Introduction Introduction Mapping between analog and digital signals "1" "0" V OH V IH V IL V OL Undefined Region V(x) V(y) V OH V OL V IH V IL Slope = -1 Slope = -1 Digital Integrated Circuits © Prentice Hall 1995 Introduction Introduction Definition of Noise Margins V IH V IL Undefined Region "1" "0" V OH V OL NM H NM L Gate Output Gate Input Noise Margin High Noise Margin Low Digital Integrated Circuits © Prentice Hall 1995 Introduction Introduction The Regenerative Property (a) A chain of inverters. v 0 , v 2 , . v 1 , v 3 , . v 1 , v 3 , . v 0 , v 2 , . (b) Regenerative gate f(v) finv(v) finv(v) f(v) (c) Non-regenerative gate v 0 v 1 v 2 v 3 v 4 v 5 v 6 . Digital Integrated Circuits © Prentice Hall 1995 Introduction Introduction Fan-in and Fan-out N M (a) Fan-out N (b) Fan-in M Digital Integrated Circuits © Prentice Hall 1995 Introduction Introduction The Ideal Gate V in V out g= −∞ R i = ∞ R o = 0 Digital Integrated Circuits © Prentice Hall 1995 Introduction Introduction VTC of Real Inverter 0.0 1.0 2.0 3.0 4.0 5.0 V in (V) 1.0 2.0 3.0 4.0 5.0 V out (V) V M NM H NM L Digital Integrated Circuits © Prentice Hall 1995 Introduction Introduction [...]... Introduction © Prentice Hall 1995 Computing the Capacitances VDD VDD M2 Vin Cg4 Cdb2 Cgd12 M4 Vout M1 Cdb1 Cw Vout2 Cg3 M3 Interconnect Fanout Simplified Model Digital Integrated Circuits Vin Vout CL Introduction © Prentice Hall 1995 CMOS Inverters VDD PMOS 1.2µm =2λ Out In Metal1 Polysilicon NMOS GND Digital Integrated Circuits Introduction © Prentice Hall 1995 The Miller Effect Cgd1 ∆V Vout Vout ∆V Vin... Dissipation Digital Integrated Circuits Introduction © Prentice Hall 1995 CMOS INVERTER Digital Integrated Circuits Introduction © Prentice Hall 1995 The CMOS Inverter: A First Glance VDD Vin Vout CL Digital Integrated Circuits Introduction © Prentice Hall 1995 CMOS Inverters VDD PMOS 1.2µm =2λ Out In Metal1 Polysilicon NMOS GND Digital Integrated Circuits Introduction © Prentice Hall 1995 Switch Model of... Vin “A capacitor experiencing identical but opposite voltage swings at both its terminals can be replaced by a capacitor to ground, whose value is two times the original value.” Digital Integrated Circuits Introduction © Prentice Hall 1995 Computing the Capacitances Digital Integrated Circuits Introduction © Prentice Hall 1995 Impact of Rise Time on Delay 0.35 tpHL(nsec) 0.3 0.25 0.2 0.15 Digital Integrated . THE INVERTERS DIGITAL GATES Fundamental Parameters  Functionality  Reliability,. Circuits © Prentice Hall 1995 Introduction Introduction The Regenerative Property (a) A chain of inverters. v 0 , v 2 , . v 1 , v 3 , . v 1 , v 3 ,