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CHAPTER 9: OPERATIONAL AMPLIFIER cuu duong than cong...  Input impedance: large Output impedance: small  Input: symmetric cuu duong than cong...  Addition and subtraction circuits I

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CHAPTER 9:

OPERATIONAL AMPLIFIER

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Example

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 Characters of circuits depend on outside circuit structure, not the opamp itself

 Gain A V : very high, ideally ∞

 Zin: very large, ideally ∞

 Zout: very small, ideally 0

 Current entering the amp at either terminal:

extremely small, ideally 0

 Voltage out (when voltages into each other are equal): small, ideally 0

 Bandwidth: broad, ideally infinite cuu duong than cong com

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 Input: 2 inputs (positive and negative)

ground

source apply between 2 inputs

 Output: 1 or 2 outputs, typically 1 output

 Mode gain:

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 Input impedance: large

 Output impedance: small

 Input: symmetric

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 Addition and subtraction circuits

 Integration and differential circuits

 Multi-stages circuit

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 Advance applications

 Current-controlled voltage source

 Voltage-controlled current source

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Non-inverting fixed-gain amplifier

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Non-inverting fixed-gain amplifier

A = 1+R f /R 1 =101

V o =101V i

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Inverting fixed-gain amplifier

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Voltage subtraction with 1 amp

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Uni-gain (buffer) amplifier

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Voltage-controlled voltage source

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Voltage-controlled current source

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Current-controlled voltage source

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Current-controlled current source

 I o =I 1 (R 2 +R 1 cuu duong than cong com )/R 2

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Integration circuit

 V o =(V i /RC) 0 ƒ T V i (t)dt+V ou

t(t=0)

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Differential circuit

 V o =-RC dV i /dt

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 Low pass filter

 High pass filter

 Band pass filter

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1 st order low pass filter

 Cutoff frequency: f OH =1/(2 πR 1 C 1 )

 Voltage gain below cutoff freq: A v =1+R f /R G

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2nd order low pass filter

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1 st and 2 nd order high pass filter

 Cutoff frequency: f OL =1/(2 πR 1 C 1 )

 Voltage gain above cutoff freq: A v =1+R f /R G

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Band pass filter

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Multi-stages gain

A = A 1 *A 2 *A 3 cuu duong than cong com

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741 application-Light activated alerter

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12V battery monitor

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 Chapter 14: 1, 4, 9, 10, 12, 15, 17, 18

 Chapter 15: 1, 6, 8, 11, 14, 16, 17

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Maximum ratings

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 Short Circuit Protection

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Inside structure: Schematic

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-Biasing Current Sources

 Generates reference bias current through R 5

 The opAmp reference current is:

I ref =[V CC -V EB12 -V BE11 -(-V EE )]/R 5

 For V CC =V EE =15V and

V BE11 =V BE12 =0.7V, we have I REF =0.73mA

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Input Stage

 The differential pair, Q1 and Q2 provide the main input

 Transistors Q5-Q7 provide an active load for the input

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Input Stage:

DC Analysis - 1

 Assuming that Q10 and Q11 are matched, we can write the equation from the Widlar current source:

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Input Stage: DC Analysis -2

 From symmetry

we see that

I C1 =I C2 =I, and if the

npn is large, then I E3 =I E4 =I

 Analysis continues:

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Input Stage: DC Analysis -3

 Analysis of the active load:

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Second (Intermediate) Stage

 Transistor Q16 acts as

an emitter-follower giving this stage a high input resistance

 Capacitor Cc provides frequency compensation using the Miller

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Output Stage

 Provides the opAmp with a low output resistance

 Class AB output stage provides fairly high current load capabilities without hindering power dissipation

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Output Stage:

DC Analysis

 Q13a delivers a current of 0.25I REF , so we can say: I C23 =I E23 =0.25I REF =180 A

 Assuming V BE18 = 0.6V, then I R10 =15 A,

I E18 =180-15=165 A and I C18 =I E18 =165 A

 I C19 =I E19 =I B18 +I R10 =15.8 A

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Short Circuit Protection

These transistors are normally off

R 1 1

5 0 k

Q 2 4

Q 2 2

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