apple macbook k78 mlb 051 8871 r250

DESCRIPTION REFERENCE DES BOM OPTION QTY II NOT TO REPRODUCE OR COPY IT I TO MAINTAIN THIS DOCUMENT IN CONFIDENCETHE POSESSOR AGREES TO THE FOLLOWING: THE INFORMATION CONTAINED HEREIN I

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TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM

TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM

3 ALL CRYSTALS & OSCILLATOR VALUES ARE IN HERTZ.

1 ALL RESISTANCE VALUES ARE IN OHMS, 0.1 WATT +/- 5%.

I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE

II NOT TO REPRODUCE OR COPY IT

B

ECN REV

BRANCH

DRAWING NUMBERREVISION

THE INFORMATION CONTAINED HEREIN IS THE

2 ALL CAPACITANCE VALUES ARE IN MICROFARADS.

PAGE

NOTICE OF PROPRIETARY PROPERTY:

A

C D

B

APPD CK DESCRIPTION OF REVISION

K78 MLB SCHEMATIC

Schematic / PCB #’s

NUMBER, UL PCB MATERIAL DESIGNATION, 130-C TEMP RATING AND V-0 FLAME RATING.

PCB TO BE SILK-SCREENED WITH UL/CUL RECOGNITION MARK, MANUFACTURER’S UL FILE PCB, UL RECOGNIZED, MIN 130-C TEMP RATING AND V-0 FLAME RATING PER UL 796 & UL 94.

PRODUCT SAFETY REQUIREMENTS:

04/08/11

051-8871 2.5.0

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I TO MAINTAIN THIS DOCUMENT IN CONFIDENCETHE POSESSOR AGREES TO THE FOLLOWING:

BRANCHREVISION

DRAWING NUMBER SIZE

DR

SHEETPAGE TITLE

B

DISPLAYCONN

PG 16INTEL PCH

JTAG

U6620

PG 10

PG 29,30SANDYBRIDGE SFF

HEADPHONELINE IN

XDP CONN

RIGHT

64-Bit

PG 16MISC

MEMORYU3100,3230

PG 24HUB-2USBU2650

U1800

U2600USB

PG 24PWR

SMB_A U4900

MEMORY

U6100

PG 15 GPIO

PG 11

J4610PCH

PG 23

J4001

T29

1U9390DISPLAY PORT+

HDA

J4702CONN

CONN

FDI

PG 9FDI

PG 10CPU

TEMP SENSOR1G/2GB

EDP

LPCINTERNAL

SPEAKER

EFFECT

PG 51HALLJ6955

SMCSMB_BSA

DDR3-1066/1333MHZ

CONNWIRELESSX21

J5600

CONN

PG 47

CONNLPC+SPI

PG 48IPD FLEX

U6210SPEAKERAMP

PG 49

CONN

PG 50

EXT USBLEFTJ4610

PG 51

SYSTEMCLOCK

SSDCONN

PG 16

AUDIO CODEC

CAMERA+ALS

PG 7INTEL CPU

SYNC_DATE=12/11/2009

System Block Diagram

SYNC_MASTER=K6_MLB

2 OF 109 2.5.0 051-8871

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BRANCHREVISION

DRAWING NUMBER SIZE

DR

SHEETPAGE TITLE

P5V_3V3_SUS_EN

P3V3S3_EN

PG 17P5VS3_EN

P3V3S3_EN

DDRREG_ENDELAY

ALL_SYS_PWRGD

10-3 8

U7780(PAGE 60)Q7840

PP5V_S3_REG

PP5V_SUS_FETQ7810

(PAGE 36)

(PAGE 60)PM_SLP_S3_L

SMC_CPU_VSENSE

22-1

V

U7960ISL88042IRTEZV3MON

V2MON

R7962VDD

4 6

V4MON(PAGE 62)PP1V5_S3RS0_VMON

P17(BTN_OUT)

A

26 12

(R/H) VOUT1

PM_MEM_PWRGDCPU_PWRGD

30

10P15

R5330R5320

U7400

U7600EN

(PAGE 41)

SLP_S3_L(P93) SLP_S4_L(P94)

PVCCSA_EN

Q7830PGOOD

19 17

TPS22924

U7720PP3V3_S0

U5010(PAGE 42)

CPU

RSMRST_OUT(P15)

CPUIMVP_VR_ONPM_SYSRST_L

PP1V05_SUS_LDO

VOUTISL95870(PAGE 52)

(PAGE 9~15)VR_ON

ISL95870A(PAGE 54)PGOOD VID1

MAX15092GTLCPU VCORE

VLDOINPGOODG CPUIMVP_AXG_PGOOD

1.5V

0.75V

TPS51916U7300

CPUIMVP_PGOOD

SMC_GFX_VSENSEPPVCORE_S0_AXG_REG

26

R7350

A A

(PAGE 60)

1V05_S0_LDO_ENPP1V8_S0_REG

ACPUVCCIOS0_PGOOD

R7640

SMC_CPU_FSB_ISENSEPPCPUVCCIO_S0_REG

PPDDR_S3_REGDDRVTT_EN

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DESCRIPTION REFERENCE DES BOM OPTION QTY

BRANCHREVISION

DRAWING NUMBER SIZE

DR

SHEETPAGE TITLE

B

TABLE_BOMGROUP_ITEM

TABLE_BOMGROUP_ITEM TABLE_BOMGROUP_ITEM

BOM OPTIONS BOM NAME

BOM NUMBER

TABLE_BOMGROUP_HEAD

TABLE_BOMGROUP_ITEM TABLE_BOMGROUP_ITEM TABLE_BOMGROUP_ITEM TABLE_BOMGROUP_ITEM TABLE_BOMGROUP_ITEM TABLE_BOMGROUP_ITEM TABLE_BOMGROUP_ITEM TABLE_BOMGROUP_ITEM TABLE_BOMGROUP_ITEM

TABLE_BOMGROUP_ITEM TABLE_BOMGROUP_ITEM TABLE_BOMGROUP_ITEM

QTY

Bar Code Labels / EEEE #’s BOM Variants

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PART NUMBERALTERNATE FORPART NUMBER BOM OPTION REF DES COMMENTS:

BOM OPTIONS BOM GROUP

TABLE_BOMGROUP_HEAD

TABLE_BOMGROUP_ITEM

TABLE_ALT_ITEM

TABLE_ALT_ITEM TABLE_ALT_ITEM

TABLE_ALT_ITEM

BRANCHREVISION

DRAWING NUMBER SIZE

DR

SHEETPAGE TITLE

B

TABLE_ALT_ITEM TABLE_ALT_ITEM

2GB SIZE HYNIX

4GB

0

1

CFG 2 1 0

CFG 1

1 0 CFG 0

B A

1

DIE REV

0 0

CFG 3

1 0

Alternate Parts

FDMS0349 alt to RJK0305DPB

376S1018

Murata alt to Samsung

341T0355

U3690

BOOTROM_PROG,SMC_PROG,T29ROM:PROG,T29MCU:PROGK78_PROGPARTS

K78_DEVEL:ENG BKLT:ENG,BMON:ENG,XDP_CONN,XDP_CPU:BPM,XDP_PCH,LPCPLUS,VREFMRGN,S0PGOOD_ISL,S3_S0_LED,VCCIOISNS_ENG,AIRPORTISNS_ENG,HDDISNS_ENG,LCDBKLTISNS_ENG

LPCPLUS,XDP_CONN,XDP_PCHK78_DEVEL:PVT

DEVEL_BOM,SMC_DEBUG_YES,XDPK78_DEBUG:ENG

K78_DEBUG:PVT DEVEL_BOM,BKLT:PROD,BMON:PROD,SMC_DEBUG_YES,XDP,VREFMRGN_NOT

K78_DEBUG:PROD BKLT:PROD,BMON:PROD,SMC_DEBUG_YES,XDP,VREFMRGN_NOT,LPCPLUS,VCCIOISNS_PROD,AIRPORTISNS_PROD,HDDISNS_PROD,LCDBKLTISNS_PROD

DDR3:HYNIX_2GB DRAM_CFG0:L,DRAM_CFG1:L,DRAM_CFG2:L,DRAM_CFG3:L,DRAM_TYPE:HYNIX_2GB

DRAM_CFG0:L,DRAM_CFG1:H,DRAM_CFG2:L,DRAM_CFG3:L,DRAM_TYPE:SAMSUNG_2GBDDR3:SAMSUNG_2GB

DRAM_CFG0:H,DRAM_CFG1:H,DRAM_CFG2:H,DRAM_CFG3:L,DRAM_TYPE:ELPIDA_4GBDDR3:ELPIDA_4GB

DRAM_CFG0:L,DRAM_CFG1:H,DRAM_CFG2:H,DRAM_CFG3:L,DRAM_TYPE:SAMSUNG_4GBDDR3:SAMSUNG_4GB

333S0585 4 IC,SDRAM,1GBIT,DDR3-1333,78P FBGA,T-DIE,HYNIX U3000,U3010,U3020,U3030 CRITICAL

333S0586 4 DRAM_TYPE:HYNIX_4GB

IC,SDRAM,2GBIT,DDR3-1333,78P FBGA,B-DIE,HYNIX U3200,U3210,U3220,U3230

4333S0586 CRITICAL DRAM_TYPE:HYNIX_4GB

CRITICAL

4333S0590 IC,SDRAM,1GBIT,DDR3-1333,78P FBGA,V68A-D,MICRON U2900,U2910,U2920,U2930 DRAM_TYPE:MICRON_2GB

4333S0590 IC,SDRAM,1GBIT,DDR3-1333,78P FBGA,V68A-D,MICRON DRAM_TYPE:MICRON_2GB

CRITICAL U3200,U3210,U3220,U3230

4333S0590 IC,SDRAM,1GBIT,DDR3-1333,78P FBGA,V68A-D,MICRON DRAM_TYPE:MICRON_2GB

4333S0590 IC,SDRAM,1GBIT,DDR3-1333,78P FGBA,V68A-D,MICRON DRAM_TYPE:MICRON_2GB

4333S0589 IC,SDRAM,2GBIT,DDR3-1333,78P FBGA,C-DIE,ELPIDA U2900,U2910,U2920,U2930 CRITICAL DRAM_TYPE:ELPIDA_4GB

4333S0589 IC,SDRAM,2GBIT,DDR3-1333,78P FGBA,C-DIE,ELPIDA U3100,U3110,U3120,U3130 CRITICAL DRAM_TYPE:ELPIDA_4GB

ASSEMBLY,SUBASSY,PCBA,HALL EFFECT,K99

1607-6811 J6955 CRITICAL

IC,ISL6259,BATCHARGER,3%,4C4MM,QFN28

1353S2929 U7000 CRITICAL

DRAM_CFG0:L,DRAM_CFG1:L,DRAM_CFG2:H,DRAM_CFG3:L,DRAM_TYPE:HYNIX_4GBDDR3:HYNIX_4GB

DRAM_CFG0:H,DRAM_CFG1:L,DRAM_CFG2:L,DRAM_CFG3:L,DRAM_TYPE:MICRON_2GBDDR3:MICRON_2GB

IC,T29, FCBGA,PRQ 8x9MM

1337S4080

333S0585 4 DRAM_TYPE:HYNIX_2GB

CRITICAL

4333S0588 IC,SDRAM,2GBIT,DDR3-1333,78P FGBA,D-DIE,SAMSUNG U3100,U3110,U3120,U3130 DRAM_TYPE:SAMSUNG_4GB

CRITICAL

4333S0588 IC,SDRAM,2GBIT,DDR3-1333,78P FBGA,D-DIE,SAMSUNG U3200,U3210,U3220,U3230 DRAM_TYPE:SAMSUNG_4GB

CRITICAL

4333S0588 IC,SDRAM,2GBIT,DDR3-1333,78P FBGA,D-DIE,SAMSUNG U3000,U3010,U3020,U3030 DRAM_TYPE:SAMSUNG_4GB

CRITICAL U2900,U2910,U2920,U2930

4333S0588 IC,SDRAM,2GBIT,DDR3-1333,78P FBGA,D-DIE,SAMSUNG DRAM_TYPE:SAMSUNG_4GB

333S0587 IC,SDRAM,1GBIT,DDR3-1333,78P FBGA,G-DIE,SAMSUNG U3200,U3210,U3220,U3230 DRAM_TYPE:SAMSUNG_2GB

IC,SDRAM,1GBIT,DDR3-1333,78P FGBA,G-DIE,SAMSUNG U3100,U3110,U3120,U3130 CRITICAL

4333S0587 DRAM_TYPE:SAMSUNG_2GB

U3000,U3010,U3020,U3030

IC,SDRAM,1GBIT,DDR3-1333,78P FBGA,G-DIE,SAMSUNG

4333S0587 CRITICAL DRAM_TYPE:SAMSUNG_2GB

4 IC,SDRAM,1GBIT,DDR3-1333,78P FBGA,G-DIE,SAMSUNG U2900,U2910,U2920,U2930

333S0587 CRITICAL DRAM_TYPE:SAMSUNG_2GB

U3100,U3110,U3120,U3130

4333S0586 DRAM_TYPE:HYNIX_4GB

4333S0586 IC,SDRAM,2GBIT,DDR3-1333,78P FBGA,B-DIE,HYNIX DRAM_TYPE:HYNIX_4GB

333S0585 4 IC,SDRAM,1GBIT,DDR3-1333,78P FBGA,T-DIE,HYNIX U3200,U3210,U3220,U3230 CRITICAL DRAM_TYPE:HYNIX_2GB

SNB,QAM3,QS,J1,1.4,17W,2+2,1.05,3M,BGA

SNB,QAM2,QS,J1,1.5,17W,2+2,1.1,4M,BGA

Diodes alt to Toshiba ALL

376S0859 376S0977

353S3055 353S3312

337S4100

ALL FDMC0202S alt to RJK03E0DNS 376S0895

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BRANCHREVISION

DRAWING NUMBER SIZE

DR

SHEETPAGE TITLE

(Need to add 2 GND TPs)

FUNC_TESTMisc Voltages & Control Signals

(Need to add 5 GND TPs)

(Need 3 TPs)(Need 4 TPs)

FUNC_TESTJ4700: LIO Connector

(Need to add 1 GND TP)

FUNC_TEST

(Need 2 TPs)(Need 2 TPs)

J6950 and 1 for shield)(Need to add 4 GND TPs near

J6950: Battery ConnectorFUNC_TEST

I499 I500

I501 I502 I503 I504 I505 I506

I566 I567 I568

I569 I570 I571

SYNC_DATE=(02/16/2010)SYNC_MASTER=(K99_MLB)

Functional Test / No Test

TP_CLINK_RESET_L TP_CLINK_DATA

NC_PCI_CLK33M_OUT3

TRUE MAKE_BASE=TRUE

NC_PCIE_CLK100M_PEBP

TRUE MAKE_BASE=TRUE

NC_PCIE_CLK100M_PEBN

MAKE_BASE=TRUE

TRUE MAKE_BASE=TRUE

NC_HDA_SDIN2

MAKE_BASE=TRUE

TRUE MAKE_BASE=TRUE

NC_HDA_SDIN1

NC_PCH_LVDS_VBG

MAKE_BASE=TRUE TRUE

NC_LVDS_IG_CTRL_DATA

MAKE_BASE=TRUE TRUE

NC_LVDS_IG_CTRL_CLK

MAKE_BASE=TRUE TRUE MAKE_BASE=TRUE

NC_CRT_IG_VSYNC

TRUE

NC_CRT_IG_DDC_CLK

TRUE MAKE_BASE=TRUE

NC_CRT_IG_DDC_DATA

MAKE_BASE=TRUE TRUE

NC_CRT_IG_HSYNC

TRUE MAKE_BASE=TRUE

NC_CRT_IG_GREEN

TRUE MAKE_BASE=TRUE

NC_CRT_IG_BLUE

TRUE MAKE_BASE=TRUE TRUE MAKE_BASE=TRUE

NC_CRT_IG_RED

TRUE MAKE_BASE=TRUE

NC_SDVO_INTN

TRUE MAKE_BASE=TRUE

NC_SDVO_STALLN

MAKE_BASE=TRUE

TRUE MAKE_BASE=TRUE

NC_TP_XDP_PCH_OBSFN_D<0 1>

TRUE MAKE_BASE=TRUE

NC_TP_XDP_PCH_HOOK5

MAKE_BASE=TRUE

TRUE MAKE_BASE=TRUE

NC_PCH_GPIO66_CLKOUTFLEX2

TRUE MAKE_BASE=TRUE

NC_PCH_TP2 NC_PCH_TP3

NC_PCH_TP10

TRUE MAKE_BASE=TRUE

NC_PCH_TP12

TRUE MAKE_BASE=TRUE

NC_PCH_TP13

TRUE MAKE_BASE=TRUE

MAKE_BASE=TRUE

NC_PCH_TP15

TRUE MAKE_BASE=TRUE

NC_PCH_TP16

TRUE MAKE_BASE=TRUE

NC_PCH_TP18

TRUE MAKE_BASE=TRUE

NC_PCH_TP17

TRUE

NC_SATA_E_D2RP

TRUE MAKE_BASE=TRUE

NC_SATA_E_R2D_CN

TRUE MAKE_BASE=TRUE

NC_SATA_E_D2RN

MAKE_BASE=TRUE TRUE

NC_SATA_F_D2RP

TRUE MAKE_BASE=TRUE

NC_SATA_E_R2D_CP

TRUE MAKE_BASE=TRUE

NC_SATA_F_D2RN

MAKE_BASE=TRUE TRUE

NC_SATA_F_R2D_CN

TRUE MAKE_BASE=TRUE TRUE MAKE_BASE=TRUE

NC_SATA_D_R2D_CP

TRUE MAKE_BASE=TRUE

NC_SATA_B_R2D_CN

NC_PCIE_CLK100M_PE4P

MAKE_BASE=TRUE TRUE

NC_PCIE_CLK100M_PE4N

MAKE_BASE=TRUE TRUE

NC_PCIE_CLK100M_PE5N

MAKE_BASE=TRUE TRUE

NC_PCIE_CLK100M_PE6P NC_PCIE_CLK100M_PE6N

MAKE_BASE=TRUE TRUE

TRUE

MAKE_BASE=TRUENC_EDP_AUXP

TRUE

MAKE_BASE=TRUENC_EDP_TXP<0 3>

TRUE PCIE_WAKE_L

USB_BT_N

TRUE TRUE USB_BT_P

TP_CPU_THERMDATP_EDP_AUX_NTP_CPU_THERMDCTP_CPU_RSVD<30 45>

TP_PCIE_CLK100M_PE7N

TP_SATA_B_R2D_CN

TP_PCIE_CLK100M_PE7P TP_PSOC_P1_3 TP_SATA_B_D2RN TP_SATA_B_D2RP

TP_SATA_B_R2D_CP

TP_SATA_D_R2D_CP TP_SATA_D_R2D_CN TP_SATA_D_D2RN TP_SATA_D_D2RP

TP_SATA_F_R2D_CP TP_SATA_F_R2D_CN TP_SATA_F_D2RN TP_SATA_E_R2D_CP

TP_SATA_F_D2RP

TP_SATA_E_D2RN

TP_SATA_E_R2D_CN TP_SATA_E_D2RP

TP_PCH_TP17 TP_PCH_TP18

TP_PCH_TP16 TP_PCH_TP15 TP_PCH_TP14 TP_PCH_TP13 TP_PCH_TP12

TP_PCH_TP10 TP_PCH_TP9 TP_PCH_TP8 TP_PCH_TP7 TP_PCH_TP6 TP_PCH_TP5 TP_PCH_TP4 TP_PCH_TP3 TP_PCH_TP2 TP_PCH_TP1

TP_LVDS_IG_B_CLKN TP_LVDS_IG_B_CLKP TP_LVDS_IG_BKL_PWM

SMC_BS_ALRT_L

TP_PCH_GPIO65_CLKOUTFLEX1 TP_PCH_GPIO66_CLKOUTFLEX2 TP_PCH_GPIO67_CLKOUTFLEX3 TP_PCH_GPIO64_CLKOUTFLEX0 TP_XDP_PCH_HOOK5 TP_XDP_PCH_HOOK4

TP_XDP_PCH_OBSFN_A<0 1>

TP_XDPPCH_HOOK2 TP_XDP_PCH_OBSFN_B<0 1>

TP_XDPPCH_HOOK3 TP_XDP_PCH_OBSFN_D<0 1>

TP_SDVO_STALLP TP_SDVO_INTN TP_SDVO_INTP TP_SDVO_STALLN

TP_SDVO_TVCLKINN TP_SDVO_TVCLKINP

TP_PCIE_CLK100M_PEBN TP_PCIE_CLK100M_PEBP

TP_HDA_SDIN2 TP_HDA_SDIN1 TP_PCH_LVDS_VBG TP_LVDS_IG_CTRL_CLK TP_CRT_IG_VSYNC

TP_CRT_IG_DDC_CLK TP_CRT_IG_RED TP_CRT_IG_GREEN

Trang 7

BRANCHREVISION

DRAWING NUMBER SIZE

DR

SHEETPAGE TITLE

B

5V Rails

1.8V/1.5V/1.2V/1.05V Rails

T29 Rails (off when no cable)

"G3Hot" (Always-Present) Rails

=PPVTT_S0_VTTCLAMP

VOLTAGE=1.05V MAKE_BASE=TRUE MIN_NECK_WIDTH=0.2 MM

MAKE_BASE=TRUE VOLTAGE=1.5V MIN_LINE_WIDTH=0.8 MM

PPBUS_S5_HS_COMPUTING_ISNS

MIN_LINE_WIDTH=0.6 MM

PPVCCSA_S0_CPU

MIN_NECK_WIDTH=0.2 MM MAKE_BASE=TRUE VOLTAGE=0.9V

PPVCORE_S0_CPU

MIN_NECK_WIDTH=0.25 MM MIN_LINE_WIDTH=0.6 MM VOLTAGE=1.25V MAKE_BASE=TRUE

MAKE_BASE=TRUE

PPVCORE_S0_AXG

MIN_NECK_WIDTH=0.2 MM VOLTAGE=1.05V

MAKE_BASE=TRUE VOLTAGE=1.5V MIN_NECK_WIDTH=0.2 MM

PP1V5_S3_CPU_VCCDQ

MIN_LINE_WIDTH=0.6 MM

PP1V05_S0_CPU_VCCPQE

MAKE_BASE=TRUE MIN_NECK_WIDTH=0.2 MM VOLTAGE=1.05V

PP1V8_S0_CPU_VCCPLL_R

MIN_NECK_WIDTH=0.2 MM MAKE_BASE=TRUE VOLTAGE=1.8V MIN_LINE_WIDTH=0.6 MM

PP1V05_S0_PCH_VCCADPLL

PP1V05_T29

MIN_LINE_WIDTH=0.4 MM MAKE_BASE=TRUE

=PPHV_SW_DPAPWRSW

VOLTAGE=17.8V MIN_NECK_WIDTH=0.2 MM MAKE_BASE=TRUE

PP1V8_S0

=PPDDR_S3_REG

=PP1V5_S3RS0_FET

VOLTAGE=3V MIN_LINE_WIDTH=0.2 MM

PPVRTC_G3H

MIN_NECK_WIDTH=0.2 MM MAKE_BASE=TRUE

MAKE_BASE=TRUE

PP3V42_G3H

MIN_NECK_WIDTH=0.2 MM VOLTAGE=3.42V MIN_LINE_WIDTH=0.3 MM

=PP3V3R1V5_S0_PCH_VCCSUSHDA

MAKE_BASE=TRUE VOLTAGE=1.5V

PP1V5_S0

MIN_NECK_WIDTH=0.17 mm MIN_LINE_WIDTH=2 mm

PPDCIN_G3H

Trang 8

OUTOUTIN

ININOUT

ININOUTOUTOUT

OUT

OUTOUT

BRANCHREVISION

DRAWING NUMBER SIZE

DR

SHEETPAGE TITLE

Unused SATA ODD Signals

UNUSED SDCARD USB Aliases

LVDS Aliases

T29_A_BIAS caps

T29 JTAG Unused PGOOD signal

806-1176

X21 Boss CPU Heat Sink Mounting Bosses

NO STUFF

0

5%

1/20W 201

21R0918201

R0910

0.5%

1W MF0.01

CRITICALPOGO-2.0OD-3.6H-K86-K87

0.01UF

X5R 2

1

C0962

0.01UF

201 10%

X5R

2 1

R0960

5%

1/8W 805 MF-LF

2.2K

5%

1/20W MF

1R0921

2.2K

1/20W 201 MF 5%

2

1R0922

201 MF 1/20W 5%

2.2K

2

1R0923

2.2K

5%

MF 201 1/20W

2

1R0924

2.2K

5%

1/20W MF

1R0925

2.2K

5%

1/20W MF 201

2

1R0908

100K

1/20W MF 201 5%

2

1R0915

1/20W 201 MF 5%

2 1

1C0905

0.01UF

201 10V SIGNAL_MODEL=EMPTY

2

1C0901

SIGNAL_MODEL=EMPTY X5R

X5R

2

1C0903

SIGNAL_MODEL=EMPTY 10V

201 10%

X5R

2 1

R0931

201 MF 1/20W 5%

51

SIGNAL_MODEL=EMPTY

2 1

R0933

SIGNAL_MODEL=EMPTY

1/20W 5%

51

201 MF

2 1

R0934

SIGNAL_MODEL=EMPTY

5%

1/20W MF

SM

2

1R090210K5%

MF 1/20W 2012

1R0901

10K

1/20W 5%

MF 201

2

1R0909

MF 1/20W 5%

100K

201

21

R0990

0

201 1/20W 5%

MF

1

SL0901

TH-NSPSL-1.1X0.4-1.4x0.7

1

SL0902

TH-NSPSL-1.1X0.4-1.4x0.7

PPBUS_SW_BKL

NC_PEG_CLK100MP

MAKE_BASE=TRUE

DPLL_REF_CLKN MAKE_BASE=TRUE

DPLL_REF_CLK_N

DPLL_REF_CLKP MAKE_BASE=TRUE

DPLL_REF_CLK_P TP_PCH_CLKOUT_DPP

TP_PCH_CLKOUT_DPN

PCIE_CLK100M_EXCARD_NPCIE_CLK100M_EXCARD_P

PEG_CLK100M_NPEG_CLK100M_P

=PP3V3_S3_USB_HUB

USB_T29A_NUSB_T29A_P

T29_A_RSVD_PT29_A_RSVD_N

P1V5S3RS0_RAMP_DONE

MAKE_BASE=TRUE

DP_IG_C_CTRL_CLKTP_DP_IG_C_CTRL_DATA

DP_EXTA_AUXCH_C_P

MEM_B_CLK_P<1>

PCIE_EXCARD_D2R_P NC_PCIE_EXCARD_D2RP

MAKE_BASE=TRUE TRUE

TRUE MAKE_BASE=TRUE

LVDS_IG_PANEL_PWR

MAKE_BASE=TRUE

LCD_IG_PWR_EN

LVDS_IG_BKL_ONLCD_BKLT_EN

MAKE_BASE=TRUE

NO_TEST=TRUE MAKE_BASE=TRUE

NC_SATA_ODD_R2DCN

NO_TEST=TRUE MAKE_BASE=TRUE

MAKE_BASE=TRUE

DP_IG_D_HPD

LVDS_IG_B_CLK_PTP_DP_IG_D_HPD

MAKE_BASE=TRUE

JTAG_ISP_TCK

MAKE_BASE=TRUE

JTAG_T29_TDOJTAG_ISP_TDO

MAKE_BASE=TRUE

JTAG_T29_TCKJTAG_T29_TCK_R

9 OF 109 2.5.0 051-8871

Trang 9

INININ

OUT

IN

INININININININININININININININ

IN

ININININ

ININININININ

INININININOUT

OUTOUTOUTOUT

OUTOUTOUTOUTOUTOUT

OUTOUTOUTOUT

OUTOUTOUTOUTOUT

OUTOUTOUTOUTOUTOUT

OUT

INININININININININININININININININOUT

OUTOUTOUTOUTOUTOUTOUTOUTOUTOUTOUTOUTOUTOUTOUTINININININ

NC

NCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNC

NCNCNCNCNCNCNCNCNCNCNCNCNCNCNC

EDP_TX_3

EDP_TX_0EDP_TX_1EDP_TX_2

EDP_COMPIOEDP_HPDEDP_ICOMPOFDI1_LSYNC

DMI_TX_3*

FDI0_LSYNC

FDI0_TX_3FDI1_TX_1FDI1_TX_0FDI1_TX_2FDI1_TX_3FDI0_FSYNCFDI1_FSYNCFDI_INT

FDI1_TX_3*

FDI1_TX_2*

FDI0_TX_1FDI0_TX_0FDI0_TX_2

DMI_RX_2*

DMI_RX_0DMI_RX_1DMI_RX_2DMI_RX_3DMI_TX_0*

DMI_RX_3*

DMI_RX_1*

DMI_RX_0* PEG_ICOMPI

PEG_ICOMPOPEG_RCOMPOPEG_RX_2*

(1 OF 9)

VSS_VAL_SENSEVAXG_VAL_SENSEVSSAXG_VAL_SENSEVCC_VAL_SENSECFG_17CFG_16CFG_15

CFG_10CFG_11CFG_12CFG_13CFG_14

RSVD_28RSVD_29RSVD_30RSVD_32RSVD_31RSVD_34RSVD_33RSVD_35RSVD_36RSVD_37RSVD_38RSVD_40RSVD_39

RSVD_42RSVD_43RSVD_41RSVD_44RSVD_45

DC_TEST_A4DC_TEST_C4DC_TEST_D1DC_TEST_D3DC_TEST_A58DC_TEST_C59DC_TEST_A59DC_TEST_C61DC_TEST_A61DC_TEST_D61DC_TEST_BE61DC_TEST_BD61DC_TEST_BG61DC_TEST_BE59DC_TEST_BG59DC_TEST_BG58DC_TEST_BG4DC_TEST_BE3DC_TEST_BG3

DC_TEST_BE1DC_TEST_BD1DC_TEST_BG1

VCC_DIE_SENSERSVD_7RSVD_6RSVD_8RSVD_9RSVD_10RSVD_12RSVD_11RSVD_13RSVD_14RSVD_15RSVD_17RSVD_16RSVD_18RSVD_19RSVD_20RSVD_21RSVD_22RSVD_24RSVD_23RSVD_25RSVD_27RSVD_26

RESERVED

OUTOUT

NC

IN

D

G S

BRANCHREVISION

DRAWING NUMBER SIZE

DR

SHEETPAGE TITLE

B

to SO-DIMM connectors directly FETs are needed in order to avoid potential leakage while system is in S3 state

NOTE: Intel is investigating future processor VREF_DQ generation to replace M1 and M2

to low voltage signals for the processor

even if internal Graphics is disabled since they are

Intel Doc 438297 Huron River SFF DG rev1.0 section 2.2.1 recommendation.

NOTE: eDP_COMPIO and eDP_ICOMPO can not be left floating

shared with other interfaces

Note VOLTAGE=0VNote VOLTAGE=1.25V

doc 439028 rev1.0 HR_PPDG sections 6.2.1 and 6.3.1

NOTE: Intel validation sense lines per

Note VOLTAGE=0V

FOR SANDYBRIDGE PROCESSOR

NOTE: Intel provides an internal pull-up OF 5-15k to VCCIO on all CFG signals

Note VOLTAGE=1.05V

This would require routing processor signal balls BE7 and BG7 for Sandy Bridge 2-core

Therefore, an inverting level shifter is required on the motherboard

NOTE: The EDP_HPD processor input is a low voltage active low signal

FIXME: Pin should be EDP_HPD*

connect it to CPU VCCIo via a 10-kOhm pull-up resistor on the motherboard

CFG [2] :PCIE x16 LANE REVERSAL 1 = NORMAL OPERATION 0 = LANES REVERSED

If HPD is disabled while eDP interface is still enabled,

CFG [3] :PCIE x4 LANE REVERSAL 1 = NORMAL OPERATION 0 = LANES REVERSED

CFG [4] :eDP ENABLE/DISABLE 1 = DISABLED 0 = ENABLED

CFG [7] :PEG DEFER TRAINING 1 = (DEFAULT) IMMEDIATELY AFTER xxRESETB 0 = WAIT FOR BIOS

CFG [6:5] :PCIE BIFURCATION 11 = 1 X16 (DEFAULT) 10 = 2 X8 01 = RSVD 00 = X8, X4, X4

These can be Placed close to J2500 and Only for debug access

This signal can be left as no-connect if entire eDP interface is disabled

(refer to latest Processor EDS for DC specifications)

to convert the active high signal from Embedded DisplayPort sink device

R1010

24.9

201 1%

1/20W MF

AG4AF4

F48H45

W14U14P13

N50

N42

M14M13L47L45L42

BE7

BE26BE24BE22BD26BD25BD22BD21

BB21BB19BA22BA19

AY22AY21AV19

AU21AU19

AT49

AT21

AM15AM14

AH2AG13

D61

D3D1

C61C59C4

BG61BG59BG58BG4BG3BG1

BE61BE59

BE3BE1BD61

BD1

A61A59A58A4

H51A55H49C55C53A51D53B54

L53D52F51L51G53F53K53K49

C51B50 U1000

OMIT_TABLE

CRITICALBGA

46

2

1R1044EDP

1K

5%

MF-LF 402

49.9NOSTUFF

2

1

R1070

PLACE_NEAR=U1000.H45:50.8MMPLACE_SIDE=BOTTOM201

MF 1/20W 1%

49.9NOSTUFF

1/20W MF 201

PLACE_NEAR=U1000.K43:50.8MMPLACE_SIDE=BOTTOM2

1

R1071

PLACE_NEAR=U1000.K45:50.8MMPLACE_SIDE=BOTTOM

NOSTUFF

49.91%

1/20W MF 201

21

R1021

1/20W 5%

0

MF 201

NOSTUFF

2

1

R1020NOSTUFF

1K1%

1/20W MF 201

21

R1030

PLACE_NEAR=U1000.AF3:12.7MMMF

2011/20W1%

24.9

2

1R1045

5%

1K

NOSTUFF

MF-LF 402

2

1R1042NOSTUFF

1K

MF-LF 5%

402

NOSTUFF

2

1R1043NOSTUFF

MF-LF

1K

402 5%

2

1R1049

5%

1K

NOSTUFF

MF-LF 402

PLACE_NEAR=U1000.AG11:12.7MM

21

CPU_CFG<6>

CPU_MEM_VREFDQ_A PP0V75_S3_MEM_VREFDQ_A

CPU_AXG_VALSENSE_N CPU_VCC_VALSENSE_N

=PPVCORE_S0_CPU_VCCAXG

CPU_AXG_VALSENSE_P CPU_VCC_VALSENSE_P

TP_CPU_DC_TEST_BD1 CPU_DC_TEST_C4_BE1_BG1 CPU_DC_TEST_C4_BE3_BG3 TP_CPU_DC_TEST_BG4 TP_CPU_DC_TEST_BG58 CPU_DC_TEST_BG59_BG61

TP_CPU_DC_TEST_BD61 CPU_DC_TEST_BE59_BE61 TP_CPU_DC_TEST_D61 CPU_DC_TEST_C61_A61 CPU_DC_TEST_C59_A59 TP_CPU_DC_TEST_A58 TP_CPU_DC_TEST_D1 CPU_DC_TEST_C4_D3 TP_CPU_DC_TEST_A4 CPU_MEM_VREFDQ_A

DP_INT_AUX_CH_N DP_INT_AUX_CH_P

Trang 10

IN

OUT

ININ

OUT

OUTBI

BI

NC

OUT

SM_RCOMP_2SM_RCOMP_1SM_RCOMP_0SM_DRAMRST*

BCLK_ITPBCLK_ITP*

DPLL_REF_CLK*

DPLL_REF_CLKBCLK*

BCLK

RESET*

SM_DRAMPWROKUNCOREPWRGOODPM_SYNC

PROC_SELECT*

PROC_DETECT*

PREQ*

TMSTRST*

TDITDODBR*

INOUT

ININ

INOUTIN

ININ

IN

OUTBIBIBI

BRANCHREVISION

DRAWING NUMBER SIZE

DR

SHEETPAGE TITLE

B

(IPU)(IPU)

(IPU)(IPU)(IPU)(IPU)(IPU)(IPU)(IPU)

(IPU)(IPU)

(IPU)

(IPU)(IPU)

L59M60L56

BG43BE43BF44AT30

BE45D44

C45

F49C57

N55N53

C48A48

AG1AG3

K58C49

J61J59H60G59G55E59E55G58

N58N59

H2J3

U1000

OMIT_TABLE

CRITICAL

SANDY-BRIDGE MOBILE-2C-35W

1/20W MF 201

2

201MF1/20W5%

51NOSTUFF

2

1

R1100 1K

5%

1/20WMF201NOSTUFF

21R1103

201 MF 1/20W 5%

56

2

1R1120

200

1%

1/20W MF 201

21R1121

1%

1/20W MF 201

130

2

1R1114

1%

MF 1/20W

200

2012

1R1113

1%

1/20W 201 MF

25.5

2

1R1112

140

1%

1/20W MF 201

2

1

R1111

10K201 MF 1/20W 5%

2

1R1126

75

1%

1/20W MF 201

21R1125

43.2

1%

MF 1/20W 201

2

1

R1115

1/20W MF4.99K1%

PLT_RESET_LS1V1_L

=MEM_RESET_L

CPU_PWRGD PM_MEM_PWRGD_R

CPU_CATERR_L

XDP_CPU_PREQ_L ITPCPU_CLK100M_N ITPCPU_CLK100M_P

XDP_CPU_TRST_L XDP_CPU_TDI XDP_CPU_TCK

=PP1V05_S0_CPU_VCCIO

XDP_BPM_L<0>

XDP_DBRESET_L

XDP_CPU_TMS XDP_CPU_PRDY_L

DPLL_REF_CLKP DPLL_REF_CLKN

11 OF 109 2.5.0 051-8871

Trang 11

OUT

OUTOUT

OUT

BIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIOUTOUTOUTOUTOUTOUT

OUTOUTOUT

OUT

BIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIOUTOUTOUTOUTOUTOUTOUTOUTOUTOUTOUTOUTOUTOUTOUTOUT

OUTOUTOUT

OUT

BIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIOUTOUTOUTOUTOUTOUTOUTOUTOUTOUTOUTOUTOUTOUTOUTOUT

SA_MA_14SA_MA_15

SA_MA_12SA_MA_13SA_MA_11

SA_MA_9SA_MA_10SA_MA_8SA_MA_7SA_MA_6SA_MA_5SA_MA_4SA_MA_3SA_MA_2SA_MA_1SA_MA_0SA_DQS_7

SA_DQS_5SA_DQS_6

SA_DQS_3SA_DQS_4SA_DQS_2

SA_DQS_0SA_DQS_1

SA_CS_0*

SA_CKE_1SA_CK_1*

SA_CK_1SA_CKE_0SA_CK_0*

SA_DQ_62SA_DQ_63SA_DQ_61SA_DQ_60SA_DQ_59SA_DQ_58SA_DQ_57SA_DQ_56SA_DQ_55SA_DQ_54SA_DQ_53SA_DQ_52

SA_DQ_50SA_DQ_51SA_DQ_49SA_DQ_48SA_DQ_47SA_DQ_46SA_DQ_45SA_DQ_44

SA_DQ_42SA_DQ_43SA_DQ_41

SA_DQ_39SA_DQ_40SA_DQ_38SA_DQ_37SA_DQ_36

SA_DQ_34SA_DQ_35

SA_DQ_29SA_DQ_30

SA_DQ_11SA_DQ_12

SA_DQ_9SA_DQ_10SA_DQ_8SA_DQ_7SA_DQ_6SA_DQ_5SA_DQ_4SA_DQ_3SA_DQ_2SA_DQ_1SA_DQ_0

(3 OF 9)

SB_MA_15SB_MA_14

SB_MA_12SB_MA_13SB_MA_11SB_MA_10SB_MA_9

SB_MA_7SB_MA_8SB_MA_6SB_MA_5SB_MA_4SB_MA_3SB_MA_2SB_MA_1SB_MA_0SB_DQS_7SB_DQS_6SB_DQS_5SB_DQS_4SB_DQS_3SB_DQS_2SB_DQS_1SB_DQS_0SB_DQS_7*

SB_CS_1*

SB_CS_0*

SB_CKE_1

SB_CK_1SB_CK_1*

SB_CK_0*

SB_CKE_0SB_CK_0

SB_DQ_37SB_DQ_36

SB_DQ_34SB_DQ_35SB_DQ_33

SB_DQ_31SB_DQ_32SB_DQ_30SB_DQ_29

SB_DQ_26SB_DQ_27SB_DQ_28

SB_DQ_24SB_DQ_25

SB_DQ_21SB_DQ_22SB_DQ_23SB_DQ_20SB_DQ_19SB_DQ_18SB_DQ_17SB_DQ_16SB_DQ_15SB_DQ_14SB_DQ_13SB_DQ_12SB_DQ_11SB_DQ_10

SB_DQ_8SB_DQ_9SB_DQ_7SB_DQ_6

SB_DQ_4SB_DQ_5SB_DQ_3SB_DQ_2SB_DQ_1SB_DQ_0

SB_DQ_39SB_DQ_38SB_DQ_40SB_DQ_41SB_DQ_42SB_DQ_44SB_DQ_43SB_DQ_46SB_DQ_45SB_DQ_47SB_DQ_49SB_DQ_48SB_DQ_51SB_DQ_50SB_DQ_52SB_DQ_54SB_DQ_53SB_DQ_56SB_DQ_55SB_DQ_57SB_DQ_59SB_DQ_58SB_DQ_61SB_DQ_60SB_DQ_62SB_BS_0SB_DQ_63SB_BS_2SB_BS_1SB_RAS*

OUT

OUTOUTOUT

OUT

BRANCHREVISION

DRAWING NUMBER SIZE

DR

SHEETPAGE TITLE

BA41AY40

AV32AY32AT32BB32AU34AT34BD35BE35

AU26AY28AW41BC30BA30BE37

BB34BG35

AK56AG55AN52AN55

AL8

AG53AG56AN53AN57AP52AP56AT54AV54AP53AP50

AJ8

AV56BA55BB55BA53AU49BB49AY53BB51AV49BA49

AJ10

AY48AT48AR45BC45BC48AW48AR43BA45BB17BB14

AL6

AU14BA14AR19AY17AR14AV14AY13BB9BA9BA7

AP11

BB11BA13BB7BC7AU13AT13AP8AR6AV9AU6

AJ6AG6

BC41BB40BB26

AY26AU40AT40

AV36AU36

BE39BA28BF36BD37

U1000

SANDY-BRIDGE MOBILE-2C-35W

CRITICALBGA

OMIT_TABLE

BD45BF40

BG47AT43

BE28BE30BD29BG30AV30BD30AU30BD33

AU22AT26BD46AV28AT28BD43

BE33BF32

AH60AF61AL59AM60

AN4

AG59AG58AL58AK58AR58AN58AU61AU59AN59AN61

AK3

AU58AW58AW59BA58BG54BE54AY60BC59BE57BF56

AK4

BE53BD54BE49BD49BF52BD53BF48BD50BF19BG18

AR4

BG14BE14BE21BE18BE17BF16BE13BD14BD10BF8

AN3

BF12BD13BD9BE9BA3AY2AR3AU3BA4AV4

AL1AL4

BE47BE41BF27

AR22BB36BA36

AY34BA34

AV43AT22BD42BG39

Trang 12

OUTOUT

OUT

OUTIN

BI

OUT

VCCIO_29VCCIO_28VCCIO_27VCCIO_26VCCIO_25VCCIO_24VCCIO_23VCCIO_22VCCIO_21VCCIO_20VCCIO_19VCCIO_18VCCIO_17VCCIO_16VCCIO_15VCCIO_14VCCIO_13VCCIO_12VCCIO_11VCCIO_10VCCIO_9VCCIO_8VCCIO_7VCCIO_6

VCCIO_49VCCIO_48

VCCIO_5VCCIO_4VCCIO_3

VCCIO_47VCCIO_46VCCIO_45VCCIO_44VCCIO_43

VCCIO_1

VCCIO_42VCCIO_41VCCIO_40VCCIO_39VCCIO_38VCCIO_37VCCIO_36VCCIO_35VCCIO_34VCCIO_33VCCIO_32VCCIO_31VCCIO_30

VCCIO_51VCCIO_50

VCC_76VCC_75VCC_74VCC_73VCC_72VCC_71VCC_70VCC_69VCC_68VCC_67VCC_66VCC_64VCC_63VCC_62VCC_61VCC_60VCC_59VCC_58VCC_57VCC_56VCC_55VCC_54VCC_53VCC_52VCC_51VCC_50VCC_49VCC_48VCC_47VCC_46VCC_45VCC_44VCC_43VCC_42VCC_41VCC_40VCC_39VCC_38VCC_37VCC_36VCC_35VCC_34VCC_33VCC_32VCC_31VCC_30VCC_29VCC_28VCC_27VCC_26VCC_25VCC_24VCC_23VCC_22VCC_21VCC_20VCC_19VCC_18VCC_17VCC_16VCC_15VCC_14VCC_13VCC_12VCC_11VCC_10VCC_9VCC_8VCC_7VCC_6VCC_5VCC_4VCC_3VCC_2VCC_1

VCCIO_SELVCCPQE_1VCCPQE_2VIDALERT*

VIDSCLKVIDSOUTVCC_SENSEVSS_SENSEVCCIO_SENSEVSS_SENSE_VCCIO

VAXG_1VAXG_2VAXG_4VAXG_3VAXG_5VAXG_6VAXG_7VAXG_8VAXG_9VAXG_10VAXG_11VAXG_12VAXG_13VAXG_14VAXG_15VAXG_16VAXG_17VAXG_18VAXG_19VAXG_20VAXG_21VAXG_22VAXG_23VAXG_24VAXG_25VAXG_28

VAXG_26VAXG_27VAXG_30VAXG_29VAXG_33

VAXG_31VAXG_32VAXG_35VAXG_34VAXG_36VAXG_37VAXG_38VAXG_39VAXG_40VAXG_41VAXG_42VAXG_43VAXG_45VAXG_44VAXG_46VAXG_47VAXG_48VAXG_49VAXG_50VAXG_51VAXG_52VAXG_53VAXG_54VAXG_55VAXG_56VAXG_SENSEVSSAXG_SENSEVCCPLL_1VCCPLL_2VCCPLL_3VCCSA_2VCCSA_1VCCSA_3VCCSA_4VCCSA_5VCCSA_6VCCSA_7VCCSA_8VCCSA_9VCCSA_10VCCSA_11VCCSA_12VCCSA_13VCCSA_15VCCSA_14VCCSA_16

BRANCHREVISION

DRAWING NUMBER SIZE

DR

SHEETPAGE TITLE

B

PLACEMENT NOTE: Please place all sense line resistors on BOTTOM side

Note VOLTAGE=1.25V

Note VOLTAGE=1.05VNote VOLTAGE=0VNote VOLTAGE=0V

Fixed at 1.05V

(IPU)

(NOT controlled by VCCIO_SEL)

For Future Compatibility

(IPU)

Note VOLTAGE=1.05VNote VOLTAGE=0V

C44B43A44AN22AM25

W17W16

AN16BC22

AN48AN45AN42AN20AM47AM43AM21AM17AM16AL48AL45AL26AL22AL20AL16AL15AL14AK51AK50AJ47AJ43AJ25AJ21AJ17

AJ15AJ14

AG51AG50AG48

AG21AG20AG17AG16AG15AF46

AF20AF18AF16AE15AE14AD21AD18AD16AC13AB20AB17AA15AA14

F43

N38N34N30N26L40L36L33L28L25K42K39K37K35K34K32K29K27K26J42J40J38J37J35J34J32J29J28J26J25H40H38H37H35H34H32H29H28H26H25G42F42F38F37F34F32F28F26F25E38E37E34E32E28E26D42D39D37D34D32D27C42C39C37C34C32C27C26A42A39A38A35A34A31A29A26 U1000

BG33BB28BA40AW26AV41AR40AR36AR34AR32AR30AR28AR26AN38AN34AN30AM40AM36AM33AL42AL38AL34AL30AJ40AJ36AJ33AJ28

W20

D49D48

V21V18V17V16U15

U10

R21R18R16P20P17N22N20N16L21L17BC4BC1BB3

AN26AM28

Y61Y48W61W56W55W53W52W51W50V59V58V56V55V53V52V51V50V48V47U46T61T59T58T48

F45

P61P56P55P53P52P51P50P48P47N45AE46AD59AD58AD56AD55AD53AD52AD51AD50AD48AD47AC61AB59AB58AB56AB55AB53AB52AB51AB50AB47AA46

OMIT_TABLE

21

R1311

MF

1/20W 201

21

R1312

MF

1/20W 201

21

R1310

43

201 1/20W 5% MF2

1

R1302

PLACE_NEAR=U1000.C44:2.54mm201

MF1/20W1%

130

2

1R1320

10K

1/20W 5%

MF 201

2

201MF1/20W1%

75

PLACE_NEAR=R1310.2:2.54mm

2

1R1370PLACE_NEAR=U1000.F45:50.8mmPLACE_SIDE=BOTTOM

NOSTUFF

100

1%

1/20W MF 201

2

1R1371

1%

1/20WMF201

2

1

R1381

PLACE_SIDE=BOTTOMPLACE_NEAR=U1000.BA43:50.8mm

2011/20W1%

100

MF

2

1R1314

201 MF 5%

1/20W

10K

2

1R1330SM_VREF_EXT

2

1R1331SM_VREF_EXT

100

1/20W

MF 201 5%

MF 1/20W 1%

100

NOSTUFF

2

1R1360PLACE_NEAR=U1000.F43:50.8mm

NOSTUFF

100

1%

1/20W MF 201PLACE_SIDE=BOTTOM

2

1R1361

100

1%

1/20W MF 201

PLACE_NEAR=U1000.G43:50.8mmPLACE_SIDE=BOTTOM

NOSTUFF

2

1R1363

201 MF 1/20W 1%

100

NOSTUFF

PLACE_SIDE=BOTTOMPLACE_NEAR=U1000.AN17:50.8mm

CPU_VIDSOUT_R CPU_VIDSCLK_R

Trang 13

VSSVSS

VSS

VSSVSS

VSS

VSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSS

VSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSS

VSS

VSSVSSVSSVSSVSSVSSVSS

VSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSS

VSS_NCTFVSS_NCTFVSS_NCTFVSS_NCTFVSS_NCTFVSS_NCTFVSS_NCTFVSS_NCTFVSS_NCTFVSS_NCTFVSS_NCTFVSS_NCTFVSS_NCTFVSS_NCTF

(9 OF 9)VSS

(8 OF 9)VSS

VSS

VSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSS

VSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSS

VSSVSS

BRANCHREVISION

DRAWING NUMBER SIZE

DR

SHEETPAGE TITLE

B

Y59 Y58 Y47 Y4 W8

W46 W21 W18 W15 W13 V61 V20 U8 U13 T56 T55 T53 T52 T51 T50 T47 T1 R46 R4

R20 R17

P9

P59 P58 P21 P18 P16 P14

E61 E1 D59 C58 C3 BG57 BG5 BE58 BE4 BD59 BD3 BC61 A57 A5

N61 N56 N52 N51 N48 N47 N43 N40 N36 N33 N28 N25 N21 N17 N1

M6

M58

M4

M15 M11

L61 L48 L43 L38 L34 L30 L26 L22 L20 L16 K8

K51 K21 K11 J55 J49 J1 H58 H53 H4

H21 H17 H14 H10 G61 G6

G51 G48 F55 F40 F35 F29 F19 F15 F13 E40 E35 E3

E29 E25

D6

D58 D54 D50 D46 D43 D40 D4

D35 D29 D26 D22 D18 D14 D10

C40 C35 C29 BG53 BG49 BG45 BG41 BG37 BG28 BG24 BG21 BG17

OMIT_TABLE CRITICAL

BGA

BG9 BE5 BD8

BD56 BD52 BD48 BD44 BD40 BD36 BD32 BD27 BD23 BD19 BD16 BD12 BC57 BC5 BC13 BB53 BA51 BA48 BA32 BA26 BA21 BA17 BA11 BA1 AY9

AY58 AY55 AY49 AY45 AY41 AY4

AY36 AY30 AY19 AY14

AW7

AW61 AW43 AW13 AV55 AV48 AV40 AV34 AV22 AV21 AV17 AU7

AU51 AU32 AU28 AU11 AU1 AT58 AT52 AT45 AT4

AT36 AT19 AT14

AR7

AR61 AR48 AR41 AR21 AR17 AR13

AP7

AP55 AP51 AP10 AN54 AN50 AN47 AN43 AN40 AN36 AN33 AN28 AN25 AN21 AN1 AM58 AM48 AM45 AM42

AM4

AM38 AM34

AM30 AM26 AM22 AM20 AM13 AL61 AL47 AL43 AL40 AL36 AL33 AL28 AL25 AL21 AL17 AL13 AL10 AK52 AK1 AJ7

AJ48 AJ45 AJ42 AJ38 AJ34 AJ30 AJ26 AJ22 AJ20 AJ16 AJ13 AH58 AH4 AG7

AG61 AG52 AG47 AG18 AG14 AG10 AF59 AF58 AF56 AF55 AF53 AF52 AF51 AF50 AF48 AF47 AF21 AF17 AF1 AE8 AE13 AD61 AD4

AD20 AD17

AC6

AC46 AC14 AC10 AB61 AB48 AB21 AB18 AB16 AA8

AA56 AA55 AA53 AA52 AA51 AA50 AA13 AA1 A9

A53 A49 A45 A40 A37 A33 A28 A25 A21 A17 A13

U1000

OMIT_TABLE CRITICAL

Trang 14

BRANCHREVISION

DRAWING NUMBER SIZE

DR

SHEETPAGE TITLE

B

PLACEMENT_NOTE (C1640-C1645):

Intel recommendation (Section 6.5): 26x 1uF, 10x 10uF, 2x 330uF

CPU VCCIO/VCCPQ DECOUPLING

CPU VCCPLL Low pass filter

Processor Load Line : -2.9 mOhms

Intel recommendation: 1x 10mOhn resistor, 1x 1uF 0402

Note:The smallest 10mOhm available in the library are 0805s

Intel recommendation (Table 7-1): 16x 2.2uF, 12x 22uF, 3x 330uF

CPU VCORE DECOUPLING

R1601 0.010

MF06031%

4V

2

X5R10%

4VX5R 2

CRITICAL

2.2UF

40220%

4VX5R 2

CRITICAL

2.2UF

40220%

4VX5R 2

CRITICAL

2.2UF

40220%

4VX5R 2

CRITICAL

2.2UF

40220%

4VX5R

2

1UF

X5R10%

2

10UF

6.3V20%

Place near U1000 on bottom side

CERM-X5R0402-1

270UF

2

2VCASE-B2-SMTANT20%

2

X5R4V20%

22UF CRITICAL

2

X5R4V20%

402

22UF CRITICAL

2

CRITICAL

4V20%

402

22UF CRITICAL

2

4V20%

402

22UF CRITICAL

2

20%

4V402

22UF CRITICAL

2

4V20%

402

22UF CRITICAL

2

20%

4V402

22UF CRITICAL

2

4V20%

402

22UF CRITICAL

2

X5R4V20%

402

22UF CRITICAL

TANT20%

2VCASE-B2-SM

270UF

2

CASE-B2-SM2V20%

2V 2

270UF

TANTCASE-B2-SM20%

2V 2

270UF

TANTCASE-B2-SM20%

2V

2

2V20%

2

X5R10%

402

1UFPlace on bottom side of U1000

2

Place on bottom side of U1000

X5R10%

402

22UFPlace close to U1000 on top side.

2

22UF

4V20%

2

1UF

X5R10%

2

1UF

X5R10%

2

1UF

X5R10%

2

2.2UF

X5R20%

4V402

CRITICAL

2

40220%

X5R4V

402

2.2UF CRITICAL

2

X5R4V20%

X5R4V

2

1UF

X5R10%

2

1UF

X5R10%

2

1UF

X5R10%

2

1UF

X5R10%

2

1UF

X5R10%

2

1UF

X5R10%

2

1UF

X5R10%

2

1UF

X5R10%

2

1UF

X5R10%

2

1UF

X5R10%

2

1UF

X5R10%

2

1UF

X5R10%

2

1UF

X5R10%

2

1UF

X5R10%

2

1UF

X5R10%

6.3V0402-1

21

R1600 0

4025%

Trang 15

BRANCHREVISION

DRAWING NUMBER SIZE

DR

SHEETPAGE TITLE

B

Intel recommendation (Section 6.6): 3x 1uf, 3x 10uf, 1x 330uf

Intel recommendation (section 6.3): 18x 1uF(9 no-stuff), 10x 104F(2 no-stuff), 8x 22uF(2 no stuff), 4x 470uF(2 no-stuff)

CPU VCCSA DECOUPLING

Intel recommendation: 1x 10mOhn resistor, 1x 1uF 0402

Intel recommendation (Section 6.13): 10x 1uF, 8x 10uF, 1x 330uF

CPU VDDQ/VCCDQ DECOUPLING

2 1R1702

0603

0.010

1%

1/4W MF

2

1C1740Place on bottom side of U1000

402 10V

2V

2

1C1768

CASE-B2-SM 20%

2V TANT

270UF

2

1C1711CRITICAL

10UF

0402-1 CERM-X5R 6.3V 20%

2

1C1712CRITICAL

10UF

20%

6.3V 0402-1 CERM-X5R 2

1C1713CRITICAL

6.3V

10UF

20%

0402-1 CERM-X5R 2

1C1714CRITICAL

10UF

CERM-X5R 20%

0402-1 6.3V

2

1C1715CRITICAL

10UF

CERM-X5R 6.3V 20%

0402-1

2

1C1716CRITICAL

0402-1 20%

6.3V CERM-X5R

10UF

2

1C1748Place close to U1000 on bottom side

10UF

20%

CERM-X5R 6.3V 0402-1

2

1C17496.3V

Place close to U1000 on bottom side

10UF

CERM-X5R 20%

0402-1

2

1C1751

0402-1 20%

6.3V CERM-X5R

10UF Place close to U1000 on bottom side

2

10UF

CERM-X5R 6.3V 20%

0402-1

2

1C1753

0402-1 20%

6.3V CERM-X5R

10UF Place close to U1000 on bottom side

2

10UF

CERM-X5R 6.3V 20%

0402-1

2

1C176310UF

CERM-X5R 6.3V 20%

2

1C176510UF

CERM-X5R 6.3V 20%

X5R-CERM1 0603

2

1C176610UF

CERM-X5R 6.3V 20%

0402-1

2

1C1767

0402-1 20%

6.3V CERM-X5R

10UF

2

1C1723

270UF

20%

2V TANT CASE-B2-SM

2

1C1724

270UF

20%

2V TANT CASE-B2-SM

2

1C1725

270UF

20%

2V TANT CASE-B2-SM

2

1 C1754Place close to U1000 on bottom side

10UF

CERM-X5R 6.3V 20%

0402-12

1 C17506.3V 20%

Place close to U1000 on bottom side

10UF

CERM-X5R 0402-1

2

1C174110V

X5R 10%

2

1C174310V 402

2

1C17451UF

402 10V

2

1C174610%

10%

X5R

2

402CRITICAL

10V

1UF

2

1C17011UF

10%

CRITICAL

402 10V

Place on bottom side of U100.

1C1702CRITICAL

X5R 10%

1UF Place on bottom side of U1000

2

1C1704CRITICAL

1UF

402 10%

1C17051UFCRITICAL

10%

402

2

1C1706CRITICAL

1UF

402 10V

2

1C1709CRITICAL

1UF Place on bottom side of U1000

1C17591UF Place on bottom side of U100.

10V 402 10%

2

402 10V

1UF

1C17611UF Place on bottom side of U1000

10V 402 10%

1UF

402 10%

2

1C1703CRITICAL

10V 402

Trang 16

IN

OUTOUT

OUTIN

BI

ININOUTOUT

OUTOUT

OUTOUTOUTOUT

OUTOUT

ININ

ININININININ

OUTBI

ININOUTOUT

OUTBI

IN

OUTOUT

IN

INININOUT

OUTOUT

NC

IN

ININOUTOUT

OUT

SRTCRST*

SATA1RXNSATA0TXPSATA0TXN

SATA2RXNSATA2RXP

SPKR

HDA_SDIN0HDA_SDIN1HDA_SDIN3HDA_SDIN2HDA_SDOHDA_DOCK_EN*/GPIO33HDA_DOCK_RST*/GPIO13JTAG_TCK

JTAG_TMSJTAG_TDIJTAG_TDO

SPI_CS0*

SPI_CLKSPI_CS1*

SPI_MOSISPI_MISO

FWH0/LAD0RTCX1

RTCX2

SATA1TXP

SATA0RXNSERIRQLDRQ1*/GPIO23

FWH1/LAD1FWH2/LAD2FWH3/LAD3FWH4/LFRAME*

SATA1RXPSATA1TXN

SATA2TXNSATA2TXPSATA3RXNSATA3RXPSATA3TXNSATA3TXPSATA4RXNSATA4RXPSATA4TXNSATA4TXPSATA5RXNSATA5TXNSATA5TXPSATAICOMPOSATAICOMPISATALED*

SATA0GP/GPIO21SATA1GP/GPIO19SATA3COMPISATA3RCOMP0SATA3RBIAS

SML1CLK/GPIO58SML1DATA/GPIO75

PETP1PERP2PERN2

PERP3PETN3PERN4PETP3PERP4PETN4PERN5PETP4PERP5PETN5PETP5PERN6PERP6PETP6PETN6PERN7PERP7PETN7PERN8PETP7PETN8PERP8PETP8

SMBALERT*/GPIO11SMBCLKPERN1

PETN1

CLKOUT_PCIE0PCLKOUT_PCIE0N

PERP1

PETN2PETP2PERN3

PCIECLKRQ0*/GPIO73CLKOUT_PCIE1NCLKOUT_PCIE1PPCIECLKRQ1*/GPIO18CLKOUT_PCIE2NCLKOUT_PCIE2PPCIECLKRQ2*/GPIO20CLKOUT_PCIE3PCLKOUT_PCIE3NPCIECLKRQ3*/GPIO25CLKOUT_PCIE4NCLKOUT_PCIE4PPCIECLKRQ4*/GPIO26CLKOUT_PCIE5NCLKOUT_PCIE5PPCIECLKRQ5*/GPIO44CLKOUT_PEG_B_NCLKOUT_PEG_B_PPEG_B_CLKRQ*/GPIO56CLKOUT_PCIE6NCLKOUT_PCIE6PPCIECLKRQ6*/GPIO45CLKOUT_PCIE7NCLKOUT_PCIE7PPCIECLKRQ7*/GPIO46CLKOUT_ITPXDP_PCLKOUT_ITPXDP_N

CL_DATA1CL_CLK1CL_RST1*

PEG_A_CLKRQ*/GPIO47CLKOUT_PEG_A_NCLKOUT_PEG_A_PCLKOUT_DMI_PCLKOUT_DMI_NCLKOUT_DP_NCLKOUT_DP_PCLKIN_DMI_NCLKIN_DMI_PCLKIN_GND1_NCLKIN_GND1_PCLKIN_DOT_96PCLKIN_DOT_96NCLKIN_SATA_PCLKIN_SATA_NREFCLK14INCLKIN_PCILOOPBACKXTAL25_INXTAL25_OUTXCLK_RCOMPCLKOUTFLEX0/GPIO64CLKOUTFLEX1/GPIO65CLKOUTFLEX2/GPIO66CLKOUTFLEX3/GPIO67

BRANCHREVISION

DRAWING NUMBER SIZE

DR

SHEETPAGE TITLE

B

1.5V -> 1.1V DOES THIS NEED LENGTH MATCH???

PLACE THIS RESISTOR NEAR THE PCH PIN

(IPU)

TIE THEM TOGETHER VERY CLOSE TO PINS PLACE THE RESISTOR LESS THAN 200MILS FROM THE PINS

Pullup needed for SPI_DESCRIPTOR_OVERRIDE_L? PD needed for BCM_MEDIA_SENSE?

Y4

W10

AB10AB12AJ1AJ3AC1AC3AH6AH8AE1AE3AG1AG3AD6AD8

AF10AH4AF12

AL1AL3AD2AD4AR1AR3AN8AN6

R1

AU1AU3AN1AN3

M2

C19A19F19

F37H40

M15M12U12M17

C21K22

H37

K37A35C35B36D36F35

M35K35

H35

K40C37C39A39A37

U1800

OMIT_TABLE

COUGAR-POINT

MOBILE-SFFFCBGA

W51W49AC49

C11D12C9A9K12H22F10F17H12

J49BB40

BB37BF37BB35BF35BD33AY33AY30

AY40AY37BD37AY35BD35BF33BB33BB30

BL43BL41BK40BL39BL37BK36BL35BL33

BJ43BJ41BH40BJ39BJ37BH36BJ35BJ33

C4

R8

H4J3

K8M19B8T4U8M4

J51G49D48H50

AF42AF40

AF46AF44

W46W44

AB46AB44

AB42AB40

Y50Y48

AA51AA49

AD42AD40AE51AE49

AD50AD48

AR10AR12

AN12AN10AY24BB24

AK6AK8E51

AY26BB26K24M24

BF17BD17

M8J1L3

U1800

FCBGAMOBILE-SFF

MF2015%

1/20W

21

R1811 33

MF2015%

1/20W

PLACE_NEAR=U1800.H37:1.27mm

21

R1810PLACE_NEAR=U1800.H35:1.27mm

33

MF2015%

1/20W

21

R1813 33

5%

1/20W

PLACE_NEAR=U1800.K37:1.27mm

21

R1812 33

MF2015%

201

5%

1/20WMF

2

1

R1844 10K

5%

201MF1/20W

2

1

R1847

MF201

5%

NOSTUFF1/20W

10K

2012

1

R1846 10K

2011/20W5%

5%

201MF1/20W

21

R1880 0

MF201

1/20W2

1/20W5%

201MF

10K

2

1/20W5%

201MF

10K

21

R1888 NOSTUFF 0

5%

1/20W

19

21

R1841

0

5%

1/20W MF 201

NOSTUFF21

R1840

0

5%

1/20W MF 201

MF201

1R1864

201 MF 1/20W

6 40

42 69 2

1R1861

6 40

42 69 2

1R1862

201 MF 1/20W

6 40

42 69 2

MF201

1/20W

2

1

R1899 10K

MF201

1/20W

2

1

R1803 20K

MF201

5%

1/20W2

1

R1802

MF5%

1.0UF

X5R0201-MUR2

1

C1802

6.3VX5R0201-MUR20%

2 1

R18851/20W1%

90.9

MF201

1%

1/20W

SYNC_DATE=12/13/2010 SYNC_MASTER=K21_MLB

PCH SATA/PCIE/CLK/LPC/SPI

PCH_INTVRMEN_L PCH_INTRUDER_L

SPI_MOSI_R PCH_SPKR

SMC_SCI_L HDA_SYNC_R

TP_SATA_B_D2RN TP_SATA_B_D2RP SATA_HDD_D2R_P LPC_SERIRQ

TP_SATA_B_R2D_CP

PCH_SATA3RBIAS PCH_SATA3COMP

PCH_SATAICOMP

SPI_MISO

PCIECLKRQ5_L_GPIO44

HDA_SDOUT_R JTAG_T29_TMS ENET_MEDIA_SENSE

TP_SATA_F_D2RP TP_SATA_F_R2D_CN TP_SATA_F_R2D_CP

PCH_SATALED_L

TP_SATA_E_R2D_CP TP_SATA_D_R2D_CN

PCH_SRTCRST_L

SATA_HDD_R2D_C_P SATA_HDD_R2D_C_N

RTC_RESET_L

PCH_INTRUDER_L PCH_INTVRMEN_L

HDA_BIT_CLK_R HDA_SYNC_R

HDA_RST_R_L HDA_SDIN0 TP_HDA_SDIN1 TP_HDA_SDIN2

XDP_PCH_TCK

SPI_CS0_R_L SPI_CLK_R

SYSCLK_CLK32K_RTC

SATA_HDD_D2R_N

TP_SATA_E_D2RN TP_SATA_E_D2RP TP_SATA_E_R2D_CN

TP_SATA_F_D2RN

DP_AUXCH_ISOL SATARDRVR_EN

T29_PWR_EN_PCH TP_LPC_DREQ0_L

TP_PCH_GPIO67_CLKOUTFLEX3TP_PCH_GPIO66_CLKOUTFLEX2TP_PCH_GPIO65_CLKOUTFLEX1TP_PCH_GPIO64_CLKOUTFLEX0PCH_XCLK_RCOMP

PCH_CLK33M_PCIIN

PCH_CLK100M_SATA_NPCH_CLK100M_SATA_P

PCH_CLK96M_DOT_NPCH_CLK96M_DOT_PPCH_CLKIN_GNDP1PCH_CLKIN_GNDN1

PCIE_CLK100M_PCH_P PCIE_CLK100M_PCH_N TP_PCH_CLKOUT_DPP TP_PCH_CLKOUT_DPN

DMI_CLK100M_CPU_N DMI_CLK100M_CPU_P PEG_CLK100M_P PEG_CLK100M_N PEG_CLKREQ_L TP_CLINK_RESET_L

TP_CLINK_CLK TP_CLINK_DATA

ITPXDP_CLK100M_N ITPXDP_CLK100M_P PCH_GPIO46 TP_PCIE_CLK100M_PE7P

TP_PCIE_CLK100M_PE6P TP_PCIE_CLK100M_PE6N PEG_B_CLKRQ_L_GPIO56 TP_PCIE_CLK100M_PEBP TP_PCIE_CLK100M_PEBN PCIECLKRQ5_L_GPIO44 TP_PCIE_CLK100M_PE5P TP_PCIE_CLK100M_PE5N T29_CLKREQ_L

PCIE_CLK100M_T29_P PCIE_CLK100M_T29_N EXCARD_CLKREQ_L

PCIE_CLK100M_EXCARD_N PCIE_CLK100M_EXCARD_P PCIECLKRQ2_L_GPIO20 TP_PCIE_CLK100M_PE2P TP_PCIE_CLK100M_PE2N AP_CLKREQ_L

PCIE_CLK100M_AP_P PCIE_CLK100M_AP_N PCIECLKRQ0_L_GPIO73

NC_PCIE_3_D2RN PCIE_AP_R2D_C_P PCIE_AP_R2D_C_N NC_PCIE_1_D2RP

TP_PCIE_CLK100M_PE0N TP_PCIE_CLK100M_PE0P

NC_PCIE_1_R2D_CN NC_PCIE_1_D2RN

SMBUS_PCH_CLK PCH_GPIO11

NC_PCIE_8_R2D_CP

NC_PCIE_8_D2RP NC_PCIE_8_R2D_CN

NC_PCIE_7_R2D_CP NC_PCIE_8_D2RN NC_PCIE_7_R2D_CN NC_PCIE_7_D2RP NC_PCIE_7_D2RN

NC_PCIE_6_R2D_CN NC_PCIE_6_R2D_CP NC_PCIE_6_D2RP NC_PCIE_6_D2RN NC_PCIE_5_R2D_CP NC_PCIE_5_R2D_CN NC_PCIE_5_D2RP

PCIE_EXCARD_R2D_C_P NC_PCIE_5_D2RN PCIE_EXCARD_R2D_C_N PCIE_EXCARD_D2R_P

NC_PCIE_3_R2D_CP PCIE_EXCARD_D2R_N NC_PCIE_3_R2D_CN NC_PCIE_3_D2RP

PCIE_AP_D2R_N PCIE_AP_D2R_P NC_PCIE_1_R2D_CP

SML_PCH_1_DATA SML_PCH_1_CLK SML_PCH_1_ALERT_L SML_PCH_0_DATA

SML_PCH_0_ALERT_L SML_PCH_0_CLK SMBUS_PCH_DATA

PCH_CLK14P3M_REFCLKSYSCLK_CLK25M_SB_R SYSCLK_CLK25M_SB

=PP3V3_T29_PCH_GPIO

T29_CLKREQ_L PEG_CLKREQ_L

=PP3V3_S0_PCH_STRAPS

PCIECLKRQ2_L_GPIO20

WOL_EN TP_PCIE_CLK100M_PE7N

Trang 17

OUTOUTOUTOUTOUT

INBI

OUTOUTOUTOUT

ININ

IN

ACPRESENT/GPIO31SUSWARN*/SUSPWRDNACK/GPIO30DPWROK

DMI3RXPDMI2RXPDMI1RXPDMI0RXP

DRAMPWROK

FDI_RXN6FDI_RXN7FDI_RXP0FDI_RXP3

FDI_RXP1FDI_RXP2FDI_RXP5FDI_RXP4FDI_RXP7FDI_INTFDI_FSYNC0FDI_LSYNC0FDI_FSYNC1FDI_LSYNC1WAKE*

CLKRUN*/GPIO32

SUSCLK/GPIO62SUS_STAT*/GPIO61SLP_S5*/GPIO63SLP_S4*

SLP_A*

SLP_LAN*/GPIO29PMSYNCH

DSWVRMENSLP_SUS*

SUSACK*

DMI2TXNDMI1TXNDMI0TXPDMI3TXNDMI1TXPDMI2TXPDMI3TXP

DMI_ZCOMP

SYS_RESET*

SYS_PWROKPWROK

BATLOW*/GPIO72RI*

FDI_RXN0FDI_RXN1FDI_RXN3FDI_RXN2FDI_RXN4FDI_RXN5

DMI0RXNDMI3RXN

L_BKLTENL_BKLTCTL

LVD_VREFLLVD_VREFHLVD_VBGLVD_IBG

LVDSA_CLK*

LVDSA_CLK

SDVO_TVCLKINPSDVO_TVCLKINNSDVO_STALLPSDVO_STALLNSDVO_INTPSDVO_INTNSDVO_CTRLDATASDVO_CTRLCLKDDPB_AUXNDDPB_AUXPDDPB_0NDDPB_HPDDDPB_0PDDPB_1NDDPB_1PDDPB_2PDDPB_2NDDPB_3NDDPB_3PDDPC_CTRLCLKDDPC_CTRLDATADDPC_AUXNDDPC_AUXPDDPC_HPDDDPC_0NDDPC_1P

DDPC_0PDDPC_1NDDPC_2PDDPC_2NDDPC_3PDDPC_3NDDPD_CTRLCLKDDPD_CTRLDATADDPD_AUXPDDPD_AUXNDDPD_HPDDDPD_0NDDPD_0PDDPD_1NDDPD_1PDDPD_2NDDPD_3NDDPD_2PDDPD_3P

CRT_BLUECRT_GREENCRT_REDCRT_DDC_CLKCRT_DDC_DATACRT_HSYNCDAC_IREFCRT_VSYNCCRT_IRTN

NCNCNC

NC

NCNCNCNC

NCNCNCNCNCNC

NCNCNCNC

NC

NCNC

OUTOUTOUT

IN

BRANCHREVISION

DRAWING NUMBER SIZE

DR

SHEETPAGE TITLE

B

Set to Vcc when High DF_TVS:DMI & FDI Term Voltage Set to Vss when Low

A7C7B20

BH8BK12

BB10BK8BH12

F22

B12A21

BF19BD19AY17BB17BJ17BL17

AY19BB19BL19BJ19

BK20AY22BB22BJ23BL23

BF22BD22BJ21BL21

AU42AU40AR49AR51AT48AT50R44W42

AH50AJ51AL49AM50

AH48AJ49AL51AM48

AH46AH44

AK40AN44AN49AR46

AK42AN46AN51AR44

AK44AK46AG49AG51AH40AH42

M42K46L51M40R42

M44L49

BK44

U42M48AU44AU46

BJ45BL45BL47BJ47BD42BF42BG49BG51

BE46

U44T50AU49AU51

BE51BE49BF45BF46BD50BD48BC51BC49

AY42AW49AW51

BA51BA49BB46AY46AY44AY50AY48

R51N51U46

T48M50

R46N49R49M46

U1800

OMIT_TABLE

COUGAR-POINT

MOBILE-SFFFCBGA

2 1

R1986 0

MF201

MF2015%

1/20WNOSTUFF

MF201

1/20W

2

1

R1915 390K

MF201

1K

MF2015%

=PP3V3_S0_PCH_STRAPS

PCH_DMI_COMP

=PP1V05_S0_PCH_VCCIO_PCIE

=T29_WAKE_LMAKE_BASE=TRUEPCIE_WAKE_L

TP_SDVO_TVCLKINP TP_SDVO_TVCLKINN

TP_SDVO_STALLP TP_SDVO_STALLN

TP_SDVO_INTP TP_SDVO_INTN

DP_IG_B_DDC_DATA DP_IG_B_DDC_CLK

DP_IG_B_AUX_N DP_IG_B_AUX_P

TP_DP_IG_D_AUXP TP_DP_IG_D_AUXN TP_DP_IG_D_HPD TP_DP_IG_D_MLN<0>

PCH_DAC_IREF TP_CRT_IG_VSYNC

=PPVRTC_G3_PCH

FDI_FSYNC<1>

LPC_PWRDWN_L PM_DSW_PWRGD

PM_BATLOW_L PCH_DMI2RBIAS

PM_SYNC GPIO29_SLP_LAN_L

DMI_N2S_P<2>

DMI_N2S_P<1>

DMI_N2S_P<0>

PM_RSMRST_L PM_PCH_APWROK

TP_PM_SLP_A_L PM_SLP_S3_L

=PP3V3_SUS_GPIO

PCH_SUSWARN_L

=PP3V3_SUS_GPIO

PCIE_WAKE_L PCH_SUSWARN_L

19 OF 109 2.5.0 051-8871

Trang 18

BIBIIN

IN

TP20TP19TP18TP17TP16TP15TP14TP13TP12TP11TP10TP9TP8TP7TP6TP5TP4TP3TP2TP1 RSVD_BE3

RSVD_BE1RSVD_AU8RSVD_BJ7RSVD_BH3RSVD_BA3RSVD_AU6RSVD_AW1RSVD_AW3RSVD_AY6RSVD_AY2RSVD_AY4RSVD_BC1RSVD_BC3RSVD_BG1RSVD_BG3RSVD_BE6RSVD_BF7RSVD_BH4RSVD_BJ4RSVD_BJ5RSVD_BK6DF_TVSRSVD_AY8RSVD_BL5RSVD_BB6RSVD_BD2RSVD_BD4RSVD_BF6RSVD_BA1USBP0NUSBP1NUSBP0PUSBP1PUSBP2NUSBP2PUSBP3NUSBP3PUSBP4NUSBP4PUSBP5NUSBP5PUSBP6NUSBP6PUSBP7NUSBP7PUSBP8NUSBP8PUSBP9NUSBP9PUSBP10NUSBP10PUSBP11PUSBP11NUSBP12NUSBP12PUSBP13PUSBP13N

USBRBIAS*

USBRBIAS

TP22TP21TP23TP24TP41TP42TP25TP26TP27TP28TP29TP31TP30TP32TP33TP34TP35TP36TP37TP38TP40TP39PIRQB*

PIRQA*

PIRQC*

REQ1*/GPIO50PIRQD*

REQ2*/GPIO52REQ3*/GPIO54GNT1*/GPIO51GNT2*/GPIO53PIRQE*/GPIO2GNT3*/GPIO55

PIRQH*/GPIO5PIRQG*/GPIO4PIRQF*/GPIO3PME*

CLKOUT_PCI0PLTRST*

CLKOUT_PCI2CLKOUT_PCI3CLKOUT_PCI1CLKOUT_PCI4

OC1*/GPIO40OC0*/GPIO59OC2*/GPIO41OC3*/GPIO42OC4*/GPIO43OC5*/GPIO9OC6*/GPIO10OC7*/GPIO14

NCNC

NCNCNCNC

NCNCNC

NCNC

NC

NCNC

NCNCNC

NCNC

NCNCNCNC

NCNCNC

NCNCNCNCNC

NCNCNC

NCNCNCNCNC

NCNCNC

NCNCNCNC

NC

NCNCNC

NC

BIBI

OUT

OUTOUT

OUT

BRANCHREVISION

DRAWING NUMBER SIZE

DR

SHEETPAGE TITLE

B

ON AP_PWR_EN IF ISOLATION RESISTORR2090 IS UNSTUFFED

NOTE: PULLUP IS REQUIRED

FIXME: NEED INTEL APPROVAL OF NC ON TPS

PUs TO S0 INSTEAD?

USB HUB 1

Unused Unused Unused

Unused Unused

Unused

USB HUB 2 Unused

Camera

Unused Unused Unused

A29C29K28M28B32D32F26H26B28D28K26M26F28H28A27C27A25C25

K33M33F30H30F33H33A31C31

H24F24

AR42AR40AN40AN42BH16

BB42BH49

BD30

BK16

BD28AY28BD26BF30BF28BB28BF26BL29BL31BL27

BH20

BL25BJ29BJ31BJ27BJ25

K30W40BL7BJ48AD46

BK24

AD44D24B24AD10AT2AT4AM4E3M30D20BH24

BL5BK6

BJ7

BJ5BJ4BH4

BH3

BG3BG1BF7

BF6BE6

BE3BE1

BD4BD2

BC3BC1

BB6BA3

BA1AY8

AY6AY4AY2

AW3AW1

AU8

AU6

F46K44G46

H2F7

F40F45C41A47

C45C47C48D49

H15C23B16A11D16A13A17C17

D44H42F42

BC7

G45J43H48E49G51

U1800

FCBGAMOBILE-SFF

MF201

5%

1/20WNOSTUFF

2

1

R2068 10K

1/20W5%

201MF

10K

1/20W2

201MF

201 MF

10K

R2090 0

5%

MF1/20W201

21

R2080

2015%

MF1/20W

PCH_GPIO14_OC7_L

PCH_GPIO43_OC4_L SDCONN_STATE_CHANGE PCH_GPIO10_OC6_L PCH_PCI_GNT1_L

TP_PM_TEST_RST_L

USB_HUB1_UP_N

NC_USB_1N USB_HUB1_UP_P

NC_USB_1P NC_USB_2N NC_USB_2P NC_USB_3N NC_USB_3P NC_USB_4N NC_USB_4P NC_USB_5N NC_USB_5P NC_USB_6N NC_USB_6P NC_USB_7N NC_USB_7P

USB_HUB2_UP_P USB_CAMERA_N USB_CAMERA_P NC_USB_10N NC_USB_10P

NC_USB_11P NC_USB_11N

NC_USB_12N NC_USB_12P

NC_USB_13P NC_USB_13N

PCH_USB_RBIAS

PCI_INTB_L PCI_INTA_L PCI_INTC_L

JTAG_GMUX_TMS PCI_INTD_L

T29_A_HV_EN_L PCI_REQ3_L PCH_PCI_GNT1_L PCH_PCI_GNT2_L

PCI_INTE_L PCH_PCI_GNT3_L

AUD_I2C_INT_L AUD_IP_PERIPHERAL_DET

TP_PCI_PME_L

LPC_CLK33M_SMC_R PLT_RESET_L

TP_PCI_CLK33M_OUT2 TP_PCI_CLK33M_OUT3 LPC_CLK33M_LPCPLUS_R

PCH_CLK33M_PCIOUT

SDCONN_STATE_RST_L USB_HUB2_UP_N

Trang 19

OUTBI

INININ

OUT

OUTIN

RCIN*

PECITACH1/GPIO1

TACH2/GPIO6BMBUSY*/GPIO0

TACH7/GPIO71TACH6/GPIO70

GPIO57TACH4/GPIO68

SDATAOUT1/GPIO48SATA5GP/GPIO49SDATAOUT0/GPIO39SLOAD/GPIO38

SATA2GP/GPIO36GPIO35GPIO28GPIO27

SCLOCK/GPIO22GPIO24/MEM_LEDTACH0/GPIO17

GPIO8LAN_PHY_PWR_CTRL/GPIO12TACH3/GPIO7

A20GATE

SATA4GP/GPIO16GPIO15

STP_PCI*/GPIO34

TACH5/GPIO69

SATA3GP/GPIO37

VSS_NCTF_A4VSS_NCTF_A48VSS_NCTF_A5VSS_NCTF_A49VSS_NCTF_BH51

VSS_NCTF_A51VSS_NCTF_BH1VSS_NCTF_BJ3VSS_NCTF_BJ1VSS_NCTF_BJ49VSS_NCTF_BL1VSS_NCTF_BJ51VSS_NCTF_BL3VSS_NCTF_BL4VSS_NCTF_BL48VSS_NCTF_BL51VSS_NCTF_BL49VSS_NCTF_C3VSS_NCTF_C49VSS_NCTF_C51VSS_NCTF_D51VSS_NCTF_D1VSS_NCTF_E1

TS_VSS1TS_VSS2TS_VSS3TS_VSS4NC_1

Y A

BRANCHREVISION

DRAWING NUMBER SIZE

DR

SHEETPAGE TITLE

B

GPIO[68:71] have 15K-45K internal PUs

ALL RSVD TPs NC-ed per INTEL approval

(IPU) (IPU)

This has internal pull up and should not pulled low.

(NC-ed per Intel chklist) (PU necessary?)

THIS SIGNAL IS INTENDED FOR FIRMWARE HUB AND WE ARE NOT USING IT.

(PUs necessary?) (PU necessary?)

AH10AK12AH12AK10BC9

A41D40A43K42

A45C43B40

B44

R3

N3U1U10W3

AA1

AA3

M6W6

U6AU10AU12

OMIT_TABLE

COUGAR-POINT

MOBILE-SFFFCBGA

2

1

R2186 10K

MF2015%

1/20W2

1

R2185 10K

MF2015%

1/20W2

MF2015%

1

R2173

MF1/20W5%

201

10K

DRAM_CFG2:H2

MF2015%

1/20W

2

1

R2175 10K

MF201

5%

1/20WDRAM_CFG0:H

MF201

MF2015%

1/20W

2

1

R2197 NOSTUFF 10K

MF2015%

1/20W

2

1

R2110 NOSTUFF 10K

MF201

5%

1/20WMF201

2

1

R2150 10K

MF201

201MF

10K

2 1R2140

5%

0

21

R2156

1/20W5%

201MF

390

2 1R2170MF 201 5%

1/20W

NOSTUFF 43

1/20W MF

DRAM_CFG3:L

38

465U2150

74LVC2G08GTSOT833

78

421U2150

74LVC2G08GTSOT833

1/20W

R2152 0

2015%

MF1/20W

NC_GPIO8 SMC_RUNTIME_SCI_L GMUX_INT

JTAG_ISP_TDO JTAG_ISP_TDI

=PP3V3_SUS_GPIO

ODD_PWR_EN_L

MLB_RAM_CFG3MLB_RAM_CFG2MLB_RAM_CFG1

PCH_PROCPWRGD PM_THRMTRIP_L_R PCH_RCIN_L

Trang 20

VCCDFTERM_AJ15VCCDFTERM_AJ13

VCCDMI_AM23VCCCLKDMI

VCCVRM_AW21VCCVRM_AU21VCC3_3_U37VCC3_3_T39VCCTX_LVDS_AJ37VCCTX_LVDS_AG39

VCCDMI_AU15VCCDMI_AW16VCCIO_AK21

VCCAFDIPLL_AP13VCCAFDIPLL_AP15VCCVRM_AW18VCCVRM_AU19

VCCIO_AW34VCC3_3_BK28VCCIO_AU35VCCIO_AU29VCCIO_AU27VCCIO_AU25VCCIO_AU23

VCCIO_AR27VCCIO_AR29VCCIO_AR25VCCIO_AR23

VCCIO_AR15VCCIO_AT13

VCCIO_AM21VCCAPLLEXP

VCCCORE_AM33VCCCORE_AM35VCCCORE_AK33VCCCORE_AK31VCCCORE_AK29

VCCCORE_AJ29VCCCORE_AJ31VCCCORE_AJ27VCCCORE_AJ25VCCCORE_AJ23

VCCCORE_AG27VCCCORE_AJ21VCCCORE_AG25VCCCORE_AG23VCCCORE_AG21

VCCCORE_AF21VCCCORE_AF23VCCCORE_AE23VCCCORE_AE21VCCCORE_AB21

VCCTX_LVDS_AF37VSSALVDS_AE33

VCCCORE_AC23VCCCORE_AC21VCCCORE_AB23

VCCASW_V19VCCASW_R19VCCASW_U19VCCIO_AC15VCCIO_AC13VCCIO_AB15VCCVRM_AF17VCCVRM_AE19VCCAPLLSATAVCCIO_AF15VCCIO_AG15VCCIO_AG13VCCIO_AA13VCC3_3_AF6VCC3_3_R40VCC3_3_AC19VCC3_3_AB19VCCSUS3_3_U35VCCSUS3_3_U33VCCSUS3_3_R35VCCSUS3_3_R33V5REFVCCSUS3_3_AM27DCPSUS_AU31V5REF_SUSVCCIO_N18VCCSUS3_3_N27VCCSUS3_3_U29VCCSUS3_3_U27VCCSUS3_3_R29VCCSUS3_3_R27VCCIO_U25VCCIO_U23VCCIO_R25VCCIO_R23

BRANCHREVISION

DRAWING NUMBER SIZE

DR

SHEETPAGE TITLE

B

VCCACLK pin left as NC per DG

AL24 left as NC per DG

1.44 A Max, 474mA Idle

55mA Max, 5mA Idle

VCCAPLLDMI2 pin left as NC per DG

PCH output, for decoupling only

10 mA Max, 1mA Idle

2

0.1UF

16VX5R-CERM020110%

PLACE_NEAR=U1800.N16:2.54mm

2

CERM10%

PLACE_NEAR=U1800.R15:2.54mm

0.1UF

21

R2260

1/16W5%

402MF-LF

0

21

R2265

1/16W5%

402MF-LF

PLACE_NEAR=U1800.N16:2.54mm

2

6.3V10%

402CERM

0.1UF

2

16VX5R-CERM020110%

0.1UF

AE33AC33V50

Y19

AW34AU35AU29AU27AU25AU23

AT13

AR29AR27AR25AR23AR15AM21

AK21AW16AU15

AM23

AL13AK15AJ15AJ13

AM35AM33AK33AK31AK29AJ31AJ29AJ27AJ25AJ23AJ21AG27AG25AG23AG21AF23AF21AE23AE21AC23AC21AB23AB21

AP39AP19

AG33AF33

AP15AP13

U51

U37T39

BK28

U1800

FCBGAMOBILE-SFF

COUGAR-POINT

OMIT_TABLE

AF17AE19AC39

V31

U35U33

U29U27

R35R33

R29R27N27

AM27

AC35

N16

U25U23R25R23

N18AP27

AJ17

AG15AG13AF15

AC15AC13AB15AA13R12

AE39AE37AC37

Y31Y29Y27Y25Y23Y21V25V23V21

V19

U21

U19R19

AE31AE29AE27AC31AC29AC27AB31AB29AB27

AM2AW31

BD40BF40

AC51

V39V37

R40AF6AC19AB19

AU31AR33

U17

U15R15

U1800

FCBGAMOBILE-SFF

COUGAR-POINT

OMIT_TABLE

PCH POWER

MIN_NECK_WIDTH=0.2 MMVOLTAGE=1.05V

PP1V05_S0_PCH_VCCADPLLB

PP1V05_S0_PCH_VCCADPLLA

MIN_NECK_WIDTH=0.2 MMVOLTAGE=1.05V

PP1V05_S0_PCH_VCCADPLLA

=PP3V3_S5_PCH_VCCDSW TP_PPVOUT_PCH_DCPSUSBYP PP3V3_S0_PCH_VCC3_3_CLK_F

=PP1V05_S0_PCH_VCCIO_CLK

MIN_NECK_WIDTH=0.2 mmMIN_LINE_WIDTH=0.2 mmVOLTAGE=3.3V

Trang 21

VSS_BA7VSS_B46VSS_B42VSS_B38VSS_B34VSS_B30VSS_B26VSS_B22VSS_B18VSS_B14VSS_B10VSS_B6VSS_AY10VSS_AW45VSS_AW43VSS_AW41VSS_AW39VSS_AW36VSS_AW29VSS_AW27VSS_AW25VSS_AW23VSS_AW13VSS_AW11VSS_AW9VSS_AW7VSS_AV50VSS_AV48VSS_AV4VSS_AV2VSS_AU37VSS_AU17VSS_AT45VSS_AT43VSS_AT41VSS_AT39VSS_AT11VSS_AT9VSS_AT7VSS_AR37VSS_AR35VSS_AR31VSS_AR21VSS_AR19VSS_AR17VSS_AR8VSS_AR6VSS_AP50VSS_AP48VSS_AP45VSS_AP43VSS_AP41VSS_AP37VSS_AP35VSS_AP33VSS_AP31VSS_AP29VSS_AP25VSS_AP23VSS_AP21VSS_AP17VSS_AP11VSS_AP9VSS_AP7VSS_AP4VSS_AP2VSS_AM37VSS_AM31VSS_AM29VSS_AM25VSS_AM19VSS_AM15VSS_AL45VSS_AL43VSS_AL41VSS_AL39VSS_AL11VSS_AL9VSS_AL7

VSS_AK50VSS_AK48VSS_AK37VSS_AK35VSS_AK27VSS_AK25VSS_AK23VSS_AK19VSS_AK17VSS_AK4VSS_AK2VSS_AJ45VSS_AJ43VSS_AJ41VSS_AJ39VSS_AJ35VSS_AJ33VSS_AJ19VSS_AJ11VSS_AJ9VSS_AJ7VSS_AH2VSS_AG45VSS_AG43VSS_AG41VSS_AG35VSS_AG31VSS_AG29VSS_AG19VSS_AG17VSS_AG11VSS_AG9VSS_AG7VSS_AF50VSS_AF48VSS_AF35VSS_AF31VSS_AF29VSS_AF27VSS_AF25VSS_AF19VSS_AF8VSS_AF4VSS_AF2VSS_AE45VSS_AE43VSS_AE41VSS_AE35VSS_AE25VSS_AE17VSS_AE15VSS_AE13VSS_AE11VSS_AE9VSS_AE7VSS_AC45VSS_AC43VSS_AC41VSS_AC25VSS_AC17VSS_AC11VSS_AC9VSS_AC7VSS_AB50VSS_AB48VSS_AB37VSS_AB35VSS_AB33VSS_AB25VSS_AB17VSS_AB4VSS_AB2VSS_AA45VSS_AA43VSS_AA39VSS_AA11VSS_AA9VSS_AA7

VSS_BB48VSS_BA31VSS_BA34VSS_BA36VSS_BA39VSS_BA41VSS_BA43VSS_BA45VSS_BB4VSS_BB2

VSS_BA11VSS_BA13VSS_BA16VSS_BA18VSS_BA21VSS_BA23VSS_BA25VSS_BA27VSS_BA29VSS_BA9

VSS_AA41

VSS(9 OF 10)

VSS_G9VSS_F50VSS_F48VSS_F4VSS_F2VSS_D46VSS_D42VSS_D38VSS_D34VSS_D30VSS_D26VSS_D22VSS_D18

VSS_BK46VSS_BK42VSS_BK38VSS_BK34VSS_BK32VSS_BK30VSS_BK26

VSS_D14VSS_D10VSS_D6

VSS_BK22VSS_BK18VSS_BK14VSS_BK10VSS_BH48VSS_BH46VSS_BH44VSS_BH42VSS_BH38VSS_BH34VSS_BH32VSS_BH30VSS_BH28VSS_BH26VSS_BH22VSS_BH18VSS_BH14VSS_BH10VSS_BF50VSS_BF48VSS_BH6

VSS_BF24VSS_BF15

VSS_BE45VSS_BE43VSS_BE41VSS_BE39VSS_BE36VSS_BE34

VSS_BF4VSS_BF2

VSS_BE31VSS_BE29VSS_BE27VSS_BE25VSS_BE23VSS_BE21VSS_BE18VSS_BE16VSS_BE13VSS_BE11VSS_BE9VSS_BD24VSS_BD15VSS_BC45VSS_BC43VSS_BC41VSS_BC39VSS_BC36

VSS_BE7

VSS_BC31VSS_BC29VSS_BC27VSS_BC25VSS_BC23VSS_BC21VSS_BC18VSS_BC16VSS_BC13VSS_BC11VSS_BB50

VSS_Y37VSS_Y35VSS_Y33

VSS_V45VSS_V43VSS_V41VSS_V35VSS_V33VSS_V29VSS_V27

VSS_V48VSS_Y15VSS_Y17

VSS_V7VSS_V4VSS_V2VSS_U49VSS_U31VSS_T45

VSS_V9VSS_V11VSS_V15VSS_V17

VSS_T43VSS_T11VSS_T9VSS_T7VSS_R37VSS_R31VSS_R21VSS_R17

VSS_T13VSS_T41

VSS_P50

VSS_N45VSS_N43VSS_N41VSS_N39VSS_N34VSS_N31VSS_N29

VSS_P2VSS_P4VSS_P48

VSS_N13VSS_N11VSS_N9VSS_N7VSS_L45VSS_L43VSS_L41

VSS_N21VSS_N23VSS_N25

VSS_L29VSS_L27VSS_L25VSS_L23VSS_L21VSS_L18

VSS_L31VSS_L34VSS_L36VSS_L39

VSS_L16

VSS_L9VSS_L7VSS_K50VSS_K48VSS_K4VSS_K2VSS_J45

VSS_L11VSS_L13

VSS_J41

VSS_J29VSS_J27VSS_J25VSS_J23VSS_J21VSS_J18

VSS_J34VSS_J36VSS_J39

VSS_J9VSS_J7VSS_G43VSS_G41VSS_G39VSS_G36VSS_G34

VSS_J11VSS_J13VSS_J16

VSS_G25VSS_G23VSS_G21VSS_G18VSS_G16VSS_G13VSS_G11

VSS_G27VSS_G29VSS_G31

VSS_J31VSS_BC34

VSS(10 OF 10)

BRANCHREVISION

DRAWING NUMBER SIZE

DR

SHEETPAGE TITLE

B

G7

BB48

BB4BB2BA9

BA7

BA45BA43BA41BA39BA36BA34BA31

BA29BA27BA25BA23BA21BA18BA16BA13BA11

B6

B46B42B38B34B30B26B22B18B14B10AY10

AW9AW7

AW45AW43AW41AW39AW36AW29AW27AW25AW23AW13AW11

AV50AV48AV4AV2AU37AU17

AT9AT7

AT45AT43AT41AT39AT11

AR8AR6

AR37AR35AR31AR21AR19AR17

AP9AP7

AP50AP48AP45AP43AP41

AP4

AP37AP35AP33AP31AP29AP25AP23AP21

AP2

AP17AP11

AM37AM31AM29AM25AM19AM15

AL9AL7

AL45AL43AL41AL39AL11

AK50AK48

AK4

AK37AK35AK27AK25AK23

AK2AK19AK17

AJ9AJ7

AJ45AJ43AJ41AJ39AJ35AJ33AJ19AJ11AH2

AG9AG7

AG45AG43AG41AG35AG31AG29AG19AG17AG11

AF8

AF50AF48

AF4

AF35AF31AF29AF27AF25

AF2AF19

AE9AE7

AE45AE43AE41AE35AE25AE17AE15AE13AE11

AC9AC7

AC45AC43AC41AC25AC17AC11

AB50AB48

AB4

AB37AB35AB33AB25

AB2AB17

AA9AA7

AA45AA43AA41AA39AA11

V9V7

V48V45V43V41

V4

V35V33V29V27

V2

V17V15V11

U49U31

T9T7

T45T43T41T13T11

R37R31R21R17P50P48P4P2

N9N7

N45N43N41N39N34N31N29N25N23N21N13N11

L9L7

L45L43L41L39L36L34L31L29L27L25L23L21L18L16L13L11

K50K48K4K2

J9J7

J45J41J39J36J34J31J29J27J25J23J21J18J16J13J11

G9

G43G41G39G36G34

G31G29G27G25G23G21G18G16G13G11F50F48F4F2

D6

D46D42D38D34D30D26D22D18D14D10BK46BK42BK38BK34BK32BK30BK26BK22BK18BK14BK10

BH6

BH48BH46BH44BH42BH38BH34BH32BH30BH28BH26BH22BH18BH14BH10BF50BF48

BF4BF24

BF2BF15

BE9BE7

BE45BE43BE41BE39BE36BE34BE31BE29BE27BE25BE23BE21BE18BE16BE13BE11BD24BD15BC45BC43BC41BC39BC36BC34BC31BC29BC27BC25BC23BC21BC18BC16BC13BC11BB50 U1800

Trang 22

NCNC

BRANCHREVISION

DRAWING NUMBER SIZE

DR

SHEETPAGE TITLE

B

PCH VCC3_3 BYPASS (PCH PCI 3.3V PWR)

(PCH Reference for 5V Tolerance on USB)

(PCH HD Audio 3.3V/1.5V PWR)

(PCH USB 1.05V PWR) PCH VCCIO BYPASS

PCH VCCCORE BYPASS (PCH SUSPEND USB 3.3V PWR)

X5R10%

1UF

R2405 100

MF201

CERM40220%

PLACE_NEAR=U1800.M37:2.54mm

6

1

D2400 BAT54DW-X-G

SOT-363

R2404 10

MF5%

1/20W

201 3

4

D2400 BAT54DW-X-G

2

X5R-CERM020110%

2

0.1UF

X5R-CERM020110%

6.3V2

PLACE_NEAR=U1800.AU25:2.54mm

6.3V20%

0201X5R

6.3V2

PLACE_NEAR=U1800.AF23:2.54mm

1UF

X5R020120%

6.3V2

PLACE_NEAR=U1800.AC21:2.54mm

1UF

X5R020120%

0201X5R

6.3V2

1UF

X5R020120%

6.3V2

1UF

X5R020120%

6.3V

21

R2415 1

MF201

2

1

C2428 22UF

20%

6.3V0603X5R-CERM1

21

R2450 0

MF201

21

0201X5R

1UF

21

6.3V

21

L2406 10UH-0.12A-0.36OHM

6.3V

PCH DECOUPLING

MIN_NECK_WIDTH=0.25MMMIN_LINE_WIDTH=0.5MMVOLTAGE=1.05VMAKE_BASE=TRUE

VOLTAGE=1.05VMIN_LINE_WIDTH=0.5MMMIN_NECK_WIDTH=0.25MM

=PP5V_SUS_PCH_V5REFSUS

PP3V3_S0_PCH_VCC3_3_CLK_F

VOLTAGE=3.3VMIN_LINE_WIDTH=0.4 MMVOLTAGE=3.3V

Trang 23

IN

ININ

IN

INOUTOUTNC

IN

ININ

OUT

IN

BIIN

OUTINOUT

IN

ININ

NC

BIIN

ININ

BIINOUT

IN

ININ

BRANCHREVISION

DRAWING NUMBER SIZE

DR

SHEETPAGE TITLE

ODT AVAILABLE ON JTAG

HOOK1

OBSFN_B0

OBSFN_D1

OBSDATA_D2 OBSDATA_B0

OBSFN_C0

TCK1

PLACEMENT NOTE:

ITPCLK#/HOOK5 ITPCLK/HOOK4 OBSDATA_B3

PLACE TCK/TDI/TMS/TRST*

OBSFN_A0

OBSDATA_D1 OBSDATA_D0

DBR#/HOOK7 RESET#/HOOK6 VCC_OBS_CD

OBSDATA_A2 OBSDATA_A3

NOTE: XDP_DBRESET_L pulled-up to 3.3V on P 28

OBSDATA_A0 OBSDATA_A1

TCK0

PCH XDP CONN PLACE TDO TERM NEAR

PLACEMENT NOTE:

VCC_OBS_AB OBSDATA_B2

OBSDATA_C0

OBSDATA_C2

Even pins should be facing edge of the board

1K series R on PCH Support P 28

OBSFN_A0OBSFN_A1OBSDATA_A0OBSDATA_A1OBSDATA_A2OBSDATA_A3OBSFN_B0OBSFN_B1OBSDATA_B0OBSDATA_B1OBSDATA_B2OBSDATA_B3PWRGD/HOOK0HOOK1VCC_OBS_ABHOOK2HOOK3

SCLSDATCK1TCK0

XDP_PRESENT#

TMSTDITRSTnTDODBR#/HOOK7RESET#/HOOK6VCC_OBS_CDITPCLK#/HOOK5ITPCLK/HOOK4OBSDATA_D3OBSDATA_D2OBSDATA_D1OBSDATA_D0OBSFN_D1OBSFN_D0OBSDATA_C3OBSDATA_C2OBSDATA_C1OBSDATA_C0OBSFN_C1OBSFN_C0

Use with 920-0782 Adapter Flex to support chipset debug NOTE: This is not the standard XDP pinout

201 1/20W MF PLACE_NEAR=U1000.B50:2.54MM

R2579

XDP

PLACE_NEAR=U1800.AA3:2.54MM

1/20W 201 MF

51 XDP

16V

XDP

1C258110%

R2502

201

XDP

1/20W MF

R2585

201 1/20W

R2504910 XDP

5% 1/16W MF-LF 402

17

18

2 1

R2584

PLACE_NEAR=J2550.39:2.54MM

1K XDP

5%

MF-LF

1/16W 402

25

51

2 1

R2581

201 1/20W MF

XDP 0

18

2 1

R2578 PLACE_NEAR=U1800.G1:2.54MM

XDP

MF 1/20W 201

19 26

2 1

R2586

PLACE_NEAR=U1800.A13:2.54MM

XDP

1/20W 201 MF

0

5%

2 1

R2587

1/20W 5%

0 XDP

R2515

201 1/20W MF

R2516

201

XDP

1/20W MF PLACE_NEAR=R1840.1:2.54MM 5%

0

2 1

R25051/20W 201 MF

XDP 1K

PLACE_NEAR=U1800.U12:2.54MM 201 1/20W MF

XDP 51

2 1

R2563 0 XDP_CPU:BPM

5%

MF-LF

1/16W 402

2 1

R2564 5% 0 XDP_CPU:CFG

MF-LF

1/16W 402

10 23 66

2 1

402 5%

MF-LF

2 1

R2567MF-LF

XDP_CPU:CFG 0

5% 1/16W

402

2 1

R2565 0 XDP_CPU:CFG

5%

MF-LF

1/16W 402

2

1R2540

J2550 DF40RC-60DP-0.4V

M-ST-SM

XDP_CONNCRITICAL

XDP

201 MF

2

1

R25115%

51 XDP

PLACE_NEAR=U1000.M60

MF-LF 402

2

1

R251251

5%

XDP

PLACE_NEAR=U1000.L55:2.54MM

MF-LF 402

2

1

R2513

201 1/20W MF

51 XDP

PLACE_NEAR=U1000.L56:2.54MM

XDP 51

XDP_BPM_L<7>

XDP_BPM_L<5>

XDP_CPU_TMS

XDP_PCH_TDO CPU_CFG<0>

=PP3V3_S0_XDP

=SMBUS_XDP_SCL XDP_CPU_PWRBTN_L

XDP_CPU_TDI XDP_CPU_TMS

XDP_BPM_L<0>

CPU_CFG<1>

CPU_CFG<7>

XDP_CPU_TDO XDP_CPU_TRST_L

PCH_GPIO14_OC7_L PCH_GPIO10_OC6_L PCH_GPIO43_OC4_L

=SMBUS_XDP_SCL

=SMBUS_XDP_SDA TP_XDPPCH_HOOK3

XDP_PCH_TDI XDP_PCH_TMS XDP_PCH_TCK

ENET_LOW_PWR TP_XDP_PCH_OBSFN_D<0>

SMC_IG_THROTTLE_L PCH_GPIO15

=PP3V3_S5_XDP

SATARDRVR_EN DP_AUXCH_ISOL PCH_GPIO35

Trang 24

DS

BI

BIBI

BIBIBI

IN

ININ

BIBI

BIBIBIBI

BIBI

ININ

VDD33

SUSP_IND/LOCAL_PWR/NON_REM0SDA/SMBDATA/NON_REM1SCL/SMBCLK/CFG_SEL0HS_IND/CFG_SEL1

XTALIN/CLKINXTALOUT

TESTRESET*

THRM_PAD

USBDP_UP

NCOSC3*

OCS1*

OCS2*

USBDM_UP

RBIASVBUS_DETNC

NCNCUSBDP_DN3/PRT_DIS_P3USBDM_DN3/PRT_DIS_M3USBDP_DN2/PRT_DIS_P2USBDM_DN2/PRT_DIS_M2USBDP_DN1/PRT_DIS_P1USBDM_DN1/PRT_DIS_M1

XTALIN/CLKINXTALOUT

TESTRESET*

THRM_PAD

USBDP_UP

NCOSC3*

OCS1*

OCS2*

USBDM_UP

RBIASVBUS_DETNC

NCNCUSBDP_DN3/PRT_DIS_P3USBDM_DN3/PRT_DIS_M3USBDP_DN2/PRT_DIS_P2USBDM_DN2/PRT_DIS_M2USBDP_DN1/PRT_DIS_P1USBDM_DN1/PRT_DIS_M1

NCNC

TABLE_BOMGROUP_ITEM

TABLE_5_ITEMCRITICAL BOM OPTION

TABLE_5_HEADPART# QTY DESCRIPTION REFERENCE DESIGNATOR(S)

BOM OPTIONS BOM GROUP

TABLE_BOMGROUP_HEAD

TABLE_BOMGROUP_ITEM

TABLE_5_ITEM TABLE_5_ITEM

TABLE_BOMGROUP_ITEM TABLE_BOMGROUP_ITEM TABLE_BOMGROUP_ITEM

BRANCHREVISION

DRAWING NUMBER SIZE

DR

SHEETPAGE TITLE

B

IPUIPU

1 0 Port 1 and 2 are non removable

IPU

1 1 Port 1, 2, and 3 are non removable

T29

Trackpad/KeyboardRight USB AIPU

IPU

LIO External DSDCARD(NA to K78)

BlueTooth

2

1R2641

201 1/20W MF

10K

5%

45

3

Q2640SOT-363

2N7002DW-X-G

2 1

R2640

20K

MF 1/20W 5%

201

12

100PF

CERM 5%

2

1

C2619

201 25V NP0-C0G 5%

CRITICAL

18PF

2 1

R2630

MF 1/20W 5%

1C2616

0201 20%

6.3V X5R

1C2618

0201 20%

6.3V X5R

MF 1/20W

100K

8

6 39

2 1

R2605

201 1/20W MF

10K

201 2

1R2607

201

10K

MF 5%

1/20W 2

1R2604

10KHUB1_NONREM0_0

5%

1/20W MF 201

1UF

X5R 20%

2

1C2665

0201 X5R-CERM 10%

2

1

R2650

201 MF 1/20W 1%

BYPASS=U2650.10::2mm

16V 2

R2655

201 MF 5%

10K

5%

MF 1/20W 201 2

1/20W MF 201 2

742

30

631

11

28222426

35

181612

1917132120

9825

742

30

631

11

28222426

35

181612

1917132120

9825

U2650

USB2513B

QFNOMIT_TABLE

CRITICAL

21Y265024.000M-150PPM-6PF2X1.6X0.65-SM

CRITICAL

2

1C2670

201 NP0-C0G 25V 5%

18PF

CRITICAL

2 1

R2680

201 MF 1/20W 5%

R2690

201 5%

1/20W MF

0

HUB2_NONREM1_1,HUB2_NONREM0_1 HUB2_3NONREM

HUB1_NONREM1_0,HUB1_NONREM0_0 HUB1_ALLREM

SMSC USB25142

338S0720

HUB2_NONREM1_0,HUB2_NONREM0_0 HUB2_ALLREM

USB_HUB2_XTAL2USB_HUB2_XTAL1

USB_TPAD_HUB_P

PPUSB_HUB2_PLLFILT

MIN_NECK_WIDTH=0.2MM VOLTAGE=1.8V MIN_LINE_WIDTH=0.4MM

USB_HUB2_NONREM0USB_HUB2_NONREM1USB_HUB2_CFG_SEL0USB_HUB2_CFG_SEL1

USB_HUB2_TESTUSB_HUB_RESET_L

USB_HUB2_UP_P

NC_USB_HUB2_PRTPWR4USB_EXTA_OC_L

TP_USB_HUB2_OCS1NC_USB_HUB2_OCS2

USB_HUB2_UP_N

USB_HUB2_RBIASUSB_HUB2_VBUS_DET

=USB_HUB2_OCS4

USB_EXTA_PUSB_EXTA_NUSB_TPAD_HUB_NUSB_BT_PUSB_BT_N

NC_USB_HUB2_PRTPWR3

TP_USB_HUB2_PRTPWR1NC_USB_HUB2_PRTPWR2

TP_USB_HUB1_PRTPWR1NC_USB_HUB1_PRTPWR3

USB_T29A_NUSB_T29A_PUSB_SDCARD_NUSB_SDCARD_PUSB_EXTD_NUSB_EXTD_P

=USB_HUB1_OCS4USB_HUB1_VBUS_DETUSB_HUB1_RBIASUSB_HUB1_UP_N

NC_USB_HUB1_OCS2TP_USB_HUB1_OCS1USB_EXTD_OC_LNC_USB_HUB1_PRTPWR4

USB_HUB1_UP_P

USB_HUB_RESET_LUSB_HUB1_TEST

USB_HUB1_CFG_SEL1USB_HUB1_CFG_SEL0USB_HUB1_NONREM1USB_HUB1_NONREM0

MIN_LINE_WIDTH=0.4MM

PPUSB_HUB1_CRFILT

MIN_NECK_WIDTH=0.2MM VOLTAGE=1.8V

VOLTAGE=1.8V MIN_NECK_WIDTH=0.2MM

PPUSB_HUB1_PLLFILT

USB_HUB1_XTAL2USB_HUB1_XTAL1

=PP3V3_S3_USB_HUB

USB_HUB_SOFT_RESET_L

26 OF 109 2.5.0 051-8871

Trang 25

PAD

VDDIO_25M_CVDDIO_25M_BVDDIO_25M_A

25MHZ_C25MHZ_B25MHZ_AX1

X2VDD_RTC_OUTTHRMGND32KHZ_A

NCNC

OUTOUT

ININ

BIIN

NC

BRANCHREVISION

DRAWING NUMBER SIZE

DR

SHEETPAGE TITLE

B

Buffered

VTT voltage divider on CPU page

System RTC Power Source & 32kHz / 25MHz Clock Generator

+V3.3A should be first

to reduce VBAT draw.

SB XTAL Power

T29 XTAL Power

Unbuffered

No Coin-Cell: 3.3V S5 Coin-Cell & No G3Hot: 3.3V S5 Coin-Cell & G3Hot: 3.42V G3Hot

No Coin-Cell: 3.42V G3Hot (no RC) Coin-Cell: VBAT (300-ohm & 10uF RC)

UNUSED clock terminations for FCIM MODE

CLOCK (CK505)

VBAT and +V3.3A are

outputs for power savings Ground VDDIO of unused CLK

PCH Reset Button PCH S0 PWRGD

NOTE: 30 PPM crystal required

2

1R2757

201 MF 1/20W 5%

10%

10V X5R 402-1

2

1C2710

402-1 X5R

1UF

10V

3 4

14 6 11

U2700SLG3NB148V

5%

25V NP0-C0G 201

12PF

2 1C270612PF

5%

25V NP0-C0G 201

201 5%

33

1/20W MF

2 1R2788

5%

0

1/20W MF 201

2 1R2781

201 MF 1/20W

33

5%

2 1R2771

5%

0

1/20W MF 201

18

26

2 1R27891K

5%

XDP

1/20W MF 201

2 1R27930

5%

MF 201 1/20W

2

1R2780100K

5%

1/20W 201 MF

4 5

3 2

16V X5R-CERM 0201 10%

40 69

6 42 69

16 68

2 1R2727

201 MF 1/20W

PLACE_NEAR=U1800.G51:5.1mm

5%

22

2 1R2726

201 MF 1/20W

22

5%

PLACE_NEAR=U1800.E49:5.1mm

2 1R2729

201 MF 1/20W 5%

201 5%

1/20W MF

0

NO STUFF

PLACE_NEAR=U1800.M10:5.54mm

2 1R2763

201 5%

1/20W MF

0

NO STUFF

2 1R2762

201 5%

1/20W MF

3.0K

2 1R2760

201 5%

1/20W MF

0

2

1 C2760

0201 16V X5R-CERM 10%

0.1UF

5 4 1 2 3U2760MC74VHC1G08 SC70-HF

5 4 1 2 3U2750MC74VHC1G08 SC70-HF 2

1R2750

201 MF 1/20W

SILK_PART=SYS RESET

MF-LF 5%

0

402

2

1R27955%

1/16W

10K

402 2 1R2796XDP

5%

0

MF-LF 402

0.1UF

10%

16V 2

1C272416V 10%

0.1UF

X5R-CERM 0201

2 1R2705

201

0

5%

MF 1/20W

2

1R2706

201 1/20W 5%

5%

1/20W MF

201 2

1R275210K

5%

1/20W MF

201 2

1R27535%

1/20W MF 201

10K

2

1R275410K

5%

1/20W MF

201 2

1R275510K

5%

1/20W MF

201 2

1R2756

201 MF 1/20W 5%

10K

SYNC_MASTER=K21_MLB SYNC_DATE=11/30/2010

Clock (CK505) and Chipset Support

PCIE_CLK100M_PCH_P PCH_CLK14P3M_REFCLK

SMC_LRESET_L LPC_RESET_L

LPC_CLK33M_LPCPLUS LPC_CLK33M_SMC

PCH_CLK33M_PCIIN PCH_CLK33M_PCIOUT

=T29_RESET_L XDPPCH_PLTRST_L PCA9557D_RESET_L AP_RESET_L

PLT_RESET_L

MAKE_BASE=TRUE

SYSCLK_CLK25M_X1 SYSCLK_CLK25M_X2

27 OF 109 2.5.0 051-8871

Trang 26

IN

D

SGD

S G

D

SG

D

SG

S

D

SG

IN

D

SG

IN

D

SGD

S G

OUT

BRANCHREVISION

DRAWING NUMBER SIZE

DR

SHEETPAGE TITLE

MEM_RESET_L = !ISOLATE_CPU_MEM_L + CPU_MEM_RESET_L

The circuit below handles CPU and VTT power during S0->S3->S0 transitions, as well

WHEN HIGH: CPU 1.5V remains powered in S3, VTT follows S0 rails, MEM_RESET_L not isolated

as isolating the CPU’s SM_DRAMRST# output from the SO-DIMMs when necessary

ISOLATE_CPU_MEM_L GPIO state during S3<->S0 transitions determines behavior of signals

WHEN LOW: CPU 1.5V follows S0 rails, VTT ensures clean CKE transition, MEM_RESET_L isolated

MEMVTT_EN = (ISOLATE_CPU_MEM_L + PLT_RST_L) * PM_SLP_S3_L

P1V5CPU_EN = (ISOLATE_CPU_MEM_L + PM_SLP_S3_L) * PM_SLP_S4_L

6 0 1 1 1 1 1 1 1

(*) CPU_MEM_RESET_L asserts due to loss of PM_MEM_PWRGD, must wait for software to clear before deasserting ISOLATE_CPU_MEM_L GPIO.

NOTE: In the event of a S3->S5 transition ISOLATE_CPU_MEM_L will still be asserted on next S5->S0

5 0 1 1 1 0 (*) 1 1 1

must deassert ISOLATE_CPU_MEM_L and then generate a valid reset cycle on CPU_MEM_RESET_L

transition Rails will power-up as if from S3, but MEM_RESET_L will not properly assert Software

1V5 S0 "PGOOD" for CPU

PM_MEM_PWRGD pull-up to CPU VTT rail is on CPU page

75mA max load @ 0.75V 60mW max power

Ensures CKE signals are held low in S3

5%

1/20WMF201

18 25

12

6

Q2810 CPUMEM_S0 SSM6N37FEAPE

2

1

R2801

201MF5%

100K CPUMEM_S0

1/20W

45

3

SOT563

2

1

R2802 CPUMEM_S0 100K

5%

1/20WMF201

12

6

21

R2817 0

MF5%

1/20W201

5%

MF201

5%

1/20WMF201

2

1

R2850 CPUMEM_S0 10

MF-LF603

5%

1/10W

12

6

Q2820 CRITICAL

DMB53D0UV

SOT-5632

10K

5%

1/20WMF201

4

3

CRITICAL DMB53D0UV

NO STUFF

12

6

Q2850 SSM6N37FEAPE CPUMEM_S0

2

1

R2851 CPUMEM_S0 100K

5%

1/20WMF201

17 40 61

45

3

SOT563

2

1

R2820 27.4K

1%

1/20WMF201

2

1

R2821 33.2K

1%

1/20WMF201

8

55

R2890 CPUMEM_S0 0

2015%

MF1/20W

2

1

C2817

40210%

0201X5R-CERM16V

12

6

SOT563

4 5

CPUMEM_S0 SSM6N37FEAPE

SOT563

8

CPU Memory S3 Support

Trang 27

A5

A1A0

VSSQ

DQ0DQ1DQ2

A9A8

A14

ZQRESET*

ODT

DQS*

DQSDM/TDQSA6

A12/BC*

NF/DQ7NF/DQ6NF/DQ5NF/DQ4DQ3

NF/TDQS*

NC

BA1CKCKECK*

CS*

WE*

RAS*

A2A3A4A7A10/APA13BA0BA2

VSSQ

DQ0DQ1DQ2

A9A8

A14

ZQRESET*

ODT

DQS*

DQSDM/TDQSA6

A12/BC*

NF/TDQS*

NC

BA1CKCKECK*

CS*

WE*

RAS*

VSSQ

DQ0DQ1DQ2

A9A8

A14

ZQRESET*

ODT

DQS*

DQSDM/TDQSA6

A12/BC*

NF/TDQS*

NC

BA1CKCKECK*

CS*

WE*

RAS*

VSSQ

DQ0DQ1DQ2

A9A8

A14

ZQRESET*

ODT

DQS*

DQSDM/TDQSA6

A12/BC*

NF/TDQS*

NC

BA1CKCKECK*

CS*

WE*

RAS*

CAS*

VDD VDDQ

A11

BRANCHREVISION

DRAWING NUMBER SIZE

DR

SHEETPAGE TITLE

B

NCNC

NC

NCNC

NC

A14/A15 FOR 2G/4G MONO ONLY

NCNC

NC

CS1 IS FOR 2G DDP RANK CONTROL

NCNCNCNCNCNCNCNCNCNCNC

NC

NCNCNCNC

NCNC

NC

NCNCNCNC

NCNC

NC

NCNCNCNCNC

2

1C2932

0.47UF

4V CERM-X5R-1 201 20%

21R2930 240

MF 1% 1/20W 2012

1R2920 240

MF 1% 1/20W 201

2

1C2912

4V 201 20%

2

1

C2910

0.47UF4V CERM-X5R-1 201 20%

2

1C2902

4V CERM-X5R-1 201

21R2910 240

201 1/20W 1%

N11N1J8H10H2F10F2A11A4A1

D4C4

C9C3C8B4

B8

H3G10G8F8

G4

J4K9J3

M4N9M3M9L3L9K3L4

N8N4K8M8H8

L8K4

D4C4

C9C3C8B4

B8

H3G10G8F8

G4

J4K9J3

M4N9M3M9L3L9K3L4

N8N4K8M8H8

L8K4

D4C4

C9C3C8B4

B8

H3G10G8F8

G4

J4K9J3

M4N9M3M9L3L9K3L4

N8N4K8M8H8

L8K4

D4C4

C9C3C8B4

B8

H3G10G8F8

G4

J4K9J3

M4N9M3M9L3L9K3L4

N8N4K8M8H8

L8K4

2

1C2922

4V 201 CERM-X5R-1 20%

0.47UF2

1

C2920

4V CERM-X5R-1 2010.47UF20%

DDR3 DRAM CHANNEL A (0-31)

SYNC_DATE=12/13/2010SYNC_MASTER=K21_MLB

MEM_A_WE_LMEM_A_RAS_L

Trang 28

A5

A1A0

VSSQ

DQ0DQ1DQ2

A9A8

A14

ZQRESET*

ODT

DQS*

DQSDM/TDQSA6

A12/BC*

NF/TDQS*

NC

BA1CKCKECK*

CS*

WE*

RAS*

VSSQ

DQ0DQ1DQ2

A9A8

A14

ZQRESET*

ODT

DQS*

DQSDM/TDQSA6

A12/BC*

NF/TDQS*

NC

BA1CKCKECK*

CS*

WE*

RAS*

VSSQ

DQ0DQ1DQ2

A9A8

A14

ZQRESET*

ODT

DQS*

DQSDM/TDQSA6

A12/BC*

NF/TDQS*

NC

BA1CKCKECK*

CS*

WE*

RAS*

VSSQ

DQ0DQ1DQ2

A9A8

A14

ZQRESET*

ODT

DQS*

DQSDM/TDQSA6

A12/BC*

NF/TDQS*

NC

BA1CKCKECK*

CS*

WE*

RAS*

CAS*

VDD VDDQ

A11

BRANCHREVISION

DRAWING NUMBER SIZE

DR

SHEETPAGE TITLE

B

NC

NCNCNC

NC

NCNC

NC

NCNCNCNC

NC

NCNCNC

NCNC

NC

NCNCNCNCNC

NCNC

NCNCNCNCNCNCNCNCNCNCNC

NC

NCNCNC

2

1C3022

0.47UF

4V CERM-X5R-1 201 20%

2

1

C3021

4V CERM-X5R-1 2010.47UF20%

2

1

C3020

4V CERM-X5R-1 2010.47UF20%

21R3020 240

2

1C3032

4V CERM-X5R-1 201

2

1

C3010

4V CERM-X5R-1 2010.47UF20%

21R3010

2

1

C3001

4V CERM-X5R-1 2010.47UF

D4C4

C9C3C8B4

B8

H3G10G8F8

G4

J4K9J3

M4N9M3M9L3L9K3L4

N8N4K8M8H8

L8K4

D4C4

C9C3C8B4

B8

H3G10G8F8

G4

J4K9J3

M4N9M3M9L3L9K3L4

N8N4K8M8H8

L8K4

D4C4

C9C3C8B4

B8

H3G10G8F8

G4

J4K9J3

M4N9M3M9L3L9K3L4

N8N4K8M8H8

L8K4

D4C4

C9C3C8B4

B8

H3G10G8F8

G4

J4K9J3

M4N9M3M9L3L9K3L4

N8N4K8M8H8

L8K4

21R3030 240

MF 1% 1/20W 201

Trang 29

A5

A1A0

VSSQ

DQ0DQ1DQ2

A9A8

A14

ZQRESET*

ODT

DQS*

DQSDM/TDQSA6

A12/BC*

NF/TDQS*

NC

BA1CKCKECK*

CS*

WE*

RAS*

VSSQ

DQ0DQ1DQ2

A9A8

A14

ZQRESET*

ODT

DQS*

DQSDM/TDQSA6

A12/BC*

NF/TDQS*

NC

BA1CKCKECK*

CS*

WE*

RAS*

VSSQ

DQ0DQ1DQ2

A9A8

A14

ZQRESET*

ODT

DQS*

DQSDM/TDQSA6

A12/BC*

NF/TDQS*

NC

BA1CKCKECK*

CS*

WE*

RAS*

VSSQ

DQ0DQ1DQ2

A9A8

A14

ZQRESET*

ODT

DQS*

DQSDM/TDQSA6

A12/BC*

NF/TDQS*

NC

BA1CKCKECK*

CS*

WE*

RAS*

CAS*

VDD VDDQ

A11

BRANCHREVISION

DRAWING NUMBER SIZE

DR

SHEETPAGE TITLE

B

NCNCNC

NC

NCNCNCNC

NC

NCNCNCNC

NCNC

NCNCNCNCNC

NCNCNC

NCNC

NC

NCNC

NCNCNCNC

2

1C3132

4V CERM-X5R-1 201

0.47UF

20%

2 1R3130 240

201 1/20W 1%

MF 2

1R3120 240

MF 1% 1/20W 201

2

1C3112

CERM-X5R-1 4V 201

2

1

C3110

0.47UF4V CERM-X5R-1 201 20%

2

1C3102

0.47UF

CERM-X5R-1 4V 201 20%

2

1

C3101

CERM-X5R-1 4V0.47UF

20%

2012

2 1R31101%

D4C4

C9C3C8B4

B8

H3G10G8F8

G4

J4K9J3

M4N9M3M9L3L9K3L4

N8N4K8M8H8

L8K4

D4C4

C9C3C8B4

B8

H3G10G8F8

G4

J4K9J3

M4N9M3M9L3L9K3L4

N8N4K8M8H8

L8K4

D4C4

C9C3C8B4

B8

H3G10G8F8

G4

J4K9J3

M4N9M3M9L3L9K3L4

N8N4K8M8H8

L8K4

D4C4

C9C3C8B4

B8

H3G10G8F8

G4

J4K9J3

M4N9M3M9L3L9K3L4

N8N4K8M8H8

L8K4

2

1C3122

4V CERM-X5R-1 201

2

1

C3120

4V CERM-X5R-1 2010.47UF20%

DDR3 DRAM CHANNEL B (0-31)

Trang 30

A5

A1A0

VSSQ

DQ0DQ1DQ2

A9A8

A14

ZQRESET*

ODT

DQS*

DQSDM/TDQSA6

A12/BC*

NF/TDQS*

NC

BA1CKCKECK*

CS*

WE*

RAS*

VSSQ

DQ0DQ1DQ2

A9A8

A14

ZQRESET*

ODT

DQS*

DQSDM/TDQSA6

A12/BC*

NF/TDQS*

NC

BA1CKCKECK*

CS*

WE*

RAS*

VSSQ

DQ0DQ1DQ2

A9A8

A14

ZQRESET*

ODT

DQS*

DQSDM/TDQSA6

A12/BC*

NF/TDQS*

NC

BA1CKCKECK*

CS*

WE*

RAS*

VSSQ

DQ0DQ1DQ2

A9A8

A14

ZQRESET*

ODT

DQS*

DQSDM/TDQSA6

A12/BC*

NF/TDQS*

NC

BA1CKCKECK*

CS*

WE*

RAS*

CAS*

VDD VDDQ

A11

BRANCHREVISION

DRAWING NUMBER SIZE

DR

SHEETPAGE TITLE

B

NCNC

NCNCNC

NCNCNCNC

NC

NCNC

NCNCNCNCNC

NCNCNC

NCNC

NCNCNCNCNC

1

C3221

20%

0.47UF201 CERM-X5R-1 4V2

1

C3220

20%

0.47UF201 CERM-X5R-1 4V

2 1R3220 240

201 1/20W 1%

1

C3210

20%

0.47UF201 CERM-X5R-1 4V

2 1R32101%

D4C4

C9C3C8B4

B8

H3G10G8F8

G4

J4K9J3

M4N9M3M9L3L9K3L4

N8N4K8M8H8

L8K4

D4C4

C9C3C8B4

B8

H3G10G8F8

G4

J4K9J3

M4N9M3M9L3L9K3L4

N8N4K8M8H8

L8K4

D4C4

C9C3C8B4

B8

H3G10G8F8

G4

J4K9J3

M4N9M3M9L3L9K3L4

N8N4K8M8H8

L8K4

D4C4

C9C3C8B4

B8

H3G10G8F8

G4

J4K9J3

M4N9M3M9L3L9K3L4

N8N4K8M8H8

L8K4

2 1R3230

Trang 31

V+

V-IN

NCNC

NC

RESET*

A0A1A2SCLSDA

P0P1P2

P5P6P7

P3P4

THRM

VCC

GNDPAD

NC

INBI

VDD

VOUTDVOUTCVOUTBVOUTASCL

SDAA0A1GND

INBI

QTY

BRANCHREVISION

DRAWING NUMBER SIZE

DR

SHEETPAGE TITLE

MEM VREGDDAC Channel:

A

MEM B VREF DQ

0.300V - 1.200V (+/- 450mV)

C3MEM A VREF CA

Power aliases required by this page:

VREFMRGN - Stuffs VREF Margining

VREFMRGN_NOT - Bypasses VREF Margining

Signal aliases required by this page:

(OD)

+3.4mA - -3.4mA (- = sourced)0.000V - 1.501V (0x00 - 0x74)

CMEM B VREF CA

Addr=0x98(WR)/0x99(RD)

Required zero ohm resistors when no VREF margining circuit stuffed

BOM options provided by this page:

5 1.5V (DAC: 0x3A)1.998V - 1.002V (+/- 498mV)0.000V - 1.501V (0x00 - 0x74) +33uA - -33uA (- = sourced)

1.056V - 1.442V (+/- 180mV) 1.267V (DAC: 0x8B)

D

0.000V - 3.300V (0x00 - 0xFF)+6.0mA - -5.0mA (- = sourced)

10mA max load

both at the same time!

a DAC output, cannot enable NOTE: MEMVREG and FRAMEBUF share

RST* on ’platform reset’ so that system watchdog will disable margining.

NOTE: Margining will be disabled across all

55

2

1C3302VREFMRGN

0.1UF

6.3V X5R 10%

2 1R331433.2K VREFMRGN

1% PLACE_NEAR=R7315.2:1mm 1/20W

MF 201

2

1R3313VREFMRGN

100K

5%

1/20W MF 201

2

1R3315100K

5%

VREFMRGN

1/20W MF 201

B4 B1

C4 C1 C2

C3

U3302UCSP

VREFMRGN

MAX4253

B4 B1

A4 A1 A2

A3

U3302VREFMRGN

UCSP

MAX4253

B4 B1

A4 A1 A2

A3

U3304MAX4253

UCSP

VREFMRGN

B4 B1

C4 C1 C2

C3

U3304MAX4253 VREFMRGN

UCSP

2 1R33091%

200 VREFMRGN

1/20W MF 201 PLACE_NEAR=J2900.126:2.54mm

2 1R3318OMIT

NONE 402 NONE

SHORT

2 1R3319NONE

OMIT

SHORT

NONE 402 NONE

25

2 1R3303VREFMRGN

1%

200

MF 201 PLACE_NEAR=U2900.E1:2.54mm 1/20W

2 1R3304

2

1R3307

MF 1/20W

100K VREFMRGN

VREFMRGN

100K

1/20W MF 201

2 1R3310133

PLACE_NEAR=R3309.2:1mm

VREFMRGN

1%

1/20W MF 201

2 1

15 14 13 12 11 10 9 7 6

5 4 3U3301CRITICAL

QFN

PCA9557 VREFMRGN

43

5 4 2 1 8

7 6

3 10 9

U3300MSOP

CRITICAL VREFMRGN

VREFMRGN

0.1UF

2

1C3300VREFMRGN

2.2UF

CERM 402-LF 20%

6.3V

2

1C330510%

0201 X5R-CERM 16V

0.1UF VREFMRGN

2

1C3303

0201 X5R-CERM 16V

0.1UF VREFMRGN

2

VREFMRGN_CA_SODIMMA_BUF

MIN_NECK_WIDTH=0.2 mm VOLTAGE=0.75V MIN_LINE_WIDTH=0.3 mm

MIN_LINE_WIDTH=0.3 mm

PP3V3_S3_VREFMRGN_DAC

MIN_NECK_WIDTH=0.2 mm VOLTAGE=3.3V

PP0V75_S3_MEM_VREFDQ_A

=PP3V3_S3_VREFMRGN

VREFMRGN_MEMVREG_BUF

VREFMRGN_DQ_SODIMMA_EN VREFMRGN_SODIMMS_CA

33 OF 109 2.5.0 051-8871

Trang 32

ININININININININININININININ

INININ

ININ

ININININ

ININININININININ

ININININ

INININININ

IN

ININ

BRANCHREVISION

DRAWING NUMBER SIZE

DR

SHEETPAGE TITLE

B

JEDEC recommends 30 Ohm term to VTT for CS,CKE,ODT and 36 Ohm for BA,A,RAS,CAS,WE

COLUMN OF THREE CAPS BETWEEN PACKAGES

2 CAPS ALONG PACKAGE EDGE

Place RC end termination after last DRAM Place Source Cterm at neckdown at first DRAM

20%

0.47UF

201CERM-X5R-14V

63RP3408

5%

36

1/32W 4X02015

4RP3410 36

1/32W5% 4X0201

2

CERM402-LF20%

2.2UF

6.3V

81RP3408 36

4X02015% 1/32W72RP3410 36

4X02011/32W5%

72RP3414

4X02011/32W5%

36

72RP3413

4X0201

36

1/32W5%

81RP3414

2

0.47UF

4VCERM-X5R-120%

201

2

4V201CERM-X5R-120%

0.47UF

2

CERM-X5R-120120%

20%

0.47UF

201CERM-X5R-14V

2

2.2UF

6.3V20%

402-LFCERM

MEM_A_CLK_TERM_R10%

6.3V201

C3479 0.1UF

20110%

6.3V

21

R3468 30

5%

1/20WMF2012

1

C3468

CERM25V5%

3.3PF

201

21

R3469

1/20W5%

30

MF201

21

R3478 30

201

5%

1/20WMF2

1

C3478

201CERM25V5%

3.3PF

21

R3479 30

1/20WMF5%

54RP3401

4X02015% 1/32W

36

72RP3402

4X02015% 1/32W

36

72RP3406

4X0201

36

5% 1/32W81RP3403 36

4X02011/32W5%

81RP3402 36

4X02011/32W5%

72RP3401

4X0201

36

1/32W5%

72RP3403 36

4X02011/32W5%

2

CERM402-LF6.3V20%

2.2UF

63RP3407 36

4X02015% 1/32W81RP3406

4X0201

36

5% 1/32W54RP3406 36

5% 1/32W 4X02016

3RP3402

4X02011/32W

36

5%

63RP3404 36

4X02015% 1/32W54RP3403

4X02011/32W5%

36

81RP3404

4X02015% 1/32W

36

72RP3407

4X0201

36

5% 1/32W54RP3402

4X0201

36

1/32W5%

63RP3403

4X02011/32W5%

81RP3407

4X02015% 1/32W

36

72RP3404 36

5% 1/32W 4X02015

4RP3404

4X02015% 1/32W

36

63RP3401

4X02015% 1/32W

36

81RP3401

4X02011/32W5%

36

63RP3406

4X0201

36

5% 1/32W

81RP3413

4X0201

36

5% 1/32W81RP3410 36

5%1/32W 4X02018

1RP3409

4X0201

36

5% 1/32W

63RP3413

4X02015%

2.2UF

6.3V

54RP3413

4X02011/32W

36

5%

54RP3409

4X02011/32W5%

36

72RP3408

4X02011/32W

36

5%

72RP3409

4X0201

36

5% 1/32W54RP3414

4X0201

36

5% 1/32W

81RP3411 36

CERM

2

CERM20%

2.2UF

402-LFCERM

2

CERM20%

CERM402-LF

4X02015% 1/32W

2

402-LFCERM20%

2

20%

6.3V402-LFCERM

2.2UF

2

CERM402-LF20%

2

402-LFCERM20%

2.2UF

2

6.3V20%

2.2UF

2

CERM402-LF20%

2.2UF

6.3V402-LF

2

2.2UF

6.3V402-LF20%

2

CERM402-LF20%

2.2UF

6.3V402-LF

2

CERM402-LF20%

402-LFCERM

2

CERM20%

2

CERM20%

2

CERM402-LF20%

6.3V

2

CERM402-LF20%

2

2.2UF

402-LF6.3V20%

CERM

2

6.3V20%

402-LFCERM

CERM-X5R-1

2

CERM-X5R-120%

0.47UF

2014V6

3RP3410 36

5% 1/32W 4X02016

3RP3409 36

72RP3411 36

4X02015% 1/32W

54RP3408

4X0201

36

5% 1/32W

63RP3411

4X02011/32W

MEM_B_WE_LMEM_B_A<5>

MEM_A_A<8>

MEM_A_A<6>

MEM_A_CAS_LMEM_A_RAS_L

MEM_A_WE_LMEM_A_CKE<0>

Trang 33

S_LW_LHOLD_L

OUTOUT

IN

ININOUTININ

OUTOUTININOUTINOUTOUTININOUTIN

PETP_0

PETP_3

PERP_1PERP_0

DPSRC0_ML_LANE_0N_OUT0_HDMI_TMDS_CLK_NDPSRC0_ML_LANE_0P_OUT0_HDMI_TMDS_CLK_P

DPSRC0_ML_LANE_3P_OUT0_HDMI_TMDS_2_PDPSRC0_ML_LANE_3N_OUT0_HDMI_TMDS_2_N

DPSNK0_HDMI_IN_HOT_PLUG_DETDPSNK0_AUX_CHN

DPSNK0_AUX_CHPDPSNK0_ML_LANE_0N_IN0_HDMI_TMDS_2_NDPSNK0_ML_LANE_0P_IN0_HDMI_TMDS_2_PDPSNK0_ML_LANE_1N_IN0_HDMI_TMDS_1_NDPSNK0_ML_LANE_1P_IN0_HDMI_TMDS_1_P

DPSNK0_ML_LANE_2P_IN0_HDMI_TMDS_O_PDPSNK0_ML_LANE_2N_IN0_HDMI_TMDS_0_NDPSNK0_ML_LANE_3P_IN0_HDMI_TMDS_CLK_PTEST_PWR_GOOD

PERP_3

TMU_CLK_INTMU_CLK_OUTXTAL_25_INREFCLK_100_IN_N

TDOTCK

TDITMS

PCIE_RST_1*

PCIE_RST_0*

THERM_DPEE_CS*

EE_DOEE_DI

MONOBSN

PETP_1PETN_1

PETN_2PETP_2

PETN_3WAKE*

PERST*

CIO_PLUG_EVENTCIO_1_LSOECIO_1_LSEO

PRT1_CIOR_PPRT1_CIOR_NPRT1_CIOT_P

CIO_0_LSEOCIO_0_LSOE

PRT0_CIOR_PPRT0_CIOR_N

PRT0_CIOT_PPRT0_CIOT_N

HDMI_5V_OUT

HDMI_OUT_HOT_PLUG_DETHDMI_SDA_INHDMI_SCL_IN

DP_RESDP_ATESTDPSRC0_HOT_PLUG_DET

TEST_EN

PCIE_CLKREQ_0*

EE_CLKPERN_2

CIO_MDIOCIO_MDC

ININ

BRANCHREVISION

DRAWING NUMBER SIZE

DR

SHEETPAGE TITLE

B

100pF SRF > 40MHz

NOTE: All unused LSOE/EO pairs should be aliased

Not used in host mode

(T29_SPI_CS_L)

SNK0 AC Coupling

(T29_SPI_CLK)

Use B1 GND ball for THERM_DN

DEBUG: For monitoring current/voltage

2KX8-1.8V

OMIT_TABLECRITICAL

MLPM95160

U5M1

T5

B2

D1E2

U4

T3R2C8

A12B12C7

B10A10A8B8

A6B6A4B4

D14H14M14T14

D15H15M15T15

C2B15

F14K14P14

B14F15K15P15

G2L2L1R1P1

A13B13

A15A14

A2B1F3U1

P2U6U3N1

T12U12

N12R12T6

T8U8T9U9T10U10T11U11T4

T7U7

U14U15

H1F1

C1

K2J1

K1H2

U3600

FCBGA

OMIT_TABLECRITICAL

EAGLE_RIDGE-192

2 1

C3600

X5R 10% 6.3V 2010.1UF

2 1

C3601

0.1UF 10% 6.3V X5R 201

2 1

C3602

10% 6.3V X5R

2 1

C3603

201 10% 6.3V X5R0.1UF

2 1

C3604

10% 2010.1UF 6.3V X5R

2 1

C3605

0.1UF 10% 6.3V X5R 201

2 1

C3606

2010.1UF 10% 6.3V X5R

2 1

C3607

6.3V0.1UF 10% X5R 201

2 1

R3610

0

NO STUFF

1/20W 5% MF 201

2 1

R3611

NO STUFF

201

0 5% 1/20W MF2

1

C3615

201 10% 6.3V

21

C3616

0.1UF 10% 6.3V X5R 201

2

1R3655

402 TF 1/16W 0.1%

1.0K

2

1R3698

201 5%

0

5%

201 MF 1/20W

2

1R3699

1/20W

NO STUFF

201 MF 5%

201 MF

201 MF 5%

1/20W

3.3K

2

1R3693

3.3K

1/20W 201 MF 5%

2

1C3690

0201-MUR 20%

X5R1.0UF6.3V

2

1R3630

201 5%

1/20W MF

100K

2

1R3632

MF 5%

2

1R3696

201 MF

1K

5%

1/20W

21R3695

201 MF 1/20W 1%

806

2

1R3685

14K

MF 201 1/20W 1%

2

1C3685

5%

201 CERM 25V

100PF

35

21

C3640

0201 16V

0.1UF21

C3641

0.1UF 10% 16V X5R-CERM 0201

21

C3642

10% 16V X5R-CERM 0201

0.1UF21

C3643

0201 16V

0.1UF21

C3644

0201 16V

0.1UF21

C3645

0201 16V

0.1UF21

C3646

0.1UF 10% 16V X5R-CERM02012

C3620

0201 X5R-CERM

0.1UF

2 1

C3621

0.1UF X5R-CERM0201

2 1

C3622

0.1UF X5R-CERM 0201 2 1

C3623

0.1UF X5R-CERM 0201 2 1

C3624

0.1UF X5R-CERM0201

2 1

C3625

0201 X5R-CERM

0.1UF

2 1

C3626

X5R-CERM

0.1UF 0201 2 1

C3627

X5R-CERM

0.1UF 0201 2 1

C3628

0.1UF 10%X5R-CERM16V0201 2 1

201

5%

10K

MF1/20W2

1R3671

10K

5%

201

1/20WMF

2

1R3673

R3663

201 5%

21

R3664

201 1/20W

T29_CIO_PLUG_EVENTT29_LSEO<1>

=T29_CLKREQ_LPCIE_T29_R2D_N<2>

TP_T29_XTAL25OUTT29_RSENSE

DP_T29SNK0_ML_N<3>

PCIE_T29_R2D_N<1>

PCIE_T29_R2D_P<2>

I2C_T29_SDAI2C_T29_SCL

T29_R2D_C_N<1>

=PP3V3_T29_RTR

DP_T29SNK0_AUXCH_NDP_T29SNK0_AUXCH_C_P

T29ROM_HOLD_L

PCIE_T29_R2D_C_P<3>

SYSCLK_CLK25M_T29T29ROM_WP_L

T29_HDMI_SDA_INT29_CIO_PLUG_EVENT

=PP3V3_T29_RTR

T29_HDMI_OUT_HPDT29_HDMI_SCL_INDP_T29SNK0_AUXCH_C_N

JTAG_T29_TDI

TP_T29_PCIE_RESET2_LTP_T29_PCIE_RESET3_L

JTAG_T29_TCKJTAG_T29_TDOPCIE_CLK100M_T29_PT29_TEST_EN

=PP3V3_T29_RTR

DP_T29SNK0_ML_P<2>

36 OF 109 2.5.0 051-8871

Trang 34

GPIO_7GPIO_8GPIO_9GPIO_10GPIO_11

GND

VCC

(2 OF 2)

BRANCHREVISION

DRAWING NUMBER SIZE

DR

SHEETPAGE TITLE

B

2100 mA (Single Port)EDP: 3000 mA

1.0UF

X5R 6.3V

2

1C37106.3V

1.0UF

0201-MUR 20%

2

1C371120%

0201-MUR

1.0UF

X5R 6.3V

1.0UF

X5R 6.3V

2

1C3714

0201-MUR 6.3V 20%

X5R 6.3V

1.0UF

1C3721

0201-MUR 20%

1.0UF

X5R 6.3V

2

1C3722

0201-MUR 6.3V X5R

1.0UF

20%

21

R3750

201 MF 1/20W 5%

0

21

R3720

MF01/20W 201

2

1C3701

CERM-X5R 0402

10UF

2

1C3700

6.3V CERM-X5R

MF 1/20W 5%

10K

1R3722

10K

5%

1/20W MF

1R3721

201 MF 1/20W 5%

10K

2

1R3724

10K

5%

201 1/20W MF

2

1R3734

201 MF 1/20W 5%

10K

2

1R3730

10K

5%

1/20W MF 2012

1R3731

201 MF 1/20W 5%

10K

2

1R3732

10K

5%

1/20W MF 2012

1R3733

1/20W 5%

10K

201 MF

2

1C374820%

6.3V

10UF

CERM-X5R 04022

1C374920%

6.3V

10UF

CERM-X5R 0402

B11B9B7B5B3A11A9

R15R14N15N14L15L14L12L11J15J14

A7

J12J11H12H11G15G14E15E14C15C14

A5A3

U13T13R11R7R3N11N7N3

G7G6G5G3F10F8F7

M12M11M10M8M7M6

F6

M5M3L10L8L7L6L5L3G10G8

F5A1

R6R5N6N5R10R8N10N8D6D5C6C5D3C3

G12G11F12F11D12D10D8D7C12C10

J7J6J5J3H10H8H7H6

J10J8

H5H3

G1F2E1D2

U2N2

T1T2J2

U3600

CRITICALOMIT_TABLE

1.0UF

X5R 6.3V

T29 Host (2 of 2)

=PP1V05_T29_RTR

PP3V3_T29_DP

VOLTAGE=3.3V MIN_NECK_WIDTH=0.2 mm

=PP3V3_T29_RTR

37 OF 109 2.5.0 051-8871

7

34

7 34

7 33 35

Trang 35

GNDVOUTONVIN

GND THRM

IN

VDD

SENSE+

PAD

(OD)

0.7VDLY

IN

GNDVOUTONVIN

SW

SGND GND

NC

SNS1SNS2

BRANCHREVISION

DRAWING NUMBER SIZE

DR

SHEETPAGE TITLE

B

- =PP1V05_T29_P1V05T29FET (1.05V FET Input)

UVLO(rising) = UVLO(falling) + (2uA * R1)

U3810 & U3815/U3816

add property on another page.

Max Vgs: 10V

50 mOhm MaxTPS22924C

Max Output: 2A per IC

Max Current = 3.4A (85C)

Max Current = 1.7A (85C)

R(on)

PartType

Pull-up provided by SB page

Open-Drain GPIO

Rds(on): 46mOhm @ 4.5V Vgs

Vds(max): -30VVgs(th): -1.4V

Id(max): 3.7A @ 70C

SGND shorted to

- =PP1V05_T29_FET (1.05V FET Output)

1.05V T29 Switch 3.3V T29 Switch

no XW necessary

GND inside package,

Voltage not specified here,

Changes required8-13V Input

Supervisor & CLKREQ# Isolation

Page Notes

Power aliases required by this page:

- =PP18V_T29_REG (18V Boost Output)

- =PP3V3_T29_P3V3T29FET (3.3V FET Input)

- =PPVIN_SW_T29BST (8-13V Boost Input)

- =PP3V3_T29_FET (3.3V FET Output)

Pull-up provided by SB page

T29BST:Y - Stuffs 18V boost circuitry

UVLO(falling) = 1.22 * (R1 + R2) / R2UVLO = 4.55V (falling), 4.95 (rising)

Platform (PCIe) Reset

<Ra>

Vout = 1.6V * (1 + Ra / Rb)

B1 A1 B2

CRITICAL

B1 A1 B2

16

2

1C3800

0201 X5R-CERM 16V

100K

5%

19

B1 A1 B2

T29BST:Y470K

1/20W MF 5%

201

2

1C3880

0.1UFT29BST:Y

X5R

2 1

SSM6N37FEAPET29BST:Y

2

1R3896

T29BST:Y15.8K

1/16W 402 1%

T29BST:Y

2

1C3887

201 NP0-C0G 25V 5%

33

36 35 10 2 1 28

CRITICALT29BST:Y

XW3895

SM

PLACE_NEAR=C3895.1:2 mm 2

1R3889

X7R-CERM 50V

T29BST:Y

2

1C3899

402 50V

10K

MF1/20W

2

1

R3895

402MF-LF1%

133K

T29BST:Y

21

R3820 0.010

805MF1/4W1%

21

L3895

PIMB062D-SM

CRITICALT29BST:Y

6.8UH-4.0A

GND_T29BST_SGND

VOLTAGE=0V MIN_NECK_WIDTH=0.25 mm MIN_LINE_WIDTH=0.5 mm

T29BST_EN_UVLO

T29BST_RTT29BST_VCT29BST_INTVCC

38 OF 109 2.5.0 051-8871

Trang 36

IN

ININ

BIBI

OUTOUT

GNDTHRMIN

VDDSENSE +

PAD

(OD)

0.7VDLY

OUT

IN

INOUT

BRANCHREVISION

DRAWING NUMBER SIZE

DR

SHEETPAGE TITLE

B

BLUETOOTH

AIRPORT

RDS(ON) LOADING

MOSFET

20-30 MOHM @2.5V TPCP81023V S3 WLAN FET

P-TYPE

0.750 A (EDP) CHANNEL

C4030

0.1UF

X5R20110% 6.3V

PLACEMENT_NOTE=Place close to J4001.

16 69

21

C4031 0.1UF

PLACEMENT_NOTE=Place close to J4001.

6.3V10% X5R201

R4052 CRITICAL 0.020

1%

0.25W805MF-LF

837

6

U4002 SLG4AP016V

MF201

6.3V

PLACE_NEAR=J4001.18:1.5mm

98765432

1817161514131211101

212019

J4001 SSD-K99

C4050 0.1UF

0201X5R-CERM16V

2

1

C4051

16V402

0.033UF

X5R

21

10K

P3V3WLAN_SS

PP3V3_WLAN_R

MIN_NECK_WIDTH=0.25 mm

VOLTAGE=3.3V MIN_LINE_WIDTH=1 mm

Trang 37

NCNC

OUT

IN

BRANCHREVISION

DRAWING NUMBER SIZE

DR

SHEETPAGE TITLE

B

R4599 CRITICAL

1%

0.003

1W0612

45 73

98765432

1817161514131211101

212019

J4501

GND_VOID=TRUE GND_VOID=TRUE

SSD-K99

F-RT-SM1

CRITICAL

21R4510

1/20W

0

MF 5%

20121R45115%

MF 1/20W

C4510PLACE_NEAR=J4501.8:1.5MM0.01UF 10%10V X5R 201

21

C4511 0.01UF 10% 10V X5R 201

PLACE_NEAR=J4501.7:1.5MM

21

C4515

X5R10% 10V

SMC_HDD_TEMP_CTL_CONN SMC_HDD_OOB_TEMP_CONN

SATA_HDD_R2D_P SATA_HDD_R2D_N

SATA_HDD_R2D_C_P SATA_HDD_R2D_C_N

=PP3V3_S0_HDD

ISNS_HDD_P ISNS_HDD_N

SATA_HDD_D2R_N

45 OF 109 2.5.0 051-8871

Định dạng
Số trang	74
Dung lượng	1,17 MB