Overview of emerging nonvolatile memory technologies by various authors

A variant of charge storage memory referred to as Flash memory iswidely used in consumer electronic products such as cell phones and music playerswhile NAND Flash-based solid-state disks

Nanoscale Res Lett 9(1): 526-526

Jagan Singh Meena1, Simon Min Sze1, Umesh Chand1, Tseung-Yuen Tseng1

1 Department of Electronics Engineering and Institute of Electronics, National Chiao Tung University, Hsinchu 30010, Taiwan

Copyright © 2014 Meena et al.; licensee Springer.

DOI: 10.1186/1556-276X-9-526

Published online: 25 September 2014

Nonvolatile memory technologies in Si-based electronics date back to the 1990s.Ferroelectric field-effect transistor (FeFET) was one of the most promising devicesreplacing the conventional Flash memory facing physical scaling limitations atthose times A variant of charge storage memory referred to as Flash memory iswidely used in consumer electronic products such as cell phones and music playerswhile NAND Flash-based solid-state disks (SSDs) are increasingly displacing harddisk drives as the primary storage device in laptops, desktops, and even data

centers The integration limit of Flash memories is approaching, and many newtypes of memory to replace conventional Flash memories have been proposed.Emerging memory technologies promise new memories to store more data at lesscost than the expensive-to-build silicon chips used by popular consumer gadgetsincluding digital cameras, cell phones and portable music players They are beinginvestigated and lead to the future as potential alternatives to existing memories infuture computing systems Emerging nonvolatile memory technologies such asmagnetic random-access memory (MRAM), spin-transfer torque random-accessmemory (STT-RAM), ferroelectric random-access memory (FeRAM), phase-change memory (PCM), and resistive random-access memory (RRAM) combinethe speed of static random-access memory (SRAM), the density of dynamic

random-access memory (DRAM), and the nonvolatility of Flash memory and sobecome very attractive as another possibility for future memory hierarchies Manyother new classes of emerging memory technologies such as transparent and

plastic, three-dimensional (3-D), and quantum dot memory technologies have alsogained tremendous popularity in recent years Subsequently, not an exaggeration tosay that computer memory could soon earn the ultimate commercial validation forcommercial scale-up and production the cheap plastic knockoff Therefore, thisreview is devoted to the rapidly developing new class of memory technologies andscaling of scientific procedures based on an investigation of recent progress inadvanced Flash memory devices

Background

General overview

The idea of using a floating gate (FG) device to obtain a nonvolatile memory device wassuggested for the first time in 1967 by Kahng D and Sze SM at Bell Labs [1] This wasalso the first time that the possibility of nonvolatile MOS memory device was recognized.From that day, semiconductor memory has made tremendous contributions to the

revolutionary growth of digital electronics since a 64-bit bipolar RAM chip to be used inthe cache memory of an IBM computer was reported in 1969 [2] Semiconductor memoryhas always been an indispensable component and backbone of modern electronic systems.All familiar computing platforms ranging from handheld devices to large supercomputersuse storage systems for storing data temporarily or permanently [3] Beginning with punchcard which stores a few bytes of data, storage systems have reached to multiterabytes ofcapacities in comparatively less space and power consumption Regarding applicationaspects, the speed of storage systems needs to be as fast as possible [4] Since Flash

memory has become a common component of solid-state disks (SSDs), the falling pricesand increased densities have made it more cost-effective for many other applications [5].Memory devices and most SSDs that use Flash memory are likely to serve very differentmarkets and purposes Each has a number of different attributes which are optimized andadjusted to best meet the needs of particular users Because of natural inherent limitations,the long-established memory devices have been shorted out according to their inventions

to match with portable electronic data storage systems Today, the most prominent one isthe limited capacity for continued scaling of the electronic device structure Research ismoving along the following paths for embedded Flash devices: (i) scaling down the cellsize of device memory, (ii) lowering voltage operation, and (iii) increasing the density ofstate per memory cell by using a multilevel cell To sustain the continuous scaling,

conventional Flash devices may have to undergo revolutionary changes Basically, it isexpected that an entire DVD collection be in the palm of a hand Novel device conceptswith new physical operationing principles are needed It is worthwhile to take a look atsemiconductor memories against the background of digital systems The way

semiconductor devices are used in a systems environment determines what is required ofthem in terms of density, speed/power, and functions It is also worthwhile to look into theeconomic significance of semiconductor memories and the relative importance of theirvarious types For the past three and a half decades in existence, the family of

semiconductor memories has expanded greatly and achieved higher densities, higher

speeds, lower power, more functionality, and lower costs [3,6,7] At the same time, some

of the limitations within each type of memory are also becoming more realized As such,there are several emerging technologies aiming to go beyond those limitations and

potentially replace all or most of the existing semiconductor memory technologies to

become a universal semiconductor memory (USM) In addition, the rewards for achievingsuch a device would be to gain control of an enormous market, which has expanded fromcomputer applications to all of consumer electronic products Looking forward to thefuture, there are wide ranges of emerging memory applications for automation and

NAND has high density for large data storage applications [8] Since the inception ofFlash memory, there has been an exponential growth in its market driven primarily by cellphones and other types of consumer electronic equipment While, today, integration of asilicon chip is not economical, toys, cards, labels, badges, value paper, and medical

disposables could be imagined to be equipped with flexible electronics and memory Withgrowing demands for high-density digital information storage, memory density with

arriving technology has been increased dramatically from the past couple of years Themain drive to develop organic nonvolatile memory is currently for applications of thin-film, flexible, or even printed electronics One needs a technology to tag everything toelectronic functionality which can be foreseen in a very large quantity and at a very lowcost on substrates such as plastic and paper Accessible popularization of roll-to-roll

memory commercialization is a way to make an encounter interesting and challenging tohave charge storage devices of choice for applications with enormous flexibility and

strength Recently, polymer (plastic memory) and organic memory devices have

significant consideration because of their simple processes, fast operating speed, and

excellent switching ability [9,10] One significant advantage polymer memory has overconventional memory designs is that it can be stacked vertically, yielding a three-

dimensional (3-D) use of space [11] This means that in terabyte solid-state devices withextremely low transistor counts such as drives about the size of a matchbook, the datapersists even after power is removed The NAND Flash market is continually growing bythe successive introduction of innovative devices and applications To meet the markettrend, 3-D NVMs are expected to replace the planar ones, especially for 10-nm nodes andbeyond Moreover, simple-structure organic bistable memory exhibiting superior memoryfeatures has been realized by employing various nanoparticles (NPs) blended into a single-layered organic material sandwiched between two metal electrodes [12,13] The NPs act

as traps that can be charged and discharged by suitable voltage pulses NP blends showpromising data retention times, switching speed, and cycling endurance, but the on-statecurrent is too low to permit scaling to nanometer dimensions [10,14] A lot of these greatideas tend to die before reaching this point of development, but that is not to say that wewill be seeing plastic memory on store shelves next year There are still many hurdles toget over; software alone is a big task, as is the manufacturing process, but it does bringthis technology one step closer to reality [15] It is not an exaggeration to say that theequivalent of 400,000 CDs, 60,000 DVDs, or 126Â years of MPG music may be stored on

a polymer memory chip the size of a credit card

The vision of this review

In this review, we focus on electrically programmable nonvolatile memory changes fromsilicon nanocrystal memory scaling to organic and metallic NP memory devices Further,the scaling trend move towards the emerging NVM to flexible and transparent redox-based resistive switching memory technologies This review is intended to give an

devices based on nanostructured materials to redox-based resistive random-access

memory (RRAM) to 3-D and transparent memory devices We describe the basics of Flashmemory and then highlight the present problems with the issue of scaling tunnel dielectric

in these devices We briefly describe a historical change, how the conventional FG

nonvolatile memory suffers from a charge loss problem as the feature size of the devicecontinues to shrink A discrete polysilicon-oxide-nitride-oxide-silicon (SONOS) memory

is then proposed as a replacement of the conventional FG memory The NC memory isexpected to efficiently preserve the trapped charge due to the discrete charge storage nodewhile also demonstrating excellent features such as fast program/erase speeds, low

programming potentials, and high endurance We also discuss current ongoing research inthis field and the solutions proposed to solve the scaling problems by discussing a specificsolution in detail which would be the centerpiece in recent memory work progress

Moreover, this review makes distinct emerging memory concepts with more recent

molecular and quantum dot programmable nonvolatile memory concepts, specificallyusing charge trapping in conjugated polymers and metal NPs We classify several possibledevices, according to their operating principle, and critically review the role of π-

conjugated materials in the data storage device operation We describe specifications forapplications of emerging NVM devices as well as already existing NAND memory andreview the state of the art with respect to these target specifications in the future

Conclusions are drawn regarding further work on materials and upcoming memory

devices and architectures

Classification of solid-state memory technologies

based semiconductor memories are categorized into two: volatile and nonvolatile [3,16]

Data storage devices can be classified based on many functional criteria Of them, silicon-In volatile memories, the information eventually fades while power supply is turned offunless the devices used to store data will be periodically refreshed On the other hand,nonvolatile memories retain the stored information even when the power supply is turnedoff Volatile memories, such as static random-access memory (SRAM) and dynamic

random-access memory (DRAM), need voltage supply to hold their information whilenonvolatile memories, namely Flash memories, hold their information without one

inverters are used to store the information like in a flip-flop For the access control, twofurther transistors are needed If the write line is enabled, then data can be read and setwith the bit lines The Flash memory circuit works with the FG component The FG isbetween the gate and the source-drain area and isolated by an oxide layer If the FG isuncharged, then the gate can control the source-drain current The FG gets filled (tunneleffect) with electrons when a high voltage at the gate is supplied, and the negative

potential on the FG works against the gate and no current is possible The FG can be

of cheap production as well as lower power consumption as compared to SRAM but

slower than SRAM On the other hand, SRAM is usually built in CMOS technology withsix transistors and two cross-coupled inverters, and for the access control, two furthertransistors are needed SRAM has the advantage of being quick, easy to control, integrated

in the chip, as well as fast because no bus is needed like in DRAM But SRAM has thedisadvantages of needing many transistors and hence expensive, higher power

consumption than DRAM In comparison to DRAM and SRAM, Flash memory has FGbetween the gate and the source-drain area and isolated with an oxide layer Flash memorydoes not require power to store information but is slower than SRAM and DRAM

View larger version

Figure 1 The circuitry structures of DRAM, SRAM, and Flash memories.

Both types of memories can be further classified based on the memory technology thatthey use and based on data volatility as shown in the classification flow chart depicted inFigure 2 Volatile memories consist mostly of DRAM [17], which can be further

classified into SDRAM and mobile RAM which only retain information when current isconstantly supplied to the device [18] Another small but very important memory device isSRAM The market for DRAM devices far exceeds the market for SRAM devices,

although a small amount of SRAM devices is used in almost all logic and memory chips.However, DRAM uses only one transistor and one capacitor per bit, allowing it to reachmuch higher densities and, with more bits on a memory chip, be much cheaper per bit.SRAM is not worthwhile for desktop system memory, where DRAM dominates, but isused for its cache memories SRAM is commonplace in small embedded systems, whichmight only need tens of kilobytes or less Forthcoming volatile memory technologies thathope to replace or compete with SRAM and DRAM include Z-RAM, TTRAM, A-RAM,and ETA RAM In the industry, new universal and stable memory technologies will appear

as real contenders to displace either or both NAND Flash and DRAM Flash memory ispresently the most suitable choice for nonvolatile applications for the following reasons:Semiconductor nonvolatile memories consist mostly of the so-called ‘Flash’ devicesand retain their information even when the power is turned off Other nonvolatile

time programmable (OTP) memory, and electrically erasable read-only memory

semiconductor memories include mask read-only memory (MROM), antifuse-based one-(EEPROM) Flash is further divided into two categories: NOR, characterized by a directwrite and a large cell size, and NAND, characterized by a page write and small cell size.Nonvolatile memory is a computer memory that can retain the stored information evenwhen not powered [3,19,20] Nonvolatile semiconductor memories are generally classifiedaccording to their functional properties with respect to the programming and erasing

operations, as shown in the flow chart described in Figure 2 These are floating gate,nitride, ROM and fuse, Flash, emerging, and other new next-generation memory

technologies Today, these nonvolatile memories are highly reliable and can be

programmed using a simple microcomputer and virtually in every modern electronic

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Figure 2 Flow chart for the semiconductor memory classification according to their functional criteria.

Among them, emerging nonvolatile memories are now very captivating The next-generation memory market will cover up these emerging memory technologies [21] Thereare mainly five types of nonvolatile memory technology: Flash memory, ferroelectricrandom-access memory (FeRAM), magnetic random-access memory (MRAM), phase-change memory (PCM), and RRAM Nonvolatile memory, specifically ‘Flash’memory, which is characterized by a large-block (or ‘sector’) erasing mechanism,has been the fastest growing segment of the semiconductor business for the last 10 years.Some of these newer emerging technologies include MRAM, FeRAM, PCM, spin-transfertorque random-access memory (STT-RAM), RRAM and memristor MRAM is a

nonvolatile memory [10,22] Unlike DRAM, the data is not stored in an electric chargeflow, but by magnetic storage elements The storage elements are formed by two

ferromagnetic plates, each of which can hold a magnetic field, separated by a thin

insulating layer One of the two plates is a permanent magnet set to a particular polarity;the other’s field can be changed to match that of an external field to store memory STT-RAM is an MRAM (nonvolatile) but with better scalability over traditional MRAM TheSTT is an effect in which the orientation of a magnetic layer in a magnetic tunnel junction

or spin valve can be modified using a spin-polarized current Spin-transfer torque

technology has the potential to make MRAM devices combining low current requirementsand reduced cost possible; however, the amount of current needed to reorient the

magnetization is at present too high for most commercial applications PCM is a

nonvolatile random-access memory, which is also called ovonic unified memory (OUM),based on reversible phase conversion between the amorphous and the crystalline state of achalcogenide glass, which is accomplished by heating and cooling of the glass It utilizesthe unique behavior of chalcogenide (a material that has been used to manufacture CDs),whereby the heat produced by the passage of an electric current switches this materialbetween two states The different states have different electrical resistance which can beused to store data The ideal memory device or the so-called unified memory would satisfysimultaneously three requirements: high speed, high density, and nonvolatility (retention)

At the present time, such memory has not been developed The floating gate nonvolatilesemiconductor memory (NVSM) has high density and retention, but its program/erasespeed is low DRAM has high speed (approximately 10Â ns) and high density, but it isvolatile On the other hand, SRAM has very high speed (approximately 5Â ns) but limitedfrom very low density and volatility It is expected that PCM will have better scalabilitythan other emerging technologies RRAM is a nonvolatile memory that is similar to PCM.The technology concept is that a dielectric, which is normally insulating, can be made toconduct through a filament or conduction path formed after application of a sufficientlyhigh voltage Arguably, this is a memristor technology and should be considered as

potentially a strong candidate to challenge NAND Flash Currently, FRAM, MRAM, andPCM are in commercial production but still, relative to DRAM and NAND Flash, remain

competing for industry adoption [23] Any new technology must be able to deliver most, ifnot all, of the following attributes in order to drive industry adoption on a mass scale:scalability of the technology, speed of the device, and power consumption to be better thanexisting memories The NVSM is in inspiring search of novel nonvolatile memories,

Memory devices play a massive role in all emerging technologies; as such, efforts to

fabricate new organic memories to be utilized in flexible electronics are essential

Flexibility is particularly important for future electronic applications such as affordableand wearable electronics Much research has been done to apply the flexible electronicstechnology to practical device areas such as solar cells, thin-film transistors, photodiodes,light-emitting diodes, and displays [26-28] Research on flexible memory was also

initiated for these future electronic applications In particular, organic-based flexible

memories have merits such as a simple, low-temperature, and low-cost manufacturingprocess Several fabrication results of organic resistive memory devices on flexible

substrates have been reported [29,30] In addition, with growing demand for high-densitydigital information storage, NAND Flash memory density has been increased dramaticallyfor the past couple of decades On the other hand, device dimension scaling to increasememory density is expected to be more and more difficult in a bit-cost scalable mannerdue to various physical and electrical limitations As a solution to the problems, NANDFlash memories having stacked layers are under developing extensions [31,32] In 3-Dmemories, cost can be reduced by building multiple stacked cells in vertical directionwithout device size scaling As a breakthrough for the scaling limitations, various 3-Dstacked memory architectures are under development and expecting the huge market of 3-

D memories in the near future With lots of expectation, future-generation memories havepotential to replace most of the existing memory technologies The new and emergingmemory technologies are also named to be a universal memory; this may give rise to ahuge market for computer applications to all the consumer electronic products

Market memory technologies by applications

The semiconductor industry has experienced many changes since Flash memory firstappeared in the early 1980s The growth of consumer electronics market urges the demand

of Flash memory and helps to make it a prominent segment within the semiconductorindustry The Flash memories were commercially introduced in the early 1990s, and since

of years, with more density and reliable technologies challenging the dominant NANDFlash memory now used in SSDs and embedded in mobile products Server, storage, andapplication vendors are now working on new specifications to optimize the way theirproducts interact with NVM - moves that could lead to the replacement of DRAM andhard drives alike for many applications, according to a storage networking industry

association (SNIA) technical working group [33,34] The Flash memory marketplace isone of the most vibrant and exciting in the semiconductor industry, not to mention one ofthe most competitive The continuous invention of new memory technologies and theirapplications in the memory market also increase performance demands These new classes

of memories with the latest technology increase the vertical demand in the future memorymarket In the next coming years, cumulative price reductions should become disruptive toDVDs and hard disk drives (HDDs), stimulate huge demand, and create new Flash

markets

The nonvolatile memories offer the system a different opportunity and cover a wide range

of applications, from consumer and automotive to computer and communication

Figure 3 shows NVSM memory consumption by various applications in the electronicsindustry by market in 2010 extending upwards from computers and communication toconsumer products [22] It is noticed that there is a faster growth rate of the digital cellularphone since 1990; the volume of production has increased by 300 times, e.g., from 5

million units per year to about 1.5 billion units per year Nowadays, flexibility and

transparency are particularly of great significance for future electronic applications such asaffordable and wearable electronics Many advanced research technologies are applied toflexible technology to be used in a real electronics area [35] Although silicon-based

semiconductor memories have played significant roles in memory storage applications andcommunication in consumer electronics, now, the recent focus is turning from rigid

silicon-based memory technology into a soft nonvolatile memory technology for low-cost,large-area, and low-power flexible electronic applications Further, the memory market forthe long term is continuously growing, even if with some ups and downs, and this is

expected to continue in the coming years [36] Since innovation drives the semiconductorindustry, a new trend with transparency as well as flexibility and 3-D technologies will beattractive and move towards continuous growth in the near future

transition to mass production, and a 10-nm node technology is under development Inaddition, the future market requires high-speed operation even up to approximately

1,500Â MB/s in order to satisfy a large amount of data correspondence [37] However,high-speed operations cause high power consumption and chip temperature increase,

inevitable to achieve the future NAND Opportunities for the use of 3-D as well as

polymer memory design in modern electronic circuits are rapidly expanding, based on thevery high performance and unique functionality However, their practical implementation

in electronic applications will ultimately be decided by the ability to produce devices andcircuits at a cost that is significantly below that needed to manufacture conventional

electronic circuits based on, for example, silicon If successful, these low-cost fabricationprocesses will ultimately result in the printing of large-area organic electronic circuits on asheet of plastic paper using a roll-to-roll method, where low-temperature deposition oforganics is followed by metal deposition and patterning in a continuous, high-speed

process analogous, perhaps, to processes used in the printing of documents or fabrics

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Figure 4 Growth of NAND Flash market up to 2014 (iSuppli) and the interface speed of various NAND applications Reproduced from ref [37 ].

In recent years, IDTechEx finds that the total market for printed, flexible, and organicelectronics will grow from $16.04 billion in 2013 to $76.79 billion in 2023 and this

growing trend is expected to continue in the coming years (see Figure 5a) The majority

of that is OLEDs (only organic, not printed) and conductive ink used for a wide range ofapplications On the other hand, stretchable electronics, logic and memory, and thin-filmsensors are much smaller ingredients but having huge growth potential as they emergefrom R&D [38] The report specifically addresses the big picture that over 3,000

organizations are pursuing printed, organic, flexible electronics, including printing,

electronics, materials, and packaging companies While some of these technologies are inuse now - indeed there are main sectors of business which have created billion-dollarmarkets - others are commercially embryonic

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Figure 5 Market volume (a) and global flexible display market shipment forecast (b).

Reproduced from refs [ 38 , 39 ].

Another key potential market for printed/flexible electronics is next-generation transparentconductive film to replace brittle and expensive indium tin oxide (ITO) in touch screensand displays, lighting, and photovoltaics Touch display research says that the market fornon-ITO transparent conductors will be about $206 million this year and grow to some $4billion by 2020 as shown in Figure 5b ‘High demand for touchscreens for notebookand PC size displays has created a shortage of ITO touch sensors since the end of last year

to drive more interest in these technologies, and the more flexible and potentially cheaperreplacement technologies are getting more mature, notes Jennifer Colegrove, presidentand analyst, who will speak at the FlexTech workshop on transparent conductors Shenotes that Atmel, Fujifilm, Unipixel and Cambrios are all in some phase of productionâ

semiconductor industry

Recently, the 3-D nonvolatile memory structure has also attracted considerable attentiondue to its potential to replace conventional Flash memory in next-generation NVM

applications [37,40density memory technologies to keep a trend of increasing bit density and reducing bitcost The NAND Flash market is continuously growing by the successive introduction ofinnovative devices and applications To meet the market trend, 3-D NVMs are expected toreplace the planar one, especially for 10-nm nodes and beyond Therefore, the

] 3-D memories are gathering increasing attention as future ultra-high-fundamentals and current status of the 3-D NAND Flash memory are reviewed and futuredirections are discussed [41] 3-D integration promises to be an excellent replacement ofcurrent technologies for the development of NAND Flash memory Time is running outfor planar NAND technology It will not be long that planar NAND will be completelyreplaced by 3-D NAND 3-D NAND promises to satisfy the growing need of NAND

memory [37]

Finally, NVM technologies have a bright future since every end-use application needs tostore some parameters or some amount of an application program in the on-board NVM toenable it to function The upcoming NVMs are the big hope for a semiconductor memorymarket, which provides memories for systems to run with flexibility, reliability, high

performance, and low power consumption in a tiny footprint in nearly every electronicapplication Recent market trends have indicated that commercialized or near-

commercialized circuits are optimized across speed, density, power efficiency, and

manufacturability Flash memory is not suited to all applications, having its own problemswith random-access time, bit alterability, and write cycles With the increasing need tolower power consumption with zero-power standby systems, observers are predicting thatthe time has come for alternative technologies to capture at least some share in specificmarkets such as automotive smart airbags, high-end mobile phones, and RFID tags Anembedded nonvolatile memory with superior performance to Flash could see widespreadadoption in system-on-chip (SoC) applications such as smart cards and microcontrollers

to only a few players Thus, the market was quite limited and considerably smaller thanthe volatile DRAM- and nonvolatile Flash NAND-dominant markets (which enjoyed

combined revenues of $50+ billion in 2012) However, in the next 5Â years, the

scalability and chip density of those memories will be greatly improved and will sparkmany new applications with NVM market drivers explained in more detail

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Figure 6 Emerging NVM applications in various markets.

Accompanied by the adoption of STT-MRAM and PCM cache memory, enterprise storagewill be the largest emerging NVM market NVM will greatly improve the input/outputperformance of enterprise storage systems whose requirements will intensify with thegrowing need for web-based data supported by floating mass servers In addition, mobilephones will increase their adoption of PCM as a substitute to Flash NOR memory in MCPpackages to 1-gigabyte (GB) chips made available by Micron in 2012 Higher-densitychips, expected in 2015, will allow access to smart phone applications that are quicklyreplacing entry-level phones STT-MRAM is expected to replace SRAM in SoC

applications, thanks to lower power consumption and better scalability Smart cards andmicrocontrollers (MCU) will likely adopt MRAM/STT-MRAM and PCM as a substitute

to embed Flash Indeed, Flash memory cell size reduction is limited in the future TheNVM could reduce the cell size by 50% and thus be more cost-competitive Additionalfeatures like increased security, lower power consumption, and higher endurance are alsoappealing NVM attributes The mass storage markets served by Flash NAND could beginusing 3-D RRAM in 2017 to 2018, when 3-D NAND will slow down its scalability aspredicted by all of the main memory players If this happens, then a massive RRAM ramp-

up will commence in the next decade that will replace NAND; conditional 3-D RRAMcost-competitiveness and chip density are available It is expected surely that the emergingNVM business will be very dynamic over the next 5Â years, thanks to improvements inscalability/cost and density of emerging NVM chips [44].According to a recently

provides a precise memory roadmap in terms of technological nodes, cell size, and chipdensity for each emerging NVM such as FeRAM, MRAM/STT-MRAM, PCM, and

RRAM A market forecast is provided for each technology by application, units, revenues,and also market growth as given a detailed account of emerging NVM market forecast(Figure 7) PCM devices, the densest NVM in 2012 at 1 GB, will reach 8 GB by

2018, which are expected to replace NOR Flash memory in mobile phones and will also

MRAM and PCM will surely be the top two NVM on the market Combined, they willrepresent a $1.6 billion business by 2018, and their sales will almost double each year,with double-density chips launched every 2Â years FeRAM will be more stable in terms

possibly as a DRAM successor in enterprise storage after 2018 By 2018, MRAM/STT-of scalability, with 8- to 16-MB chips available by 2018; the development of a new FRAMmaterial could raise scalability, but we do not expect it to be widely industrialized andcommercialized before 2018 FeRAM will grow at a steady growth rate (10% per year)and will focus on industrial and transportation applications because of the low-densityavailability, whereas RRAM revenues would not really surge by 2018, with the

availability of high-density chips of several tens of gigabytes that could replace NANDtechnology Meanwhile, it has also been considered by memory technologist experts thatfor large-volume markets like mass storage NAND, only one technology will be adopted

in order to reduce production cost and RRAM seems to be the best candidate But the realmassive adoption of emerging NVM as a replacement for NAND and DRAM will happenafter 2020

invention in the electron device field The floating gate memory was used to store theinformation and a tunneling current for programming and erasing operations The charge

is injected into or removed from the floating gate and the floating gate remains in thatstate, even after power is removed, which means that Flash memory is nonvolatile Theinvention of NVSM further gave rise to a new class of memory devices and hence

broadened its applications to become ubiquitous There are a large number of products inthe market now which use Flash devices exclusively as secondary storage Few examples

of their applications include medical diagnostic systems, notebook computers, digitalaudio players, digital cameras, mobile phones, personal digital assistants, digital

televisions, universal serial bus (USB) Flash personal disks, Global Positioning Systems,and many more Semiconductor storage devices store data in tiny memory cells made ofvery small transistors and capacitors made of semiconductor materials such as silicon.Each cell can hold 1 bit of information and an array of cells stores a large chunk of

information Flash devices are gaining popularity over conventional secondary storagedevices like hard disks The Flash memory fabrication process is compatible with thecurrent CMOS process and is a suitable solution for embedded memory applications A

standard charge storage device for the next generation, scaling may eventually be limited

by the tunnel oxide limit [8] In terms of the operation speed of program and erase, Flashmemory requires a thin tunnel oxide to enhance the carrier transport between the floatinggate and the silicon substrate However, the very thin tunnel oxide suffers from manyreliability issues like reduction in operation voltage, and after a considerable number ofprogram and erase cycles, the tunnel oxide undergoes deterioration loss [48] Thus,

researchers have focused on possible solutions and proposed alternate technologies,

including nitride-based memory, nanocrystal memory, and switching memory All othernonvolatile memories require integration of new materials that are not as compatible as theconventional CMOS process

NOR and NAND Flash memory technologies

NOR and NAND Flash, two major Flash types, are dominant in the memory market NORFlash has lower density but a random-access interface, while NAND Flash has higherdensity and interface access through a command sequence [49] Their corresponding

structures are shown in Figure 8 NOR and NAND Flash come from the structure usedfor the interconnections between memory cells Intel is the first company to introduce acommercial (NOR type) Flash chip in 1988, and Toshiba released the world’s first NANDFlash in 1989 [50] Depending on how the cells are organized in the matrix, it is possible

to distinguish between NAND Flash memories and NOR Flash memories In NOR Flash,cells are connected in parallel to the bit lines, which notably allow the cells to be read andprogrammed individually The parallel connection of NOR Flash cells resemble the

parallel connection of transistors in a CMOS NOR gate architecture On the other hand, inNAND Flash, the cells are connected in series, resembling a NAND gate The series

connections consume less space than the parallel ones, reducing the cost of NAND Flash

It does not, by itself, prevent NAND cells from being read and programmed individually.Most of the engineers and scientists are not so familiar with the differences between thesetwo technologies Generally, they usually refer to the NOR architecture as ‘Flash’and are unaware of the NAND Flash technology and its many benefits over NOR [51].This could be due to the fact that most Flash devices are used to store and run codes

(usually small), for which NOR Flash is the default choice, although we are providingsome major differences between NOR and NAND Flash technologies by their architectureand the internal characteristic features of the individual Flash

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Figure 8 Comparison of NOR Flash array and NAND Flash array architectures.

NOR Flash is slower in erase operation and write operation compared to NAND Flash[52] This means that NAND Flash has faster erase and write times Moreover, NANDFlash has smaller erase units, so fewer erases are needed NOR Flash can read data

slightly faster than NAND Flash NOR Flash offers complete address and data buses to

updated Its endurance is 10,000 to 1,000,000 erase cycles NOR Flash is highly suitablefor storing codes in embedded systems Most of today’s microcontrollers come with built-

in Flash memory [53]

NAND Flash occupies a smaller chip area per cell This makes NAND Flash available ingreater storage densities and at lower costs per bit than NOR Flash It also has up to tentimes the endurance of NOR Flash NAND is more fit as storage media for large filesincluding video and audio USB thumb drives, SD cards, and MMC cards are of NANDtype [54] NAND’s advantages are fast write (program) and erase operations, while NOR’sadvantages are random access and byte write capability NOR’s random access abilityallows for execute in place (XiP) capability, which is often a requirement in embeddedapplications NAND is slow random accessible, while NOR is hampered by having slowwrite and erase performance NAND is better suited for filing applications However,more processors include a direct NAND interface and can boot directly from NAND

(without NOR) However, NAND cannot perform read and write operations

simultaneously; it can accomplish these at a system level using a method called

shadowing, which has been used on PCs for years by loading the BIOS from the slowerROM into the high-speed RAM

Table 1 highlights the major differences between NOR and NAND It shows that NAND

is ideal for high-capacity data storage while NOR is best used for code storage and

execution, usually in small capacities There are many other differences between these twotechnologies which will be further discussed individually However, those listed in thetable are enough to strongly differentiate the types of applications using them: NOR istypically used for code storage and execution This, mainly in capacities up to 4Â MB, iscommon in applications such as simple consumer appliances, low-end cell phones, andembedded applications, while raw NAND is used for data storage in applications such asMP3 players, digital cameras, and memory cards [55-57] The codes for raw NAND-basedapplications are stored in NOR devices

is far behind CMOS logic device scaling For example, the EOT of the gate stack in

semiconductor Flash memory is still more than 10Â nm Moreover, semiconductor Flashmemory still requires operation voltages of more than 10Â V, which is still far from theoperation voltage of CMOS logic devices It is important to scale the EOT of the gatestack to achieve a small memory cell size and also prolong battery life

tunneling can take place at very low electric fields If the density of traps is increased, theleakage will also increase Electrical stress can increase the number of these traps So itbecomes an important limitation of scaling down the memory device [62] For EOTâ€

‰< 8 nm, a single oxide trap will cause to complete the charge loss in the FG Flashcell The scaling of the gate stacks and operation voltages are often related to each other Atunnel oxide thickness of more than 8 nm is currently used in the commercial Flashmemory chip to meet the 10 years’ data retention time requirement If the tunnel oxidewere to be scaled below 2 nm, the operation voltage could be reduced from more than10 V to below 4 V [63] Unfortunately, the retention time would also be reduced, from10 years to several seconds This physical damage to the tunnel oxide during the cyclingprocess causes data retention problems, program disturbance, read disturbance, and erraticcharacteristic behavior of the FG memory cell Such problems severely limit the reliabilityand multilevel cell operation This basic limitation of the tunnel oxide thickness becomesincreasingly important with scaling New storage node concepts are also becoming

attractive as an alternative approach to address some of the dielectric scaling limitations.Flash memory adopts a charge stored in a silicon nitride as the trapping layer, which

exhibits significantly reduced defect-related leakage current and very low SILC as

dimensions has many challenges like retention, endurance, reduction in the number ofelectrons in the FG, dielectric leakage, cell-to-cell cross talk, threshold voltage shift, andreduction in memory window margins [65,66] The key concept of real scaling issues such

as material and structural changes in Flash memory technologies is provided in detail inthe next distinct part

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Figure 10 Schematic plots of a Flash memory cell and the degradation of its tunnel oxide The degradation leads to the formation of percolation paths

responsible for the FG charge loss, hence the loss of the stored information The presence of traps in the energy barrier yields the trap-assisted tunneling

mechanism and originates the stress-induced leakage current (SILC).

FG Flash memory technology

The FGNV memory is a basic building block of Flash memory, which is based on FGthin-film storage (TFS) memories that have been developed with the addition of an erasegate configuration The conventional FG memory (Figure 11a) consists of a MOSFETconfiguration that is modified to include polysilicon as a charge storage layer surrounded

by an insulated inner gate (floating gate) and an external gate (control gate) This whatmakes Flash memory nonvolatile and all floating gate memories to have the same genericcell structure Charge is transferred to or from the floating gate through a thin (8 to

10Â nm) oxide [1,67] Because the floating gate is electrically isolated by the oxide layer,any electrons placed on it are trapped there Flash memory works by adding (charging) orremoving (discharging) electrons to and from a floating gate A bit’s 0 or 1 state dependsupon whether or not the floating gate is charged or discharged When electrons are present

on the floating gate, current cannot flow through the transistor and the bit state is ‘0â

€™ This is the normal state for a floating gate When electrons are removed from thefloating gate, current is allowed to flow and the bit state is ‘1’ The FG memory hasachieved high density, good program/erase speed, good reliability, and low operatingvoltage and promotes endurance for Flash memory application

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Figure 11 Schematics of the conventional FG memory and SONOS Schematics of (a) floating gate and thin-film storage-based embedded nonvolatile memory bit cells, depending on the charge stored inside the gate dielectric of a MOSFET, and (b) the nitride

traps (SONOS), embedded into the gate oxide of a MOSFET.

SONOS memory technology

In order to solve the scaling issue of the FG memory, the SONOS memory has been

proposed as a Flash technology since the 1980s [68,69] The acronym SONOS is derivedfrom the structure of the device as shown in Figure 11b The SONOS device is basically

a MOSFET, where the gate has been replaced by an ONO dielectric The SONOS memoryhas a better charge retention than the FG memory when the FG bit cell’s tunneling oxidelayer is below 10Â nm [70] Moreover, the SONOS memory exhibits many advantages,e.g., easy to fabricate, high program/erase (P/E) speed, low programming voltage and

to the ITRS [71] The charge, holes or electrons, are injected into the nitride layer usingdirect tunneling through the tunnel oxide layer The nitride layer is electrically isolatedfrom the surrounding transistor, although charges stored on the nitride directly affect theconductivity of the underlying transistor channel Since the SONOS memory possessesspatially isolated deep-level traps, a single defect in the tunneling oxide will not causedischarge of the memory cell The thickness of the top oxide is important to prevent theFowler-Nordheim tunneling of electrons from the gate during erase When the polysiliconcontrol gate is biased positively, electrons from the transistor source and drain regionstunnel through the oxide layer and get trapped in the silicon nitride This results in an

energy barrier between the drain and the source, raising the threshold voltage Vthsource voltage necessary for current to flow through the transistor) Moreover, the nitridelayer is electrically isolated from the surrounding transistor, although charges stored on thenitride directly affect the conductivity of the underlying transistor channel The

(the gate-oxide/nitride sandwich typically consists of a 2-nm-thick oxide lower layer, a 5-nm-thicksilicon nitride middle layer, and a 5- to 10-nm-thick oxide upper layer [72,73] However,SONOS-type Flash memories have several drawbacks such as shallow trap energy level,erase saturation, and vertical stored charge migration [74] The programming speed andoperating voltage problems can be solved by reducing the tunnel oxide thickness At lowtunnel oxide thickness, the issues that impact SONOS-type memories include erase

saturation and vertical charge migration, which seriously degrade the retention capability

of the memory [75] Thus, many concerns still remain for the SONOS type of memories,which will be discussed in the next section

Limitations of FG and SONOS memory technologies

Scaling demands very thin gate insulators in order to keep short channel effects and

control the shrinkage of the device size and maximize the performance When the

tunneling oxide thickness is below 10Â nm, the storaged charge in the FG is easy to leakdue to a defect in the tunneling oxide formed by repeated write/erase cycles or direct

tunneling current

The tunneling gate oxide thickness in a conventional Flash memory cannot be scaled

down to sub-7Â nm because of charge retention [76] The SONOS Flash memory canrelieve the problem but still has a relatively thick gate dielectric thickness of about 7Â nm.Therefore, conventional SONOS Flash memory also has a scaling-down problem Manystudies have shown that the charge retention characteristics in scaled SONOS nonvolatilememory devices with a low gate oxide thickness and at high temperature are problematicwith shallow-level traps [48,77,78] For the conventional SONOS memory, erase

saturation and vertical stored charge migration [79,80] are the two major drawbacks; themost challenging tasks are how to maintain an acceptable charge capability of the discretestorage nodes and how to fabricate nanocrystals with constant size, high density, and

uniform distributions [81] When the trap energy level is shallow, erase saturation andvertical migration occur and the electron charge decay rate increases due to low tunneloxide thickness, issues that impact SONOS-type memories as shown in Figure 12 Thiserase saturation makes SONOS erase less as the erase voltage or the tunnel oxide

thickness is increased Since the SONOS memory uses silicon nitride as a charge trappinglayer, the electrons in the Si sub-conduction band will tunnel through the tunneling oxide

accelerate the de-trapping rate, the gate electron injection current exceeds the de-trappingbut resulting in practically an increase in charge and no erasing Using an ultra-thin

(<2Â nm) tunnel oxide offers an efficient charge direct tunneling erase and opens a

memory window However, the direct tunneling cannot be turned off at a low electricfield, leading to poor retention and read disturb Thus, the SONOS memory cannot beused for NAND Flash without further innovation of new memory technologies The mainreason for the growth of emerging NVM technologies is that scaling has now become aserious issue for the memory industry Not only are many of these new technologies

inherently more scalable, but also they seem well suited to the next generation of mobilecomputing and communications that will demand high-capacity memories capable ofstoring and rapidly accessing video and a large database without overburdening batterypower sources

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Figure 12 Fowler-Nordheim (FN) tunneling of electrons from the gate during erase and erase saturation in SONOS nonvolatile memory This

indicates the reduced memory window as the erase voltage is increased.

Reproduced from ref [ 74 ].

Many alternate device structures are proposed to hopefully circumvent these scaling

challenges and to improve the device performance In an effort to continue Moore’s lawand overcome the ultimate limitations of MOS-based memory devices, other storage

concepts have been proposed in search of the ‘unified memory’ The ideal memorydevice or the so-called ‘unified memory’ would satisfy simultaneously three

requirements: high speed, high density, and nonvolatility At the present time, such anideal memory has not been developed FGNVSM has high density and nonvolatility, butits P/E speed is low DRAM has high speed (approximately 10Â ns) and relatively highdensity, but it is volatile SRAM has very high speed (approximately 5Â ns), but it suffersfrom very low density and volatility Many nonvolatile memory devices have been

proposed on the basis of changing charge storage materials and new device concepts forthe ‘unified memory’ These structures will be considered in the next sections Inlight of such issues, emerging memory solutions seem to be a key technology

Current emerging memory technologies

Recent studies have revealed that there is a close correlation among existing and emergingmemory technologies in view of scalability The scaling trend of memory transition leads

to smaller and smaller memory devices, which have been routinely observed To furthersupport this assertion, another set of current progress in memory technology is described

to the increasing importance of memory to users’ experience and the importance of

memory to system performance There are many emerging memory technologies whichare trying to replace existing memory technologies in the market These new memorydevices such as RRAM, PCM, and STT-RAM have read/write/retention/endurance

characteristics different from those of conventional SRAM, DRAM, and Flash [82] But

of multilevel, high-performance memory devices suitable for market must be explored.Currently, there are several technologies that show some promise; some of these newemerging technologies are MRAM, FeRAM, PCM, STT-RAM, nano-random-accessmemory (NRAM), racetrack memory, RRAM and memristor, molecular memory, andmany others [10,83] Each of these memory technologies will be briefly outlined anddiscussed in the following sections In view of the commercial production, currently,MRAM, FeRAM, and PCM are in commercial production but still remain limited to nicheapplications relative to DRAM and NAND Flash There is a prospect that among theemerging memory technologies, MRAM, STT-RAM, and RRAM are the most promisingones, but they are still many years away from competing for industry adoption [84] It isnecessary for any new technology to be able to deliver most for industry adoption Forindustry adoption on a mass scale, some parameters must be matched with existing

memory technologies In consideration of new technology for industry application, thescalability of the technology, speed of the device, power consumption to be better thanexisting memories, endurance, densities, better than existing technologies and most

importantly the cost; if the emerging technology can only run one or two of these

attributes, then, at most desirable, it is likely to be resigned to niche applications

MRAM

MRAM or magnetic RAM is a nonvolatile RAM technology under development since the1990s RRAM methods of storing data bits use magnetic charges instead of the electricalcharges used by DRAM and SRAM technologies MRAM, first developed by IBM in the1970s [85], is expected to replace DRAM as the memory standard in electronics MRAM

is basically based on memory cells having two magnetic storage elements, one with afixed magnetic polarity and another with a switchable polarity These magnetic elementsare positioned on top of each other but separated by a thin insulating tunnel barrier asshown in the cell structure in Figure 13 Moreover, scientists define a metal as

magnetoresistive if it shows a slight change in electrical resistance when placed in a

magnetic field By combining the high speed of static RAM and the high density of

DRAM, proponents say that MRAM could be used to significantly improve electronicproducts by storing greater amounts of data, enabling it to be accessed faster while

consuming less battery power than existing electronic memories Technically, it workswith the state of the cell, which is sensed by measuring the electrical resistance whilepassing a current through the cell Because of the magnetic tunnel effect [86], if bothmagnetic moments are parallel to each other, then the electrons will be able to tunnel andthe cell is in the low resistance ‘ON’ state However, if the magnetic moments areantiparallel, the cell resistance will be high The memory characteristics of MRAM ofwriting and erasing are fulfilled by passing a current through the write line to induce amagnetic field across the cell MRAM has been slowly getting off the ground but has nowentered the market and will become increasingly available for mass production in thecouple of years and beyond Currently, it has reached some level of commercial success inniche applications [87] Various companies such as Samsung, IBM, Hitachi and Toshiba,and TSMC are actively developing variant technologies of MRAM chips In view of

limited by the spread of the magnetic field into neighboring cells and need an amendment

to compete completely as a universal memory The price of MRAM is also another issueand considered a limiting factor, with prices far in excess of all the currently establishedmemories at approximately £2 to £3 ($3 to $5) per megabyte [91] According to thisprice level, MRAM is in excess of 1,000 times the price of Flash memory and over 10,000times the price of hard disk drives It is expected that of the next-generation memory

technologies, MRAM, in the future, will have the biggest market, followed by FeRAM,PCRAM, and memristors

compatibility with existing DRAM and SRAM As we have discussed in the previoussection, MRAM stores data according to the magnetization direction of each bit and thenanoscopic magnetic fields set the bits in conventional MRAM On the other hand, STT-MRAM uses spin-polarized currents, enabling smaller and less energy-consuming bits.The basic cell structure of STT-RAM is depicted in Figure 14 In addition, STT-RAMwriting is a technology in which an electric current is polarized by aligning the spin

direction of the electrons flowing through a magnetic tunnel junction (MTJ) element Datawriting is performed by using the spin-polarized current to change the magnetic

orientation of the information storage layer in the MTJ element [94] The resultant

resistance difference of the MTJ element is used for information readout STT-RAM is amore appropriate technology for future MRAM produced using ultra-fine processes andcan be efficiently embedded in subsequent generations of such semiconductor devices asFPGAs, microprocessors, microcontrollers, and SoC A special bonus for embedded

designers is the fact that the internal voltage STT-RAM requires is only 1.2Â V The

difference between STT-MRAM and a conventional MRAM is only in the writing

operation mechanism; the read system is the same The memory cell of STT-MRAM iscomposed of a transistor, an MTJ, a word line (WL), a bit line (BL), and a source line (SL)[95] Currently, STT-RAM is being developed in companies including Everspin, Grandis,Hynix, IBM, Samsung, TDK, and Toshiba However, for STT-RAM to be adopted as auniversal mainstream semiconductor memory, some key challenges should be resolved:the simultaneous achievement of low switching current and high thermal stability It must

be dense (approximately 10Â F2), fast (below 10Â ns of read and write speeds), and

operating at low power [96]

Figure 14 Basic STT-RAM cell structure.

FeRAM

FeRAM is a nonvolatile RAM that combines the fast read and write access of DRAMcells, consisting of a capacitor and transistor structure as shown in Figure 15 The cell isthen accessed via the transistor, which enables the ferroelectric state of the capacitor

dielectric to be sensed In spite of its name, FeRAM does not contain iron The

polarization properties of a ferroelectric substance are used as a memory device Today’sFeRAM uses lead zirconate titanate (PZT); other materials are being considered The maindeveloper of FeRAM is Ramtron International FeRAM is the most common kind of

personal computer memory with the ability to retain data when power is turned off as doother nonvolatile memory devices such as ROM and Flash memory [97] In a DRAM cell,the data periodically need refreshing due to the discharging of the capacitor, whereas

FeRAM maintains the data without any external power supply It achieves this by using aferroelectric material in the place of a conventional dielectric material between the plates

However, it is a fast memory that can endure a high number of cycles (e.g., 1014) [98],

meaning that the requirement for a write cycle for every read cycle will not result in short

product lives with a very low power requirement It is expected to have many applications

in small consumer devices such as personal digital assistants (PDAs), handheld phones,power meters, and smart cards, and in security systems FeRAM is faster than Flash

memory It is also expected to replace EEPROM and SRAM for some applications and tobecome a key component in future wireless products Even after FeRAM has achieved alevel of commercial success, with the first devices released in 1993 [99,100], current

FeRAM chips offer performance that is either comparable to or exceeding current Flashmemories [98,101], but still slower than DRAM

[102,103] The basic PCRAM cell structure is depicted in Figure 16 Most phase-change

particular, the most promising are the GeSbTe alloys which follow a pseudobinary

composition (between GeTe and Sb2Te3), referred to as GST These materials are in factcommonly used as the data layer in rewritable compact disks and digital versatile disks(CD-RW and DVD-RW) where the change in optical properties is exploited to store data.The structure of the material can change rapidly back and forth between amorphous andcrystalline on a microscopic scale The material has low electrical resistance in the

crystalline or ordered phase and high electrical resistance in the amorphous or disordered

phase This allows electrical currents to be switched ON and OFF, representing digital

high and low states This process has been demonstrated to be on the order of a few tens ofnanoseconds [108], which potentially makes it compatible with Flash for the read

operation, but several orders of magnitude faster for the write cycle This makes it

possible for PCM to function many times faster than conventional Flash memory whileusing less power In addition, PCM technology has the potential to provide inexpensive,high-speed, high-density, high-volume nonvolatile storage on an unprecedented scale Thephysical structure is three-dimensional, maximizing the number of transistors that canexist in a chip of fixed size PCM is sometimes called perfect RAM because data can beoverwritten without having to erase it first Possible problems facing PCRAM concern thehigh current density needed to erase the memory; however, as cell sizes decrease, thecurrent needed will also decrease PCM chips are expected to last several times as long ascurrently available Flash memory chips and may prove cheaper for mass production

Working prototypes of PCM chips have been tested by IBM, Infineon, Samsung,

Macronix, and others Also, the production of PCM has been announced recently by bothcollaborations between Intel and STMicroelectronics as well as with Samsung [109,110]

Table 2 RAM, and PCM technologies

Summary of primary contenders for MRAM, FeRAM, STT-RRAM

RRAM is a disruptive technology that can revolutionize the performance of products inmany areas, from consumer electronics and personal computers to automotive, medical,military, and space Among all the current memory technologies, RRAM is attractingmuch attention since it is compatible with the conventional semiconductor processes.Memristor-based RRAM is one of the most promising emerging memory technologies andhas the potential of being a universal memory technology [111] It offers the potential for acheap, simple memory that could compete across the whole spectrum of digital memories,from low-cost, low-performance applications up to universal memories capable of

replacing all current market-leading technologies, such as hard disk drives, random-accessmemories, and Flash memories [112] RRAM is a simple, two-terminal metal-insulator-metal (MIM) bistable device as shown in the basic configuration in Figure 17 It canexist in two distinct conductivity states, with each state being induced by applying

different voltages across the device terminals RRAM uses materials that can be switchedbetween two or more distinct resistance states Many companies are investing metal oxidenanolayers switched by voltage pulses Researchers generally think that the pulses’ electricfields produce conducting filaments through the insulating oxide HP Labs plans to releaseprototype chips this year based on ‘memristors’ in which migrating oxygen atomschange resistance [113] Xu et al have also defined that among all the technology

candidates, RRAM is considered to be the most promising as it operates faster than

PCRAM and it has a simpler and smaller cell structure than magnetic memories (e.g.,MRAM or STT-RAM) [114] In contrast to a conventional MOS-accessed memory cell, amemristor-based RRAM has the potential of forming a cross-point structure without usingaccess devices, achieving an ultra-high density This device is based on the bistable

resistance state found for almost any oxide material, including NiO, ZrO2, HfO2, SrZrO3,and BaTiO3[115-119] Currently, Samsung and IBM are actively investigating RRAM

Kamiya et al have revealed by a theoretical mechanism that RRAM shows filamentary-filaments in the resistive material as shown in Figure 17[120] The formation and

disruption of these filaments are thus the mechanisms responsible for the ON-OFF

switching in RRAM devices The key issue is, therefore, to reveal electronic roles in the

point which is called the set voltage (V set), while the current level abruptly decreases from LRS to HRS at the reset voltage (V reset) under the RESET process The SET and

RESET processes are repeatedly carried out by sweeping the gate voltage with the binarystates LRS and HRS [121] Wang and Tseng and Lin et al have indicated that the interfaceplays an important role in enhancing the performances of RRAM [122,123] Recently,Goux et al have explained that using a stacked RRAM structure has been shown to be one

of the most promising methods to improve the memory characteristics [124] Althoughbeing a most promising memory element, critical issues for the future development ofRRAM devices are reliable, such as data retention and memory endurance [125] A dataretention time of over 10Â years can be extrapolated from retention characteristics

measured at high temperatures and a memory endurance of over 106Â cycles [126]

Therefore, a statistical study of reliability, availability, and maintainability is essential forthe future development of RRAM

Polymer memory

Throughout the last few years, polymers have found growing interest as a result of the rise

of a new class of nonvolatile memories In a polymer memory, a layer consists of

molecules and/or nanoparticles in an organic polymer matrix is sandwiched between anarray of top and bottom electrodes as illustrated in Figure 18 Moreover, polymer

memory has the advantage of a simple fabrication process and good controllability ofmaterials [127] Polymer memory could be called digital memory with the latest

technology It is not possible for a silicon-based memory to be established in less space,but it is possible for polymer memory Ling et al explained that polymer materials have

simplicity in structure, free read and write capability, better scalability, 3-D stacking

ability, low-cost potential, and huge capacity of data storage [128] They revealed that apolymer memory stores information in a manner that is entirely different from that ofsilicon-based memory devices Rather than encoding ‘0’ and ‘1’ from thenumber of charges stored in a cell, a polymer memory stores data on the basis of high andlow conductivity while responding to an applied voltage Among the large number ofemerging memory technologies, polymer memory is the leading technology It is mainlybecause of its expansion capability in 3-D space [129] since most polymers are organicmaterials consisting of long chains of single molecules Prior to polymer memory

fabrication, deposition of an organic layer is usually done by the sol-gel spin coating

technique All the other necessary constituent materials are dissolved in a solvent which isthen spin-coated over a substrate When the solvent is evaporated, a thin film of materialwith 10- to 100-nm thickness is successfully deposited at bottom electrodes Top

electrodes are deposited as the final step The conductivity of the organic layer is thenchanged by applying a voltage across the memory cell, allowing bits of data to be stored inthe polymer memory cell When the polymer memory cell becomes electrically

conductive, the electrons are introduced and removed Even the polymer is considered as a‘smart’ material to the extent that functionality is built into the material itself ofswitchability and charge store This will open up tremendous opportunities in the

requirements of current silicon memory chips,’ says Thomas, the Director of PhysicalSciences at IBM’s Watson Research Center in Yorktown Heights, NY They are likely to

Achieving capacities comparable to vertical RM or hard drives would require stacks ofthese arrays The nanowires have regions with different magnetic polarities, and the

boundaries between the regions represent 1 or 0Â s, depending on the polarities of theregions on either side [131,132] The magnetic information itself is then pushed along thewire, past the write and read heads by applying voltage pulses to the wire ends The

magnetic pattern to speed along the nanowire, while applying a spin-polarized current,causes the data to be moved in either direction, depending on the direction of the current

A separate nanowire perpendicular to the U-shaped ‘racetrack’ writes data by

changing the polarity of the magnetic regions A second device at the base of the trackreads the data Data can be written and read in less than a nanosecond A racetrack

memory using hundreds of millions of nanowires would have the potential to store vastamounts of data [133,134] In this way, the memory requires no mechanical moving ofparts and it has a greater reliability and higher performance than HDDs, with theoreticalnanosecond operating speeds For a device configuration where data storage wires arefabricated in rows on the substrate, conventional manufacturing techniques are adequate.However, for the maximum possible memory density, the storage wires are proposed to beconfigured rising from the substrate in a ‘U’ shape, giving rise to a 3-D forest ofnanowires While this layout does allow high data storage densities, it also has the

disadvantage of complex fabrication methods, with so far, only 3-bit operation of thedevices demonstrated [133] As the access time of the data is also dependent on the

position of the data on the wire, these would also be performance losses if long wires areused to increase the storage density further The speed of operation of the devices has alsobeen an issue during development, with much slower movement of the magnetic domainsthan originally predicted This has been attributed to crystal imperfections in the

permalloy wire, which inhibit the movement of the magnetic domains By eliminatingthese imperfections, a data movement speed of 110Â m/s has been demonstrated [133]

Figure 19 Racetrack memory diagram showing an array of U-shaped magnetic nanowires The nanowires are arranged vertically like trees in a forest and a

pair of tiny devices that read and write the data Adopted from IBM.

Other new memory technologies

Researchers are already working hard on several emerging technologies, as discussed inprevious sections, to pursue storage-class memories with a more traditional design thanthat of the racetrack memory, which places the bits in horizontal arrays

Molecular memory

A molecular memory is a nonvolatile data storage memory technology that uses molecularspecies as the data storage element, rather than, e.g., circuits, magnetics, inorganic

materials, or physical shapes [135] In a molecular memory, a monolayer of molecules issandwiched between a cross-point array of top and bottom electrodes as shown in

Figure 20 The molecules are packed in a highly ordered way, with one end of the

molecule electrically connected to the bottom electrode and the other end of the moleculeconnected to the top electrode, and this molecular component is described as a molecularswitch [136] Langmuir-Blodgett (LB) deposition is ideally suited for depositing the

molecular layer for the fabrication of molecular memory devices [137,138] Then,

regarding the molecular memory operation, by applying a voltage between the electrodes,the conductivity of the molecules is altered, enabling data to be stored in a nonvolatileway This process can then be reversed, and the data can be erased by applying a voltage

to the opposite polarity of the memory cell The increasing demand for nonvolatile

electronic memories will grow rapidly in order to keep pace with the requirements forsubsystems involved in flight demonstration projects and deep space operations At thesame time, mass, volume, and power must be minimized for mission affordability

concerning these requirements; molecular memory could be a very promising candidate tofill this need

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Figure 20 Cell structure of a molecular memory device.

Recently, Plafke has revealed clearly via an article that like most experimental technologythat sounds so amazing that we want it right now, the molecular memory cell does notprovide enough power for a commercial device [139] This is currently only able to

produce a 20% jump in conductivity However, the area of molecular switching memory ispromising, having eliminated the need for near-absolute zero temperatures and removedsome of the constraints of the shape and number of layers of the molecule sheets whichintend to convey that two of the biggest barriers are taken away Thus, molecular memoryrequires strong attention to work over such issues and needs immediate amendment to seethe possibility of a universal memory in the future

MNW

and the search for a universal memory data storage device that combines rapid read and

write speeds, high storage density, and nonvolatility is driving the investigation of new

materials in the nanostructured form [140] As an alternative to the current Flash memorytechnology, a novel transistor architecture using molecular-scale nanowire memory cellsholds the promise of unprecedently compact data storage The molecular nanowire array(MNW) memory is fundamentally different from other semiconductor memories;

information storage is achieved through the channel of a nanowire transistor that is

functionalized with redox-active molecules rather than through manipulation of smallamounts of charge It is relatively slow and lacks the random access capability, whereindata that can be randomly read and written at every byte are being actively pursued

Figure 21 shows the schematic design of a MNW memory cell Lieber, and Agarwal andLieber have revealed that the nanowire-based memory technology is a powerful approach

to assemble electronic/photonic devices at ultra-small scales owing to their sub-lithographic size, defect-free single-crystalline structure, and unique geometry [141,142].Nanowires synthesized by chemical or physical processes are nearly perfect single-crystalstructures with a small geometry and perfect surface The channel of a nanowire transistor

is functionalized with redox-active molecules During programming, control of the voltageacting on the substrate is possible to change the oxidation and reduction states of the

active molecules Finally, by measurement of the conductance of the nanowire with thegate bias fixed at 0Â V or a small voltage and from the hysteresis, the two states can bedefined as a high-conductance ON state and a low-conductance OFF state The MNWmemory has advantages of low power dissipation, ultra-high density, simple fabricationprocess, 3-D structure, and multilevel storage, and it functions at the nanoscale with a fewelectrons but limited by low retention time parameter [143,144] Moreover, the deposition

of metals onto a monolayer of molecular wires can lead to low device yield, and this

problem remains a major challenge [145] However, mentioning the term emerging classmemory, it could be expected that the MNW memory represents an important step towardsthe creation of molecular computers that are much smaller and could be more powerfulthan today’s silicon-based computers

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Figure 21 A MNW memory cell structure.

SNW

Semiconductor memory is essential for information processing as a key part of silicontechnology; semiconductor memory has been continuously scaled to achieve a higherdensity and better performance in accordance with Moore’s law [146] Flash memory mayreach fundamental scaling limits, however, because a thick tunneling oxide is required toprevent charge leakage and achieve 10Â years’ retention As Flash memory approaches itsscaling limit, several alternative strategies have been proposed to extend or replace thecurrent Flash memory technology [147] These approaches are revolutionary, but majorchallenges must be overcome to achieve small memory size and aggressive technologydesign architecture In addition to the engineering of trapping layers, the device

circuitry In a SNW memory device, nanowires are integrated with SONOS technology.The basic schematic design of SNW is depicted in Figure 22 The SNW memory showshigh mobility, less power dissipation, and high performance Moreover, being 3-D-

stacked, the SNW memory enhances cell density and data capacity without relying onadvances in process technology The nanowire-based memory device can store data

electrically and is nonvolatile, meaning it retains data when the power is turned off, likethe silicon-based Flash memory found in smart phones and memory cards [148], withminimal increase in chip size In addition, the SNW device exhibits reliable

write/read/erase operations with a large memory window and high on-to-off current ratio,which are highly advantageous for applications in nonvolatile memory [149] The SNWmemory cannot hold data as long as the existing Flash, but it is slower and has fewer

rewrite cycles and it could potentially be made smaller and packed together more densely.And its main advantage is that it can be made using simple processes at room temperature,which means that it can be deposited even on top of flexible plastic substrates [150] TheSNW could, for instance, be built into a flexible display and could be packed into smallerspaces inside cell phones, MP3 players, plastic RFID tags, and credit cards

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Figure 22 A bottom-gate FET-based nonvolatile SNW memory device.

NRAM

NRAM is a carbon nanotube (CNT)-based memory, which works on a nanomechanicalprinciple, rather than a change in material properties [151] NRAM uses carbon nanotubesfor the bit cells, and the 0 or 1 is determined by the tube’s physical state: up with highresistance, or down and grounded NRAM is expected to be faster and denser than DRAMand also very scalable, able to handle 5-nm bit cells whenever CMOS fabrication

advances to that level It is also very stable in its 0 or 1 state Produced by Nantero, thesememories consist of the structure shown in Figure 23a with an array of bottom

electrodes covered by a thin insulating spacer layer [152] CNTs are then deposited on thespacer layer, leaving them freestanding above the bottom electrodes Unwanted CNTs areremoved from the areas around the electrode, with top contacts and interconnects

deposited on top of the patterned CNT layer During the time that the CNTs are

freestanding, there is no conduction path between the bottom and top electrodes and hence

the memory cell is in the OFF state However, if a large enough voltage is applied over the

cell, the nanotubes are attracted to the bottom electrode where they are held in place byvan der Waals forces [153] Due to the conductive nature of the CNTs, the electrodes are

reported CNT memory devices exhibiting an extraordinarily high charge storage stability

of more than 12Â days at room temperature [154] However, as NRAM is based on CNTs,

it suffers from fabrication problems that are inherent in carbon nanotube-based devices.The issues include the cost and fabrication complexity of producing the CNTs, ensuringuniform dispersions of nanotubes, and difficulties in removing nanotubes from the

simple way to store binary data [155] It can store hundreds of gigabytes of data per squarecentimeter However, the polymer reverts to its pre-punched form over time, losing data inthe process Millipede storage technology is being pursued as a potential replacement formagnetic recording in hard drives, at the same time reducing the form factor to that ofFlash media The prototype’s capacity would enable the storage of 25 DVDs or 25 millionpages of text on a postage stamp-sized surface and could enable 10Â GB of storage

capacity on a cell phone Millipede uses thousands of tiny sharp points (hence the name)

to punch holes in a thin plastic film Each of the 10-nm holes represents a single bit Thepattern of indentations is a digitized version of the data The layout of the millipede

cantilever/tip in contact with the data storage medium is shown in Figure 24 According

to IBM, Millipede can be thought of as a nanotechnology version of the punch card dataprocessing technology developed in the late nineteenth century [156] However, there aresignificant differences: Millipede is rewritable, and it may eventually enable storage ofover 1.5Â GB of data in a space no larger than a single hole in the punch card Storagedevices based on IBM’s technology can be made with existing manufacturing techniques,

so they will not be expensive to make According to P Vettiger, head of the Millipedeproject, there is not a single step in fabrication that needs to be invented Vettiger predictsthat a nanostorage device based on IBM’s technology could be available as early as 2005[155] Now, researchers at IBM’s Zurich Research Laboratory in Switzerland have

WORM memory based on DNA biopolymer nanocomposite

to the metal ions [158] In recent years, DNA has also been shown to be a promising

optical material with the material processing fully compatible with conventional polymerfor thin-film optoelectronic applications [159,160] Researchers from National Tsing HuaUniversity in Taiwan and the Karlsruhe Institute of Technology in Germany have created aDNA-based memory device, that is, write-once-read-many-times (WORM), that usesultraviolet (UV) light to encode information [161] The device consists of a single

biopolymer layer sandwiched between electrodes, in which electrical bistability is

activated by in situ formation of silver nanoparticles embedded in a biopolymer upon light

irradiation (Figure 25) The device functionally works when shining UV light on thesystem, which enables a light-triggered synthesis process that causes the silver atoms tocluster into nanosized particles and readies the system for data encoding For some

particular instance, the team has found that using DNA may be less expensive to processinto storage devices than using traditional, inorganic materials like silicon, the researcherssay [161,162] They said that when no voltage or low voltage is applied through the

electrodes to the UV-irradiated DNA, only a low current is able to pass through the

composite; this corresponds to the ‘OFF’ state of the device But the UV irradiationmakes the composite unable to hold a charge under a high electric field, so when the

applied voltage exceeds a certain threshold, an increased amount of charge is able to passthrough This higher state of conductivity corresponds to the ‘ON’ state of the

device The team found that this change from low conductivity (‘OFF’) to highconductivity (‘ON’) was irreversible: once the system had been turned on, it stayed

on, no matter what voltage the team applied to the system Once information is written,the device appears to retain that information indefinitely The researchers hope that thetechnique will be useful in the design of optical storage devices and suggest that it mayhave plasmonic applications as well Consequently, WORM memories based on DNA abiopolymer nanocomposite have emerged as an excellent candidate for next-generationinformation storage media because of their potential application in flexible memory

devices This work combines new advances in DNA nanotechnology with a conventionalpolymer fabrication platform to realize a new emerging class of DNA-based memory

View larger version

Figure 25 Schematic design of a memory device consisting of a thin DNA biopolymer film sandwiched between electrodes The memory switching effect is

activated upon light irradiation Adopted from ref [ 161 ].

QD memory

Memory made from tiny islands of semiconductors - known as quantum dots - could fill agap left by today’s computer memory, allowing storage that is fast as well as long lasting.Researchers have shown that they can write information into quantum dot memory in justnanoseconds Memory is divided into two forms: DRRAM and Flash [163,164]

Computers use DRAM, for short-term memory, but data does not persist for long and must

be refreshed over 100 times per second to maintain its memory On the other hand, Flashmemory, like that used in memory cards, can store data for years without refreshing butwrites information about 1,000 times slower than DRAM New research shows that

memory based on quantum dots can provide the best of both: long-term storage with write

15Â nm across, could store 1 terabyte (1,000Â GB) of data per square inch, the

researchers say Dieter Bimberg and colleagues at the Technical University of Berlin,Germany, with collaborators at Istanbul University, Turkey, demonstrated that it is

possible to write information to the quantum dots in just 6Â ns [165,166] The key

advantages of quantum dot (QD) NVMs are the high read/write speed, small size, lowoperating voltage, and, most importantly, multibit storage per device However, thesefeatures have not been realized due to variations in dot size and lack of uniform insulatorcladding layers on the dots [167] Incorporating QDs into the floating gate results in areduction in charge leakage and power dissipation with enhanced programming speed.Researchers in India and Germany have now unveiled the memory characteristics of

silicon and silicon-germanium QDs embedded in epitaxial rare-earth oxide gadoliniumoxide (Gd2O3) grown on Si (111) substrates as shown in the DQM structure in

Figure 26 Multilayer Si as well as single-layer Si1 − x Ge x (where x = 0.6) QDs

floating-gate memory devices [168,169]

show excellent memory characteristics, making them attractive for next-generation Flash-View larger version

Figure 26 Structure of quantum dot memory Adopted from ref [168 ].

3-D cross-point memory

Memory producers are also trying to develop alternative technologies that may be scalablebeyond 20-nm lithography For true scalability beyond 20-nm technology nodes, it is

necessary to design a cross-point memory array which does not require diodes for accesselements [170] The cross-point memory architecture could be designed such that it can beeasily fabricated in multiple layers to form a stacked 3-D memory [171] The 3-D

technology has brought to high volume an NVM where arrays of memory cells are stackedabove control logic circuitry in the third dimension, and stacking 3-D memory directlyover CMOS allows for high array efficiency and very small die size [172] The 3-D

technology uses no new materials, processes, or fabrication equipment, which controllogic circuitry composed of typical CMOS The memory construction uses typical back-end processing tools, and each memory layer is a repeat of the layers below it The basicdesign of the 3-D cell consists of a vertical diode in series with a memory element as

shown in Figure 27 Building integrated circuits vertically allows for a reduced chipfootprint when compared to a traditional 2-D design, by an approximate factor of the

number of layers used This offers significant advantages in terms of reduced interconnectdelay when routing to blocks that otherwise would have been placed laterally The processfor the 2-D cross-point array can be built into a multilayer 3-D architecture Traditionally,

a 3-D integrated circuit (3-D-IC) has used more than one active device layer While

resistance-change memory cells are not active devices, they function as rectifying devices

in design Further characterization of the resistance-change material is also necessary in

important role, not only as a passive component but also as an active component [173].TFE is an emerging technology that employs materials (including oxides, nitrides, andcarbides) and a device for the realization of invisible circuits for implementing next-

generation transparent conducting oxides in an invisible memory generation [174] Ingeneral, the TF-RRAM device is based on a capacitor-like structure (e.g., ITO/transparentresistive material/ITO/transparent and flexible substrate), which provides transmittance inthe visible region [175] For such new class of memory technology, data retention is

expected to be about 10 years The basic structural design of the new memory chips isconfigured, namely with two terminals per bit of information on a transparent and flexiblesubstrate rather than the standard three terminals per bit on a rigid and opaque substrate(Figure 28) They are much better suited for the next revolution in electronic 3-D

memory than Flash memory These new memory chips that are transparent, are flexibleenough to be folded like a sheet of paper, shrug off 1,000°F temperatures twice as hot asthe max in a kitchen oven, and survive other hostile conditions could usher in the

development of next-generation Flash-competitive memory for tomorrow’s keychaindrives, cell phones, and computers, a scientist reported today Speaking at the 243rd

National Meeting and Exposition of the American Chemical Society, the world’s largestscientific society, he said that devices with these chips could retain data despite an

accidental trip through the drier or even a voyage to Mars And with a unique 3-D internalarchitecture, the new chips could pack extra gigabytes of data while taking up less space[176] Despite the recent progress in TF-RRAM, it needs lots of work to satisfy the dualrequirements of resistance to repeated bending stress and transparent properties Thus, it issupposed that an achievement of such TF-RRAM device will be the next step towards therealization of transparent and flexible electronic systems We hope that FT-RRAM deviceswill mark a milestone in the current progress of such unique and invisible electronic

systems in the near future

Figure 28 A schematic design of FT-RRAM and a flexible, transparent memory chip image created by researchers at Rice University Reproduced from

writing data [177,178] In reference to this, they revealed the 1T1R cell as the basic

building block of a NVRRAM array as it avoids sneak path problem to ensure reliableoperation Moreover, the 1T1R structure is more compact and may enable vertically

stacking memory layers, ideally suited for mass storage devices But, in the absence of anytransistor, the isolation must be provided by a ‘selector’ device, such as a diode, inseries with the memory element, or by the memory element itself Such kinds of isolationcapabilities have been inferior to the use of transistors, limiting the ability to operate verylarge RRAM arrays in 1T1R architecture 1T1R memory polarity can be either binary orunary Bipolar effects cause polarity to reverse reset operation to set operation Unipolarswitching leaves polarity unaffected but uses different voltages

View larger version

Figure 29 The basic cell structure of 1T1R-RRAM.

MTM, PFRAM, SPBMM, and CMORRAM - future alternate NVMs

Other potential emerging classes of memory technologies, we are describing in short, aremolecular tunnel memory (MTM), polymeric ferroelectric RAM (PFRAM), spin-

polarized beam magnetic memory (SPBMM), light memory, and complex metal-oxideRRAM (CMORRAM) We can say that these are sister memory technologies of molecularmemory, ferroelectric/polymer memory, magnetic memory, and metal-oxide RRAM,

respectively Although these new technologies will almost certainly result in more

complex memory hierarchies than their family memories, they are likely to allow the

construction of memory chips that are nonvolatile, have low energy, and have density anddevelopment close to or better than those of DRAM chips, with improved performanceand allowing memory systems to continue to scale up

This article reviewed the historical development to the recent advancement on memoryarchitecture and scaling trend of several conventional types of Flash within the MOS

family and projected their future trends With great progress being made in the emergingmemory technologies, current trends and limitations were discussed before leading tosome insight into the next generation of memory products For the past three and a halfdecades in existence, the family of semiconductor memories has expanded greatly andachieved higher densities, higher speeds, lower power, more functionality, and lower

costs In the past 40 to 50Â years, NVSM has grown from the FG concept to FAMOS,SAMOS, Flash memory, multilevel cells, RRAM, 3-D structures, and TF-RRAM Since

1990, NVSM is an inspired technology, which has ushered in the digital age, enabled thedevelopment of all modern electronic systems, and brought unprecedented benefit to

humankind At the same time, some of the limitations within each type of memory are alsobecoming more realized As the device dimension is reduced to the deca-nanometer

regime, NVSM faces many serious scaling challenges such as the interface of neighboringcells, reduction of stored charges, and random telegraph noise As such, we hope and areconfident that there are several emerging technologies aiming to go beyond those

limitations and potentially replace all or most of the existing semiconductor memory

technologies to become a USM Despite these limitations, the field of conventional

semiconductor memories would continue to flourish and memory device scientists willfind the way to meet these challenges and may even develop a ‘unified memory’with low cost, high performance, and high reliability for future electronic systems

Progress towards a viable new resistive memory technology relies on fully understandingthe mechanisms responsible for switching and charge transport, the failure mechanisms,and the factors associated with materials reliability Moreover, the development of currentredox-based resistive switching will help to improve our old technologies, and furtherresearch will produce more impressive results that will benefit industries and society toimprove the quality of life for billions of people around the world

The authors declare that they have no competing interests

JSM designed the structure and modified the manuscript SMS and TYT participated inthe sequence alignment and editing the manuscript UC participated in its design andcoordination and helped to draft the manuscript All authors read and approved the finalmanuscript

JSM received his bachelor’s degree (Physics Honors) from the Department of Physics,Aligarh Muslim University, Aligarh, India, and Master’s degree in solid-state technologyfrom the Department of Physics and Meteorology, Indian Institute of Technology (IIT),Kharagpur, India, in 2007 He received his Ph.D degree in Nanotechnology from NationalChiao Tung University (NCTU), Taiwan, in February 2012 From March 2012 to

December 2013, he has been a Postdoctoral Research Associate in the Department ofPhotonics and Display Institute, NCTU, Taiwan He is currently a Postdoctoral ResearchAssociate in the Department of Electronics and the Institute of Electronics, NCTU,

Taiwan His current research interests include designing, fabrication, and testing of a

transparent and flexible random-access memory (RRAM) for application in invisible androllable nonvolatile memory devices He has published various research papers in reputedjournals and presented his research in international conferences over flexible substrate-based thin-film transistors and capacitor devices for their applications in display and RFidentification tags

SMS received his B.S degree from National Taiwan University, M.S degree from theUniversity of Washington, and Ph.D degree from Stanford University, all in ElectricalEngineering He was with Bell Telephone Laboratories from 1963 to 1989 as a member ofthe Technical Staff He joined National Chiao Tung University (NCTU) from 1990 to

2006 as a Distinguished Professor At present, he is a National Endowed Chair Professor

at NCTU He has served as a Visiting Professor or Consulting Professor to many academicinstitutions including the University of Cambridge, Delft University, Beijing JiaotongUniversity, Tokyo Institute of Technology, Swiss Federal Institute of Technology, andStanford University He has made fundamental and pioneering contributions to

semiconductor devices, especially metal-semiconductor contacts, microwave devices, andsubmicron MOSFET technology Of particular importance is his coinvention of the

nonvolatile semiconductor memory (NVSM) which has subsequently given rise to a large

family of memory devices including Flash memory and EEPROM The NVSM has

enabled the development of all modern electronic systems such as the digital cellular

phone, ultrabook computer, personal digital assistant, digital camera, digital television,smart IC card, electronic book, portable DVD, MP3 music player, antilock braking system(ABS), and Global Positioning System (GPS) He has authored or coauthored over 200

National Academy of Engineering

UC received his MS degree in Solid State Electronics from the Indian Institute of

Technology, Roorkee, India, in 2010 He is currently a Ph.D candidate of the Institute ofElectronics, National Chiao Tung University, Taiwan He is currently working on the