Chapter 7_MSI Lgic Circuit

MSI Logic Circuits7 Nguyen Thanh Hai, PhD Example 7.2: MSI Logic Circuits University of Technical Education Faculty of Electrical & Electronic Engineering 8... MSI Logic CircuitsUniversi

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MSI Logic Circuits

University of Technical Education

Faculty of Electrical & Electronic Engineering

2

MSI Logic Circuits (Medium-Scale-Integration)

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3

Nguyen Thanh Hai, PhD

7.1 Decoders

0 A

1 A

2 A

M 1 - N A

M

1 - M O

code input each for high is

output one Only Decoder

General decoder diagram

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Disabled – all HIGH x

1 x

Disabled – all HIGH x

x 1

Respond to input code 1

0 0

Output

1

1 A 2

A

2

A A0

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7

Example 7.2:

8

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10

Example 7.3:

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11

12

7.2 BCD-To-Segment Decoder/Drivers

LED A

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LED A

LED 7 – Segment (Anode)

1 1 1 1 1 1 1

0

g 0

f 0

e 0

d 0

c 0

b 0 a

LEDs ON OFF

14

74LS47

6 2 1 7

4 5 3

13 12 11 10 9 15 14

D C B A

BI/RBO RBI LT

a b c d e f g

LED A

LED 7 – Segment Decoder

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16

74LS47

6 1

4 3

13 11 9 15

DB

BI/RBORBILT

acefg

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D B

BI/RBO RBI LT

a c e f g

LED A

74LS47

D B

BI/RBO RBI LT

a c e f g

LED A

74LS47

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D B

BI/RBO RBI LT

a c e f g

LED A

74LS47

D B

BI/RBO RBI LT

a c e f g

LED A

74LS47

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D B

BI/RBO RBI LT

a c e f g

LED A

74LS47

D B

BI/RBO RBI LT

a c e f g

LED A

74LS47

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D B

BI/RBO RBI LT

a c e f g

LED A

74LS47

D B

BI/RBO RBI LT

a c e f g

LED A

74LS47

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D B

BI/RBO RBI LT

a c e f g

LED A

74LS47

D B

BI/RBO RBI LT

a c e f g

LED A

74LS47

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D B

BI/RBO RBI LT

a c e f g

LED A

74LS47

D B

BI/RBO RBI LT

a c e f g

LED A

74LS47

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D B

BI/RBO RBI LT

a c e f g

LED A

74LS47

D B

BI/RBO RBI LT

a c e f g

LED A

74LS47

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D B

BI/RBO RBI LT

a c e f g

LED A

74LS47

D B

BI/RBO RBI LT

a c e f g

LED A

74LS47

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D B

BI/RBO RBI LT

a c e f g

LED A

74LS47

D B

BI/RBO RBI LT

a c e f g

LED A

74LS47

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35

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Example 7.4

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1 - M

1-N

code output Encoder

General encoder diagram

at HIGH one only

0

A A1 A2 A3 A4 A5 A6 A7

7.3 Encoders

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7.3 Encoders

40

7.3 Encoders

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Example 7.5

I

inputs DATA

Z

Output

inputs SELECT

MUX

output Z to

ed transmitt is

input which determines

code input SELECT

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7.4 Multiplexers (Data Selectors)

44

A B

D0 D1 D2 D3

0 1 0 1

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1

0

A D B A D B A D B A D B

Select Inputs Output

0 0 1 1

0 1 0 1

D 0

D 1

D 2

D 3

46

IC 74151

A B C

D0 D1 D2 D3

Y

8-inputs data

3-inputs select

outputs

D4 D5 D6 D7

7 6

5 4

3 2

1 0

.

D A B C G D A B C G D A B C

+

+ +

=

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Eight-input Multiplexers

1 0 0 0 1 1 1 0

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74HC151

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Datasheet

Example 7.6

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7.5 Demultiplexers (Data Distributions)

0 O 1 O

1 - N O

inputs

DATA

M

code input select

by determined as

outputs the of one only to

ed transmitt is

iutput DATA

inputs SELECT

M M

M

DEMUX

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A B

D

DEMUX 1 into 4

Select inputs

Y0 Y1 Y2 Y3

Data input

D A B Y

.

2 1 0

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7.5 Demultiplexers (Data Distributions)

V 5 +

Datasheet 7.5 Demultiplexers (Data Distributions)

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B A

I I

magnitude

bit

− 4

comparator

3

4 4

1

Outputs

O O

O A > B A < B A = B

4 4 4

6 Data inputs

Datasheet

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B A B

A = ) = ⊕ (

B A B

A < ) = (

B A B

A > ) = (

7.6 Magnitude Comparator

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57

B A B

A = ) = ⊕ (

B A B

A < ) = (

B A B

A > ) = (

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− 4

comparator

3

A A 2 A 1 A 0 B 3 B 2 B 1 B 0

4 4

1

Outputs

O O

O A > B A < B A = B

4 4 4

6 Low - order bits

85

74 HC magnitude bit

− 4

comparator

3

A A 2 A 1 A 0 B 3 B 2 B 1 B 0

4 4

1

Outputs comparison bit

8

-B A B A B

A O O

O > < =

4 4 4

6 High - order bits

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Example 7.7: According to the above figure

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Example 7.7: According to the above figure

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-Take a look Examples from pages

- Answer Review questions

- Homework

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The End

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