Iec 62132-1-2015.Pdf

IEC 621 32 1 Edition 2 0 201 5 1 0 INTERNATIONAL STANDARD NORME INTERNATIONALE Integrated circuits – Measurement of electromagnetic immunity – Part 1 General conditions and definitions Circuits intégr[.]

Integrated circuit s – Measurement of elect romagnet ic immunit y –

Part 1: General conditions and definit ions

Circuits intégrés – Mesure de l'immunit é élect romagnétique –

Partie 1: Condit ions générales et définit ions

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Int egrated circuits – Measurement of elect romagnet ic immunit y –

Part 1: General conditions and definit ions

Circuits int égrés – Mesure de l'immunit é électromagnétique –

Partie 1: Conditions générales et définit ions

W arnin ! Mak e s re th t you o tain d this publc tion from a a thorize distribut or

A tt ention! Veui ez vou a s rer qu vou avez o te u c t te publc tion v ia u distribute r a ré

CONTENTS

FOREWORD 4

INTRODUCTION 6

1 Sco e 7

2 Normative ref eren es 7

3 Terms an def i ition 7

4 Test con ition 1

4.1 General 1

4.2 Ambient con ition 1

4.2.1 Ambient temperature 1

4.2.2 RF ambient 1

4.2.3 RF-immu ity of the test setup 1

4.2.4 Other ambient con ition 1

4.3 Test generator 11 4.4 Freq en y ran e 1

5 Test eq ipment 12

5.1 General 12

5.2 Shieldin 12

5.3 Test generator an p wer ampl fier 12

5.4 Other comp nents 12

6 Test setup 12

6.1 General 12

6.2 Test circ it b ard 12

6.3 Pin selection s heme 12

6.4 IC pin lo din /ermination 13

6.5 Power s p ly req irements 13

6.6 IC sp cif i con ideration 13

6.6.1 IC s p ly voltage 13

6.6.2 IC decoupl n 14

6.6.3 Op ration of IC 14

6.6.4 Guidel nes for IC stimulation 14

6.6.5 IC monitorin 14

6.7 IC sta i ty over time 14

7 Test proced re 14

7.1 Monitorin c ec 14

7.2 Human exp s re 14

7.3 Sy tem verifi ation 14

7.4 Sp cif i proced res 15

7.4.1 Freq en y ste s 15

7.4.2 Ampl tu e mod lation 15

7.4.3 Power level n for mod lation 15

7.4.4 Dwel time 16

7.4.5 Monitorin of the IC 16

8 Test re ort 16

8.1 General 16

8.2 Immu ity l mits or levels 17

8.3 IC p rforman e clas es 17

8.4 Interpretation of res lts 17

8.4.1 Comp rison b twe n IC(s) u in the same test method 17

8.4.2 Comp rison b twe n dif ferent test method 17

8.4.3 Cor elation to mod le test method 17

An ex A (informative) Test method comp rison ta le 18

An ex B (informative) General test b ard des ription 2

B.1 Overview 2

B.2 Bo rd des ription – Mec anical 2

B.3 Bo rd des ription – Electrical 2

B.3.1 General 2

B.3.2 Grou d planes 2

B.3.3 Pac age pin 21

B.3.4 Via diameters 21

B.3.5 Via distan e 21

B.3.6 Ad itional components 21

B.3.7 Sup ly decoupl n 21 B.3.8 I/O lo d 2

Bibl ogra h 2

Fig re 1 – RF sig al when RF p ak p wer level is maintained 16 Fig re B.1 – Example of an immu ity test b ard 2

Ta le 1 – IC pin lo din default values 13 Ta le 2 – Freq en y ste size vers s freq en y ran e 15 Ta le A.1 – Con u ted immu ity 18 Ta le A.2 – Radiated immu ity 19 Ta le B.1 – Position of vias over the b ard 2

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International Stan ard IEC 6 13 -1 has b en pre ared by s bcommit e 4 A: Integrated

circ its, of IEC tec nical commite 4 : Semicon u tor devices

This secon edition can els an re laces the first edition publ s ed in 2 0 an con titutes a

tec nical revision

This edition in lu es the f ol owin sig if i ant tec nical c an es with resp ct to the previou

edition:

a) f req en y ran e of 15 kHz to 1 GHz has b en deleted from the title;

b) f req en y ste a ove 1 GHz has b en ad ed in Ta le 2 in 7.4.1;

c) IC p rforman e clas es in 8.3 have b en modif ied;

d) Ta le A.1 was divided into two ta les, an ref eren es to IEC 6 13 -8 an IEC 6 13 -9

have b en ad ed in the new Ta le A.2 in An ex A

The text of this stan ard is b sed on the fol owin doc ments:

Ful inf ormation on the votin f or the a proval of this stan ard can b f ou d in the re ort on

votin in icated in the a ove ta le

This publcation has b en draf ted in ac ordan e with the ISO/IEC Directives, Part 2

A l st of al p rts in the IEC 6 13 series, publ s ed u der the general title Inte rated circ its

– Me s reme t of electroma n tic immu ity, can b fou d on the IEC we site

Future stan ard in this series wi car y the new general title as cited a ove Titles of existin

stan ard in this series wi b updated at the time of the next edition

The commit e has decided that the contents of this publcation wi remain u c an ed u ti

the sta i ty date in icated on the IEC we site un er "htp:/we store.iec.c " in the data

related to the sp cif i publ cation At this date, the publ cation wi b

• recon rmed,

• with rawn,

• re laced by a revised edition, or

The IEC 6 13 series is publs ed in sev eral p rt s, u der the general title Inte rated circ its –

M ea ureme t of electroma n tic immu ity:

• Part 1: General con ition an defi ition

• Part 2: Me s rement of radiated immu ity – TEM cel an wide an TEM cel method

• Part 3: Bulk c r ent injection (BCI) method

• Part 4: Direct RF p wer injection method

• Part 5: Workb n h Faraday cage method

• Part 8: Me s rement of adiated immu ity – IC stripl ne method

• Part 9: Me s rement of adiated immu ity – Surface s an method

INTEGRATED CIRCUITS –

Part 1: General conditions and definitions

This p rt of IEC 6 13 provides general information an def i ition a out me s rement of

electromag etic immu ity of integrated circ its (ICs) to con u ted an radiated disturb n es

It also def i es general test con ition , test eq ipment an setup, as wel as the test

proced res an content of the test re orts f or al p rts of the IEC 6 13 series Test method

comp rison ta les are in lu ed in An ex A to as ist in selectin the a pro riate me s rement

method(s)

The f olowin doc ments, in whole or in p rt, are normatively ref eren ed in this doc ment an

are in isp n a le f or its a pl cation For dated ref eren es, only the edition cited a pl es For

u dated ref eren es, the latest edition of the referen ed doc ment (in lu in an

amen ments) a pl es

IEC 6 13 -2, Inte rated circ its – Mea ureme t of electroma n tic immu ity – P art 2:

M ea ureme t of rad iated immu ity –TEM c ll a d wideb nd TEM c l method

IEC 6 13 -3, Inte rated circ its – M ea ureme t of electroma n tic immu ity, 150 kH z to

1 GH z – P art 3: Bulk c re t inje tio (BCI ) method

IEC 6 13 -4, I nte rated circ its – Mea ureme t of ele troma n tic immu ity, 150 kH z to

1 GH z – P art 4: Dire t RF p wer inje tio meth d

IEC 6 13 -5, I nte rated circ its – M ea ureme t of ele troma n tic immu ity, 150 kH z to

1 GH z – P art 5: Work e c Farad ay c g meth d

IEC 6 13 -8, I nte rated circ its – M ea ureme t of electroma n tic immu ity – P art 8:

Mea ureme t of rad iated immu ity –I C Strip n method

IEC TS 6 13 -9, I ntegrated circ its – Mea ureme t of ele troma n tic immu ity – P art 9:

Mea ureme t of radiated immu ity – Sura e s a method

[SOURCE: IEC 6 0 0-314:2 01, 314-0 -01, modif ied – The a breviation AM has b en ad ed

as a secon pref er ed term, the existin note has b en removed an a new Note 1 has b en

ad ed

3.2

artificial n twork

AN

network presentin a referen e lo d imp dan e (simulated) to the DUT (e.g exten ed p wer

or commu ication l nes) acros whic the RF disturb n e voltage can b me s red an whic

isolates the a p ratu from the p wer s p ly or lo d in a given freq en y ran e

Note 1 to e try: This n te a ple to th Fre c la g a e o ly

3.3

a sociate e uipme t

tran d cers (e.g pro es, network an anten as) con ected to a me s rin receiver or test

generator; also tran d cers whic are u ed in the sig al or disturb n e tran mis ion p th

b twe n a DUT an me s rin eq ipment or a ( est sig al generator

3.4

a xi iary e uipme t

AE

eq ipment not u der test that is nevertheles in isp n a le f or set in up al the f un tion

an as es in the cor ect p rf orman e (o eration) of the eq ipment u der test (EUT) d rin

as mmetrical disturb n e voltage

me n of the phasor voltages a p arin b twe n e c con u tor an a sp cif ied ref eren e,

u ual y e rth or frame

[SOURCE: IEC 6 0 0-161:19 0, 161-0 -0 , modif ied – The secon prefer ed term

"as mmetrical voltage" has b en removed an a new admit ed term, "as mmetrical

disturb n e voltage" has b en ad ed

3.7

common mode c r e t

vector s m of the c r ents f lowin throu h two or more con u tors at a sp cified cros

-section of a plane intersected by these con u tors

3.8

continuous wa e

CW

waves, whose s c es ive os i ation are identical u der ste d state con ition

Note 1 to e try: This n te a ple to th Fre c la g a e o ly

3.9

coupl ng network

electrical circ it for tran fer in energ from one circ it to another with wel -defi ed

imp dan es

3.10

de oupl n network

electrical circ it f or preventin test sig als a pl ed to the DUT f rom af f ectin other devices,

eq ipment or s stems that are not u der test

3.1

de ic under te t

DUT

device, eq ipment or s stem b in evaluated

Note 1 to e try: As u e in this sta d rd, D T refers to th s mic n u tor d vic b in te te

Note 2 to e try: This n te a ple to th Fre c la g a e o ly

3.12

die s rin

red ction of the die size by u in an ad an ed f abrication proces in lu in a f i er

l thogra h node an red ced mas s

Note 1 to e try: Th amo nt of die s rin of a ma k u e to pro u e a IC is e pre s d a a p rc nta e or a

dime sio s relativ toth origin l artwork la o t

3.13

dif f ere tial mod c r e t

in a two-con u tor ca le, or two p rtic lar con u tors in a multi-con u tor ca le, half the

mag itu e of the dif feren e of the phasors re resentin the c r ents in e c con u tor

[SOURCE: IEC 6 0 0-161:19 0/AMD2:19 8, 161-0 -3 ]

3.14

dif f ere tial mod volta e

voltage b twe n an two of a sp cif ied set of active con u tors

[SOURCE: IEC 6 0 0-161:19 0, 161-0 -0 , modif ied – The secon prefer ed term

"s mmetrical voltage" has b en removed

3.15

dire tional coupler

tran mis ion coupl n device f or se arately (ide l y) sampl n ( hrou h k own coupl n los

for me s rin purp ses) either the f orward (in ident or b c ward (ref lected) waves in a

a i ty of an eq ipment or s stem to f un tion satisfactori y in its electromag etic en ironment

without introd cin intolera le electromag etic disturb n es to an thin in that en ironment

[SOURCE: IEC 6 0 0-161:19 0, 161-01-0 ]

3.18

f or ward power

amou t of p wer that is sent f rom the RF source toward the (as umed matc ed) RF lo d

without con iderin the RF p wer that is b in ref lected b c ward by the RF lo d

3.19

ground pla e

ref ere c groun pla e

f lat con u tive s rf ace whose p tential is u ed as a common ref eren e

[SOURCE: IEC 6 0 0-161:19 0/AMD5:2 15, 161-0 -3 , modif ied – The f irst prefer ed term

"grou d plane" has b en ad ed, the a breviation RGP has b en removed, the def i ition has

b en s ortened an Notes 1 an 2 have b en deleted

3.2

immunity

<to a disturb n e a i ty of a device, eq ipment or s stem to p rf orm without degradation in

the presen e of an electromag etic disturb n e

maximum p wer level oc ur in on an AM RF sig al me s red over the time interval of the

(lowest L ) sig al u ed f or the ampl tu e mod lation

Note 1 to e try: In th c s of two-to e RF sig als (to re re e t AM), th b at fe u n y s o ld b c n id re

for th timeinterv l

3.2

ref ere c port

sp cif i p rt of the test setup to whic the disturb n e sig al is a pled

electromag etic en ironment

total ty of electromag etic phenomena existin at a given location

[SOURCE: IEC 6 0 0-161:19 0/AMD1:19 7, 161-01-01, modif ied – The pref er ed term has

b en c an ed into an admit ed term, two new pref er ed terms have b en ad ed an the Note

mes or s e t metal c hou in desig ed expres ly f or the purp se of se aratin electro-

mag etical y the internal an external en ironment

[SOURCE: IEC 6 0 0-161:19 0, 161-0 -3 , modif ied – The secon prefer ed term "s re ned

ro m" has b en removed

te t ge erator

generator (RF-generator, mod lation source, aten ators, bro db n p wer ampl f iers an

f ilters) ca a le of generatin the req ired test sig al

4 Test c nditions

These default test con ition are inten ed to en ure a con istent test en ironment If the

u ers of this proced re agre to u e other values, they s al b doc mented in the test re ort

4.2 Ambie t con itions

4.2.1 Ambie t temperature

The ambient temp rature d rin the test s al b 2 °C ± 5 °C

NOT Th RF immu ity of s me ICs is d p n e t o th ambie t temp rature

4.2.2 RF ambie t

The RF ambient noise level s al b at le st 6 dB ( ypical) b low the lowest level(s) of

inten ed immu ity me s rement, whic s al b con rmed b fore the me s rements The

DUT s al b in tal ed in the test setup with disena led p wer s p ly RF ambient s al b

des rib d in the test re ort

4.2.3 RF-immunity of th te t s tup

Before the test, al eq ipment u ed in the test setup, ex lu in the DUT, s al b c ec ed to

en ure that it is s f ficiently immu e to the disturb n e sig al so as not to in uen e the test

res lts

4.2.4 Other ambie t conditions

Al other ambient con ition that may af f ect the test res lt s al b stated in the in ivid al test

– non-mod lated RF sig al (contin ou wave);

– ampl tu e-mod lated RF sig al, e.g ac ordin to IEC 610 0-4-6 an IEC 610 0-4-3;

– pulse-mod lated RF sig als , e.g ac ordin to IEC 610 0-4-3

4.4 Fre ue c ra ge

The recommen ed f req en y ran e is 15 kHz to 1 GHz, an may b exten ed if the sp cif i

proced re is a pl ca le The ran e of interest may b smal er de en in on the a pl cation’s

req irement The a plca le freq en y ran e is des rib d in e c p rt of IEC 6 13

5 Test e uipment

The eq ipment des rib d in this Clau e 5 is common to al test method des rib d in al p rts

of IEC 6 13 The u iq e p rts of the test eq ipment are des rib d in the in ivid al test

proced res in e c sp cif i p rt

5.2 Shielding

The s ieldin req irement de en s up n the sp cif i test method, the ambient noise level

an the sen itivity of other eq ipment u ed in the test setup In general, the ambient RF noise

level s ould b at le st 6 dB smal er than the a pled disturb n e sig al so that a s f f icient

margin is present A s ielded ro m may b req ired to provide s f f icient at en ation to protect

o erators, eq ipment an telecommu ication services Some me s rement setups are

desig ed so that intrin ic s ieldin is bui t in Sp cif i me s rement proced res are des rib d

in e c p rt of IEC 6 13

5.3 Te t ge erator a d p wer ampl f ier

The test generator s al s p ly the test sig al as des rib d in 4.3 The RF p wer ampl fier

s al me t the req irements of the test proced res in other p rts of IEC 6 13 The ampl tu e

b haviour s al b l ne r an the distortion s al b les than – 0 dBc (spuriou sig als are

2 dB b low the RF car ier level) of the sig al ampltu e

5.4 Other compone ts

It s al b c ec ed that ca les, con ectors an terminators in lu ed in the me s rement p th

me t the req ired c aracteristic over the inten ed f req en y ran e

It s al b c ec ed that ca les, con ectors an terminators that are not in the me s rement

p th b twe n the referen e p int an the input of the me s rin in trument that may,

however, af fect the me s rement res lt, me t the req ired c aracteristic over the inten ed

freq en y ran e

The test setup s al comply with the sp cif i test proced re des rib d in the resp ctive p rt of

IEC 6 13 Al the relevant test p rameters s al b recorded to en ure the re rod cibi ty of

test res lts

6.2 Te t circ it board

The c oice of test b ard u ed f or RF immu ity testin de en s on the me s rement method

sp cif ied in IEC 6 13 A general recommen ation f or the test b ard is given in An ex B The

des ription of the test b ard s al b in lu ed in the test re ort Test b ard s al f ol ow the

go d layout practice des rib d in other p rts of IEC 6 13

As the interaction b twe n the EM en ironment an the IC in immu ity test is simi ar to the

interaction in the RF emis ion test, a simi ar test b ard can b u ed The dif feren e b twe n

these b ard is that output sig als are monitored in immu ity tests to fi d whether the IC is

af f ected by the RF disturb n e

6.3 Pin s le tion s heme

Pin that are con idered to b s bject to RF immu ity testin are those con ected to external

devices throu h ca les, e.g

– actuator/sen or ca les;

– s p ly ca les;

– commu ication ca les, e.g for u e with control er are network (CAN), RS 4 2/4 5,

u s ielded twisted p irs (UTP) with ethernet, low voltage dif ferential sig al n (LVDS)

Pin that are con ected by traces to active or p s ive devices on the a pl cation b ard are

not con idered to b s bject to RF immu ity testin (se IEC 6 13 -3 an IEC 6 13 -4), e.g

– memory interfaces;

– cry tal os i ator;

– c ip select;

– biasin or c r ent referen e inputs with analog e p rt

6.4 IC pin loa ing/termination

The pin of the DUT s al b lo ded or terminated ac ordin to the default values given in

Ta le 1, in lu in the p rameters sp cif ied by the man f acturer Pin that do not f al into an

of the categories l sted in Ta le 1 s al b lo ded as f un tional y req ired Pin lo din

con ition at the test s al b in lu ed in the test re ort

– Outp t sig al

10 kΩ to gro n (V

s) u le s th IC is intern ly termin te

– Outp t p wer Nomin l lo din a state b th ma ufa turer

d) if th in ut c n ot b gro n e , u le s th IC is

intern ly termin te

s)

Co trol

– In ut

Gro n (V

s) or 10 kΩ to s p ly (V

d) if th in ut c n ot b gro n e , u le s th IC is

intern ly termin te

– Outp t Ac ordin toth d vic s e if i atio

– Bi-dire tio al 4 pF to gro n (V

s)

– An lo u Ac ordin toth d vic s e if i atio

6.5 Power s p ly re uireme ts

The DUT s al b p wered by the source immu e f rom the a pl ed test sig al If a b tery is

u ed, it s al me t the IC req irements an provide the sta le voltage level to maintain a

con istent o eratin en ironment Al p wer s p ly l nes to the DUT s al b adeq ately

f iltered ac ordin to the IC man facturer’s recommen ation

6.6 IC spe ific consid rations

6.6.1 IC s pply volta e

The s p ly voltage(s) s al b as sp cif ied by the IC man facturer with a toleran e of ± %

6.6.2 IC de oupl ng

The value an layout p sition of p wer s p ly decoupl n ca acitors s al b stated in the

test re ort The decoupln of e c s p ly pin of the DUT may b as ad ised by the

man facturer

NOT A term, ”blo kin c p citors,” is u e in te d of s p ly d c u ln c p citors”in IEC 6 13 -4

6.6.3 Operation of IC

Atempts s ould b made to ful y exec te an test al relevant fun tion that sig if i antly

contribute to the immu ity of the IC

For higher test throu hput the IC may b put into a fi ed o eration mode to al ow the

disturb n e sig al to b swe t throu h the f req en y ran e of interest As n hronou modes

of o eration b twe n the DUT an the RF disturb n e sig als are of ten a pro riate to

re resent re l o eratin con ition

When a relation b twe n the activity of the IC an the test sig al exists, it s ould b

doc mented in the test re ort

6.6.4 Guidel ne f or IC stimulation

The intention is to des rib the p rameters to b control ed in order to as ure test

re rod cibi ty f or the p rtic lar IC fun tion or typ , as agre d b twe n the man facturer an

u er If a programma le IC is to b tested, sof tware that f lows in a contin ou lo p s al b

pre ared to as ure that me s rements are re rod cible The typ of sof tware u ed to drive

the IC (minimum, typical or worst case) s al b doc mented in the test re ort

6.6.5 IC monitoring

IC monitorin is inten ed to monitor al relevant activity states without disturbin the immu ity

6.7 IC stabi ity ov r time

The f un tional b haviour of the IC s al b sta le over the time req ired for the complete

me s rement, in order to en ure the same res lts can b re rod ced within the exp cted

me s rement toleran es

7.1 Monitoring c e k

Energize the DUT an complete an o erational c ec for pro er fun tion of the DUT an

normal activity, an en ure pro er f un tion of the f ai ure detection

For o en RF immu ity tests without s ieldin stru ture or s ieldin en los re, precaution

s al b taken not to ex e d the a pl ca le h man exp s re l mits

7.3 Sy tem v rif ic tion

The DUT can b c ec ed on variou p rameters or resp n es Examples in lu e:

– DC output voltage (e.g voltage reg lator);

– s p ly c r ent (cros c r ent may in re se d e to c an e of thres old voltages);

– demod lated au io f req en y sig al (e.g au io ampl fier, vide );

– j ter (e.g time b se, logic gate, µCs, AD/DA-con erters);

– spikes an gl tc es;

The f req en y ran e of these me s rements is general y f rom 15 kHz to 1 GHz, an f or

some method it is b yon this ran e The ran e of test f req en y practical y de en s on the

c t-of f freq en ies of the injection network an test setup, e.g IC-decoupl n Freq en y ste

size s al b selected ac ordin to Ta le 2 Ref er to the other p rts of IEC 6 13 for the

p rtic lar immu ity me s rement proced res

Table 2 – Fre u nc step size v rs s f re u nc ra ge

Critical f req en ies s c as cloc f req en ies, s stem freq en ies of RF devices, etc s ould

b tested in f i er f req en y ste s, as agre d by the u ers of this proced re

Ab ve 1 GHz, resonan es wi b se n in most of the radiated an con u ted immu ity test

d e to mec anical sizes of the test setups (cavity ef f ects), test b ard (10 mm × 10 mm) or

f rom the DUT itself , e.g die p d size, he t spre der, he t sin The q al ty of these

resonan es can b hig Resp n es from the DUT a ove 1 GHz are not related with the

f un tional o erational freq en ies of the device (or its multiples there f ), so that they s al b

ig ored but recorded in the test re ort (with pro a le explanation on their cau e(s)

7.4.2 Ampl tude modulation

The disturb n e sig al s al f ol ow the test method c osen, e.g CW (contin ou wave), 8 %

ampl tu e mod lated by a 1 kHz sine wave or pulse mod lated wave

7.4.3 Power le el in for modulation

De en in up n the def i ition of disturb n e sig al u ed in e c p rt of the IEC 6 13 series,

either the p ak p wer of RF sig al (se Fig re 1) or the p wer of the RF car ier (common on

most RF generators) is maintained

NOT Th a plc tio of th p wer le el n meth d is diff ere t fom th RF mo ulatio u e with pro u t

immu ity sta d rd s c a IEC 610 0-4-3 a d IEC 610 0-4-6

The b sic req irement, when car yin out an immu ity test, at a p ak test level is that the

p ak p wer of AM test sig al s al have the same value as the p ak p wer of contin ou

wave, regardles of the mod lation in ex m:

Pe kCW

Pe k

=PP

22

CWAM

)2(12

mm

PP

++

⋅

=

NOT For e ample: 8 % AM mo ulatio (m = 0,8) re ults in:

CWAM

4 7

)(

)(

Mi nMa

Mi nMa

The dwel time for e c f req en y ste an mod lation s ould b typical y 1 s or at le st the

time neces ary f or the DUT to resp n , i.e f or the me s rement s stem to record The u ers

s al defi e the DUT resp n e

7.4.5 Monitoring of the IC

The sp cif i test s al b p rformed in con ideration of al o erational f un tion The level n

of the test sig al s al b control ed so that al critical re ction of the DUT are sen ed (e.g

h steresis ef f ects, re ction on level variation )

Tests s ould b p rf ormed ac ordin to the IC test plan whic s ould b in lu ed in the test

re ort This IC test plan s ould b defi ed to des rib sp cif i IC test p rameters an the

resp n es con idered As an example, the IC test plan s ould in lu e whic IC pin are to b

tested, se arately or together, an whic immu ity ac e tan e criteria s ould b u ed (se

also 8.3)

This re ort s al also in lu e:

– circ it diagram of the a pl cation (s p ly decoupl n , pin lo din / ermination , p ripheral

ICs, etc.);

– des ription of the test b ard on whic the IC is a pl ed (layout ;

– actual o eratin con ition of the IC (s p ly voltage, output sig als, etc.);

– des ription of the typ of sof tware exercisin the IC(s), if a plca le

Al deviation to the defi ed test con ition s al b doc mented in the test re ort

Other p rtic lar req irements for the dif ferent test method are des rib d in the resp ctive

p rts

CW

IEC

8.2 Immunity l mits or le els

Immu ity test levels, criteria or lmits de en up n the a pl cation an f un tional

req irements

8.3 IC perf orma c cla s s

The IC immu ity can b clas if ied by IC p rf orman e clas es whic sl g tly dif fer f rom

electronic u it p rforman e clas es as f olows:

Cla s A

IC: Al monitored fun tion of the IC p rf orm within the def i ed toleran es d rin an

af ter exp s re to disturb n e

Cla s B

IC: Short time degradation of one or more monitored sig als d rin exp s re to

disturb n e is not evalua le for IC only Therefore, this clas ifi ation may not b

a pl ca le f or ICs

NOT Sh rt time d gra atio of o e or more mo itore sig als mig t b tolera le in th

a plc tio b its eror h n ln This eror h n ln is u k own in mo t c s s for IC te t

Cla s C

IC: At le st one of the monitored f un tion of the IC is out of the def i ed toleran es

d rin the disturb n e but return automaticaly to the defi ed toleran es after

exp s re to disturb n e

Cla s D

IC: At le st one monitored f un tion of the IC do s not p rform within the def i ed

toleran es d rin exp s re an do s not return to normal o eration by itself The

IC return to normal o eration by man al intervention

toleran es af ter exp s re an can not b returned to pro er o eration

8.4 Interpretation of re ults

8.4.1 Comparison betwe n IC(s) using the s me te t method

Res lts may b directly comp red as lon as me s rements have b en car ied out u der the

same con ition If comp rison are inten ed, the devices ne d to ru the same code an the

test en ironment s ould b as con istent as p s ible The identical test b ard s ould b u ed

8.4.2 Comparison betwe n dif f ere t te t methods

A q antitative cor elation b twe n al of the dif ferent test method , coverin dif ferent

phenomena, is not exp cted an targeted However, cor elation can b an has b en

demon trated f or method testin the same phenomena Refer to An ex A

8.4.3 Cor elation to module te t methods

Where s f f icient data are avai a le to esta l s cor elation b twe n the me s red values an

the exp cted immu ity f rom the IC f or a given a pl cation, this s al b in icated in the

sp cif i test method (e.g comp nent or s stem level tests of the prod ct A n mb r of

f actors are in olved in the tran lation from IC level immu ity to the mod le or prod ct level In

general, this IC-to-mod le cor elation is l mited to sp cifi cases where the varia les in olved

are control ed

Annex A

(inf ormativ )

Test method comparison table

Ta le A.1 an Ta le A.2 s ould b u ed as a g idel ne

Table A.1 – Cond cte immunity

Te t meth d Bulk c rent inje tio Dire t RF p wer

inje tio

Work ench Farada c ge

Table A.2 – Ra iate immunity

Annex B

(inf ormativ )

General test board description

B.1 Ov rview

This an ex provides a g ide to the desig of a u iversal test b ard Su h a b ard is

neces ary to comp re the EMC p rf orman e of variou ICs from dif ferent man f acturers

Con traints are given for those p rameters in uen in the EMC asp cts

B.2 Board description – Mechanical

The test b ard size is

3

1

10+

−

mm Holes may b ad ed at the corners of the

b ard, as s own in Fig re B.1 Al f rin es of the b ard s al b tin ed with the width of at

le st 5 mm, or made to b con u tin in order to make pro er contact with the TEM cel , if

u ed As an alternative, ed es may b gold-plated

The vias at the outer ed e of the b ard s al b at le st 5 mm away from that ed e

B.3 Board description – Ele trical

B.3.1 Ge eral

The drawin in Fig re B.1 is a g ide to the u iversal test b ard A double-layer b ard is a

minimum req irement However, if neces ary, layers 2 an 3 or others may b ad ed in

b twe n to cre te a multi-layer b ard

L yer 1 is f or the grou d plane L yer 4 can b u ed f or grou d, p wer an other sig als, but

s al b lef t as intact as p s ible to b u ed as a grou d plane as wel

The test b ard s al b made s c that only the IC p c age remain on one side (layer 1) an

al other comp nents an trace p tern remain on the o p site layer (layer 4)

The grou d planes (layers 1 an 4) s al be intercon ected by me n of vias These vias s al

b placed at the fol owin p sition over the b ard as des rib d in Ta le B.1

Table B.1 – Position of via ov r th board

The grou d plane at layer 1 s al b contin ed in b twe n vias at p sition 2 As s c the

grou d plane at layer 1 is contin ed over the whole b ard

If p s ible the same s al b done f or layer 4, but the p s ibi ty to do so de en s on the IC

p c age an the sp ce avai a le

B.3.3 Pa k g pin

B.3.3.1 Ge eral

Al f un tional y neces ary comp nents an al s p ly an I/O p rts ne ded f or me s rin the

resp n e an /or providin sig als to the req ired inputs, other than the IC, s al b mou ted

on layer 4 It is theref ore neces ary to feed I/O an other req ired pin from layer 1 to layer 4

The lo p are s, trace len th, via placement an comp nent orientation s al b o timized

s c that minimum lo p are s are o tained

B.3.3.2 DIL pa k g s

These p c ages do not req ire vias, as plated throu h-hole pin are con idered present or

esta l s ed by the pin themselves

B.3.3.3 SO, PLCC, QFP pa k ge

These p c ages req ire the u e of vias The vias s ould pref era ly b centered in the p d

u ed f or solderin the ICs Pref era ly these vias s ould b placed at p sition 3 of Ta le B.1

to minimize the lo p-are in olved in whic the IC c r ents wi f low

B.3.3.4 PGA pa k ge

These p c ages do not req ire vias, as plated throu h-hole pin are con idered present or

esta l s ed by the pin themselves

B.3.3.5 BGA pa k g s

These p c ages req ire the u e of vias The vias f or p wer s p ly an grou d

intercon ection s ould pref era ly b located in ac ordan e with the man f acturer’s

Via placement s al b control ed as f olows f or me s rements up to 1 GHz The maximum

lateral distan e b twe n vias con ectin layer 1 to layer 4 (p sition 1, 2 and 3) s al b

10 mm Vias f or sig al traces s al b placed as close as p s ible to those vias con ectin

layer 1 to layer 4

B.3.6 Additional compon nts

Al ad itional comp nents s al b mou ted at layer 4 They s al b placed in s c a way

that they do not interf ere with the con traints as set for layers 1 an 4 an intercon ectin

vias

B.3.7 Sup ly d coupl ng

B.3.7.1 Ge eral

To o tain re rod cible data of me s rement, adeq ate s p ly decoupl n is req ired in

ac ordan e with the test b ard sp cif i ation Decoupl n ca acitors on the test b ard s al

b clas if ied into two groups, as des rib d b low The values an layout p sition of the

decoupl n ca acitors an other decoupln comp nents s al b stated in the in ivid al test

re ort

B.3.7.2 IC de oupl n c pa itors

Sup ly decoupl n for the IC s al f ol ow the man f acturer’s recommen ation IC decoupl n

ca acitors, if an , s al b con ected to the grou d plane on layer 4, u derne th the IC (as

s own in Fig re B.1) to maintain pro er o eration of the DUT The value an layout p sition

of a decoupln ca acitor of e c s p ly pin of the DUT may b as ad ised by the

man facturer, or otherwise, as lon as stated in the test re ort

B.3.7.3 Power s pply de oupl ng f or the te t board

Imp dan e of the test b ard p wer s p ly may af f ect the me s rement res lts if the p wer

s p ly decoupl n is not adeq ately desig ed To control the s p ly imp dan e of the test

b ard f or an external p wer s p ly that may b u ed in the me s rement, a group of

decoupl n ca acitors s al b located on the test b ard Their values an layout p sition

s al b as des rib d in the in ivid al me s rement stan ard , or otherwise, as lon as

stated in the test re ort

B.3.8 I/O loa

Ad itional comp nents neces ary to lo d or activate the IC s al b mou ted on layer 4,

prefera ly directly u derne th the IC p c age are This in lu es the neces ary p rts to al ow

IC monitorin d rin the RF immu ity test

Di me si on i n mi ll i metre

Fig re B.1 – Ex mple of a immunity te t board

I EC 0,7 max

Bibl ography

IEC 6 0 0 (al p rts), I ntern tio al Electrotec nical Vo a ulary (avai a le at

<ht p:/ www.electro edia.org>)

IEC 610 0-4-3, Electroma n tic c mp tib ity (EMC) – P art 4-3: Te tin a d me s reme t

te h iq e – Rad iated , rad io fe u n y, electroma n tic field immu ity te t

IEC 610 0-4-6, Ele troma n tic c mp tibility (EMC) – P art 4-6: Te tin a d me s reme t

tec niq e – Immu ity to c nd ucted disturb n e , ind uc d b rad io-fe u n y fields

IEC 619 7-1:2 0 , I ntegrated circ its – Mea ureme t of ele troma n tic emis io s, 150

kH z to 1 GH z – P art 1: Ge eral c nd ition a d definitio s

CISPR 2 , So nd a d tele isio bro dca t re eiv rs a d a s ciated e uipme t – I mmu ity

c ara teristic – Limits a d methods of me s reme t

ANSI/IEEE Std 10 -19 4 (updated 2 0 ), I EEE Standard Dictio ary of Ele tric l a

Electro ic Terms, Third Editio , Distrib ted b : Wiley I nters ie c