Tiêu chuẩn iso 17987 7 2016

For an ex lanation on the meaning of ISO spe ific terms an ex r s ions r lat ed to conformity as es ment, as wel as information a out ISO’s adhe enc to the Wor ld Trade Org nization WTO

Road vehicles — Local Interc onnect

Vé icule s ro tiers — Résea Inte net local (LIN)—

Partie 7: S écification d’essai de co frmité de la co che électrique 

COPYRIGHT PROTECTED DOCUMENT

© ISO 2016, P blshed in Sw itz rlan

A ll rig hts r eserved Unles otherw ise spe ified, nopar of this p blc tion ma y be r epr od c d or utilz d otherw ise in an form

or b an me ns, ele tr onic or me hanic l, inclu in p oto opying , or postin on the internet or an intranet , w ithout prior

written permis ion Permis ion c n be req esed from either ISO at the ad r es below or ISO’s member bod y in the c u try of

F reword v

Introduction vi

1 Sc ope 1

2 Nor mati ve r eferenc es 1

3 Terms, definitio s, symbols and abbr eviated ter ms 1

3.1 Te msan definitions 1

3.2 Symb ls 1

3.3 A bbreviated te ms 4

4 Conventio s 5

5 EPL 12 V LIN devic es w ith RX and TX ac c es 5

5.1 Tes spe ification o e view 5

5.1.1 Tes case or ganization 5

5.1.2 Measur ement an sig nal g eneration r eq ir ements 6

5.2 Operational con itions — Calbration 7

5.2.1 Ele trical input/output , LIN protocol 7

5.2.2 [E L CT 1] Operating v ltag e r ang e 7

5.2.3 Thr eshold v ltag es 8

5.2.4 [E L CT 5] Variation of V SUP_NO _ OP

1 5.2.5 I BUS u de sever al con itions 1

5.2.6 Slo econtr ol 1

5.2.7 Pr op gation dela y 1

5.2.8 Sup ly v ltag e ofset .2

5.2.9 Faiur e 2

5.2.10 [E L CT 2 ] Ve ifying inte nal ca acitanc an d ynamic inte fer enc — IUT assla ve 3

5.3 Operation mode te mination

3 5.3.1 General 3

5.3.2 [E L CT 2 ] Measuring inte nal r esis or — IUT as sla ve 3

5.3.3 [E L CT 24] Measuring inte nal r esis or — IUT as mas e 34

5.4 Static tes cases 34

6 EPL 12 V LIN devic es w itho t RX and TX ac c es 38 6.1 Tes spe ification o e view 3

6.2 Commu ication scheme 3

6.2.1 General 3

6.2.2 IUT assla ve 3

6.2.3 IUT asmas e 3

6.2.4 IUT clas C devic 40

6.3 Tes case or ganization 42

6.4 Measur ement an sig nal g eneration — Req irement 43

6.4.1 Data g eneration 43

6.4.2 Various r eq ir ements 45

6.5 Operational con itions — Calbration 45

6.5.1 Ele trical input/output , LIN protocol 45

6.5.2 [E L CT 2 ] Operating v ltag e r ang e 45

6.5.3 Thr eshold v ltag es 47

6.5.4 [E L CT 2 ] Variation of V SUP_ NO _OP ∈[– ,3 V to 7,0V], [1 V to 40 V] 5

6.5.5 I BUS u de sever al con itions 5

6.5.6 Slo econtr ol 5

6.5.7 [E L CT 3 ] Prop gation dela y

5 6.5.8 Sup ly v ltag e ofset .6

6.5.9 Faiur e 74

6.5.1 [E L CT 48] Ve ifying inte nal ca acitanc an dynamic inte ferenc —

IUT as sla ve 7

6.6 Oper ation mode te mination 7

6.6.1 General 7

6.6.2 [E L CT 49] Measuring inte nal r esis or — IUT as sla ve 7

6.6.3 [E L CT 5 ] Measuring inte nal r esis or — IUT as mas e 7

6.7 Static tes cases 7

7 EPL 24 V LIN devic es with RX and TX ac c es 82

7.1 Tes spe ification o e view 8

7.1.1 Tes case or ganization 8

7.1.2 Measur ement and sig nal g ener ation — Req ir ements 8

7.2 Oper ational con itions — Calbr ation 84

7.2.1 Ele trical input/ utput , LIN pr otocol 84

7.2.2 [E L CT 5 ] Operating v ltag e rang e 84

7.2.3 Thr eshold v ltag es 8

7.2.4 [E L CT 5 ] Variation of V SUP_NO _OP

9 7.2.5 I BUS u de several con itions 9

7.2.6 Slo econtr ol 94

7.2.7 Pr op gation dela y 9

7.2.8 Sup ly v ltag e ofset .9

7.2.9 Faiur e 1 2 7.2.10 [E L CT 8 ] Ve ifying inte nal ca acitanc an dynamic inte ferenc — IUT assla ve 1 4 7.3 Oper ation mode te mination 1 6 7.3.1 General 1 6 7.3.2 [E L CT 8 ] Measuring inte nal r esis or — IUT as sla ve 1 7 7.3.3 [E L CT 8 ] Measuring inte nal r esis or — IUT as mas e 1 7 7.4 Static tes cases 1 8 8 EPL 24 V LIN devic es witho t RX and TX ac c es 121 8.1 Tes spe ification o e view 1 1 8.2 Commu ication scheme 1 1 8.2.1 Ove view 1 1 8.2.2 IUT assla ve 1 2 8.2.3 IUT asmas e 1 2 8.2.4 IUT Clas C devic 1 3 8.3 Tes case or ganization 1 5 8.4 Measur ement an sig nal g eneration — Req ir ement 1 6 8.4.1 Data g ener ation 1 6 8.4.2 Various req irement 1 8 8.5 Oper ational con itions — Calbr ation 1 8 8.5.1 Ele trical input/ utput , LIN pr otocol 1 8 8.5.2 [E L CT 8 ] Operating v ltag e rang e 1 8 8.5.3 Thr eshold v ltag es

1 0 8.5.4 [E L CT 8 ] Variation of V SUP_NO _OP ∈[– ,3 V to 7,0V], [1 V to 5 V] 1 5 8.5.5 I BUS u de several con itions 1 7 8.5.6 Slo econtr ol 141

8.5.7 [E L CT 9 ] Pr op gation dela y 146

8.5.8 Sup ly v ltag e ofset 1 1 8.5.9 Faiur e 1 4 8.5.10 [E L CT 1 6]Ve ifying inte nal ca acitanc an dynamic inte fer enc — IUT assla ve 1 6 8.6 Oper ation mode te mination 1 7 8.6.1 General 1 7 8.6.2 [E L CT 1 7]Measuring inte nal r esis or — IUT assla ve 1 8 8.6.3 [E L CT 1 8]Measuring inte nal r esis or — IUT asmas e 1 8 8.7 Static tes cases 1 9 Biblog r aphy 172

ISO (he Int ernational Org nization for Stan ardization) is a worldwide fede ation of national s an ards

b dies (ISO membe b dies) The work of pr p ring Int ernational Standards is normaly car ied out

through ISO t ech ical committ ees Each membe b dy int er st ed in a subje t for w hich a t ech ical

committ ee has be n es a l shed has the right t o be r pr sent ed on that committ ee Int ernational

org nizations, g ove nmental an non-g ove nmental, in laison with ISO, also take part in the work

ISO cola orat es closely with the Int ernational Ele trot ech ical C mmis ion (IEC) on al matt ers of

ele trot ech ical s an ardization

The proc d r s used t o develo this document an those int en ed for it furthe maint enanc ar

desc ibed in the ISO/IEC Dir ctives, Part 1 In p rticular the dife ent a pro al c it eria ne ded for the

dife ent ty es of ISO document should be not ed This document was draft ed in ac ordanc with the

edit orial rules of the ISO/IEC Dir ctives, Part 2 ( e www.iso.org dir ctives)

A tt ention is drawn t o the p s ibi ity that some of the element of this document ma be the subje t of

p t ent right ISO shal not be held r sponsible for identifying any or al such p t ent right Detais of

any p t ent right identified d ring the develo ment of the document wi be in the Introd ction an / r

on the ISO ls of p t ent de larations r c ived ( e www.iso.org p t ent )

Any trade name used in this document is information given for the convenienc of use s an does not

cons itut e an en orsement

For an ex lanation on the meaning of ISO spe ific terms an ex r s ions r lat ed to conformity as es ment,

as wel as information a out ISO’s adhe enc to the Wor ld Trade Org nization (WTO) principles in the

Te h ical Bar ie s to Trade (TBT) se the folowing URL: www.iso.org iso/ for word.html

The committ ee r sp nsible for this document isISO/TC 2 , Ro d vehicles , Subcommitt ee SC 3 , Elec tric al 

a d elec tro ic eq ipment

A l s of al p rt in theISO 1 98 se iescan be fou d on the ISO websit e

The LIN prot ocol as pro osed is an a ut omotive focused low-spe d unive sal asynchronous r c ive

transmitt er (UAR T) b sed network Some of thekey charact eris icsof the L cal Int er onne t Network

(LIN) prot ocol ar signal-b sed communication, sched le ta le-b sed frame trans e , mast er/sla e

commu ication with e ror det ection, node conf iguration an dia nos ic se vic transp rtation

The LIN prot ocol is for low-cos aut omotive control a plcations, for ex mple, do r mod le an air

con ition sy st ems It se ves as a communication infras ructur for low-spe d control a plcations in

vehicles b pro iding

— signal-b sed communication t o ex chang e information betwe n a plcations in dife ent nodes,

— bitrat e sup ort from 1 k bit/s t o 2 k bit/s,

— det erminis ic sched le ta le-b sed frame commu ication,

— network manag ement that wakes up an put the LIN clust er int o sle p modein a control ed man e ,

— s atus manag ement that pro ides e ror han l ng an e ror signal ng,

— transp rt la e that al ow s larg e amount of data t o be transp rt ed ( uch as dia nos ic se vic s),

— spe if ication of how t o handle dia nos ic se vic s,

— ele trical phy sical la e spe ifications,

— node desc iption languag e desc ibing pro e ties of sla e nodes,

— network desc iption f ile desc ibing beha iour of commu ication, an

— a plcation pro ramme ’s int erfac

ISO 1 9 7 (al p rt ) is b sed on the o en sy st ems int er onne tion (OSI) basic r fe enc model as

spe ified in ISO/IEC 749 – w hich s ructur s commu ication sy st ems int o seven la e s

The OSI model s ructur s data commu ication int o seven layers caled (t op down) a plc ation la e

(la e 7), pr s entatio la e , ses s io la e , tra s port la e , net work la e , data lnk la e an p ys ic al la e

(la e 1) A subset of these la e s is used in ISO 1 9 7 (al p rt )

ISO 1 9 7 (al part ) dis inguishes betwe n the se vic s pro ided b a la e t o the la e a o e it an

the prot ocol used b the la e t o sen a mes ag e betwe n the pe r entities of that la e The r ason for

thisdis inction is t o make the se vic s, espe ialy the a pl cation layer se vic s an the transp rt la e

se vic s, r usa le also for othe ty es of networksthan LIN In this wa , the prot ocol is hid en from the

se vic use an it is p s ible t o chang e the prot ocol if spe ial sy st em r q ir ment deman it

ISO 1 9 7 (al part ) pro ides al document an r fe enc s r q ir d t o sup ort he implementation of

the r q ir ment r lat ed t o the folowing:

— ISO 1 9 7 –1: This p rt pro ides an o e view of the ISO 1 9 7 (al p rt ) an s ructur along

with the use case def initions an a common set of r sour es (definitions, r fe enc s) for use b al

subseq ent part

— ISO 1 9 7 – 2: This part spe ifies the r q ir ment r lat ed t o the transport prot ocol an the network

la e r q ir ment t o transp rt the PDU of a mes ag e betwe n LINnodes

— ISO 1 9 7 –3: This p rt spe ifies the r q ir ment for implementations of the LIN prot ocol on the

lo ical level of a s raction Hardwar r lat ed pro e tiesar hid en in the defined cons raint

— ISO 1 9 7 –4: This p rt spe ifies the r q ir ment for implementations of active hardwar

comp nent w hich ar ne es ary t o int er on e t the prot ocol implementation

— ISO/TR 1 9 7 –5: This p rt spe ifies the LIN a plcation pro ramme s int erfac (API) and the

node con guration an identification se vic s The node configuration an identification se vic s

ar spe ified in the API an def ine how a sla e node is conf igur d an how a sla e node uses the

identif ication se vic

— ISO 1 9 7 –6: This p rt spe ifies t es s t o che k the conformanc of the LIN prot ocol implementation

ac ording t o ISO 1 9 7 – 2 an ISO 1 9 7 –3 This comprises t es s for thedata lnk la e , the network

la e an the transp rt la e

— ISO 1 9 7 –7 : This p rt spe if ies t es s t o che k the conformanc of the LIN ele trical phy sical la e

implementation (lo ical level of a s raction)ac ording t o ISO 1 987 –4

Road vehicles — Local Interc onnect Networ k (LIN) —

This document spe if ies the conformanc t es for the ele trical phy sical la e (EPL) of the LIN

commu ications sy st em It is p rt of this document t o def ine a t es that conside s ISO 9 46 an

ISO 1 9 7 –4

The purp se of this document is t o pro ide a s an ardiz d wa t o verify w hethe a LIN bus drive is

complant t o ISO 1 9 7 –4 The primary motiv tion is t o ensur a level of int ero e a i ity of LIN bus

drive s from dife ent sour es in a sy st em environment

This document pro ides al the ne es ary t ech ical information t o ensur that t es r sult ar

consist ent even on dife ent t es syst ems, pro ided that he p rticular t es suit e an the t es sy st em ar

complant t o the cont ent of this document

The folowing document ar r fe r d t o in t ext in such a wa that some or al of their cont ent

cons itut es r q ir ment of this document F or dat ed r fe enc s, only the edition cit ed a ples F or

un at ed r fe enc s, the lat es edition of the r fe enc d document ( inclu ing any amen ment ) a ples

ISO 1 9 7 –4:2 1 , Ro d vehicles — L c al Inte c on ec t Net work (LIN) — Part 4 : Elec tric al Phys ic al L ye  

(EPL) s pec ific atio  12V/2 V

3 Terms, definitions, symbols and abbr eviated terms

3.1 Terms and definitions

F or the purposes of this document, the t erms an def initions in ISO 1 9 7 –4 an ISO 1 987 –6 a ply

ISO an IEC maintain t erminolo ical data ases for use in s an ardization at the folowing ad r s es:

• IECEle tro edia: a aia le at ht p:/ www.ele tro edia.org

• ISO Onlne brow sing plat orm:a ai a le at ht p:/ www.iso.org o p

NOTE T is also inclu es the device clas if ication of ISO 179 7 –6:2 16,5.6 int o clas A /B/ C for the diferent

E U an trans eiver ty es

ca acitanc of sla e node

∈ mathematical symb l:r plac ment for “is an element of”

Shif Diference

dife enc betwe n b tt ery shif an GND shif

deviation from nominal bit rat e

alter nate cur r ent

a plcation pro ramme s int erfac

a plcation spe if ic int egrat ed cir uit

b t e field synchronization

dir ct cur ent

earles bit ample

ele troma netic compatibi ity

EMI ele troma netic int erfe enc

EPL ele trical phy sical la e

ESD ele tros atic discharg e

OSI o en sy st ems int er onne tion

PDU prot ocol data u it

RC RCtime cons ant τ (τ = C

BUS

× R

BUS)

RX RX pin of the transc ive

RXD r c ive data

SBC sy st em b sis chip

SR sample win ow r petition

TX TX pin of the transc ive

TXD transmit data

UAR T unive sal asynchronous r c ive transmitt er

ISO 1 9 7 (al p rt ) is b sed on the conventions spe if ied in the OSI S rvic C nventions

(ISO/IEC 1 7 1) as they a ply for phy sical la e , data lnk la e , network and transp rt prot ocol an

dia nos ic se vic s

5 EPL 12 V LIN devic es w ith RX and TX ac ces

This clause ad r s es clas A an clas B devic s

5.1 Test specification over view

5.1.1 Test case or ganization

The int ention of each t es case is desc ibed at firs , with a short t extual ex lanation Befor t es s ar

ex ecut ed, the t es sy st em shal be set t o it initial s at e as desc ibed in 5.2

The t es proc d r an the ex e t ed r sult ar desc ibed in the form of a chart for each t es case

Ta le 1 is a ty ical t es desc iption an def inesthe t es case org nization

Table 1 — Test case org nization

IUT node as Clas A/B/ C device as master

or slave or b th

Cor espon ing test n mb r T x, T y, where x, y are the

test case n mb r

Initial s at e Paramet ers:

Numb r of nodes Numb r of node in the test implementation

B s lo ds In order to simulat e a LIN network

Ope ational con itions:

IUT mode Operation mode for the IUT (e.g normal mode, low power

mode, … )

T signal Stat e of TX pin at he b gin ing of the t est

RX signal Lo ical outp t volta es of the Rx pin cor espon ing to

reces ive /dominant level at he LIN pin are taken from the

datashe t of the IUT

V

B T, V

SUP, V

IU ,V

C, V

PS1 2,

V

B S

Value in volt

Tes st eps Des rib the t est sta es

R esp nse Des rib the result e pected in order to decide if the t est pas ed or failed

R efe enc Cor espon ing n mb r in ISO 179 7 –4

IUT ma be a mast er or sla e ECU or an in ivid al transc ive chip The RX, TX an V

SUPsignals shal

be ac es ible for pro e t es ex ecution It is r commen ed t o t es with RX /TX ac es , if not p s ible,

t es ing ac ording the spe ification without RX/TX ac es ( e Clause 6) is ac ept ed Depending on the

ty e of IUT, the sup ly v ltag e is V

BATfor ECU or V

SUPfor a chip, r fe r d t o as V

IUT

in this desc iption

5.1.2 Me surement and sig nal g eneration req irements

Ta le 2 def ines the r q ir ment in measur ment an signal g ene ation

Table 2 — Me surement and signal g eneration requirements

<40 ns ( riangle)

Static signals: DC volta e 0,5 %

C, V

5.2 Operational c onditions — Cal bration

5.2.1 Electrical input/o tput , LIN protoc ol

The initial configuration for each t es case is defined he e Any r q ir ment for in ivid al t es s ar

spe if ied with the t es case

Ta le 3 def ines the initial s at e of ele trical input/ utput

Table 3— Initial state of electrical input/o tp t

Initial s at e

Paramet ers:

Ope ational con itions:

V

B T, V

SUP,V

IU ,V

C, V

PS1 2, V

B S

Specif ied for e ch t est

5.2.2 [EPL–CT 1] Operating v ltag e rang e

This t es shal ensur the cor e t o e ation in the v ld sup ly voltag e rang es, b cor e t r c ption of

dominant bit The IUT isthe efor sup led with an inc easing de r asing voltag e ramp

ac es ”

Figure 1 — Test sy stem: Operating v ltag e rang e with RX and TX ac es

Ta le 4 def ines the t es sy st em “Ope ating v ltag e rang e with RX an TX ac es ”

Table 4 — Test sy stem: Operating v ltag e rang e with RX and TX ac es

IUT node as Clas B device as mast er or slave

SUP/V

B T

Tes st eps A volta e ramp is set on the V

SUP/V

B T

as def ined in Ta le 5 T e LINsignal is driven with

a 1 kHz rectangular signal with a d ty cycle of 5 % an a voltag e swing of 1 V T e IUT

shal b in operational/active mode

R esp nse T e RX pin of the IUT shal show the 1 kHz signal A ma imum deviation of 1 % (ime,

volta e)is alowed (se Figure 2)

R efe enc ISO 179 7 –4:2 16, Ta le 1 , Param 9, Param 1

Figure 2 — RX respo se of test sy stem: Operating v ltag e rang e

Ta le 5 def inesthe t es cases for “Ope ating v ltag e ramp”

Table 5 — Test cases: Operating v ltag e ramp

IUrange:[V

SUPrange/V

This group of t es s che ks w hethe the r c iver thr shold voltag es of the IUT ar implement ed cor e tly

within the entir spe ified o e ating sup ly v ltag e rang e The LIN bus v ltag e is driven with a voltag e

ramp che king the entir dominant an r c s ive signal ar a with r spe t t o the a pled sup ly v ltag e

the t es case In 5.2.3.4, the RX output transition is det ect ed Figur 3 show s the triangle signal on the

LIN bus

Figure 3— Triangle signal o the LIN b s

5.2.3.2 [EPL–CT 2] IUT as rec ei ver : V

Table 6 — Test sy stem:IUT as receiver V

SUP

at V

BUS_dom

(down)

Initial s at e Ope ational con itions:

V

IU: [V

SUP

Tes st eps A triangle signal with f =2 Hz an symmetry of 5 % is set on the LINB s (se Figure 3)

R esp nse T e IUT shal g nerate a dominant or reces ive value on RX as def ined on Ta le 7 d ring

the faling slope of the triangle signal

R efe enc ISO 179 7 –4:2 16, Ta le 1 , Param 17, Param 1

ISO 179 7 –4:2 16, Figure 4

Ta le 7 def inesthe t es cases for the fal ing slo e of the triangle signal on the LIN bus

Table 7 — Test cases: F aling slope of the triangle signal on the LIN bus

IU: [V

Table 8 — Test sy stem:IUT as receiver V

SUP

at V

BUS_ ec

(up)

Initial s at e Ope ational con itions:

V

IU: [V

SUP

Tes st eps A triangle signal with f = 2 Hz an symmetry of 5 % is set on the LIN Bus (se Figure 3)

R esp nse T e IUT shal g nerate a dominant or reces ive value on RX as def ined on Ta le 9 d ring

the rising slope of the triangle signal

R efe enc ISO 179 7 –4:2 16, Ta le 1 , Param 17, Param 1

ISO 179 7 –4:2 16, Figure 4

Ta le 9 def ines the t es cases for the rising slo e of the triangle signal on the LIN bus

Table 9 — Test cases: Rising slo e of the triangle signal o the LIN bus

IU: [V

show s the r q ir d thr shold v lues

Table 1 — Test sy stem: IUT as receive V

SUP

at V

BUS

IUT node as Clas A device [E L–C 4].1, [E L–C 4].2, [E L–C 4].3

Initial s at e Ope ational con itions:

V

IU: [V

SUP

Tes st eps A triangle signal with f = 2 Hz an symmetry of 5 % is set on the LIN Bus (se Figure 3)

R esp nse The RX outp t of the IUT shal switch from dominant t o reces ive when the LIN bus

volta e ramps u an it shal switch from reces ive to dominant when the LINbus volta e

th_r c)/ in the rang of (0,475 t o 0,5 5) × V

th_d mshal b les than 0,175 × V

SUP

R efe enc ISO 179 7 –4:2 16, Ta le 1 , Param 1 , Param 2

Ta le 1 defines the t es casesfor “ IUT as r c ive V

SUP] Signal rang e

shal be che ked within this t es , w hethe the IUT influenc s the bus d ring

un e v ltag e an over v ltag e con itions

SUP_N N_OP

”

Figure 7 — Test sy stem: Variatio of V

SUP_N N_OP

Ta le 1 def ines the t es sy st em “Variation of V

SUP_N N_OP

”

Table 12— Test sy stem: Variatio of V

SUP_N N_OP

IUT node as Clas B device as master

Clas B device as slave

SUP/V

B T]

S e Ta le 1

S e Ta le 1

Tes st eps A voltag e ramp (u an down)is set on V

IU 1 T e stimulus stay s for t = 3 s at V

IU 1

= 40 V T e

TX signal shal b lef open if an int ernalp l -u is provided or ap lied with a reces ive level

R esp nse No dominant state on LIN shal oc ur

The IUT shal not b destroyed d ring the t est

The af erward reces ive voltag e shal have a ma imum deviation of ± % from the b fore

reces ive volta e

R efe enc ISO 179 7 –4:2 16, Ta le 1 , Param 1

Ta le 1 definesthe t es cases “Variation of V

SUPrang e /V

5.2.5.1 [EPL–CT 6] I

BUS_ LIM

at dominant state (dri ve o )

This t es che ks the drive ca a i ty of the output s ag e A LIN drive shal pul the LIN bus below a

c rtain v ltag e ac ording t o the LIN s an ard The cur ent l mitation is measur d in ir ctly

BUS_LIM

at dominant s at e (drive on)

Figure 8 — Test sy stem: I

BUS_LIM

at dominant state (driver o )

Ta le 14 def ines thet es sy st em “ I

BUS_LIM

at dominant s at e (drive on)

Table 1 — Test sy stem: I

BUS_LIM

at dominant state (driver on)

IUT node as Clas B device as master

Clas B device as slave

SUP/V

B T]

signal (T =1 ms) with a d ty cycle of 5 %

R esp nse LIN shal show the rectangular signal

The dominant state bus level shal b lower than TH_DOM = 0,2 1× V

for E U’ s

R efe enc ISO 179 7 –4:2 16, Ta le 1 , Param 1

Ta le 1 def inesthe t es cases “ I

BUS_LIM

at dominant s at e (drive on)

Table 1 — Test cases:I

BUS_LIM

at d minant state (drive on)

IU: [V

SUP/V

Figure 9 — Test sy stem: I

SUP/V

B T]

R

MEAS

S e Ta le 17

Tes st eps The TX signal is set reces ive

R esp nse The ma imum value of voltag e drop shal b higher than – 0 mV

R efe enc ISO 179 7 –4:2 16, Ta le 1 , Param 1

Ta le 1 def ines the t es cases “I

SUP/V

This t es che ks w hethe the e is a diode implementation within the t ermination p th of the IUT The

r ve se cur ent should be lmit ed t o I

BUS_PAS_ ecma )

from the LIN wir int o the IUT even if V

BUSis

highe than the IUTs sup ly v ltag e V

IUT

BUS_PAS_ ec

IUT in r c s ive s at e”

Figure 1 — Test sy stem:I

IUT in reces ive state

IUT node as Clas B device as master

Clas B device as slave

SUP/V

B T]

= Signal with a 2 V/s ramp in the rang [8V to 1 V]u an down

The TX signal is set reces ive

R esp nse The ma imum value of volta e drop shal b les than or eq al to 2 mV

R efe enc ISO 179 7 –4:2 16, Ta le 1 , Param 14

Ta le 1 def ines the t es cases “ I

SUP/V

The purp se of this t es is t o che k the d ty cycle of the drive s ag e

5.2.6.2 [EPL–CT 9] Me sur ing the duty cycle at 1 ,417 kbit/s — IUT as transmit er

Figure 1 — Test sy stem:Slo e control

Ta le 2 def ines the t es sy st em “Slo e control”

Table 20 — Test sy stem:Slo e co trol

IUT node as Clas B device as master or slave

SUP/V

B T]

Tes st eps TXD is driven with a rectangular signal (T =1 2 µs)with a d ty cycle of 5 %

TXD slope time < 0 ns, 1 0 % voltag e swing

R esp nse The me sured d ty cycle D3 shal b gre ter or eq al than 0,417 for V

R efe enc ISO 179 7 –4:2 16, Ta le 1 , Param 2 , Param 3

ISO 179 7 –4:2 16, Figure 5

Ta le 2 defines the t es cases “ Slo econtrol”

Table 21 — Test cases: Slo e co trol

EPL–CT–TC

V

IU: [V

SUP/V

B T]

V

IU: [V

SUP/V

B T]

5.2.6.3 [EPL–CT 10] Me suring the d ty cycle at 20,0 kbit/s — IUT as transmit er

Figure 12— Test sy stem:Me suring the duty cycle

Ta le 2 def inesthe t es sy st em “Measuring the d ty cycle”

Table 21 (c ontin ed)

Table 2 — Test sy stem:Me suring the duty cycle

IUT node as Clas B device as master or slave

SUP/V

B T]

Tes st eps TXD is driven with a rectangular signal (T =1 0µs) with a d ty cycle of 5 %

TXD slope time < 0 ns, 1 0 % volta e swing

R esp nse The me sured d ty cycle D1 shal b gre t er or eq al than 0,3 6 for V

R efe enc ISO 179 7 –4:2 16, Ta le 1 , Param 27, Param 2

ISO 179 7 –4:2 16, Figure 5

Ta le 2 def inesthe t es cases “Measuring the d ty cycle”

Table 2 — Test cases: Me suring the duty cycle

EPL–CT–TC

V

IU: [V

SUP/V

B T]

The folowing t es che ks the r c ive ’ s int ernal dela an it symmetry The method for measuring the

v lues is shown in ISO 1 9 7 –4:2 1 , Figur 5

5.2.7.2 [EPL–CT 11] Pr opagation delay of the r ec ei ver

Figure 13 — Test sy stem: Pro a atio delay

Ta le 24 defines the t es sy st em “ Pro a ation dela ”

Table 24 — Test sy stem: Propa atio delay

IUT node as Clas A device [E L–C 1 ].1, [E L–C 1 ].2, [E L–C 1 ].3

Initial s at e Ope ational con itions:

RXD

V

IU :[V

SUP]

Value depen s on the tested device (5V or 3,3V )

Tes st eps LIN bus is driven with a 1 kHz rectangular signal with a d ty cycle of 5 %,

V

B Sstarts at V

SUP

an ramps down t o 0 V within 2 ns an vice ver a

R esp nse The me sured time t

x_pshal b les than 6 µs

t

x_sym

=t

x_p f– t

x_p rshal b in the rang – 2 to + 2 µs

R efe enc ISO 179 7 –4:2 16, Ta le 14, Param 3 , 3

ISO 179 7 –4:2 16, Figure 5

Ta le 2 definesthe t es cases “ Pro a ation dela ”

Table 25 — Test cases: Pro a atio delay

IU: [V

SUP]

[EPL–CT 1 ].1 7,0 V

[EPL–CT 1 ].2 14 V

[EPL–CT 1 ].3 1 V

5.2.8 Suppl y v ltag e ofset

BATshif t es — Dynamic”

Figure 1 — Test sy stem: GND — V

BATshif test — Dy amic

As a conc pt, the two o e ating v ltag es (V

C

SUP) ar grou d-fr e an complet ely de oupled

from each othe ; an with that, a supe position with each of these v ltag es with low fr q ency an

high fr q ency ma be r al z d in epen ently

The o e ating v ltag es V

Cdepen s on the spe ific p rt (3,3 V or 5 V) Howeve , they ma be v ried

in ir ctly through suita le trigg ering The two v ltag es ne d in epen ent, grou d-fr e dir ct cur ent

sup les, in orde t o ex clu e int er onne tions

5.2.8.3 [EPL–CT 12] GND shif test — Dynamic — IUT as a clas A devic e

Ta le 2 def inesthe t es sy st em “ IUT as a clas A devic ”

Table 26 — Test sy stem:Dy amic — IUT as a clas A device

Initial s at e Ope ational con itions:

5 Hz sin s signal with ofset

2 p (inclu ing in ut capacitance of os ilos ope)

2,4 kΩ (0,1% ): Only for open drain trans eiver as embled

Tes st eps A signal at 1 kHz is set on T D1

The test shal b done with R 1 = 1 kΩ (0,1%) an C1 =1 n (1 % )

The test shal b repe ted with R 1 = 5 0Ω (0,1 % ) an C1= 1 n (1% )

R esp nse The d ty cycle me sured at RXD2 shal b in the rang of 0,37 6 t o 0,60

(D1 – 2µs t o D2 +2 µs)

R efe enc ISO 179 7 –4:2 16, Ta le 1 , Param 2

ISO 179 7 –4:2 16, Ta le 1 ,Param 27, 2

5.2.8.4 [EPL–CT 13] GND shif test — Dynamic — IUT as a clas A devic e

Ta le 2 defines the t es sy st em “ Dynamic — IUT as a clas A devic ”

Table 27 — Test sy stem:Dy amic — IUT as a clas A device

Initial s at e Ope ational con itions:

2 p (inclu ing in ut capacitance of os ilos ope)

2,4 kΩ (0,1% ): Only for open drain trans eiver as embled

Tes st eps A signal at 1 kHz is set on T D1

The test shal b done with R 1 = 1kΩ (0,1%) an C1 =1 n (1 % )

The test shal b repe ted with R1 = 5 0Ω (0,1 %)an C1= 1 n (1% )

R esp nse The d ty cycle me sured at RXD2 shal b in the rang of 0,37 6 to 0,60

Ta le 2 def ines thet es sy st em “ Dynamic — IUT as a clas A devic ”

Table 28 — Test sy stem:Dynamic — IUT as a clas A device

Initial s at e Ope ational con itions:

2 p (inclu ing in ut capacitance of os ilos ope)

2,4 kΩ (0,1% ): Only for open drain trans eiver as embled

Tes st eps A signal at 1 kHz is set on T D1

The test shal b done with R 1 = 1 kΩ (0,1%) an C1 =1 n (1 % )

The test shal b repe ted with R 1 = 5 0Ω (0,1 % ) an C1= 1 n (1% )

R esp nse The d ty cycle me sured at RXD2 shal b in the rang of 0,37 6 t o 0,60

Ta le 2 def ines the t es sy st em “Dynamic — IUT as a clas A devic

Table 29 — Test sy stem:Dynamic — IUT as a clas A device

Initial s at e Ope ational con itions:

2 p (inclu ing in ut capacitance of os ilos ope)

2,4 kΩ (0,1% ): Only for open drain trans eiver as embled

Tes st eps A signal at 1 kHz is set on T D1

The test shal b done with R 1 = 1kΩ (0,1%) an C1 =1 n (1 % )

The test shal b repe ted with R1 = 5 0Ω (0,1 %)an C1= 1 n (1% )

R esp nse The d ty cycle me sured at RXD2 shal b in the rang of 0,37 6 to 0,60

(D1 – 2µs t o D2 +2 µs)

R efe enc ISO 179 7 –4:2 16, Ta le 1 , Param 2

ISO 179 7 –4:2 16, Ta le 1 ,Param 27, 2

5.2.8.7 [EPL–CT 16] GND shif test — Dynamic — IUT as a clas B devic e

Ta le 3 def ines the t es sy st em “ IUT as a clas B devic ”

Table 30 — Test sy stem:Dynamic — IUT as a clas B device

Initial s at e Ope ational con itions:

5 Hz sin s signal with ofset

2 p (inclu ing in ut capacitance of os ilos ope)

2,4 kΩ (0,1% ): Only for open drain trans eiver as embled

Tes st eps A signal at 1 kHz is set on T D1

The test shal b done with R 1 = 1kΩ (0,1%) an C1 =1 n (1 % )

The test shal b repe ted with R1 =5 0 Ω (0,1 %) an C1 = 1 n (1% )

R esp nse The d ty cycle me sured at RXD2 shal b in the rang of 0,37 6 to 0,60

(D1 – 2µs t o D2 +2 µs)

R efe enc ISO 179 7 –4:2 16, Ta le 1 , Param 2

ISO 179 7 –4:2 16, Ta le 1 ,Param 27, 2

5.2.8.8 [EPL–CT 17] GND shif test — Dynamic — IUT as a clas B devic e

Ta le 3 defines the t es sy st em “ Dynamic — IUT as a clas B devic ”

Table 31 — Test sy stem:Dy amic — IUT as a clas B device

Initial s at e Ope ational con itions:

2 p (inclu ing in ut capacitance of os ilos ope)

2,4 kΩ (0,1% ): Only for open drain trans eiver as embled

Tes st eps A signal at 1 kHz is set on T D1

The test shal b done with R 1 = 1 kΩ (0,1%) an C1 =1 n (1 % )

The test shal b repe ted with R 1 = 5 0Ω (0,1 % ) an C1= 1 n (1% )

R esp nse The d ty cycle me sured at RXD2 shal b in the rang of 0,37 6 t o 0,60

Ta le 3 defines the t es sy st em “ Dynamic — IUT as a clas B devic ”

Table 3 — Test sy stem:Dy amic — IUT as a clas B device

Initial s at e Ope ational con itions:

2 p (inclu ing in ut capacitance of os ilos ope)

2,4 kΩ (0,1% ): Only for open drain trans eiver as embled

Tes st eps A signal at 1 kHz is set on T D1

The test shal b done with R 1 = 1kΩ (0,1%) an C1 =1 n (1 % )

The test shal b repe ted with R1 = 5 0Ω (0,1 %)an C1= 1 n (1% )

R esp nse The d ty cycle me sured at RXD2 shal b in the rang of 0,37 6 to 0,60

Ta le 3 def inesthe t es sy st em “ Dynamic — IUT as a clas B devic ”

Table 33— Test sy stem:Dy amic — IUT as a clas B device

Initial s at e Ope ational con itions:

2 p (inclu ing in ut capacitance of os ilos ope)

2,4 kΩ (0,1% ): Only for open drain trans eiver as embled

Tes st eps A signal at 1 kHz is set on T D1

The test shal b done with R 1 = 1 kΩ (0,1%) an C1 =1 n (1 % )

The test shal b repe ted with R 1 = 5 0Ω (0,1 % ) an C1= 1 n (1% )

R esp nse The d ty cycle me sured at RXD2 shal b in the rang of 0,37 6 t o 0,60

Figure 15 — Test sy stem:Los of battery

Ta le 34 defines the t es sy st em “ Los of b tt ery

Table 34 — Test sy stem:Los of battery

IUT node as Clas B device as master or slave

SUP/V

B T]

Los of Batt ery

1 kΩ (0,1 % )

Tes st eps The power su ply is dis on ect ed from the IUT V

IUPIN

V

B S

=Signal with a 2 V/s ramp in the rang [0 V t o 1 V] u an down

R esp nse During al t est, no parasitic cur ent paths shal b formed b tween the bus line an the IUT

I

B Sshal b les than 1 0 µA, me ns 1 V volta e drop over R = 1 kΩ

Af er recon ecting b t ery line, the IUT shal restart aft er failure recovery

R efe enc ISO 179 7 –4:2 16, Ta le 1 , Param 16

5.2.9.3 [EPL–CT 21] L s of GND

Figure 1 — Test sy stem: L s of GND

Ta le 3 def inesthe t es sy st em “Los of GND”

Table 35 — Test sy stem: L s of GND

IUT node as Clas B device as slave

SUP/V

B T]

SUP/ GND

=Signal with a 2V/s ramp in the rang [0 V to 1 V] u an down

R esp nse During al test, no parasitic cur ent paths shal b formed b tween the bus line an the IUT

I

B Sshal b inclu ed in ± mA, me ns 1V volta e drop over R = 1 kΩ

Af er recon ecting grou d line, the IUT shal restart af er failure recovery

R efe enc ISO 179 7 –4:2 16, Ta le 1 , Param 1

5.2.10 [EPL–CT 22] Ver ifying inter nal capacitanc e an d ynamic inter ferenc e — IUT as slave

The purp se of this t es is t o che k the int ernal ca acitanc ofthe IUT u de normal an fault con itions

The IUT shal not int erfe e dynamicaly with bus signals w hen it is in p s ive (non-transmit ing) or

unp we ed s at e

In case of a swit cha le int ernal pul -up r sist or, the int ernal pul-up r sist or shal be active

int erfe enc — IUT as sla e”

Figure 17 — Test system: Verifying internal ca pacitance and dy amic interference — IUT as sla ve

Ta le 3 def inesthe t es sy st em “Swit ch set ings depen ing on IUT conf iguration”

Table 36 — Test sy stem: Switch set ings depending o IUT co figuratio

In case where IUT is con ect ed by a wire harnes : During reference me surement, close b th S A an

S B an dis on ect IUT from harnes S the harnes capacitance is ac ou t ed for in the reference

Ta le 3 defines the tes system “Ve ifying internal ca pacitanc an dynamic interfe enc — IUT as sla e”

T able 37 — Test sy stem: Verifying internal capacitance and dy amic interference — IUT as slave

IUT node as Clas B device as slave

SUP/V

B T]

Tes st eps The LIN Bus is driven with a 1 kHz rectangular signal with a d ty cycle of 5 %

Rise time ≤ 0ns.Slope time me surements are done at 1 %,9 % of slope volta e

S B closed: Me suring rise time T

RE

on a k own capacitance of 2 0p + 75 p

S A closed: Me suring rise time T

intwith the IUT internal capacitance + 75 p

SLA Eshal b les than or eq al to 2 0 pF : T

int

≤T

RE

The IUT shal not interfere with the d namic stimulus

R efe enc ISO 179 7 –4:2 16, 5.3.6, Param 37

ISO 179 7 –4:2 16, 5.3.9.2

Ta le 3 defines the t es cases “Ve ifying int ernal ca acitanc an dynamic int erfe enc — IUT as sla e”

Table 38 — Test cases: Verifying internal capacitance and d namic interference — IUT as slave

IU: [V

SUP/V

is swit ched t o the LIN pin To g et the v lue of the int ernal r sist or, cur ent

an v ltag e shal be measur d These v lues ar g the ed for two dife ent set ings, an the int ernal

r sis anc is calculat ed with F ormulae (1), (2), (3) an (4 )