The binary logic operations are carried out in the function block diagram using the AND, OR, and exclusive OR boxes. The binary tags for the logic operation can be scanned for signal state “1” or “0”. The binary results of other boxes can also be included, e.g. the evaluation of a signal edge or the comparison of two digital tags (Fig. 8.3).
8.2.1 Scanning for signal states “1” and “0”
The binary functions scan the binary tags at the function inputs before they link the signal states together. The scan can be made for signal state “1” or “0”. When scan- ning for signal state “1”, the function input leads directly to the box. You can recog- nize the scanning for signal state “0” by means of the negation circle at the input of the function.
The example in Fig. 8.4 shows the two “Start” and “Stop” pushbuttons. When pressed, they output the signal state “1” in the case of an input module with sinking input. The SR function is set or reset with this signal state.
The “/Fault” signal is not active in the normal case. Signal state “1” is then present and is negated by scanning for signal state “0”, and the SR function therefore remains uninfluenced. If “/Fault” becomes active, the SR function is to be reset. The active signal “/Fault” delivers signal state “0”, which by scanning for signal state “0”
resets the SR function as signal state “1”.
Fig. 8.3 Overview of binary logic operations in the function block diagram Binary
tag
Binary tag Binary tag
Edge trigger flag Edge trigger flag
Digital tag 1 Digital tag 2 Binary logic functions
& >=1 X
Data type Function
Function Function
P N
Scan for signal state “1”
Scan for signal state “0”
AND function OR function
Negation
Comparison function Exclusive OR function
Positive edge of a binary tag
Negative edge of a binary tag Binary
tag
8.2.2 Programming a binary logic operation in the function block diagram To program a binary logic operation, drag the corresponding symbol (&, >=1, X) with the mouse from the program elements catalog under Basic instructions > Bit logic operations to the working area. If a logic operation is already present in the working area, the program editor indicates with small gray boxes where the logic operation may be positioned and with a green box where it is positioned when you
“let go”.
A binary logic function has two inputs as standard. If you select the function box when programming and then select the Add input command in the shortcut menu with the right mouse button, or more simply: Click on the asterisk with the left mouse button, then the program editor adds a further input to the function box.
To program a scan for signal state “0”, drag the negation symbol (invert RLO) with the mouse from the program elements catalog under Basic instructions > General to a box input. In the same manner you can convert a scan for signal state “0” into a scan for signal state “1” or negate the result of logic operation between the boxes.
You connect a binary tag to the input of a binary logic operation. This can be an input, output, bit memory or data bit, a SIMATIC timer or -counter function, or the binary output of another function box. Assignment with a constant (TRUE or FALSE) is not permissible.
You can connect further binary function boxes to the output of a binary logic oper- ation. To assign the result of logic operation of a function box to a binary tag, posi- tion an assign box at the output which you fetch in the program elements catalog under Basic instructions > Bit logic operation.
Fig. 8.4 Scanning for signal states “1” and “0”
"Fan"
%I1.3 %I1.2 %I1.1
%Q4.1
"Start"
"Stop"
"/Fault"
Example of scans for signal state "1" and signal state "0"
& SR
>=1
S
R1 Q
*
*
The asterisks at the inputs of the function boxes indicate an expansion option for further inputs.
L+
G
8.2.3 AND function
An AND function is fulfilled if all inputs have the scan result “1”. A description of the AND function is provided in Chapter 12.1.3 “AND function, series connection” on page 464.
Fig. 8.5 shows an example of AND functions. The first AND function scans the
#Fan1.works tag for signal state “1” and the #Fan2.works tag for signal state “0”. The two results of the scans are linked according to an AND logic operation. The AND function is fulfilled (delivers signal state “1”) if only fan 1 is running. The second AND function is fulfilled if only fan 2 is running.
8.2.4 OR function
An OR function is fulfilled if one or more inputs inputs have the scan result “1”. A description of the OR function is provided in Chapter 12.1.4 “OR function, parallel connection” on page 465.
Fig. 8.6 shows an example of OR functions. The first OR function scans the
#Fan1.works and #Fan2.works tags for signal state “1”. The two results of the scans are linked according to an OR logic operation. The OR function is fulfilled (delivers signal state “1”) if one of the fans is running or if both fans are running. The second OR function is fulfilled if neither of the fans is running.
Fig. 8.5 Example of ANDing before ORing
Fig. 8.6 Example of ORing before ANDing
8.2.5 Exclusive OR function
An exclusive OR function (antivalence function) is fulfilled if an odd number of inputs has the scan result “1”. A description of the exclusive OR function is provided in Chapter 12.1.5 “Exclusive OR function, non-equivalence function” on page 465.
Fig. 8.7 shows an example of an exclusive OR function. The #Fan1.works and
#Fan2.works tags are scanned at the inputs of the function box for signal state “1”.
The exclusive OR function is fulfilled (delivers signal state “1”) if only one of the fans is running.
8.2.6 Combined binary logic operations, negating result of logic operation The function boxes of the AND, OR, and exclusive OR functions can be freely com- bined with one another. Examples are shown in figures 8.5 and 8.6. Together with Fig. 8.7, the examples – even if the logic operation is different in each case – show the same response: The logic operation is fulfilled if only one of the fans is running.
Negating result of logic operation
The output of a function box can be negated, i.e. the result is signal state “1” if the logic operation is not fulfilled. It is then possible in a simple manner to generate b a NAND function (negated AND function, is fulfilled if at least one input has the
result of scan “0”),
b a NOR function (negated OR function, is fulfilled if all inputs have the result of scan “0”), and
b an inclusive OR function (equivalence function, negated exclusive OR function, is fulfilled if an even number of inputs has the result of scan “1”).
Fig. 8.8 shows a NOR function. The OR function is not fulfilled if none of the fans is running, and then delivers the signal state “0”. This is negated and assigned to the
#Display.noFan tag.
Fig. 8.7 Example of an exclusive OR function
Fig. 8.8 Example of a negated function output
8.2.7 T branch
You can “divide” a logic operation so that it has two different terminations, the re- sult being a “T branch”. To program a T branch, use the mouse to drag the Branch symbol from the program elements catalog under Basic instructions > General to the position at which the T branch is to commence.
Fig. 8.9 shows a T branch following the lower OR logic operation. The result of logic operation at this position is therefore only “0” if no fan is running. This result of logic operation is negated, linked according to an AND logic operation to “Clock 2 Hz”, and controls the #Display.noFan tag.
8.2.8 Edge evaluation of binary tags
An edge evaluation detects the change in a binary signal.
For programming an edge evaluation, drag the symbol for the P or N box with the mouse from the program elements catalog under Basic instructions > Bit logic oper- ation to the working area.
The edge evaluation of a binary tag has the signal state “1” for one processing cycle if the signal state of the binary tag named above it changes from “0” to “1” (P box, rising edge) or from “1” to “0” (N box, falling edge). This “pulse” can be linked fur- ther.
The edge trigger flag is named underneath the edge box. This is a flag or data bit which saves the signal state of the binary tag. The signal edge is recognized by comparing the signal states of binary tags and edge trigger flags (see also Chapter 12.2.5 “Edge evaluation” on page 472).
Fig. 8.10 shows an application of edge evaluation. Let us assume that an alarm has
“arrived”, i.e. the #Alarm_bit signal changes from “0” to “1”. The #Alarm_memory tag is then set and the #Alarm_lamp tag flashes at 0.5 Hz. The alarm memory can be reset using an #Acknowledge button. The alarm memory remains reset if
#Acknowledge has the signal state “0” again and #Alarm_bit is still present.
#Alarm_memory is only set again by a further positive edge of #Alarm_bit (if
#Acknowledge then no longer has signal state “1”).
Fig. 8.9 Example of a T branch in the function block diagram
8.2.9 Comparison functions
A comparison function compares two digital values and delivers a binary signal as the comparison result. The comparison result has signal state “1” if the comparison is fulfilled, otherwise “0”. The comparison function is described in Chapter 13.3 “Com- parison functions” on page 518.
To program a comparison function, drag it with the mouse from the pro- gram elements catalog under Basic instructions > Comparator operations to the working area. You can then use drop-down lists to set the comparison mode and data type (Fig. 8.11).
Fig. 8.12 shows two comparison box- es. If the #Measurement_temperature tag is above a lower limit and below
an upper limit, the #Measurement_in_range tag has signal state “1”.
Fig. 8.10 Example of an edge evaluation of a binary tag
Fig. 8.12 Example of comparison functions
Fig. 8.11 Drop-down lists for setting the com- parison mode and data type