Slide điện tử từ trường lecture 3 diode circuits

Lecture 03Diode circuits... Using ideal modelHalf-wave rectifier... Basic limiting circuits... DC restoration clamping circuit DC restoration with load... Diode Model small signal model.

Lecture 03

Diode circuits

• Rectifier circuit

• Limiting and clamping circuits

Diode logic gates (ideal diode)

C B

A

Assume D1 and D2 are ideal diodes and conducting

mA I

v I

I k

mA k

I

D D

1

10 )

( 5

0

1 10

0 10

2 2

=

⇒

− +

Example (ideal diode)

Assuming that D1 and D2 are ideal diodes and conducting

mA I

v I

I k

mA k

I

D D

1

10 )

( 10

0

2 5

0 10

2 2

−

=

⇒

− +

I k V

mA k

I

D B

D

3 3 10

10

33

1 15

) 10 (

ACÆDC Rectifier

average rms rms

V

V F

R

V

V F

F

V

V F

.

T o average

dt t

V T

V

dt t

V T

) ( 1

Root-mean-square

max

0 max 0

2 sin

1 )

(

d V

dt t

v T

2 sin

1 )

(

0

2 max

2 0

d V

dt t

v T

θ θ

θ

θ θ

2 cos

1 sin

2 cos

sin

d d

V V

V V

Using ideal model

Half-wave rectifier

Using piecewise-linear model

0

D D

s D

r R

R v

r R

R v

+

− +

Using piecewise-linear model (center-tapped Rectifier)

PIV (peak inverse voltage) = 2 v s − V D

Transfer curve

PIV (peak inverse voltage) = v s − 2 V D + V D = v s − V D

Bridge rectifier

sin

2 2 2 max 2

max max

max max

ω

V

V V

t v

D

D

V V

V V

D

1 )

( 2

sin

2 2 2

2 2 max 2

) (

2 max max

max max

ω

D

V V

V V

D

V V

V V

t v

D D

1 )

(

2 sin

2 2 2

2 2 max 2

) (

2 max max

max max

ω

D

V V

V V

D

V V

V V

t v

D D

Filter

v dt

dv C i

i

i D = C + L = o + o

RC t

RC t

e V

t

v

V k ke

t

v

V

v RC

t v dt

t

dv

R

v dt

dv

C

p o

p o

p o

o o

o o

)

(

, )

(

) 0 ( ,

) ( )

T V V

RC

T e

e V V

V

p p

r

RC T

RC T p r

Average diode current i D max

Average diode current i Dav

)

2 1

(

r

p L

V I

)

2 2

1 (

max

r

p L

V I

next page

Half wave

V RC

T V V

RC

T e

e V V

V

p p

r

RC T

RC T p r

Average diode current i Dav

Maximum diode current i D max

) 2 2

1 (

max

r

p p

V R

V

) 2 1

(

r

p p

V R

V

i = + π

p

r r

p

r p

p

r p

p

V

V t

V t

V

V V

t V

V V

t V

2 )

(

2

] )

( 2

1 1

[

) cos(

2

2

= Δ

⇒

= Δ

−

= Δ

−

⇒

−

= Δ

ω ω

ω ω

t

CV I

t

Q I

i

t I

i t

i

Q

r L

c L

Dav

L Dav

v i

Basic limiting circuits

zone B : D 2 off, D 1 off

zone C : D 2 on, D 1 off

i

v =

v v

v

v k

k

k v

k k

k v

i

o

i o

5

2 2

1

) 5

( 10 10

10 10

+ +

=

v v

v

v k k

k v

k k

k v

i o

i o

5

2 2

1

) 5

( 10 10

10 10

10 10

+

=

+

+ +

=

Ideal diodes

zone A : D 1 off, D 2 on

zone B : D 2 off, D 1 off

zone C : D 1 on, D 2 off

y o

y

i V V V

x o

x

i V V V

i o

y i

on D

off D

off D

on D

on D V

V

V A > i > B ⇒ 1 , 2

) 5 67 2

(

10 5

2

11

1

) 15 //

10 ( 5

) 15 //

10 ( )

5 //

15 ( 10

) 5 //

15 ( )

5 //

10 ( 15

) 5 //

10 (

+

=

+ +

i

i o

V

V V

) 5 67 2

(

1 10

) 5 67 2

( 11

1 5

7

B o

V V

V

V V

DC restoration (clamping circuit)

DC restoration with load

Voltage doubler

off

on D

D

2 1

on

off D

D

2 1

on

off D

D

2 1

off

off D

D

2 1

+

m V

− + V m

− + 2 V m + 2 V m −

− + 2 Vm

− + 2 Vm

− + 2 Vm

− + 2 Vm

− + 2 Vm

Voltage doubler

Operating point (DC analysis)

T

D

nV V s

D DD

D V RI

small signal analysis (AC analysis)

T d

T

d T

D T

d D T

D

T D

nV

t v D

D

nV

t v nV V s nV

t v V s nV

v s

D

d D

D

nV V s

I e

I e

I

i

t v V

) ( ))

( (

) (

D D

nV

t v I

T

d D d

I

nV i

v r

nV

t

v I t

(

Diode Model (small signal model)