MSI h55m p31 MS 7636 rev 1 3 схема

MICRO-STAR INT'L CO.,LTDSheet ofDate: MICRO-STAR INT'L CO.,LTD Sheet ofDate:... Refer to the Platform Design Guide for pull-down recommendations when logic low is desired.. A test point

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MICRO-STAR INT'L CO.,LTD

12

Page Title

DDR III DIMM 1 / 2

Block Diagram/Device Map/GPIO Table/history 2, 3, 4, 5

CPU-CLK/Control/MISC/PEG

10,11 6

PCI Express (X16) Slot * 1

HD Audio Codec:ALC889 Clock Gen:ICS 4105B

Main Memory:

DDRIII (800/1066/1333MHz) * 4 (Dual Channel)

SIO:F71889 LAN:RTL8111D 10/100/1000 System Chipset:

Expansion Slots:

CPU:

OnBoard Chipset:

PCI Slot *1 INTEL - Lynnfield/ Clarkdale LGA 1156

Controller: uP6206 ( 3-Phase use STD MOS 95W ) PWM:

Other:

Flash ROM: 64 Mb SPI (CHIP)

PCI Express (X1) Slot * 2

SATA(SATA2-300MB/s) *6 USB2.0 *10 (Rear*4 / Front*6) TPM Header *1

INTEL-IBEXPEAK PCH (H - 55)

DVI PORT*1

PRINT Header *1 COM pin header *2

CLK GEN ICS4105

13

22 23 24 25 26 SATA conn / FAN Control

PCIE x16 & x1, x1 Slots

20

27 LAN-RTL8111DL

29 30

21 PCH-POWER,GND/NVRAM

32

34 DVI-D

PCH-SMB/LPC/AUDIO/RTC/SPI/JTAG/RST

31

35 33

IDE X1 JMB-368

D-SUB *1

on BOARD BUZZER

DDR Power - uP6103 1-Phase

ACPI Controller (uPI solution)

CPU_VTT Power - uP6103_1 Phase

CPU Power - uP6206 3-Phase

GPU Power -ISL6314 uP6103(DDR)

DVI: DVI Stuff

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Sheet ofDate:

PCIE X1 SLOT

GIGA LAN

INTEL LGA 1156

PCIE X1 SLOT

SATA#4

SATA#5

PCIE

IDE*1 JMB-368

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CLOCK

PCI Slot 1

PCISLOT1 Signals

IDSEL

PCI RESET DEVICE

PCI_INT#C PCI_INT#D PCI_INT#A

PCH CLKOUT_PCI<3>

PCH CLKOUT_PCI<2>

CHA DIMM1

CHB DIMM2

10100001B 10100000B

MEM_MA_CLK_H0/L0 H1/L1 MEM_MB_CLK_H0/L0 H1/L1

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Sheet ofDate:

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Sheet ofDate:

1.2009-10-13 Change VCC_SENSE to CPU_VCC_SENSE

2.2009-10-13 Add HDMI circuit,change USB circuit,JSP1 circuit update

3.2009-10-13 update NCT3016 circuit ,add VTIN3 circuit for VRM MOS

4.2009-10-18 Add C589 C590

5.2009-10-18 Add R561 R562 For HDMI HPDET

6.2009-10-20 Add R602,Swap HDMI wire for layout

7.2009-10-21 NCT3016 circuit update:add R637 Q65 R592,Change U27 pin16 tp NCT_GPIO16,delete C121

8.2009-10-21A NCT3016 citcui update:add Q85,chang SATA1&SATA2 to SATA1_2

9.2009-10-23 change JUSB2 & JUSB1 for layout

10.2009-10-23A NCT3016 circuit update:add R850

11.2009-10-24 delete VCCGATE and DUALGATE circuit

12.2009-10-26 delete C534

13.2009-10-26 Swap RN40

MS-7636-1.3

1.2010-02-23 Add MH7 MH8 MH9 R545

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VTT_PGDMEM_PWRGDH_PECIH_CATERR#

PROC_PWROK

H_MCP_CFG0H_MCP_CFG2H_MCP_CFG4

XDP_CPU_BPM_N0XDP_CPU_BPM_N2XDP_CPU_BPM_N4XDP_CPU_BPM_N6

CPU_TMSCPU_TRST#

CPU_TDICPU_TDOSKTOCC#

H_MCP_CFG6

XDP_CPU_BCLK_NFP_RST#

XDP_CPU_BCLK_PCPU_RESET_OUT#

CPU_VSS_SENSE

H_MCP_CFG10

H_MCP_CFG13H_MCP_CFG15H_MCP_CFG17H_MCP_CFG11

H_VID0H_VID2H_VID4

TP_GFX_DPRSLPVR

DMI_RX0#

DMI_RX1DMI_RX1#

DMI_RX2DMI_RX2#

DMI_RX3DMI_RX3#

DMI_TX0

GRCOMP

DMI_TX0#

DMI_TX1DMI_TX1#

DMI_TX2DMI_TX2#

DMI_TX3DMI_TX3#

GRBIAS

DMI_RX0PM_EXT_TS0

TP_MCP_VCCVTT_VID0

FDI_LSYNC1FDI_FSYNC0

FDI_TX0FDI_TX0#

FDI_TX1FDI_TX1#

FDI_TX2FDI_TX2#

FDI_TX3FDI_TX3#

FDI_TX4FDI_TX4#

FDI_TX5FDI_TX5#

FDI_TX6H_MCP_CFG0

H_GFX_VID0GFX_VR_EN

H_GFX_VID1H_GFX_VID3H_GFX_VID5GFX_IMON

H_TDO_TDI_MCK_DMI_P

CPU_TDO 36CPU_TDI 36CPU_TRST# 36

CPU_VSS_SENSE 35CPU_VCC_SENSE 35

DMI_RX013DMI_RX0#

13DMI_RX113DMI_RX1#

13DMI_RX213DMI_RX2#

13DMI_RX313DMI_RX3#

13

DMI_TX0 13DMI_TX0# 13DMI_TX1 13

EXP_A_RXP_119

EXP_A_RXN_1119

EXP_A_RXN_119

EXP_A_RXP_1219

EXP_A_RXP_219

EXP_A_RXN_1219

EXP_A_RXN_219

EXP_A_RXP_1319

EXP_A_RXP_319

EXP_A_RXN_1319

EXP_A_RXN_319

EXP_A_RXP_1419

EXP_A_RXP_419

EXP_A_RXN_1419

EXP_A_RXN_419

EXP_A_RXN_1519

EXP_A_RXP_519

EXP_A_RXP_1519

EXP_A_RXN_519EXP_A_RXN_6

19EXP_A_RXP_619EXP_A_RXP_719EXP_A_RXN_719EXP_A_RXP_819EXP_A_RXN_819EXP_A_RXP_919EXP_A_RXN_919EXP_A_RXP_1019

EXP_A_RXP_019

EXP_A_RXN_1019

EXP_A_RXN_019

EXP_A_RXP_1119

EXP_A_TXN_7 19EXP_A_TXN_8 19EXP_A_TXN_9 19EXP_A_TXN_4 19

EXP_A_TXN_10 19EXP_A_TXP_11 19EXP_A_TXP_12 19EXP_A_TXN_11 19EXP_A_TXP_13 19EXP_A_TXP_0 19

EXP_A_TXN_12 19EXP_A_TXN_0 19

EXP_A_TXN_13 19EXP_A_TXP_1 19

EXP_A_TXP_14 19EXP_A_TXN_1 19

EXP_A_TXN_14 19EXP_A_TXP_2 19

EXP_A_TXP_15 19EXP_A_TXP_3 19

EXP_A_TXN_15 19

EXP_A_TXN_2 19EXP_A_TXN_3 19EXP_A_TXP_5 19EXP_A_TXP_6 19EXP_A_TXP_7 19

XDP_CPU_BPM_N3 36XDP_CPU_BPM_N6 36XDP_CPU_BPM_N4 36XDP_CPU_BPM_N1 36

FDI_FSYNC114FDI_LSYNC114

FDI_INT14

FDI_FSYNC014

FDI_TX3# 14FDI_TX2 14

FDI_TX7# 14

FDI_TX6 14FDI_TX6# 14

FDI_TX4 14FDI_TX5 14

FDI_TX7 14

FDI_TX4# 14FDI_TX5# 14FDI_TX2# 14

FDI_TX0 14FDI_TX1 14

FDI_TX3 14

FDI_TX0# 14FDI_TX1# 14

CLK133M_CPU_N

13CLK133M_CPU_P

13

GFX_VR_EN 34H_GFX_VID[6 0] 34

GFX_VSS_SENSE 34GFX_VCC_SENSE 34

Sheet ofDate:

PEG CONFIG TABLE

CFG 0~5 HAVE INTERNAL PULL-UPS

N12-160A010-F02

BACK SIDE

Break-out:10mil width, 6 mil space Other Area:10mil width, 15 mil space For DP port

demo board empty check list not empty

demo board no connect

代翴　璉　

Follow DG&CRB

AA8/Y8 ,these signals for 120 MHz from the Intel?5 Series Chipset CLKOUT_DP_P /CLKOUT_BCLK1_P and CLKOUT_DP_N / CLKOUT_BCLK1_N Leave as NC

on the PCH and connect directly to GND at the processor 120MHz clock is used for embedded DisplayPort which is no supported on Desktop designs.

if not use XDP,add Test point

Follow MS7588-1.0

Configuration signals:

The CFG signals have a default value of 1 if not

terminated on the board Refer to the Platform

Design Guide for pull-down recommendations

when logic low is desired.

CFG[0]: PCI Express Bifurcation:

- With all Intel?5 Series Chipsets except P55

CFG[1]: Reserved (Lynnfield processor PCI

Express Port Bifurcation)

CFG[2]: Reserved configuration lands A test

point may be placed on the board for this

land.

CFG[3]: PCI Express* Static Lane

Numbering Reversal A test point may be

reversal will be applied across all 16 lanes.

1: No Reversal

0: Reversal

In the case of Bifurcation with NO Lane Reversal,

the physical lane mapping is as follows:

Lanes 15:8 => Port 1 Lanes 7:0

In the case of Bifurcation WITH Lane Reversal, the

physical lane mapping is as follows:

CFG[6:4]: Reserved configuration lands A

test point may be placed on the board for

this land.

CFG[17:7]: Reserved configuration lands.

Intel does not recommend a test point on the

board for this land.

R363 X_3KR363 X_3K

TP3

R214 49.9/1%

R212 51RR212 51R

R30449.9/1%

R321 100R/1%

TP37

R199 51RR199 51R

R380 0RR380 0RR178 X_49.9R/1%

R178 X_49.9R/1%

R359 X_3KR359 X_3K

R202 X_51RR202 X_51R

R368 X_3KR368 X_3K

Q7X_N-SST3904_SOT23Q7

X_N-SST3904_SOT23

CE

R365 X_3KR365 X_3K

R207 51RR207 51R

R361 X_3KR361 X_3KTP30

R211 51RR211 51R

VID[6] U34VID[7] U33PSI* AG38GFX_VR_EN F12

GFX_IMON/RSVD F6GFX_VID[0] G10GFX_VID[1] B12GFX_VID[2] E12GFX_VID[3] E11

GFX_VID[4] C12GFX_VID[5] G11GFX_VID[6] J11FC_AE38 AE38

VTT_SELECT AF39FC_AG40 AG40VCC_SENSE T35VSS_SENSE T34

VTT_SENSE AE35VSS_SENSE_VTT AE36

RSVD AL18RSVD AK18

VAXG_SENSE A13VSSAXG_SENSE B13

RSVD T39ISENSE T40

RSVD M12RSVD L12RSVD AL15RSVD AL14

TDO AM38TDI AM37TCK AN37TMS AN40

TRST* AM39

PRDY* AJ38PREQ* AK37DBR* AL40

BCLK_ITP* AK40

BCLK_ITP AK39TAPPWRGOOD AK34RESET_OBS* AL39

RSVD AL17

RSVD AM17

BPM[0]* AL33BPM[1]* AL32BPM[2]* AK33BPM[3]* AK32BPM[4]* AM31

BPM[5]* AL30BPM[6]* AK30BPM[7]* AK31RSVD AM25RSVD AL29RSVD AM30RSVD AK29

RSVD AK28RSVD AM29RSVD AM28RSVD AL27RSVD AK27

RSVD AM26RSVD AM27RSVD AL26RSVD AK26RSVD AK25

R325 49.9/1%

TP35

R364 X_3KR364 X_3K

R18210K/1%

R204 51RR204 51R

R362 X_3KR362 X_3K

R201 51RR201 51R

TP1

TP38

R381 X_3KR381 X_3K

R213 X_51RR213 X_51R

PEG_TX[1]* E6PEG_TX[2] E5PEG_TX[2]* F5PEG_TX[3] F3PEG_TX[3]* F4

PEG_TX[4] G6PEG_TX[4]* G5PEG_TX[5] H4PEG_TX[5]* H3PEG_TX[6] F7

PEG_TX[6]* G7PEG_TX[7] J6PEG_TX[7]* J5PEG_TX[8] K3PEG_TX[8]* K4

PEG_TX[9] H8PEG_TX[9]* J8PEG_TX[10] L6PEG_TX[10]* L5PEG_TX[11] M4

PEG_TX[11]* M3PEG_TX[12] K7PEG_TX[12]* L7PEG_TX[13] N6PEG_TX[13]* N5

PEG_TX[14] M8PEG_TX[14]* N8PEG_TX[15] R5PEG_TX[15]* R6DMI_TX[0] L1DMI_TX[0]* M1DMI_TX[1] N3DMI_TX[1]* N2DMI_TX[2] N1

DMI_TX[2]* P1DMI_TX[3] R2DMI_TX[3]* R3PEG_ICOMPI D11

PEG_ICOMPO C10PEG_RCOMPO B10PEG_RBIAS A11

R203 X_51RR203 X_51R

R196 51RR196 51R

TP39

TP2

TP33

R379 X_3KR379 X_3KTP36

R197

R210 X_1KR1%0402R210 X_1KR1%0402

R383 0RR296 20R/1%

R296 20R/1%

Q26

3904_SOT363Q26

3904_SOT3634

65

21

R394 0R

R297750/1%

R188 10K/1%

R217 51RR217 51R

R193X_665R/1%

R35 X_0R0402R35 X_0R0402

TP34

R352 X_3K

Q30

3904_SOT23Q30

VDDIO

DISPLAY LINK

4 OF 12

CPU1DVDDIO

DISPLAY LINK

FDI_TX[1] V4FDI_TX[1]* V3FDI_TX[2] U8FDI_TX[2]* U7FDI_TX[3] W8

FDI_TX[3]* W7FDI_TX[4] W5FDI_TX[4]* W4FDI_TX[5] R8

FDI_TX[5]* R7FDI_TX[6] Y4FDI_TX[6]* Y3FDI_TX[7] Y6FDI_TX[7]* Y5

R322 24.9R/1%

R358 X_3K

C80X_100p/16XC80X_100p/16X

R1X_1KR1%0402R1X_1KR1%0402

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DDR3_DRAMRST#

MEM_MA_ADD12MEM_MA_ADD7MEM_MA_ADD4

MEM_MA_ADD11

MEM_MA_ADD1

MEM_MA_ADD8MEM_MA_ADD5MEM_MA_ADD2MEM_MA_ADD0

MEM_MA_ADD10

MEM_MA_ADD14MEM_MA_ADD9

MEM_MA_CAS_LMEM_MA_WE_L

MEM_MA_DQS_L4MEM_MA_DQS_H4MEM_MA_DQS_H5MEM_MA_DQS_L5

MEM_MA_DM7

MEM_MA_DQS_L7MEM_MA_DQS_H7

MEM_MA_DM4MEM_MA_DM1

MEM_MA_DQS_H0MEM_MA_DQS_L0

MEM_MA_DM6

MEM_MA_DATA57

MEM_MA_DATA63

MEM_MA_DATA56

MEM_MA_DATA62MEM_MA_DATA59

MEM_MA_DATA47MEM_MA_DATA45MEM_MA_DATA43

MEM_MA_DATA31

MEM_MA_DATA5

MEM_MA_DATA1MEM_MA_DATA3MEM_MA_DATA6MEM_MA_DATA4

MEM_MA_DATA39

MEM_MA_DATA22

MEM_MA_ADD15

MEM_MB_BANK0MEM_MB_BANK2

MEM_MB_CAS_LMEM_MB_WE_LMEM_MB_ADD12MEM_MB_ADD7MEM_MB_ADD4

MEM_MB_ADD11

MEM_MB_ADD1

MEM_MB_ADD8MEM_MB_ADD5MEM_MB_ADD2MEM_MB_ADD0

MEM_MB_ADD10

MEM_MB_ADD14MEM_MB_ADD9

MEM_MB_ADD15

MEM_MB_CLK_L0MEM_MB_CLK_H0MEM_MB_CLK_L1MEM_MB_CLK_H1

MEM_MB_DM7MEM_MB_DM4MEM_MB_DM1

MEM_MB_DM5MEM_MB_DM2

MEM_MB_DATA2MEM_MB_DATA0

MEM_MB_DATA5

MEM_MB_DATA1MEM_MB_DATA3MEM_MB_DATA6MEM_MB_DATA4

MEM_MB_DATA30MEM_MB_DATA27MEM_MB_DATA24

MEM_MB_DATA31

MEM_MB_DATA55

MEM_MB_DATA22

MEM_MB_DATA39

MEM_MB_DQS_L4MEM_MB_DQS_H4MEM_MB_DQS_H5MEM_MB_DQS_L5

MEM_MB_DQS_L7MEM_MB_DQS_H7

MEM_MB_DQS_H0MEM_MB_DQS_L0

MEM_MB_DQS_H2MEM_MB_DQS_L2MEM_MB_DQS_L1MEM_MB_DQS_H1

MEM_MB_DATA56

MEM_MB_DATA62

MEM_MA_CS_L2MEM_MA_CS_L0MEM_MA_CS_L3

MEM_MA_ODT0

MEM_MA_CKE0MEM_MA_CKE2

MEM_MA_ODT1MEM_MA_CS_L1

MEM_MA_CLK_L2MEM_MA_CLK_H2MEM_MA_CLK_H3MEM_MA_CLK_L3

MEM_MB_CS_L2MEM_MB_CS_L0MEM_MB_CS_L3

MEM_MB_ODT0

MEM_MB_CKE0MEM_MB_CKE2

MEM_MB_ODT1MEM_MB_CS_L1

MEM_MB_ODT3

MEM_MB_CLK_L2MEM_MB_CLK_H2MEM_MB_CLK_H3MEM_MB_CLK_L3MEM_MA_ODT3

MEM_MA_DQS_H2 10MEM_MA_DQS_L2 10

MEM_MA_DM1 10

MEM_MA_DQS_L4 10MEM_MA_DQS_H4 10

MEM_MA_DQS_H1 10MEM_MA_DQS_L1 10MEM_MA_DQS_L0 10MEM_MA_DQS_H0 10

MEM_MA_DM5 10MEM_MA_DM7 10MEM_MA_DM3 10

MEM_MA_DQS_L7 10MEM_MA_DQS_H7 10MEM_MA_DM0 10

MEM_MA_DQS_L6 10MEM_MA_DQS_H6 10

MEM_MA_CLK_H1

10

MEM_MA_DQS_H3 10MEM_MA_DQS_L3 10

MEM_MB_BANK1

11MEM_MB_BANK011

MEM_MB_CAS_L

11MEM_MB_WE_L11

MEM_MB_RAS_L11

MEM_MB_DATA[63 0] 11

MEM_MB_ADD[15 0]

11

MEM_MB_CLK_H111

MEM_MB_CLK_L111

MEM_MB_CLK_H011

MEM_MB_CLK_L011

MEM_MB_DM1 11

MEM_MB_DM5 11MEM_MB_DM7 11MEM_MB_DM3 11MEM_MB_DM0 11

MEM_MB_DQS_L5 11MEM_MB_DQS_H5 11

MEM_MB_DQS_H2 11MEM_MB_DQS_L2 11

MEM_MB_DQS_L4 11MEM_MB_DQS_H4 11

MEM_MB_DQS_H1 11MEM_MB_DQS_L1 11MEM_MB_DQS_L0 11MEM_MB_DQS_H0 11

MEM_MB_DQS_L7 11MEM_MB_DQS_H7 11MEM_MB_DQS_L6 11MEM_MB_DQS_H6 11

MEM_MB_DQS_H3 11MEM_MB_DQS_L3 11

MEM_MB_CKE211

MEM_MB_ODT111

MEM_MB_CKE311

MEM_MB_ODT211

MEM_MB_CS_L111

MEM_MB_ODT311

MEM_MB_ODT011

MEM_MB_CS_L211

MEM_MB_CS_L311

MEM_MB_CKE011

MEM_MB_CKE111

MEM_MB_CLK_H311

MEM_MB_CLK_L311

MEM_MB_CLK_L211

MEM_MB_CLK_H211

CPU1B

2 OF 12 DDR_B

SB_DM[0] AE4

SB_DQ[0] AD7SB_DQ[1] AD6SB_DQ[2] AH8SB_DQ[3] AJ8SB_DQ[4] AC7SB_DQ[5] AC6SB_DQ[6] AF5SB_DQ[7] AE6

SB_DQS[1] AH6SB_DQS[1]* AJ5

SB_DM[1] AH4

SB_DQ[8] AG5SB_DQ[9] AH7SB_DQ[10] AK6SB_DQ[11] AL4SB_DQ[12] AG6SB_DQ[13] AG4SB_DQ[14] AJ7SB_DQ[15] AK7

SB_DQS[2] AN6SB_DQS[2]* AM6

SB_DM[2] AM7

SB_DQ[16] AL6SB_DQ[17] AN5SB_DQ[18] AP6SB_DQ[19] AR5SB_DQ[20] AL5SB_DQ[21] AM4SB_DQ[22] AN7SB_DQ[23] AP5

SB_DQS[3] AR8SB_DQS[3]* AP8

SB_DM[3] AT7

SB_DQ[24] AT6SB_DQ[25] AR7SB_DQ[26] AR9SB_DQ[27] AM8SB_DQ[28] AN8SB_DQ[29] AR6SB_DQ[30] AL8SB_DQ[31] AT9

SB_DQS[4] AT25SB_DQS[4]* AR24

SB_DM[4] AN24

SB_DQ[32] AN23SB_DQ[33] AP23SB_DQ[34] AR25SB_DQ[35] AR26SB_DQ[36] AT23SB_DQ[37] AP22SB_DQ[38] AP25SB_DQ[39] AT26

SB_DQS[5] AP32SB_DQS[5]* AR32

SB_DM[5] AN32

SB_DQ[40] AT32SB_DQ[41] AP31SB_DQ[42] AR33SB_DQ[43] AM32SB_DQ[44] AT31SB_DQ[45] AR31SB_DQ[46] AR34SB_DQ[47] AT33

SB_DQS[6] AR36SB_DQS[6]* AR37

SB_DM[6] AM33

SB_DQ[48] AR35SB_DQ[49] AT36SB_DQ[50] AN33SB_DQ[51] AP36SB_DQ[52] AP34SB_DQ[53] AT35SB_DQ[54] AN34SB_DQ[55] AP37

SB_DQS[7] AL37SB_DQS[7]* AM36

SB_DM[7] AK35

SB_DQ[56] AL35SB_DQ[57] AM35SB_DQ[58] AJ36SB_DQ[59] AJ37SB_DQ[60] AN35SB_DQ[61] AM34SB_DQ[62] AJ35SB_DQ[63] AL36

CPU1A

1 OF 12 DDR_A

SA_DM[0] AJ2

SA_DQ[0] AH1SA_DQ[1] AJ4SA_DQ[2] AL2SA_DQ[3] AL1SA_DQ[4] AG2SA_DQ[5] AH2SA_DQ[6] AK1SA_DQ[7] AK2

SA_DQS[1] AP2SA_DQS[1]* AP3

SA_DM[1] AN1

SA_DQ[8] AN3SA_DQ[9] AN2SA_DQ[10] AR3SA_DQ[11] AR2SA_DQ[12] AM3SA_DQ[13] AM2SA_DQ[14] AP1SA_DQ[15] AR4

SA_DQS[2] AU4SA_DQS[2]* AU3

SA_DM[2] AU1

SA_DQ[16] AT4SA_DQ[17] AU2SA_DQ[18] AW3SA_DQ[19] AW4SA_DQ[20] AT3SA_DQ[21] AT1SA_DQ[22] AV2SA_DQ[23] AV4

SA_DQS[3] AY6SA_DQS[3]* AW6

SA_DM[3] AV6

SA_DQ[24] AW5SA_DQ[25] AY5SA_DQ[26] AU8SA_DQ[27] AY8SA_DQ[28] AU5SA_DQ[29] AV5SA_DQ[30] AV7SA_DQ[31] AW7

SA_DQS[4] AR28SA_DQS[4]* AT29

SA_DM[4] AN29

SA_DQ[32] AN27SA_DQ[33] AT28SA_DQ[34] AP28SA_DQ[35] AP30SA_DQ[36] AN26SA_DQ[37] AR27SA_DQ[38] AR29SA_DQ[39] AN30

SA_DQS[5] AV32SA_DQS[5]* AW32

SA_DM[5] AW31

SA_DQ[40] AU30SA_DQ[41] AU31SA_DQ[42] AV33SA_DQ[43] AU34SA_DQ[44] AV30SA_DQ[45] AW30SA_DQ[46] AU33SA_DQ[47] AW33

SA_DQS[6] AW36SA_DQS[6]* AV35

SA_DM[6] AU35

SA_DQ[48] AW35SA_DQ[49] AY35SA_DQ[50] AV37SA_DQ[51] AU37SA_DQ[52] AY34SA_DQ[53] AW34SA_DQ[54] AV36SA_DQ[55] AW37

SA_DQS[7] AR39SA_DQS[7]* AR38

SA_DM[7] AT38

SA_DQ[56] AT39SA_DQ[57] AT40SA_DQ[58] AN38SA_DQ[59] AN39SA_DQ[60] AU38SA_DQ[61] AU39SA_DQ[62] AP39SA_DQ[63] AP40

Q482N3904Q482N3904B

R268 470RR268 470R

Q442N3904Q442N3904B

R269 470RR269 470R

R270

R261X_0RR261X_0R

C180X_0.1u/16XC180X_0.1u/16X

R262

R260

R258 X_0RR258 X_0R

Q452N3904Q452N3904B

Trang 8

VCC1_8

VCC_DDRGPU_CORE

Sheet ofDate:

CPU SOCKET CAVITY CAPS

7 OF 12

POWERCPU1G

8 OF 12

CPU1H

CPU POWER

VTT_65 V8VTT_66 AB7

9 OF 12

CPU1I

CPU POWER

6 OF 12

CPU1F

CPU POWER

VCC H35VCC H37VCC H38VCC H40VCC J18

VCC J19VCC J21VCC J22VCC J24VCC J25

VCC K17VCC K18VCC K20VCC K21VCC K23

VCC K39

VCC L17VCC L19VCC L20VCC L22

VCC L23

VCC L25VCC L26VCC L28VCC L29

VCC L31

VCC L32VCC L34VCC L35VCC L37VCC L38

VCC L40VCC M17VCC M19VCC M21VCC M22

VCC M24VCC M25VCC M27VCC M28VCC M30

VCC M33VCC M34VCC M36VCC M37VCC M39

VCC M40VCC N33VCC N35VCC N36VCC N38

VCC N39VCC P33VCC P34VCC P35VCC P36

VCC P37VCC P38VCC P39VCC P40VCC R33

VCC R34VCC R35VCC R36VCC R37VCC R38

VCC R39VCC R40

Trang 9

Sheet ofDate:

FOLLOW DDR3 DIMM VREFDQ Platform Design Guide Change Option 3

close to DIMM

NOTE:R310,R316 STUFFED,IF DDR3 DIMM VREFDQ OPTION 2 UNSTUFFED.

FOLLOW WW11, 18 2009.

Havendale and Clarkdale must stuff.

Channel A and B Output DDR3 DIMM DQ Reference Voltage NOTE: This signal is reserved for possible future use, and may not be driven on initial steppings Refer to the Platform Design Guide for DIMM DQ VREF implementation details.

stuff or unstuff ?????

R320 X_0RR320 X_0RR323 X_0RR323 X_0R

VSS W37VSS W38VSS Y7VSS_NCTF B39

10 OF 12CPU1J

VSS AP7VSS AP9VSS AR1VSS AR20VSS AR23

VSS AR40VSS AT12VSS AT14VSS AT16VSS AT2

VSS AT24VSS AT27VSS AT30VSS AR30VSS AT34

VSS AT37VSS AT5VSS AU32VSS AT8VSS AV3

VSS AV31VSS AV34VSS AU36VSS AU6VSS AY33

VSS AY36VSS AY4VSS AY7VSS B16VSS B24

VSS B27VSS B30VSS B33VSS B36VSS B7

VSS B9

VSS C13VSS C16VSS C19VSS C22

VSS C26

VSS C29VSS C32VSS C35VSS C38

VSS C5

VSS D10VSS D12VSS D13VSS D16VSS D19

VSS D8VSS E13VSS E16VSS E19VSS E21

VSS E24VSS E27VSS E3VSS E30VSS E33

VSS E36VSS E39VSS E4VSS F11VSS F13

VSS F16VSS F2VSS F20VSS F23VSS F26

VSS F29VSS F32VSS F35VSS F38VSS F8

Trang 10

MEM_MA_ADD14

MEM_MA_DM6

MEM_MA_DM0

MEM_MA_ADD4

MEM_MA_DM1

MEM_MA_DM3MEM_MA_ADD9

MEM_MA_DM5

MEM_MA_DM4

MEM_MA_ADD2

MEM_MA_ADD0

VREF_DQ_A

MEM_MA_CLK_H0MEM_MA_CLK_L0

MEM_MA_BANK0MEM_MA_BANK2

SMBCLK_DDRSMBDATA_DDR

MEM_MA_CKE1

VREF_CA_A

MEM_MA_ODT2MEM_MA_DATA59

MEM_MA_DATA47

MEM_MA_DATA60

MEM_MA_DATA50

MEM_MA_DATA57

MEM_MA_DATA9

MEM_MA_DATA61

MEM_MA_DATA33

MEM_MA_DATA48

MEM_MA_DATA8

MEM_MA_DATA39

MEM_MA_DATA5

MEM_MA_DATA28

MEM_MA_DATA16

MEM_MA_DATA24

MEM_MA_DATA2

MEM_MA_DATA17

MEM_MA_DATA13

MEM_MA_DATA25

MEM_MA_DATA35

MEM_MA_DATA15

MEM_MA_DATA62MEM_MA_DATA54MEM_MA_DATA43MEM_MA_DATA32MEM_MA_DATA20

MEM_MA_DATA45

MEM_MA_DQS_H0MEM_MA_DQS_L1MEM_MA_DQS_H3

MEM_MA_DQS_H1MEM_MA_DQS_H2MEM_MA_DQS_L0

MEM_MA_DQS_H7MEM_MA_DQS_L6MEM_MA_DQS_H5MEM_MA_DQS_H6MEM_MA_DQS_L4

MEM_MA_DQS_L7MEM_MA_DQS_L5MEM_MA_DQS_L3

MEM_MA_WE_LMEM_MA_RAS_LMEM_MA_DATA[63 0]

MEM_MA_BANK0MEM_MA_BANK2

MEM_MA_CS_L2MEM_MA_CS_L0

SMBCLKSMBDATA

MEM_MA_DATA59

MEM_MA_DATA47

MEM_MA_DATA60

MEM_MA_DATA50

MEM_MA_DATA57

MEM_MA_DATA9

MEM_MA_DATA61

MEM_MA_DATA33

MEM_MA_DATA48

MEM_MA_DATA8

MEM_MA_DATA39

MEM_MA_DATA5

MEM_MA_DATA28

MEM_MA_DATA16

MEM_MA_DATA24

MEM_MA_DATA2

MEM_MA_DATA17

MEM_MA_DATA13

MEM_MA_DATA25

MEM_MA_DATA35

MEM_MA_DATA15

MEM_MA_DATA62MEM_MA_DATA54MEM_MA_DATA43MEM_MA_DATA32MEM_MA_DATA20

MEM_MA_DATA45

MEM_MA_ADD12

MEM_MA_ADD5

MEM_MA_ADD9

MEM_MA_DQS_H0MEM_MA_DQS_L1MEM_MA_DQS_H3

MEM_MA_DQS_H1MEM_MA_DQS_H2MEM_MA_DQS_L0

MEM_MA_DQS_H7MEM_MA_DQS_L6MEM_MA_DQS_H5MEM_MA_DQS_H6MEM_MA_DQS_L4

MEM_MA_DQS_L7MEM_MA_DQS_L5MEM_MA_DQS_L3

MEM_MA_DM7

MEM_MA_DM2

MEM_MA_DM6

MEM_MA_DM3

DDR3_DRAMRST#A

MEM_MA_WE_LMEM_MA_RAS_L

VREF_CA_BVREF_CA_A

VREF_CA_AVREF_CA_B

VCC_DDR

VCC_DDRVCC_DDR

VREF_DQ_A

VCC3

VREF_CA_A

MEM_MA_CKE0 7MEM_MA_CS_L0 7MEM_MA_ODT0 7MEM_MA_CKE1 7

MEM_MA_CLK_H0 7MEM_MA_CLK_H1 7MEM_MA_CLK_L0 7

MEM_MA_DATA[63 0]

7

MEM_MA_CLK_L1 7

MEM_MA_WE_L 7MEM_MA_BANK0 7

MEM_MA_CAS_L 7MEM_MA_BANK1 7

DDR3_DRAMRST#A 7

MEM_MA_ODT3 7

MEM_MA_CLK_H3 7MEM_MA_ODT2 7

MEM_MA_CLK_L2 7MEM_MA_CLK_H2 7MEM_MA_CKE2 7

MEM_MA_CLK_L3 7MEM_MA_CS_L2 7

SMBDATA_DDR11SMBCLK_DDR11

MEM_MA_DQS_H0 7MEM_MA_DQS_L0 7MEM_MA_DQS_L1 7MEM_MA_DQS_H1 7MEM_MA_DQS_L2 7MEM_MA_DQS_H2 7MEM_MA_DQS_L3 7MEM_MA_DQS_H3 7MEM_MA_DQS_L4 7MEM_MA_DQS_H4 7MEM_MA_DQS_L5 7MEM_MA_DQS_H5 7MEM_MA_DQS_L6 7MEM_MA_DQS_H6 7MEM_MA_DQS_L7 7MEM_MA_DQS_H7 7

SMBCLK 11,12,15,19,21,30,35,36SMBDATA 11,12,15,19,21,30,35,36SMBCLK

11,12,15,19,21,30,35,36

SMBDATA11,12,15,19,21,30,35,36

MEM_MA_ADD[15 0] 7

MEM_MA_DM1 7

MEM_MA_DM6 7MEM_MA_DM2 7

MEM_MA_DM7 7MEM_MA_DM3 7MEM_MA_DM0 7

MEM_MA_DM4 7MEM_MA_DM5 7

DIMM2(CHANNEL-A) ADDRESS = 0:1 [SA1:SA0]

0x66:RH=18K,RL=13K

2.083325V

UPI VOLTAGE CONSOLE(2)

UPI VOLTAGE CONSOLE

Place close to DIMM1 with DIMM2

UPI VOLTAGE CONSOLE

Place close to DIMM1

VSS47

VSS89

X_UP6262AMA8_SOT23-8-RH

U11VCC1BUS_SEL2

GND

3 SDA

4 SCL5

C102X_C2.2u6.3YC102X_C2.2u6.3Y

C116C0.1u16Y0402C116C0.1u16Y0402C246

C0.1u16Y0402C246C0.1u16Y0402

C169 C220p10X

R175 33R0402R175 33R0402

C30 C2.2u6.3Y

C135C0.1u16Y0402C135C0.1u16Y0402

R246X_18KR1%0402R246X_18KR1%0402

C177 C2.2u6.3Y

R253 X_13KR1%0402R253 X_13KR1%0402

VSS47

VSS89

Trang 11

MEM_MB_CLK_L1MEM_MB_CLK_H1MEM_MB_CLK_L0MEM_MB_CLK_H0MEM_MB_CAS_LMEM_MB_WE_LMEM_MB_RAS_L

MEM_MB_ODT0

MEM_MB_CS_L1MEM_MB_BANK2MEM_MB_CS_L0MEM_MB_CKE0

MEM_MB_BANK1MEM_MB_CKE1MEM_MB_ODT1

MEM_MB_DM1

MEM_MB_DM6

MEM_MB_DM7MEM_MB_DM5MEM_MB_DM0MEM_MB_DQS_H6MEM_MB_DQS_H4MEM_MB_DQS_H2MEM_MB_DQS_L3

MEM_MB_DQS_L7

MEM_MB_DQS_H0

MEM_MB_DQS_H7

MEM_MB_DQS_L5MEM_MB_DQS_L6MEM_MB_DQS_H3MEM_MB_DQS_L0

MEM_MB_DQS_L4

MEM_MB_ADD2

MEM_MB_ADD9

MEM_MB_ADD0

MEM_MB_ADD13

MEM_MB_ADD1

MEM_MB_ADD8

MEM_MB_DATA61

MEM_MB_DATA0

DDR3_DRAMRST#B

MEM_MB_DATA61

MEM_MB_DATA0

MEM_MB_ADD9

MEM_MB_ADD0

MEM_MB_ADD13

MEM_MB_ADD1

MEM_MB_ADD8

MEM_MB_DQS_H6MEM_MB_DQS_H4MEM_MB_DQS_H2MEM_MB_DQS_L3

MEM_MB_DQS_L7

MEM_MB_DQS_H0

MEM_MB_DQS_H7

MEM_MB_DQS_L5MEM_MB_DQS_L6MEM_MB_DQS_H3MEM_MB_DQS_L0

MEM_MB_DQS_L4

MEM_MB_DM1

MEM_MB_DM6

MEM_MB_CAS_LMEM_MB_WE_LMEM_MB_RAS_LMEM_MB_BANK2MEM_MB_BANK0

SMBDATASMBCLKV1_8SET

VREF_DQ_BVREF_DQ_A5VDIMM

MEM_MB_DATA[63 0]

7

MEM_MB_DQS_H0 7MEM_MB_DQS_L0 7MEM_MB_DQS_L1 7MEM_MB_DQS_H1 7MEM_MB_DQS_L2 7MEM_MB_DQS_H2 7MEM_MB_DQS_L3 7MEM_MB_DQS_H3 7MEM_MB_DQS_L4 7MEM_MB_DQS_H4 7MEM_MB_DQS_L5 7MEM_MB_DQS_H5 7MEM_MB_DQS_L6 7MEM_MB_DQS_H6 7MEM_MB_DQS_L7 7MEM_MB_DQS_H7 7MEM_MB_ADD[15 0] 7

MEM_MB_CS_L1 7

MEM_MB_ODT0 7MEM_MB_CKE0 7MEM_MB_CS_L0 7

MEM_MB_CAS_L 7MEM_MB_WE_L 7MEM_MB_RAS_L 7MEM_MB_BANK1 7

DDR3_DRAMRST#B 7

MEM_MB_CLK_H1 7MEM_MB_CLK_H0 7MEM_MB_CLK_L1 7MEM_MB_CLK_L0 7

SMBCLK_DDR 10SMBDATA_DDR 10

MEM_MB_ODT3 7

MEM_MB_CLK_H3 7MEM_MB_ODT2 7

MEM_MB_CLK_L2 7MEM_MB_CLK_H2 7MEM_MB_CKE2 7

MEM_MB_CLK_L3 7MEM_MB_CS_L2 7

MEM_MB_DM3 7MEM_MB_DM4 7MEM_MB_DM5 7MEM_MB_DM0 7

MEM_MB_DM6 7MEM_MB_DM1 7

MEM_MB_DM7 7MEM_MB_DM2 7

SMBCLK10,12,15,19,21,30,35,36

SMBDATA10,12,15,19,21,30,35,36

DIMM3(CHANNEL-B) ADDRESS = 1:0 [SA1:SA0]

Place close to DIMM3 with DIMM4

RESET#(Output) : A synchronously forces all registered output LOW when RESET# is LOW This signal can be used during power up to ensure that CKE is LOW and DQs are High-Z.

Vref-DQ : Reference voltage for DQ0 　 DQ63, CB0 　 CB7 and PAR_IN When in single ended mode used for DQS0 　 DQS7.

Vref-CA : Reference voltage for A0-A15, BA0 　 BA2, RAS#, CAS#, WE#, S0#, S01#, CKE0, CKE1, ODT0 and ODT1.

C249C0.1u16Y0402C249C0.1u16Y0402

R420 X_0RR420 X_0R

VSS47

VSS89

C139X_C0.1u16Y0402C139X_C0.1u16Y0402

X_UP6262AMA8U18

X_UP6262AMA8

U18VCC1BUS_SEL2

GND

3 SDA

4 SCL5

VSS47

VSS89

Trang 12

SMBCLKSMBDATA

DOC_1

DOC_0

CLK100M_DMI_N_RCLK100M_DMI_P_R

CLK96M_DOT_N_RCLK96M_DOT_P_R

CK_14P8M_PCH13

SLP_S5#

15,18,30

CLK100M_DMI_P 13

CLKGEN133M_P 13CLKGEN133M_N 13

CLK96M_DOT_N 13CLK96M_DOT_P 13

CLK100M_SATA_P 13

WDT#

18,29,30

SMBCLK10,11,15,19,21,30,35,36

SMBDATA10,11,15,19,21,30,35,36

SIO_GPIO2718

SIO_GPIO2618

Sheet ofDate:

CLOCK GEN STRAPING

OC

DOC_0**:Dynamic Over Clocking pin: real time frequency selection 0: Normal; 1: Frequency will transition to a preprogrammed value in the I2C.

Pin16: 48MHz clock output / 3.3V tolerant input for CPU frequency selection Low voltage threshold inputs, see input electrical characteristics for Vil_FS and Vih_FS values Pin19: 14.318 MHz reference clock./ 3.3V tolerant input for CPU frequency selection Refer to input electrical characteristics for Vil_FS and Vih_FS values.

FS4 FS3 FS2B0b2 FSBB0b1 FSAB0b0 CPU Spread %0

00000

0011

100.00200.00-0.5-0.5

0 1 150 MHz

0 0 166 MHz

OFF=1 ; ON=0

1CPU FREQUENCY0

1

142 MHz1

R612 X_4.7KR612 X_4.7KU29

ICS9LPRS4105BU29

ICS9LPRS4105B

VDDREF

22

X2 21X1 20

24_12M

15

GNDCPU 4VDDSATA

CPUC_LRCPUT_LR 6

5

GNDREF 18VDD25

FB6 X_FB80/8FB6 X_FB80/8

R549 X_4.7KR549 X_4.7K

CP9 X_COPPERCP9 X_COPPER

R627 4.7KR627 4.7K

R547 0R

R506 X_1K/1%

C41410u/10Y/8C41410u/10Y/8

R531 X_1K/1%

R554 0R

C3750.1u/16XC3750.1u/16X

R595 X_4.7KR595 X_4.7K

R505 0RR505 0R

C4110.1u/16XC4110.1u/16X

R581 0R

C397 22p/50N

C3860.1u/16XC3860.1u/16X

R611 0R

Y214.318MHZ16P_DY214.318MHZ16P_D

C4080.1u/16XC4080.1u/16X

R535 X_0RR535 X_0R

R610 0R

C394 22p/50N

C3760.1u/16XC3760.1u/16X

R536 X_0RR536 X_0R

C413 X_10p/50N

R524X_4.7KR524X_4.7K

R5278.2K/4R5278.2K/4

C3870.1u/16XC3870.1u/16X

R5414.7KR5414.7K

R608 0R

R548 X_4.7KR548 X_4.7K

R609 33RR609 33R

C37410u/10Y/8C37410u/10Y/8

R514 0RR514 0R

R618 0RR613 1K/1%

R613 1K/1%

R5268.2K/4R5268.2K/4

R556 0RR556 0R

C4020.1u/16XC4020.1u/16X

R586 0R

R601 4.7KR601 4.7K

R568 0RR568 0R

FB4 X_FB80/8FB4 X_FB80/8

Trang 13

DMI_TX1DMI_TX1#

DMI_TX0DMI_TX0#

DMI_RX3#

DMI_RX2DMI_RX2#

DMI_RX1DMI_RX1#

DMI_RX0DMI_RX0#

PREQ#3

PARPERR#

PGNT#2

PREQ#2PGNT#1

PREQ#1

AD24AD27

AD21

AD1AD10

AD4AD13

AD30

AD22

AD3AD15

C_BE#0

AD11AD8AD5AD2

AD29

AD[31 0]

AD26AD23AD20AD17AD14

C_BE#3

PREQ#0PIRQ#APIRQ#CPCI_RST#

PIRQ#DSTOP#

USB2-USB3+

USB3-USB4+

USB4-USB5+

USB5-USB0+

USB0-USB1+

USB1-OC#1OC#2OC#3

CLK96M_DOT_P

CLK100M_DMI_PCLK100M_DMI_NCLKGEN133M_P

CK_14P8M_PCHCLK100M_SATA_P

CK_48M_SIOA

CK_PEX1-2P

CK_JMB368_DPCK_JMB368_DNCK_PEX1-3P

OC#4_COC#1_C

OC#0_C

CK_DMI_PCLKOUT_DMI_P

USB_OC#_7OC#3

CLK33M_PCI4TPM_CLKCK_P_33M_SIOCK_P_33M_S1CK_48M_SIO

JMB368_TX_CJMB368_TX#_C

OC#5_COC#5

OC#6

USB10+

USB10-USB11+

USB11-USB8+

USB8-USB9+

USB9-USB12+

TPM_CLK29

CLK100M_DMI_N12

CLK96M_DOT_P12

CLK96M_DOT_N12

CLKGEN133M_P12

CLKGEN133M_N12

CK_14P8M_PCH12

CLK100M_SATA_P12

CLK100M_SATA_N12

LANCLK0 21LANCLK0# 21

CK_P_33M_S120CK_P_33M_SIO18

CK_DMI_N 6CK_DMI_P 6

CK_48M_SIO18

CK_JMB368_DP 23CK_PEX1-3P 19CK_PEX1-3N 19

Sheet ofDate:

0 0 0 1 1 1 unuse

For EMI

PCI Express port 7 and 8

are not available for the H55,

DCI:Must stuff 25M crystal when use vga

USB port 6 and 7 are not available for the H55,

R663

R634 39RR634 39R

C433 X_10p/50N

R509 0RR509 0R

R633 39RR633 39R

R7224.7KR7224.7K

C425 X_10p/50N

3 OF 9

IBEXPEAK_A

CLOCK CLOCK_IN

CLKOUT_PCIE_P<6> V4CLKOUT_PCIE_N<6> U4CLKOUT_PCIE_P<5> Y9CLKOUT_PCIE_N<5> Y8CLKOUT_PCIE_P<4> P6

CLKOUT_PCIE_N<4> P7CLKOUT_PCIE_P<3> M10CLKOUT_PCIE_N<3> M9CLKOUT_PCIE_P<2> M7CLKOUT_PCIE_N<2> M6

CLKOUT_PCIE_P<1> T9CLKOUT_PCIE_N<1> T10CLKOUT_PCIE_P<0> W1CLKOUT_PCIE_N<0> V2CLKOUT_PEG_A_P Y7CLKOUT_PEG_A_N Y6CLKOUT_PEG_B_P V8CLKOUT_PEG_B_N V7CLKOUT_DP_P_CLKOUT_HCLK1_0P H38CLKOUT_DP_N_CLKOUT_HCLK1_0N H37

2 OF 9

PCI

PCH1BIBEXPEAK_A

AD<25> AV10AD<24> AL4AD<23> AT2AD<22> AL2AD<21> AT5

AD<20> AL10AD<19> AY8AD<18> AM4AD<17> AM11AD<16> AM2

AD<15> AN3AD<14> AU1AD<13> AP2AD<12> AU3AD<11> AR8

AD<10> AW7AD<9> AR3AD<8> AW9AD<7> AV7AD<6> AR9

AD<5> AV8AD<4> AP9AD<3> AY10AD<2> AU6AD<1> AP11

AD<0> AT9C_BE_N<3> AW10C_BE_N<2> AP5

C_BE_N<1> AY6C_BE_N<0> AV3

R765 0R

R664 39RR664 39R

R510 0RR510 0R

RN260R/8P4RRN260R/8P4R1526

R762

C469 X_0.1u/16X

R7644.7KR7644.7K

TP5

C468 X_0.1u/16X

C265 0.1u/10X

Y425MHzY425MHz

C465 X_0.1u/16X

R520 0RR520 0RC350 0.1u/10X

R6351M/1%/6R6351M/1%/6

USBP11N AR20USBP10P AV18USBP10N AV17USBP9P AN20USBP9N AM20

USBP8P AY18USBP8N BA19USBP7P AW19USBP7N AV20USBP6P AL20

USBP6N AK20USBP5P AW21USBP5N AY20USBP4P AV22USBP4N AV21

USBP3P AP22USBP3N AR22USBP2P AY22USBP2N AW23USBP1P AY24

USBP1N BA23USBP0P AY25USBP0N AW25OC7_N_GPIO14 AM30OC6_N_GPIO10 AL30OC5_N_GPIO9 AL28OC4_N_GPIO43 AP31OC3_N_GPIO42 AP30

OC2_N_GPIO41 AK28OC1_N_GPIO40 AT30OC0_N_GPIO59 AT31

USBRBIAS AV15USBRBIAS_N AY15

DMI_IRCOMP D21

DMI_ZCOMP C21

R576 0RR576 0R

C424 X_10p/50N

R842 0R

R763 0RTP52

Trang 14

FDI_INTFDI_LSYNC0FDI_LSYNC1

SATA_LED_SB#

FDI_TX0FDI_TX0#

FDI_TX1FDI_TX1#

FDI_TX2FDI_TX2#

FDI_TX3FDI_TX3#

FDI_TX4FDI_TX4#

FDI_TX5FDI_TX5#

FDI_TX6#

FDI_TX6FDI_TX7FDI_TX7#

VGA_HSYNCVGA_VSYNC

RGB_DDC_CLKRGB_DDC_DATA

DVI_DDPB_HPD

PCH_GPIO38

PCH_GPIO48

A20GATEINIT3_3V#

KBRST#

SERIRQ

H_THERMTRIP#

H_PECIPM_SYNCPCH_THERMTRIP#

SATA_TX#5

SATA_RX#5SATA_RX5SATA_TX5

SATA_RX#4SATA_TX#4SATA_RX4SATA_TX4

SATA_TX#0SATA_RX#0

SATA_TX#1

SATA_TX0SATA_RX#1SATA_RX1SATA_TX1SATA_RX0

SATA_RX#2SATA_TX#2

SATA_TX#3

SATA_RX2SATA_RX#3SATA_RX3SATA_TX3SATA_TX2

SCLOCK

SATA_LED_SB#

PCH_INTVRMEM

SATA0GP_PUSATA5GP_PU

SATA3GP_PU

DVI_DDPB_TXP0DVI_DDPB_TXN0

DVI_DDPB_TXP2DVI_DDPB_TXN2TACH3_GPIO7

SATA3GP_PUTACH3_GPIO7

PCH_THERMTRIP#

DVI_DDPB_CTRLCLKDVI_DDPB_CTRLDATA

SERIRQPCH_GPIO48PCH_GPIO38

SST

HDMI_DDPD_HPDDVI_DDPB_HPD

SATA_COMP

PCH_INTVRMEMCHIP_PWGD

HDMI_DDPD_HPD

HDMI_DDPD_TX0_PHDMI_DDPD_TX0_N

HDMI_DDPD_CLK_N

HDMI_DDPD_TX1_N

HDMI_DDPD_CLK_P

HDMI_DDPD_TX1_PHDMI_DDPD_TX2_PHDMI_DDPD_TX2_N

HDMI_DDPD_CTRLCLKHDMI_DDPD_CTRLDATA

HDMI_DDPD_CTRLDATAHDMI_DDPD_CTRLCLKSIO_TRIP#

VCC3

PCH_1P05PCH_1P05

CPU_VTT

VCC3

VBATVCC3

FDI_TX0 6FDI_TX0# 6

FDI_TX1 6FDI_TX1# 6

FDI_TX2 6FDI_TX2# 6FDI_TX3# 6FDI_TX3 6

FDI_TX4 6FDI_TX4# 6

FDI_TX5 6FDI_TX5# 6

FDI_TX6 6FDI_TX6# 6FDI_TX7# 6FDI_TX7 6

FDI_LSYNC1 6FDI_FSYNC1 6FDI_FSYNC0 6FDI_INT 6

HSYNC 24VSYNC 24VGA_R 24

VGA_G 24VGA_B 24

RGB_DDC_CLK 24RGB_DDC_DATA 24

DVI_DDPB_CLK_P25

DVI_DDPB_CLK_N25

DVI_DDPB_TXP125

DVI_DDPB_TXN125

DVI_DDPB_CTRLCLK 25DVI_DDPB_CTRLDATA 25

DVI_DDPB_HPD25

CHIP_PWGD

15,30

KBRST# 18SERIRQ 18,29INIT3_3V# 15

PM_SYNC 6A20GATE 18SATA_LED_SB# 29

SATA_RX4 27

SATA_RX5 27

SATA_TX4 27SATA_RX#5 27SATA_RX#4 27SATA_TX#0 27

SATA_TX5 27

SATA_TX0 27SATA_TX#1 27

SATA_RX0 27

SATA_RX1 27SATA_TX1 27

SATA_RX#0 27

SATA_RX#1 27

SATA_TX#2 27

SATA_TX#3 27SATA_TX2 27SATA_RX#2 27

DVI_DDPB_TXP025

DVI_DDPB_TXN025

DVI_DDPB_TXP225

DVI_DDPB_TXN225

SERIRQ18,29

HDMI_DDPD_HPD26

HDMI_DDPD_TX0_P26

HDMI_DDPD_TX0_N26

HDMI_DDPD_CLK_P26

HDMI_DDPD_CLK_N26

HDMI_DDPD_TX1_P26

HDMI_DDPD_TX1_N26

HDMI_DDPD_TX2_P26

HDMI_DDPD_TX2_N26

HDMI_DDPD_CTRLCLK 26HDMI_DDPD_CTRLDATA 26

SIO_TRIP#

6,18

Sheet ofDate:

2007/07/10 Added DP support DVI dongle function circuit HDMI_DET: HDMI->Hi,DP-> Low

VGA DACSET RESISTORS CLOSE

GPIO for BIOS use

HPD:hot plug detect

DVI

Demo board 390Kohm

a weak internal pull-down.

H:Port B is enabled NC:Port B is Disabled.

GPIO38

GPIO39

GPIO48

HHSTD010

LH

BOM

GPIO

HH

OPT:B/C OPT:D 1.1 1.1 1.1L

LL

HHL

LH

L

LHH

HL

OPT:B H55EB6

OPT:EOPT:A/D

R6321.02K/1%R6321.02K/1%

FDI_RXP<6> B32FDI_RXN<6> A33FDI_RXP<5> B31FDI_RXN<5> C30FDI_RXP<4> J31

FDI_RXN<4> K31FDI_RXP<3> G31FDI_RXN<3> F31FDI_RXP<2> D32FDI_RXN<2> D31

FDI_RXP<1> G30FDI_RXN<1> H30FDI_RXP<0> J30FDI_RXN<0> K30FDI_LSYNC<1> D35FDI_LSYNC<0> C35FDI_FSYNC<1> E36

FDI_FSYNC<0> E34FDI_INT B36DDPC_CTRLCLK AB10

DDPC_CTRLDATA AB11DDPD_CTRLCLK AB7DDPD_CTRLDATA AB9SDVO_CTRLCLK AB13SDVO_CTRLDATA AB12CRT_HSYNC AD4CRT_VSYNC AD3

CRT_RED AC1CRT_GREEN AC3CRT_BLUE AB2CRT_IRTN AB4

CRT_DDC_CLK AG2CRT_DDC_DATA AG4DAC_IREF AE2

R631 10KR631 10K

R658 10K/1%

R498TP44

R622 33RR622 33R

R5782.2KR5782.2K

R629 X_8.2KRR629 X_8.2KR

R467

R621 33RR621 33R

R532 X_1KR532 X_1K

R499

TP14

R490 0RR490 0R

R672 10KR672 10K

TP56

R667 10KR667 10KTP57

R697 10K/1%

TP8

R8162.2KR8162.2K

R591 37.4R/1%

R476TP50

SATA3TXN AB37SATA2TXP AB32SATA2TXN AB31

SATA1TXP AB35SATA1TXN AB36SATA0TXP V38SATA0TXN U38

SATA5RXP AF34SATA5RXN AF35

SATA4RXP AE40SATA4RXN AF41SATA3RXP AC39SATA3RXN AC41SATA2RXP AD35SATA2RXN AD36SATA1RXP Y37

SATA1RXN Y38SATA0RXP V40SATA0RXN W41

SATA5GP/GPIO49/TEMP_ALERT# AG40SATA4GP/GPIO16/CLK_CFG_SEL1 AH39SATA3GP_GPIO37 AR38SATA2GP_GPIO36 AK39

SATA1GP_GPIO19 AH38SATA0GP_GPIO21 AJ37SATAICOMPI T39

SATAICOMPO T41

SATALED_N AN39

A20GATE AG37

INIT3_3V_N AR39RCIN_N AM40SERIRQ AL40THRMTRIP_N C38PECI D36

SST AN31PMSYNCH C37

R488

R732 10K/1%

R8172.2KR8172.2K

R700

0RR700

0R

R5712.2KR5712.2K

R491 51RR491 51R

TP49

TP47

R673 X_8.2KRR673 X_8.2KR

R5450RR5450R

R497 0RR497 0R

TP10

TP45

R739 X_390KR739 X_390K

TP43

R668 10KR668 10K

TP42

R666 X_8.2KRR666 X_8.2KR

TP11

R719 390KR719 390KTP46

Trang 15

SLP_M#

PCH_GP57

PCH_JTAGTDO

SUSCLKSPI_WP#

PCH_JTAGTMS

SPI_MISO

PWRBTN#

PCH_GPIO8SIO_PME#

SRTCRST#

SPI_CLK_PCH SMBDATASMBCLK

PCH_GPI46

PCH_SML1DATAPCH_SMBALERT#

PCIECLKRQ4#

LAN_RST#

PCH_GPIO35LDRQ1#

LPC_DRQ#0BM_BUSY#

SIO_PME#

PCH_GP72SMLINK0_CLKSMLINK0_DATAPCH_SMBALERT#

RI#

WAKE#

SUS_PWR_ACK

SMBDATASMBCLK

PCIECLKREQ2#

PCH_GPIO18

RSMRST#

PCH_SML1DATAPCH_SML1CLKPCH_SML1ALERT#

MEM_PWRGD

SPI_MOSI_FSPI_MISO SPI_CS0_F#

PCH_GPIO28SLP_LAN#

SLP_LAN#

STP_PCI#

PCH_GPI45PCH_GPI46PEG_A_CLKRQPCH_GP57

AZ_SYNC_RAZ_RST#_R

PCH_GPIO33

AZ_BITCLK

PCH_JTAGTDIPCH_JTAGTDO

PCIECLKRQ3#

PCH_MEM_PWRGDBAT_IO

5VSB

VCC_DDR

VCC3VCC3

PGNT#313

INIT3_3V#

14

SPKR29

NVR_CLE17

AZ_SYNC22

AZ_SDOUT22

NVR_ALE17

PCH_SML1CLK 18PCH_SML1DATA 18

DMI AC coupling full voltage mode when pull-low

Configurable CPU output stronger if low

Signal has a weak internal pull-low

Signal has a weak internal pull-up

Topblock swap override when pull-lowSignal has a weak internal pull-up

GPIO8(CPU_SMI#) do not pull low(check list) Integrated clock chip enable when pull-low

GPIO27 do not pull low)check list)

OD PLL VR enable when pull-Hi

OD PLL VR SUPPLY SEL1.5V SUPPLY WHEN HI

DMI TERMINATION VOLTAGE DC COUP: TX/RX

TO VCC IS SAMPLED HISignal has a weak internal pull-low

Strap: No Reboot: The signal has a weak internalpull-down.To enable No Reboot pull-up to Vcc3_3 via a 1 k resistor

DANBURY (ANTI-THEFT) TECHNOLOGY ENABLE WHEN HI

NAND VCCQ PWR WELL POWERED BY CORE WHEN LOW;EPW WHEN HI

Signal has a weak internal pull-low

Demo board 1.0 change to highDEFENSIVE DESIGN PULL UP FOR SUS_PWR_ACK

SPI FLASH ROM

Close to SPI ROM

Part Number:N31-2051451-H06

Disable ME in Manufacturing Mode (GPIO33 Pull Down 1K)

ITPM_ENB(SPI_MOSI) 0= Disable iTPM(floating) 1=Enable iTPM

JBAT1 Clear CMOS

2 - 3 Clear CMOSNormalCMOS CLEAR JUMPER

H1X2_BLACK-RH-1JCI1

H1X2_BLACK-RH-11

RN20 X_200R/8P4R/61526

R695 X_10K/1%

D16BAT54CD16BAT54C

Z

D15BAT54CD15BAT54C

Z

R5970RR5970R

R684 10KR684 10K

R686 10KR686 10K

R705 10K/1%

R669 X_4.7KR669 X_4.7K

R730 X_10KR730 X_10K

R731 X_10KR731 X_10K

C493 10p/50N/6

R659 10KR659 10K

R3411KST/6R3411KST/6

TP13

R7483K/1%

R501 X_10KR501 X_10K

R725 10KR725 10K

R724 10KR724 10K

R557 X_8.2KR557 X_8.2K

R682 X_10KR682 X_10K

R720 X_0RR720 X_0R

R3691K/1%

R712 10KR712 10K

R701 10KR701 10K

R660 10KR660 10K

R340 2KST/6R340 2KST/6

R715 X_8.2KR715 X_8.2K

C388

X_10p/50NC388

X_10p/50N

R726 X_0RR726 X_0R

R7870RR7870R

R628 X_0RR628 X_0R

RN15 X_100R/8P4R1526

TP58

R784 10KR784 10K

R685 X_10KR685 X_10K

R704 10KR704 10KR698 X_4.7K

R512 X_4.7KR512 X_4.7K

R1831.1K/1%

R702 10KR702 10K

R735 X_1KR735 X_1K

JBAT1N41-1030161-H06+N33-RH

1 2 3

R737 10KR737 10KR757 10KR757 10K

JSPI1

H2X5[1]_BLACK-RHJSPI1

R74310K/1%

R734 X_10KR734 X_10K

R736 X_10KR736 X_10K

TP55

R711 X_10KR711 X_10K

RN25 10K/8P4R1526

C466X_0.1u/25YC466X_0.1u/25YR348 1K/1%

R348 1K/1%

R637X_0RR637X_0R

R543 2.2K

R574 0RR574 0R

R742 X_10K/1%

R7861MR7861M

R741 10KR741 10K

C472X_1u/16Y/6C472X_1u/16Y/6

Q65N-2N7002LT1G_SOT23Q65N-2N7002LT1G_SOT23

R745 X_1KR745 X_1K

SPI1

W25X64VSSIG-RHSPI1

W25X64VSSIG-RH

CS1DO2WP3GND4

LDRQ0_NAL12FWH4 / LFRAME#

AR14HDA_SDIN<3>

AN16HDA_SDIN<2>

AU13HDA_SDIN<1>

AP18HDA_SDIN<0>

AV13

HDA_SDOUTAP16HDA_BIT_CLKAW14HDA_SYNCAU15HDA_RST_NAV14PROCPWRGDB38SYS_PWROKAT38PWRBTN_NAK36PWROKAM24DRAMPWROKAW32RI_NAT33WAKE_NAR33INTRUDER_NAN24RSMRST_NAL24LAN_RST_NAY31SYSY_RESET_NAL38SPI_MOSIT34SPI_MISOV30SPI_CS1_NT32SPI_CS0_NV32SPI_CLKV31RTCX1AW30RTCX2BA30RTCRST_NAK24SRTCRST_NAP28

JTAGTCKAK33JTAGTMSAL34JTAGTDIAL36TRST#

R671 10KR671 10K

R710 X_1KR710 X_1K

R676 10KR676 10K

RN17 33R/8P4R

1

5

26

R759 4.7KR759 4.7KR774

10M/6R77410M/6

R6142.2KR6142.2K

TP53

R573 0RR573 0R

R602X_0RR602X_0R

R747 X_0RC487 10p/50N/6

R738 10KR738 10K

EC46SMD10U/10V

R850X_0RR850X_0R

R753 2.7KR753 2.7K

R558 X_4.7KR558 X_4.7K

R560 15RR560 15R

R716 10KR716 10K

R78120K/1%

R544 15R

RN21 10K/8P4R1526

R756 2.2KR756 2.2K

R687 51RR687 51R

R723 2.2KR723 2.2K

R500 X_8.2KR500 X_8.2K

R655 X_10KR655 X_10K

R680 10KR680 10K

R744 X_1KR744 X_1K

R729 X_8.2KR729 X_8.2K

BAT1BAT-2PBAT1BAT-2P

R758 X_10KR758 X_10K

R749 X_1K/1%

R696 X_4.7KR696 X_4.7K

Trang 16

5VREF5VREF_SUS

VCCXCK

VCCPLLVCCA_DPLLB

VCCSUSVCCSSTVRTC_INT

VCCACLK

VCCAPLLEXPVCCSATA_PLL_PCH

VCCFDIPLL

VCCACLKVCCFDIPLL

PCH_1P053VSB

VCC3

+3.3V_DAC

VCC1_8VCC3

PCH_1P05

Sheet ofDate:

has noise issue.

5VREF & 5VREF_SUS Sequencing Circuit

V5REF must be powered up beforeVCC3 or after VCC3 within 0.7V

Also,V5REF must power down after VCC3 or before VCC3 within 0.7V

This rule is also applies to V5REF_SUS and 3VSB

However,the 3VSB is derived from the 5VSB on the power supply

thru a voltage regulator and therefore,they can satisfy the requirement

Near ball AF1

1.748A3.406A

PCH decoupling cap

Demo board 1.1 change

　筿甧

SATA PLL FILTER DMI PLL FILTER

C599 place bottom as short as possibleC602 place TOP as short as possible

one cap place bottom as short as possibleanother place TOP as short as possible

EMIC437 1u/6.3X

VCC1_05_53 V23VCC1_05_52 U26VCC1_05_51 U23VCC1_05_50 U22VCC1_05_49 U20

VCC1_05_48 T27VCC1_05_47 T26VCC1_05_46 T24VCC1_05_45 T23VCC1_05_44 T22

VCC1_05_43 T20VCC1_05_42 P29VCC1_05_41 P27VCC1_05_40 P26VCC1_05_39 N28

VCC1_05_38 M28VCC1_05_37 L28VCC1_05_36 K28VCC1_05_35 J28VCC1_05_34 H28

VCC1_05_33 G28VCC1_05_32 F28VCC1_05_31 E29VCC1_05_30 E27VCC1_05_29 E26

VCC1_05_28 D29

VCC1_05_27 D28VCC1_05_26 D27VCC1_05_25 C28VCC1_05_24 C26

VCC1_05_23 B29

VCC1_05_22 B27VCC1_05_21 AF24VCC1_05_20 AF23VCC1_05_19 AF22

VCC1_05_18 AF20

VCC1_05_17 AF19VCC1_05_16 AE26VCC1_05_15 AE24VCC1_05_14 AE23VCC1_05_13 AE22

VCC1_05_12 AE20VCC1_05_11 AE19VCC1_05_10 AE18VCC1_05_09 AD26VCC1_05_08 AD23

VCC1_05_07 AD20VCC1_05_06 AD18VCC1_05_05 AB26VCC1_05_04 AB24VCC1_05_03 AA24

VCC1_05_02 AA23VCC1_05_01 A28VCC1_05_00 A26

C37010u/6.3X/8C37010u/6.3X/8

C39610u/6.3X/8C39610u/6.3X/8

150Ohm/800mA/0.15Ohm/8FB5150Ohm/800mA/0.15Ohm/8

0.1u/10X

C3810.1u/10XC3810.1u/10X

R459 0RR459 0R

R538 0R/6R538 0R/6

R564 0RR564 0R

Q742N3904Q742N3904B

R528 0RR528 0R

R565 X_0RR565 X_0R

C4630.1u/10XC4630.1u/10X

R530 X_0RR530 X_0R

C567

X_0.1u/10XC567

X_0.1u/10X

Trang 17

Sheet ofDate:

IBEX_0

9 OF 9

IBEXPEAK_APCH1I

NV_DQ9 / NV_IO_9 F36NV_DQ8 / NV_IO_8 M30NV_DQ7 / NV_IO_7 M34NV_DQ6 / NV_IO_6 M36NV_DQ5 / NV_IO_5 L33

NV_DQ4 / NV_IO_4 M35NV_DQ3 / NV_IO_3 P33NV_DQ2 / NV_IO_2 T31NV_DQ1 / NV_IO_1 P35NV_DQ0 / NV_IO_0 T33

NV_CE_N_3 E41NV_CE_N_2 P32NV_CE_N_1 H35NV_CE_N_0 H36

NV_DQS_N<1> F40NV_DQS_N<0> P36NV_ALE J34NV_CLE L35

R51332.4R/1%

VSS_204 L30VSS_203 L31VSS_202 L32VSS_201 L34VSS_200 L8

VSS_199 M11VSS_198 M12VSS_197 M14VSS_196 M33VSS_195 M37

VSS_194 M5VSS_193 M8VSS_192 N14VSS_191 N37VSS_190 N5

VSS_189 P1VSS_188 P11VSS_187 P20VSS_185 P31

VSS_184 P34VSS_183 P4VSS_182 P8VSS_181 R4VSS_180 R5

VSS_179 T11

VSS_178 T16VSS_177 T18VSS_176 T3VSS_175 T35

VSS_174 T5

VSS_173 T8VSS_172 U16VSS_171 U18VSS_170 U2

VSS_169 U24

VSS_168 U27VSS_167 U3VSS_166 U39VSS_165 V12VSS_164 V13

VSS_163 V16VSS_162 V18VSS_161 V19VSS_160 V22VSS_159 V27

VSS_158 V3VSS_157 V33VSS_156 V35VSS_155 V39VSS_154 V6

VSS_153 V9VSS_152 W3VSS_151 W37VSS_150 W39VSS_149 W5

VSS_148 Y10VSS_147 Y13VSS_146 Y27VSS_145 Y30VSS_144 Y33

VSS_143 Y40VSS_142 Y5VSS_141 A14VSS_140 A30VSS_139 A35

Trang 18

NDSRA#

DCDA#

NSOUTANRTSA

NCTSA#

NSINANDCDA#

NSOUTANRIA

NDTRANDCDA#

NDSRA#NSINANCTSA#NRTSA

RSLCTRBUSY

RINIT#

RAFD#RERR#

RPERSLCT

RERR#

RBUSY

PRND4PRND1

PRND5PPRND0

PRND0

PRND3PRND1

SLIN#

PLTRST_BU2#

PLTRST_BU3#

DDR_0_9_REFVTT_0_9_REF

PCH_0_9_REFPLTRST_BU1#

IMON_CTLWDT#

SIO_TRIP#

PWOK_SIOKBRST#

MSDATKBDATMSCLKKBCLKA20GATEKBRST#

VIN3

SIO_GPIO24VIN4

NDTRBNDCDB#

NDSRB#

NSINBNCTSB#

NRTSB+12V_COM

NRIBNDSRB#

-12V_COMNDTRBRIB#

DTRB#

NDSRB#

DCDB#

NSOUTBNRTSB

NCTSB#

NSINBNDCDB#

VCC5VCC3

MSCLK 29MSDAT 29KBCLK 29KBDAT 29SIO_GPIO22

Sheet ofDate:

Only VTT_PSI_GPO# Default HighOthers Default Low

80Port ENABLE

STUFF Don't STUFF

H:1.1 L:1.05

If you do not use the floppy,please pull-up these pin

to VCC3V.

GPIO40: APS dis/enable

RT4 must place at cpu socket

RT6 must place at VRM MOS

R474 0RR474 0R

R656 560R

R639 4.7KR639 4.7K

R575 X_4.7KR575 X_4.7K

CN8 X_470p/50X/8P4CCN8 X_470p/50X/8P4C1

526

R793 2.7KR793 2.7K

C514 X_C0.1u16Y0402

RT410K/NTC/1%/6RT410K/NTC/1%/6

RT610K/NTC/1%/6RT610K/NTC/1%/6C367 X_22p/50N

C337X_0.01u/16XC337X_0.01u/16X

JCOM1

H2X5[10]M_BLACK-RHJCOM1

R464 200K/1%

TP41

C3852200p/50XC3852200p/50X

R483 10K/1%

C343 X_22p/50NC329 0.1u/16X

C3262200p/50XC3262200p/50X

R546 2MR546 2M

F71889F

6

DENSEL#/GPIO40 7MOA#/GPIO41 8DRVA#/GPIO42 9

WPT#/GPIO53 18DSKCHG#/GPIO54 19

VREF

92 D1+(CPU)

91 D2+

90 D3+(System)89

AGND(D-) 88

VREF_VDRAM 87VREF_VSYS 86VREF_VTT 85

GND 70

MCLK 69MDATAKCLK 68

67

KDATA 66

VSB3V 65

ACK#/VIDIN3/GPIO63 103SLIN#/CoreTP/VIDIO_TRAP 104INIT#/VIDIN4/GPIO64 105ERR#/VIDIN5/GPIO65 106AFD#/H#/VIDIN6/GPIO66 107STB#/L#/VIDIN7/GPIO67 108PD0/SEGA/VIDOUT0/GPIO70 109PD1/SEGB/VIDOUT1/GPIO71 110PD2/SEGC/VIDOUT2/GPIO72 111

PD3/SEGD/VIDOUT3/GPIO73 112

PD4/SEGE/VIDOUT4/GPIO74 113PD5/SEGF/VIDOUT5/GPIO75 114PD6/SEGG/VIDOUT6/GPIO76 115PD7/VIDOUT7/GPIO77 116

GND 117

DCD1# 118RI1# 119CTS1# 120DTR1#/FAN60_100 121

RTS1#/80PORT_TRAP 122

DSR1# 123SOUT1/Config4E_2E 124SIN1 125DCD2#/SEGG/GPIO30 126RI2#/SEGFGPIO31 127CTS2#/SEGA/GPIO32 128

VCC

20

GND

11 DA313

R48010K/1%

R473 0RR473 0R

SP5X_COPPERSP5X_COPPER

R533 0R

RN35 2.7K/8P4RRN35 2.7K/8P4R1526

C4210.1u/16XC4210.1u/16X

R523 1KR523 1K

Q62P-3906Q62P-3906 B

R552 0RR552 0R

R624 10K/1%

R754 X_0RR754 X_0R

CN6 X_470p/50X/8P4CCN6 X_470p/50X/8P4C1

526

D22 1N4148SD22 1N4148S

R617 100K/1%

R475 0RR475 0R

R463 200K/1%

CN3 X_8p4C-220p50NCN3 X_8p4C-220p50N

1526

R567 4.7KR567 4.7K

C3302200p/50XC3302200p/50X

R147 4.7KR147 4.7K

R551 X_10K/1%

R462 4.7KR462 4.7KTP59

R478 4.7KR478 4.7K

R566 X_4.7KR566 X_4.7K

C354 X_22p/50N

C33410u/10Y/8C33410u/10Y/8

R465 X_10KR1%0402

C3400.1u/16XC3400.1u/16X

R636 10K/1%

C531X_0.1u/16YC531X_0.1u/16Y

R638 10K/1%

RN36 33R/8P4R1526

C4280.1u/16XC4280.1u/16X

R654 1K/1%

C511 X_0.1u/16X

R717 X_0RR717 X_0R

RN29 2.7K/8P4R

1526

R486 X_10KR1%0402R486 X_10KR1%0402

C3480.1u/16XC3480.1u/16X

RN28 2.7K/8P4RRN28 2.7K/8P4R1526

526

C519 X_470p/50X

C33510u/10Y/8C33510u/10Y/8

R600 X_0R

RN30 33R/8P4R1526

CN5 X_470p/50X/8P4CCN5 X_470p/50X/8P4C1

526

R593 X_560R

R616 X_0R

R525 4.7KR525 4.7K

C532 X_C0.1u16Y0402

R553 X_4.7KR553 X_4.7K

CN7 X_470p/50X/8P4CCN7 X_470p/50X/8P4C1

526

RT5X_10KNTC/6RT5X_10KNTC/6

C325X_100p/50N/6C325X_100p/50N/6

R482 10K/1%

RN39 2.7K/8P4RRN39 2.7K/8P4R

1526

D25 BAS32L_LL34

CN2X_220p/50N/8P4C/6CN2X_220p/50N/8P4C/61

526

D29 1N4148SD29 1N4148SAC

JLPT1

H2X13[26]M-2PITCH_BLACK-RHJLPT1

H2X13[26]M-2PITCH_BLACK-RH

14

5109

CN9X_220p/50N/8P4C/6CN9X_220p/50N/8P4C/61

526

R48447K/1%

C530 X_0.1u/16X

R755 X_0R

R472 820R/1%/6R472 820R/1%/6

R489X_10K/1%

RN141K/8P4RRN141K/8P4R1526

RN12 22R/8P4R1526

C328 0.1u/16XC331 0.1u/16X

U36

GD75232_SSOP20U36

RY4 14

DY1 5DY2 6

VCC

20

GND

11 DA313

RA5

9

VSS 10DY3 8RY5 12

R47110K/1%

Trang 19

EXP_A_RXP_14

EXP_A_RXP_15

EXP_A_RXP_8EXP_A_RXN_8EXP_A_RXP_9EXP_A_RXN_9EXP_A_RXP_10

EXP_A_RXP_11

SMBCLKSMBDATA

EXP_A_TXN_8_C

EXP_A_TXP_11_C

EXP_A_TXP_12_CEXP_A_TXN_11_C

EXP_A_TXN_14_C

EXP_A_TXN_13_CEXP_A_TXP_14_CEXP_A_TXN_12_C

EXP_A_TXP_15_C

PLTRST_BU2#

EXP_A_RXP_0EXP_A_RXN_0CK_16PORT_DN

EXP_A_RXP_1EXP_A_RXN_1EXP_A_RXP_2EXP_A_RXN_2EXP_A_RXP_3EXP_A_RXN_3

EXP_A_RXP_4EXP_A_RXN_4EXP_A_RXP_5EXP_A_RXN_5EXP_A_RXP_6EXP_A_RXN_6EXP_A_RXP_7EXP_A_RXN_7

EXP_A_TXP_0_C

EXP_A_TXP_1_C

EXP_A_TXN_2_CEXP_A_TXP_3_C

EXP_A_TXP_4_CEXP_A_TXN_1_C

EXP_A_TXP_8_C

EXP_A_TXP_10_CEXP_A_TXP_9_C

EXP_A_TXN_2EXP_A_TXP_3

PCIE_WAKE#

VCC3

VCC33VSB_WAKE

+12VVCC3

EXP_A_RXN_6 6

SMBDATA10,11,12,15,21,30,35,36

SMBCLK10,11,12,15,21,30,35,36

PLTRST_BU2# 18

CK_16PORT_DP 13CK_16PORT_DN 13EXP_A_TXN_0

6

EXP_A_TXP_16

EXP_A_TXP_06

EXP_A_TXN_2

6 EXP_A_TXP_26

EXP_A_TXN_16

EXP_A_TXP_46

EXP_A_TXN_46

EXP_A_TXP_36

EXP_A_TXN_36

EXP_A_TXN_66

EXP_A_TXP_76

EXP_A_TXN_76

EXP_A_TXP_66

EXP_A_TXN_5

6 EXP_A_TXP_56

EXP_A_RXN_15 6EXP_A_RXP_15 6

EXP_A_RXP_8 6

EXP_A_RXP_9 6

EXP_A_RXP_10 6EXP_A_RXN_10 6EXP_A_RXP_11 6

PE1-2_TX13PE1-2_TX#

13

PE1-2_RX 13PE1-2_RX# 13

SMBDATA10,11,12,15,21,30,35,36

SMBCLK10,11,12,15,21,30,35,36

PLTRST_BU2# 18

CK_PEX1-2N 13CK_PEX1-2P 13

CK_PEX1-3P 13CK_PEX1-3N 13PE1-3_TX

13PE1-3_TX#

13

PE1-3_RX 13PE1-3_RX# 13

SMBDATA10,11,12,15,21,30,35,36

SMBCLK10,11,12,15,21,30,35,36

Sheet ofDate:

Trace width > 200 mils

PCI EXPRESS x1-PORT3

C282 0.1u/10XC277 0.1u/10X

C290 0.1u/10X

R43910K/1%

C311 0.1u/10X

R444 0RR444 0R

C278 0.1u/10X

C285 0.1u/10X

C429 0.1u/10X

C409 0.1u/10XR844 0R

C287 0.1u/10XC275 0.1u/10X

C288 0.1u/10X

PCI_E1

SLOT-PCI164P_BLUE-2PITCH-RH-5PCI_E1

SLOT-PCI164P_BLUE-2PITCH-RH-5

PRSNT1# A112V A212V#A3 A3GND A4JTAG2 A5JTAG3 A6

JTAG4 A7

JTAG5 A83.3V A93.3V#A10 A10PWRGD A11GND A12REFCLK+ A13REFCLK- A14GND A15

HSIP0 A16

HSIN0 A17GND A18RSVD A19GND A20HSIP1 A21HSIN1 A22GND A23GND A24

HSIP2 A25

HSIN2 A26GND A27GND A28HSIP3 A29HSIN3 A30GND A31RSVD#A32 A32RSVD#A33 A33

GND A34

HSIP4 A35HSIN4 A36GND A37GND A38HSIP5 A39HSIN5 A40GND A41GND A42HSIP6 A43HSIN6 A44

GND A45

GND A46HSIP7 A47HSIN7 A48GND A49RSVD#A50 A50GND A51HSIP8 A52HSIN8 A53

GND A54

GND A55HSIP9 A56HSIN9 A57GND A58GND A59HSIP10 A60HSIN10 A61GND A62GND A63HSIP11 A64

HSIN11 A65

GND A66GND A67HSIP12 A68HSIN12 A69GND A70GND A71HSIP13 A72HSIN13 A73GND A74GND A75

HSIP14 A76

HSIN14 A77GND A78GND A79HSIP15 A80HSIN15 A81GND A82

JTAG2 A5

JTAG3 A6JTAG4 A7JTAG5 A83.3V A93.3V A10PWRGD A11GND A12REFCLK+ A13

REFCLK- A14

GND A15HSIP0+ A16HSIP0- A17GND A18X1 X1

X2 X2

C269 0.1u/10X

C276 0.1u/10XC271 0.1u/10X

C289 0.1u/10X

EC42270u/16V/8*11.5/O

C304 0.1u/10X

C274 0.1u/10XC286 0.1u/10X

C272 0.1u/10XC301 0.1u/10X

C280 0.1u/10XR843 X_0R

C292 0.1u/10X

C281 0.1u/10X

C273 0.1u/10XC297 0.1u/10X

C291 0.1u/10X

PCI_E2

SLOT-PCI36P_BLACK-2PITCH-RH-10PCI_E2

3.3V A9

3.3V A10PWRGD A11GND A12REFCLK+ A13REFCLK- A14GND A15HSIP0+ A16HSIP0- A17

GND A18

X1 X1

X2 X2

C279 0.1u/10XC296 0.1u/10XC310 0.1u/10X

Định dạng
Số trang	38
Dung lượng	1,33 MB