MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC.. NEITHER THIS SHEET NO
Trang 1MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSTHIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Trang 2page 31
Thermal Sensor ADM1032AR
page 42 AC-LINK
page 40
page 26,27,28,29
CDROM Connector
IDSEL:AD20 (PIRQA,B#,GNT#2,REQ#2)
page 41 page 34
VGA DDR x2 CHA
IDSEL:AD18 (PIRQC#,GNT#3,REQ#3)
ALC 250
Primary IDE
Touch Pad
Mini PCI socket
IEEE 1394 TI-TSB43AB22
File Name :LA2411
W/EXT VGA CHIP
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSTHIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
CLOCK GENERATOR ICS951402AGT
page 24
page 32
page 42
Trang 3External PCI Devices
Voltage Rails
DDR SO-DIMM 0
REQ/GNT # DEVICE
NB Internal VGA
1 0 1 0 0 0 0 X A0
2 N/A
3
0 1
N/A N/A N/A N/A N/A N/A
N/A
A A D B C A A
A B C D
I2C / SMBUS ADDRESSING
DDR SO-DIMM 1
CLOCK GENERATOR (EXT.)
A2 D2
+VCC_CORE Core voltage for CPU
AC or battery power rail for power circuit.
1.25V switched power rail for DDR Vtt The voltage for Processor VID select Adapter power supply (19V)
+VCCVID
ON
N/A
N/A S3
OFF ON
S5
OFF
N/A OFF N/A
: means Digital Ground
: means Analog Ground
@ : means just reserve , no build NAGP@ : means just build when no external AGP VGA chip build in (UMA).
OFF OFF ON 2.5V switched power rail
+3VALW
ON ON
OFF ON
OFF +1.5VS
3.3V always on power rail
+1.8VS
ON 1.8V switched power rail for ATI-RS300M/RC300M NB.
OFF
OFF OFF ON
ON
12V always on power rail +5VS
ON ON ON OFF ON
ON ON +12VALW
+5VALW 5V always on power rail
+3V 3.3V system power rail for SB,LAN,CardReader and HUB.
ON ON OFF
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSTHIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
M10@ : means build VGA M10 M9@ : means build VGA M9+X M9-M10@ : means build VGA M9 or M10 1520@ : means build Cardbus PCI1520 1620@ : means build Cardbus PCI1620 ATI@ : means build ATI SB USB2.0 related to turn on the function NEC@ : means build NEC USB2.0 related to turn on the function
7
PCB Revision 0.1
Board ID Table for AD channel
0 8.2K +/- 5%
0 V
0.436 V 0.712 V
0.503 V 0.819 V
0.538 V 0.875 V
AD_BID VAD_BIDtyp VAD_BIDmax
1.036 V
1.935 V 2.500 V
2.200 V 3.300 V
2.341 V
Board ID 0 1 2 3 4 5 6
Trang 4H_ IERR#
H_REQ#0H_REQ#2H_REQ#4
+5VS+5VS
TitleSize Document Number R e v
Prescott Processor in uFCPGA478
4 65Tuesday, June 08, 2004
Compal Electronics, Inc.
Pull-up56ohmPull-up 56ohm
to +VCC_CORE
Reference Intel document
Desktop P4 Spec.: 10988 P4 0.13u 512KB L2 EMTS Rev.2.0
Desktop Prescott Spec.: 11910 Prescott EMTS Rev.0.5
Pin number Northwood
AA20 ITPCLKOUT0 Pull-up56ohm
to +VCC_CORE TESTHI6 Pull-up 62ohmto +VCC_CORE
PopPop
PopPopPopPopDepop
PopPop
DepopDepopPop
Pop
Northwood
Pop
DepopDepop
AB22 ITPCLKOUT1 Pull-up 56ohm
to +VCC_CORE TESTHI7 Pull-up 62ohmto +VCC_CORE
to +VCCVIDfloat
+3VRUN & connect
to PWRIC
Northwood MTNorthwood MT
Connect to CPUFilterAE23
Connect to CPU
NCNCNCVCCA
COMPAT#
Commend
float
PopPopPop
Connect to CPUFilterConnect to CPUFilterConnect to GNDConnect to GND
PopPop
floatfloatfloat
DepopDepopDepop
Pull-up 62ohm
Pull-up 200ohm
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
R23051_0402_5%
1 2
R900100K_0402_5%
R109947K_0402_5%
R110047K_0402_5%
D#6 B24
D#7 C23D#8 C24D#9 B25D#10 G22D#11 H21
D#12 C26
D#13 D23D#14 J21D#15 D25D#16 H22D#17 E24
D#18 G23
D#19 F23D#20 F24D#21 E25D#22 F26
D#23 D26
D#24 L21
D#25 G26D#26 H24D#27 M21D#28 L22
D#29 J24
D#30 K23
D#31 H25D#32 M23D#33 N22D#34 P21
D#35 M24
D#36 N23
D#37 M26D#38 N26D#39 N25D#40 R21
D#41 P24
D#42 R25
D#43 R24D#44 T26D#45 T25D#46 T22
D#47 T23
D#48 U26
D#49 U24D#50 U23D#51 V25D#52 U21
D#53 V22
D#54 V24
D#55 W26D#56 Y26D#57 W25D#58 Y23
D#59 Y24
D#60 Y21
D#61 AA25D#62 AA22D#63 AA24
2
Trang 5ITP_TDIITP_TCK
H_RS#2
H_RESET#
ITP_BPM#0H_RS#1
+VCC_CORE
+VCC_CORE+VCC_CORE
+3VS+3VALW
+VCCVID+VCCVID
+3VS+VCC_CORE
TitleSize Document Number R e v
Prescott Processor in uFCPGA478
5 65Tuesday, June 08, 2004
Compal Electronics, Inc.
Place near SB200 (U6)
Place near CPU
Close to the CPU
3 Place decoupling cap 220PF near CPU.
1.Place cap within 600 mils of
the VCCA and VSSA pins.
Note: Please change to 10uH, DC current
of 100mA parts and close to cap
PLL Layout note :
2.H_VCCIOPLL,HVCCA,HVSSA trace wide
12 mils(min)
Close to the ITP
Between the CPU and ITP
H_TESTHI12
If CPU is P4 , Change the resistor
R546 value to 75_0603_1%
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Pop: Northwood Depop: Prescott
R_E
RE Pop: Prescott Depop: Northwood
51.1 Ohm for Northwood, 61.9 Ohm for Prescott
width= 10mil
W/O ITP
R1017->
Pop: Prescott Depop: Northwood
for mobile CPU
R522 1 256_0402_5%
R5454.7K_0402_5%
R521 1 256_0402_5%
R112512K_0402_5%
S Q452N7002 1N_SOT23
2
C5461U_0603_10V4Z
12
TDI
C1 TCKD4
GTLREF2 F20
GTLREF3 F6
NC1 A22NC2 A7
TESTHI0 AD24
TESTHI1 AA2TESTHI2 AC21TESTHI3 AC20TESTHI4 AC24TESTHI5 AC23
TESTHI6 AA20
TESTHI7 AB22TESTHI8 U6TESTHI9 W4TESTHI10 Y3TESTHI11 A6
DBI#3 V21
DBR# AE25VCCIOPLL
12
R519 56_0402_5%
1 2
R543 1 2 1K_0402_5%
+C54433U_D2_8M_R35
12
R53961.9_0603_1%
1 2
R558169_0402_1%
12
R541680_0603_5%
1 2
Q95MMBT3904_SOT23
R9934.7K_0402_5%
Q96MMBT3904_SOT23
U32ASN74LVC14APWLE_TSSOP14
Trang 6CPU Decoupling
6 65Tuesday, June 08, 2004
Compal Electronics, Inc.
Place 11 North of Socket(Stuff 6)
Place 12 Inside Socket(Stuff all)
Place 9 South of Socket(Unstuff all)
Place Inside Socket around the edge
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
SANYO OS-CON 820uF H:13*3 (C163,C164,C165) SANYO OS-CON 820uF H:9*2 (C166,C167)
+C178
@470U_D2_2.5VM
12
C15922U_1206_16V4Z
12
C14322U_1206_16V4Z
12
+C180470U_D2_2.5VM
12
C16222U_1206_16V4Z
12
C1720.22U_0603_10V7K
12
C13222U_1206_16V4Z
12
C1700.22U_0603_10V7K
12
C13922U_1206_16V4Z
12
C1680.22U_0603_10V7K
12
C13422U_1206_16V4Z
12
12
C15122U_1206_16V4Z
12
C14522U_1206_16V4Z
12
C13522U_1206_16V4Z
12
C14622U_1206_16V4Z
12
C1730.22U_0603_10V7K
12
C15622U_1206_16V4Z
12
12
C14722U_1206_16V4Z
12
+C166820U_E9_2_5V_M_R7
12
12
C15822U_1206_16V4Z
12
C13822U_1206_16V4Z
12
12
+C176
@470U_D2_2.5VM
12
12
+C164820U_E9_2_5V_M_R7
12
C16122U_1206_16V4Z
12
+C182470U_D2_2.5VM
12
C15722U_1206_16V4Z
12
C15022U_1206_16V4Z
12
C14022U_1206_16V4Z
12
C14922U_1206_16V4Z
12
C16022U_1206_16V4Z
12
C13322U_1206_16V4Z
12
C14822U_1206_16V4Z
12
C14422U_1206_16V4Z
12
C13722U_1206_16V4Z
12
+C175470U_D2_2.5VM
12
+C165820U_E9_2_5V_M_R7
12
+C181470U_D2_2.5VM
12
C1690.22U_0603_10V7K
12
+C167820U_E9_2_5V_M_R7
12
Trang 7TitleSize Document Number R e v
CPU Thermal Sensor&FAN CTRL
7 65Tuesday, June 08, 2004
Compal Electronics, Inc.
Thermal Sensor ADM1032AR
Address:1001_100X
W= 15mil
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
C26510U_0805_10V4Z
12
R91610K_0402_5%
12
R9171 8.2K_0402_5%2
R9201 210K_0402_5%
C8400.1U_0402_10V6K
12
JP11
ACES_85205-0300
13
R9181 8.2K_0402_5%2
C253
2200P_0402_25V7K
12
CB
E Q90FMMT619_SOT23
C855
1000P_0402_16V7K
12
CB
E Q91FMMT619_SOT23
2
D251N4148_SOD80
C2510.1U_0402_10V6K
12
C9071000P_0402_16V7K
12
Q172SC2411K_SC59
C 1E
C83810U_0805_16V4Z
C26610U_0805_10V4Z
12
R2862 1300_0402_5% C2562 1@1U_0603_10V6K
R9191 210K_0402_5%
C83910U_0805_16V4Z
12
R915
10K_0402_5%
12
D261N4148_SOD80
12
C9081000P_0402_16V7K
12
Trang 8H_D#57
H_D#40H_D#36H_DSTBP#1
H_D#43H_D#33H_D#24
H_D#34H_D#29
H_D#52
H_D#3
H_D#20H_D#17H_D#7
H_DINV#3
H_D#22H_D#15
H_D#30H_DSTBP#0
H_D#32
H_D#58
H_D#10H_D#1
H_D#35H_D#21
H_D#41H_D#44H_D#42
H_D#53
H_D#60
H_D#27
H_D#38H_DSTBN#1
H_D#56H_D#49H_D#26
H_A#24H_REQ#3
H_A#23
H_BNR#
H_A#9
H_A#25H_A#11
H_DEFER#
H_A#10
H_ADSTB#0H_A#4
H_HIT#
H_ADS#
H_RS#1H_RESET#
H_REQ#1
H_A#19H_REQ#2
NB_GTLREF
H_A#21
H_REQ#4H_REQ#0
Note: PLACE CLOSE TO RC300M, USE 10/10 WIDTH/SPACE
L
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSTHIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
2
R3811 2 24.9_0402_1%
C3660.1U_0402_10V6K12
0.1U_0402_10V6K
12
L34HB-1M2012-121JT03_08051 2
C3621U_0603_10V6K1
2
C36422U_1206_16V4Z_V1
12
R3821 2 49.9_0402_1%
C371
0.1U_0402_10V6K
12
C99610U_0805_10V4Z1 2
C365
0.1U_0402_10V6K
12
R3854.7K_0402_5%
2
R3801 2 330_0402_5%
C3700.1U_0402_10V6K12
C9740.1U_0402_10V6K12
C367
0.1U_0402_10V6K
12
CPU_D16# B26CPU_D17# C30CPU_D18# A27CPU_D19# B29
CPU_D20# C28CPU_D21# C29CPU_D22# B28CPU_D23# D28CPU_D24# D26
CPU_D25# B27CPU_D26# C26CPU_D27# E25CPU_D28# E26CPU_D29# A26
CPU_D30# B25CPU_D31# C25
CPU_D32# F24CPU_D33# D24CPU_D34# E23CPU_D35# E24
CPU_D36# F23CPU_D37# C24CPU_D38# B24CPU_D39# A24CPU_D40# F21CPU_D41# A23CPU_D42# B23CPU_D43# C22CPU_D44# B22CPU_D45# C21CPU_D46# E21CPU_D47# D22
CPU_D48# B21CPU_D49# F20CPU_D50# A21CPU_D51# C20CPU_D52# E20
CPU_D58# E18CPU_D59# B19CPU_D60# D18CPU_D61# B18CPU_D62# C17
CPU_DSTBP3# F18CPU_DSTBP2# F22CPU_DSTBP1# E27
CPU_DSTBP0# G29
CPU_DBI3# F19CPU_DBI2# D23CPU_DBI1# A28CPU_DBI0# E28
Trang 9DDRA_DQ35
DDRA_DQ40
DDRA_DQ60DDRA_DQ63
DDRA_ADD6DDRA_ADD9
DDRA_DQ53DDRA_DQ56DDRA_CKE_R0
DDRA_DQ11DDRA_DQ14DDRA_DQ16
DDRA_DQS7
DDRA_CKE_R2DDRA_CS#0DDRA_CS#3
DDR_VREF
DDRA_DQ23
DDRA_SDQ22
DDRA_SDQ23DDRA_DQ19
DDRA_SDQ19DDRA_DQ18
DDRA_SDQ5DDRA_DQ5
DDRA_DQ4
DDRA_DQ30DDRA_DQ29
DDRA_DQ14DDRA_DQ13
DDRA_DM1DDRA_DQS1
DDRA_SDM1DDRA_SDQS1
DDRA_SDQ9DDRA_SDQ8
DDRA_SDM[0 7]
DDRA_SDM5
DDRA_SDQS6DDRA_DQS6
DDRA_DM7
DDRA_DQ51DDRA_DQ54
DDRA_SDQ54DDRA_DM4
DDRA_SDQ51DDRA_DQ55
DDRA_DM5
DDRA_SDQ55DDRA_DQS4
DDRA_SDM6DDRA_DM6
DDRA_SDQ59
DDRA_SDQ62DDRA_DQ62
DDRA_SDQ58
DDRA_SDQ61DDRA_DQ61
DDRA_SDQ57
DDRA_SDQ56
DDRA_SDQ43DDRA_DQ47
DDRA_SDQ46DDRA_DQ46
DDRA_SDQ40DDRA_DQ44
DDRA_DQ39
DDRA_SDQ35
DDRA_SDQ38DDRA_DQ38
DDRA_SDQ32DDRA_DQ32
DDRA_SDQ21DDRA_DQ21
DDRA_SDQ16DDRA_DQ16
DDRA_SDQS2
DDRA_DQ2DDRA_DQ3
Compal Electronics, Inc.
DDR_VREF trace width of 20mils and space 20mils(min)
L
Group 6 sweep Group 7
Place these resistor closely DIMM0, all trace length Max=0.75"
Layout note
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSTHIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
12
C3840.1U_0402_10V6K12C385
0.1U_0402_10V6K
12
@0.1U_0402_10V6K12
2
R4042 10_0402_5%
R4062 10_0402_5%
R4091K_0603_1%
R4081K_0603_1%
C383
0.1U_0402_10V6K
12
MEM_DQ24 AF18MEM_DQ25 AG20MEM_DQ26 AG21MEM_DQ27 AF22MEM_DQ28 AF19
MEM_DQ29 AF20MEM_DQ30 AE22MEM_DQ31 AF23MEM_DQ32 AJ21MEM_DQ33 AJ22
MEM_DQ34 AJ24MEM_DQ35 AK25MEM_DQ36 AH21MEM_DQ37 AH22MEM_DQ38 AH24
MEM_DQ39 AJ25MEM_DQ40 AK26MEM_DQ41 AK27MEM_DQ42 AJ28MEM_DQ43 AH29
MEM_DQ44 AH25MEM_DQ45 AJ26MEM_DQ46 AJ29MEM_DQ47 AH30MEM_DQ48 AF29
MEM_DQ49 AE29MEM_DQ50 AB28MEM_DQ51 AA28MEM_DQ52 AE28MEM_DQ53 AD28MEM_DQ54 AC29MEM_DQ55 AB29MEM_DQ56 AC26MEM_DQ57 AB25MEM_DQ58 Y26MEM_DQ59 W26MEM_DQ60 AE26MEM_DQ61 AD26MEM_DQ62 AA26MEM_DQ63 Y27
C379
0.1U_0402_10V6K
12
0.1U_0402_10V6K
12
C861
@0.1U_0402_10V6K1
12
Trang 10AGP_SBSTB#
AGP_AD13
AGP_PAR
AGP_SBA6AGP_SBA1
AGP_AD25AGP_AD20AGP_AD7
AGP_ST2
AGP_AD28
AGP_CBE#3AGP_AD31
AGP_AD14AGP_AD3
AGP_DBI_LOAGP_RBF#
AGP_SBA4
AGP_AD12AGP_AD1
AGP_DEVSEL#
AGP_ADSTB1AGP_SBSTBAGP_AD26AGP_AD10
AGP_ST0
AGP_ADSTB1#
AGP_AD29AGP_AD22
AGP_DBI_HI/PIPE#
AGP_STOP#
AGP_ADSTB0
AGP_AD19AGP_AD9
AGP_ST1AGP_SBA7
AGP_CBE#0
AGP_AD23
AGP_AD8
AGP_AD16AGP_AD11
AGP_SBA5AGP_SBA3
AGP_FRAME#
AGP_CBE#2AGP_ADSTB0#
AGP_AD5AGP_AD0
AGP_IRDY#
AGP_CBE#1
AGP_AD21AGP_AD17
AGP_SBA0AGP_TRDY#
AGP_AD30AGP_AD24
AGP_AD15A_AD11
A_AD17A_AD20
A_END#
A_AD27A_AD6
A_DEVSEL#
A_AD26A_AD24A_AD18A_AD9
A_AD0A_AD3
A_AD7A_AD5
A_ACAT#
A_AD12A_AD15
A_SBGNT#
A_AD1
A_AD13A_AD16
A_AD30A_AD22
A_SBREQ#
A_CBE#0A_CBE#2
A_AD23A_AD14
A_PAR
A_AD19A_AD4
A_AD28A_AD2
ENBKL#
AGP_SBA4AGP_SBA5
AGPREF_8X
AGP_COMP
AGP8X_DET#
DDC_DATDDC_CLK
AGP_ST[0 2] <17>AGP_CBE#[0 3] <17>
Compal Electronics, Inc.
AGPAND LVDS MUXED SIGNALS
?
PLACE CLOSE TOCONNECTOR
Rc Ra
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSTHIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
C5500.1U_0402_10V6K
R945NAGP@47K_0402
GDS
Q1NAGP@2N7002_SOT23
2
C5730.1U_0402_10V6K12
R560 1 2 NAPG@0_0402_5%
C943
0.1U_0402_10V6K
12
C5560.1U_0402_10V6K12
C9350.01U_0402_16V7Z12C864
0.01U_0402_16V7Z
12C567
0.1U_0402_10V6K12
C570
0.1U_0402_10V6K
12
C5600.1U_0402_10V6K12
C572
0.1U_0402_10V6K
12
C9510.01U_0402_16V7Z12C950
0.01U_0402_16V7Z
12
C9380.1U_0402_10V6K12
R568NAPG@10K_0402_5%
C9420.1U_0402_10V6K12
C9480.01U_0402_16V7Z12
12
C5540.1U_0402_10V6K12
R563 1 2 NAPG@0_0402_5%
C934
0.01U_0402_16V7Z
12
C947
0.01U_0402_16V7Z
12
C5780.1U_0402_10V6K12
C939
0.1U_0402_10V6K
12
C568
0.1U_0402_10V6K
12
C945
0.1U_0402_10V6K
12
Q2NAGP@2N7002_SOT232
0.1U_0402_10V6K
12
C9400.1U_0402_10V6K12C577
0.1U_0402_10V6K
12
C9460.1U_0402_10V6K12
R5708.2K_0402_5%
C5690.1U_0402_10V6K12C563
0.1U_0402_10V6K12
R569NAGP@0_0402_5%
C561
0.1U_0402_10V6K
12
C564
0.1U_0402_10V6K
12C566
0.1U_0402_10V6K
12
C5760.1U_0402_10V6K12
C63210U_0805_10V4Z12C559
0.1U_0402_10V6K
12
C5710.1U_0402_10V6K12
C575
0.1U_0402_10V6K
12
C941
0.1U_0402_10V6K
12
R561 1 2 NAPG@0_0402_5%
R562 1 2 NAPG@0_0402_5%
C9330.01U_0402_16V7Z12
R567NAGP@10K_0402_5%
C9490.01U_0402_16V7Z12C558
0.1U_0402_10V6K12
R10051 2 0_0402_5%
R575169_0402_1%
C5650.1U_0402_10V6K12
C937
0.1U_0402_10V6K
12
PART 3 OF 6
AGP_AD26/TMD1_D9 F2AGP_AD27/TMD1_D8 F1AGP_AD28/TMD1_D11 E2AGP_AD29/TMD1_D10 E1AGP_AD30/TMDS_HPD D2
AGP_AD31 D1AGP2_SBSTB/AGP3_SBSTBF/NC/LVDS_BLON E5AGP2_SBSTB#/AGP3_SBSTBS/NC/ENA_BL E6AGP2_ADSTB0/AGP3_ADSTBF0/TMD2_CLK# T3
AGP2_ADSTB0#/AGP3_ADSTBS0/TMD2_CLK U2AGP2_ADSTB1/AGP3_ADSTBF1/TMD1_CLK# G3AGP2_ADSTB1#/AGP3_ADSTBS1/TMD1_CLK H2
AGP2_CBE#0/AGP3_CBE0/TMD2_D7 R3AGP2_CBE#1/AGP3_CBE1/TMD2_DE M1AGP2_CBE#2/AGP3_CBE2 L3AGP2_CBE#3/AGP3_CBE3/TMD1_D5 H1
AGP2_DEVSEL#/AGP3_DEVSEL/GPIO9/I2C_DATAAGP2_FRAME#/AGP3_FRAME/TMDS_DVI_DATA R5
P6
AGP2_IRDY#/AGP3_IRDY/GPIO8/I2C_CLK P5AGP2_TRDY#/AGP3_TRDY/TMDS_DVI_CLK R6
AGP2_WBF#/AGP3_WBF N5
AGP2_SBA0/AGP3_SBA#0/GPIO0/VDDC_CNTL0 C3AGP2_SBA1/AGP3_SBA#1/GPIO1/VDDC_CNTL1 C2AGP2_SBA3/AGP3_SBA#3/GPIO3/LVDS_DIGON E4AGP2_SBA5/AGP3_SBA#5/GPIO5/AGP_BUSY# F5AGP2_SBA6/AGP3_SBA#6/GPIO6/LVDS_SSOUT G6AGP2_SBA7/AGP3_SBA#7/GPIO7/LVDS_SSIN G5
AGP_ST0 L6AGP_ST1 M6AGP_ST2 L5
AGP2_SBA2/AGP3_SBA#2/GPIO2/LVDS_BLON# D4AGP2_SBA4/AGP3_SBA#4/GPIO4/STP_AGP# F6
AGP2_STOP#/AGP3_STOP/GPIO10/DDC_DATA T6
AGP_PAR T5
AGP2_RBF#/AGP3_RBF N6
AGP2_PIPE#/AGP3_DBI_HI C1AGP2_NC/AGP3_DBI_LO D3
AGP_COMP
J5
R995 1 2 NAPG@0_0402_5%
Trang 11CLK_NB_BCLK#
CLK_NB_BCLKRC300M_X2
3VDDCCLDDCDATA_R
DDCCLK_RCRMA_R
3VDDCDA
DDCDATA_RDDCCLK_R
CLK_MEM_66M
GREEN_RCRT_G
VSYNC_R
CRT_HSYNCCRT_R
HSYNC_RRED_R
PLLVDD_18+1.8VS_AVDDQ+1.8VS_AVDDDI
+1.8VS
+1.8VS
+1.8VS
+3VS+2.5VS
Compal Electronics, Inc.
Note: PLACE CLOSE TO U27 (NB CHIP)
L
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSTHIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
R5951 2 NAPG@0_0402_5%
C600
10U_0805_16V4Z
12
R58756_0402_5%
12
TXOUT_U2P D14TXCLK_UN E13TXCLK_UP F13
TXOUT_L0N E10TXOUT_L0P D10TXOUT_L1N B9TXOUT_L1P C9TXOUT_L2N D11
TXOUT_L2P E11TXCLK_LN B10TXCLK_LP C10
LVDDR_18 B12LPVSS A11
LVDDR_18 C12LPVDD_18 A12
LVSSR B11
LVSSR C11
C_R E15Y_G C15COMP_B D15
DACSCL D6DACSDA C6
R5941 2 NAPG@0_0402_5%
R5841 2715 _0402_1%
R5981 2 NAPG@0_0402_5%
C5900.1U_0402_10V6K1
2C59110U_0805_16V4Z
12
C5890.1U_0402_10V6K
12
C5860.1U_0402_10V6K1
Trang 12Compal Electronics, Inc.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSTHIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Pop for M11P Depop for internal AGP
Pop for internal AGP Depop for M11P
C5830.1U_0402_10V6K1
2C582
0.1U_0402_10V6K
12C579
10U_0805_10V4Z
12C580
0.1U_0402_10V6K
12
R418 M9-M10@0_0603_5%
C5810.1U_0402_10V6K12
VSS N16VSS N23VSS N24VSS N8VSS P15
VSS P16VSS P27VSS P4VSS R1VSS R12
VSS R13VSS R14VSS R15VSS R16VSS R17
VSS R18VSS R19
VSS R23VSS R7VSS R8VSS T12VSS T13VSS T14VSS T15VSS T16VSS T17VSS T18VSS T19VSS T27VSS T4VSS U15VSS U16VSS U7VSS U8VSS V15VSS V16VSS V27VSS V4VSS V7VSS V8VSS W15VSS W16VSS W27
VSS Y1VSS Y23VSS Y24VSS Y30VSS Y4
VSS Y7VSS Y8
VDDP_AGP T8VDDP_AGP R4VDDP_AGP P8VDDP_AGP P7
VDDP_AGP P1VDDP_AGP N4VDDP_AGP M8VDDP_AGP M7VDDP_AGP L4VDDP_AGP K8VDDP_AGP J4VDDP_AGP H7VDDP_AGP H6VDDP_AGP H5VDDP_AGP G4VDDP_AGP A2
VDDR_MEM AA23VDDR_MEM AA27VDDR_MEM AB30VDDR_MEM AC10VDDR_MEM AC12VDDR_MEM AC13VDDR_MEM AC15VDDR_MEM AC17VDDR_MEM AC19VDDR_MEM AC21VDDR_MEM AC23VDDR_MEM AC24VDDR_MEM AC25VDDR_MEM AC27VDDR_MEM AD10VDDR_MEM AD12VDDR_MEM AD13VDDR_MEM AD15VDDR_MEM AD17VDDR_MEM AD19VDDR_MEM AD21VDDR_MEM AD23VDDR_MEM AD24VDDR_MEM AD25VDDR_MEM AD27VDDR_MEM AE10
VDDR_MEM AE14VDDR_MEM AE15VDDR_MEM AE19VDDR_MEM AE20VDDR_MEM AE30
VDDR_MEM AE9VDDR_MEM AF27VDDR_MEM AG11VDDR_MEM AG12
VDDL_ALINK
W8 VDDL_ALINKAK3 VDDL_ALINKAD8 VDDL_ALINKAD7 VDDL_ALINKAD1 VDDL_ALINKAC8 VDDL_ALINKAC7AA8 VDDL_ALINK
VDDL_ALINK
AA7 VDDL_ALINKAA1
VDDR2_CPU
K23 VDDR2_CPUH24 VDDR2_CPUH21 VDDR2_CPUH19 VDDR2_CPUH17 VDDR2_CPUH16 VDDR2_CPUG24 VDDR2_CPUG23 VDDR2_CPUG21 VDDR2_CPUG17F17 VDDR2_CPU
VDDR2_CPU
F16 VDDR2_CPUE17 VDDR2_CPUE16 VDDR2_CPUD17 VDDR2_CPUD16 VDDR2_CPUC16
VDDR_MEM AG17
VDDR_MEM AG18VDDR_MEM AG23VDDR_MEM AG24VDDR_MEM AG26VDDR_MEM AG8
VDDR_MEM AG9VDDR_MEM AJ30VDDR_MEM AK14VDDR_MEM AK23VDDR_MEM AK8
VDDR_MEM V23VDDR_MEM W23VDDR_MEM W24VDDR_MEM W25VDDR_MEM Y25
VDDP_AGP U4VDDP_AGP U5
VDDP_AGP U6
Trang 13A_CBE#0A_CBE#3
A_AD26A_AD28
A_AD21A_AD29
+3VS+3VS+3VS+3VS+3VS
A_AD23 : CLOCK BYPASS DISABLE A_AD24 : MOBILE CPU SELECT
A_CBE#3: NOT USED
0: DISABLE1: ENABLE
0: TEST MODE 1: NORMAL MODE
00: 100 MHZ10: 200MHZ
A_AD28: SPREAD SPECTRUM ENABLE
0: DISABLE1: ENABLE
A_AD22 : OSC PAD OUTPUT PCICLK
0: BANIAS CPU1: OTHER CPU
00: 1.05V11: 1.75V
A_AD25/A_AD17 : CPU VOLTAGE[1 0]
PAR: EXTENDED DEBUG MODE
0:PCICLK OUT 1: OSC CLK OUTDEFAULT : 1
A_AD21 : AUTO_CAL ENABLE
DEFAULT : 10: DISABLE1: ENABLE
A_AD18 : ENABLE PHASE CALIBRATION
0: DISABLE 1:ENABLEDEFAULT: 0
A_AD25/A_AD17 : CPU VOLTAGE[1 0]
DEFAULT: 000: 1.05V11: 1.75V
AD25=1 DESTOP CPU AD17 DON'T CARE
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSTHIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Trang 14DDRA_SDQ35
DDRA_SDQ41
DDRA_SDQ27DDRA_SDQ18
DDRA_SDQ40
DDRA_SDQ25
DDRA_SDQ33
DDRA_SDQ24DDRA_SDQ17
DDRA_SDQ44
DDRA_RAS#
DDRA_SDQ38DDRA_CAS#
DDRA_SDQ39
DDRA_SDQ46
DDRA_SDM4DDRA_SDQ36DDRA_SDQ23
DDRA_SDM5DDRA_SDQ37
DDRA_SDQ45
DDRA_SDQ47
DDRA_SDQ31DDRA_SDM3DDRA_SDQ20
DDRA_SDQ29
DDRA_SDQ30
DDRA_SDQ21DDRA_SDM2DDRA_SDQ22
DDRA_SDQ28
D DRA_VREF
DDRA_SDQ56
DDRA_SDQS7DDRA_SDQ58DDRA_SDQ59
DDRA_SDQ60
DDRA_SDM7DDRA_SDQ62DDRA_SDQ63DDRA_SDQ48
DDRA_SDQ49DDRA_SDQS6DDRA_SDQ50
DDRA_SDQ52DDRA_SDQ53DDRA_SDM6DDRA_SDQ54
DDRA_SDQ6DDRA_SDQ4DDRA_SDM1DDRA_SDQ13
DDRA_SDQ14DDRA_SDQ15
DDRA_SDM0DDRA_SDQ12
DDRA_SDQS0DDRA_SDQ2DDRA_SDQ1DDRA_SDQ8
DDRA_SDQ3
DDRA_SDQ9
DDRA_SDQ10DDRA_SDQ11DDRA_SDQ0DDRA_SDQS1
+3VS
+2.5V+2.5V
+2.5V+2.5V
TitleSize Document Number R e v
DDR-SODIMM SLOT1
14 65Tuesday, June 08, 2004
Compal Electronics, Inc.
System Memory Decoupling caps
DDRA_VREF trace width of 20mils and space 20mils(min)
DIMM0
Group 6 sweep Group 7 Group 6 sweep Group 7
Group 0 sweep Group 1
Group 0 sweep Group 1
L
REVERSE
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
C4190.1U_0402_10V6K
12
C4310.1U_0402_10V6K
12
C4140.1U_0402_10V6K
12
C4350.1U_0402_10V6K
12
C4280.1U_0402_10V6K
12
C42510U_0805_6.3V6M
12
C4240.1U_0402_10V6K
12
C4300.1U_0402_10V6K
12
C4320.1U_0402_10V6K
12
C4110.1U_0402_10V6K
1
2
R4721K_0603_1%
C4120.1U_0402_10V6K
12
C4160.1U_0402_10V6K
12
C4330.1U_0402_10V6K
12
C4360.1U_0402_10V6K
12
C4220.1U_0402_10V6K
12
C4260.1U_0402_10V6K
12
C4340.1U_0402_10V6K
12
C43810U_0805_6.3V6M
12
C4170.1U_0402_10V6K
12
C4370.1U_0402_10V6K
12
C4290.1U_0402_10V6K
12
R4731K_0603_1%
C4150.1U_0402_10V6K
12
C4180.1U_0402_10V6K
12
C4270.1U_0402_10V6K
12
C4130.1U_0402_10V6K
12
VSS 16
DQ7 18
DQ12 20VDD 22DQ13 24
DM1 26
VSS 28
DQ14 30
DQ15 32VDD 34VDD 36VSS 38
VSS 40
DQ20 42DQ21 44VDD 46
DM2 48
DQ22 50VSS 52DQ23 54DQ28 56VDD 58
DQ29 60
DM3 62VSS 64DQ30 66DQ31 68VDD 70
CB4 72
CB5 74VSS 76DM8 78CB6 80
VDD 82
CB7 84
DU/RESET# 86VSS 88VSS 90VDD 92
VDD 94
CKE0 96
DU/BA2 98A11 100A8 102VSS 104
A6 106
A4 108
A2 110A0 112VDD 114BA1 116
RAS# 118
CAS# 120
S1# 122
DU 124VSS 126DQ36 128
DQ37 130
VDD 132
DM4 134DQ38 136VSS 138DQ39 140
DQ47 154
VDD 156
CK1# 158CK1 160VSS 162DQ52 164
DQ53 166
VDD 168
DM6 170DQ54 172VSS 174DQ55 176
DQ60 178
VDD 180
DQ61 182DM7 184VSS 186DQ62 188
DQ63 190
VDD 192
SA0 194SA1 196SA2 198
DU 200
C4210.1U_0402_10V6K
12
C4200.1U_0402_10V6K
12
C4230.1U_0402_10V6K
12
Trang 15DDRA_SDQ43
DDRA_SDQ31DDRA_SDQ29
DDRA_SDQ35
DDRA_SDQ42
DDRA_SDQ39
DDRA_SDQ28DDRA_SDM2
DDRA_SDQS4
DDRA_SDQ47DDRA_SDM5
DDRA_SDQS2
DDRA_SDM4
DDRA_SDQ21
DDRA_SDQ26DDRA_SDQ19
DDRA_SDQ36DDRA_SDQ20
DDRA_SDQ46DDRA_SDQ33
DDRA_SDQ27
DDRA_SDQ44
DDRA_SDM3DDRA_SDQ17
DDRA_SDQS5
DDRA_SDQ37
DDRA_SDQ41DDRA_SDQ34DDRA_SDQ16
DDRA_SDQ45DDRA_SDQ38DDRA_SDQ22
DDRA_SDQ40
DDRA_SDQS3DDRA_SDQ25DDRA_SDQ18
DDRA_SDQS7
DDRA_SDQ50DDRA_SDQ59
DDRA_SDQ51DDRA_SDQS6DDRA_SDQ48DDRA_SDQ58DDRA_SDQ57
DDRA_SDQ63
DDRA_SDQ54DDRA_SDQ53
DDRA_SDQ55
DDRA_SDQ8
DDRA_SDQS1DDRA_SDQ10DDRA_SDQ11
DDRA_SDQ12
DDRA_SDM1DDRA_SDQ14DDRA_SDQ15DDRA_SDQ0
DDRA_SDQ1DDRA_SDQS0DDRA_SDQ2
DDRA_SDQ4DDRA_SDQ5
DDRA_CKE3
DDRA_SMA13
DDRA_SMA12
DDRA_SMA3DDRA_SMA7
DDRA_SMA2DDRA_SMA11
DDRA_SMA4
DDRA_SMA14
DDRA_CKE3DDRA_CKE_R3
DD RA_WE# DDRA_SWE#
DDRA_CS#2 DDRA_SCS#2
DDRA_CKE2DDRA_CKE_R2
DDRA_RAS# DDRA_SRAS#
DDRA_CAS# DDRA_SCAS#
DDRA_CS#3 DDRA_SCS#3
DDRA_SMA9DDRA_SMA12 DD RA_ADD9D DRA_ADD12
DDRA_SMA7 DD RA_ADD7
DDRA_SMA3 DD RA_ADD3
DDRA_SMA10 D DRA_ADD10 D DRA_ADD14 DDRA_SMA14
D DRA_ADD15DDRA_SMA15
DDRA_SMA11DDRA_SMA8
+3VS
TitleSize Document Number R e v
DDR-SODIMM SLOT2
15 65Tuesday, June 08, 2004
Compal Electronics, Inc.
System Memory Decoupling caps
DIMM1
Group 6 sweep Group 7
Group 0 sweep Group 1
Group 0 sweep Group 1
DDRB_VREF trace width of 20mils and space 20mils(min)
L
STANDARD
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
R4012 10_0402_5%1R11222 10_0402_5%1
C4060.1U_0402_10V6K
12
R4711K_0603_1%
R3902 10_0402_5%1
C4080.1U_0402_10V6K
12
DM0 12
DQ6 14
VSS 16DQ7 18DQ12 20
VDD 22
DQ13 24
DM1 26
VSS 28DQ14 30DQ15 32VDD 34
VDD 36
VSS 38
VSS 40DQ20 42
DQ21 44
VDD 46DM2 48DQ22 50VSS 52DQ23 54
DQ28 56
VDD 58DQ29 60DM3 62VSS 64DQ30 66
DQ31 68
VDD 70CB4 72CB5 74VSS 76
DM8 78
CB6 80
VDD 82CB7 84DU/RESET# 86VSS 88
VSS 90
VDD 92
VDD 94CKE0 96DU/BA2 98A11 100
A8 102
VSS 104
A6 106A4 108A2 110A0 112
VDD 114
BA1 116
RAS# 118CAS# 120S1# 122
DU 124
VSS 126
DQ36 128
DQ37 130VDD 132DM4 134DQ38 136
VSS 138
DQ39 140
DQ44 142VDD 144DQ41
VSS 150
DQ46 152
DQ47 154VDD 156CK1# 158CK1 160
VSS 162
DQ52 164
DQ53 166VDD 168DM6 170DQ54 172
VSS 174
DQ55 176
DQ60 178VDD 180DQ61 182DM7 184
VSS 186
DQ62 188
DQ63 190VDD 192SA0 194SA1 196
SA2 198
DU 200
R3932 10_0402_5%1
C4100.1U_0402_10V6K
12
C3990.1U_0402_10V6K
12
+C1120
150U_D2_6.3VM
12
C3920.1U_0402_10V6K
12
12
C3960.1U_0402_10V6K
12
C3930.1U_0402_10V6K
12
C40110U_0805_6.3V6M
12
R11212 10_0402_5%1
+C1121150U_D2_6.3VM
12
12
C4090.1U_0402_10V6K
12
+C1119 150U_D2_6.3VM
12
150U_D2_6.3VM
12
R4022 10_0402_5%1
C3980.1U_0402_10V6K
12
12
C4050.1U_0402_10V6K
12
C4000.1U_0402_10V6K
12
12
R3912 10_0402_5%1
Trang 16DDRA_SDQS6DDRA_SDM6
DDRA_SDQ59DDRA_SDQ63
DDRA_SDQ48
DDRA_SDQ62DDRA_SDQ58DDRA_SDQS7DDRA_SDM7DDRA_SDQ56DDRA_SDQ60
DDRA_SDQ57DDRA_SDQ61DDRA_SDQS5DDRA_SDM5DDRA_SDQ41DDRA_SDQ45
DDRA_SDQ46DDRA_SDQ42
DDRA_SDQ35
DDRA_SDQ40
DDRA_SDQ38DDRA_SDQ34DDRA_SDQS4DDRA_SDM4
DDRA_SDQ36DDRA_SDQ32
DDR Termination Resistors
16 65Tuesday, June 08, 2004
Compal Electronics, Inc.
DDR Termination resistors & Decoupling caps
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
PIR BOM & Layout 93.1.9
C4660.1U_0402_10V6K
12
C4860.1U_0402_10V6K
12
C4700.1U_0402_10V6K
12
C4690.1U_0402_10V6K
12
RP73
56 _0804_8P4R_5%
18273645
R47433_0402_5%
12
C4720.1U_0402_10V6K
12
C4950.1U_0402_10V6K
12
C4580.1U_0402_10V6K
12
RP91
56 _0804_8P4R_5%
18273645
RP89
33_0404_4P2R_5%
1423
RP70
56 _0804_8P4R_5%
18273645
C4940.1U_0402_10V6K
12
RP82
56 _0804_8P4R_5%
18273645
1
2
C4760.1U_0402_10V6K
12
C4840.1U_0402_10V6K
1
2
C4630.1U_0402_10V6K
12
RP78
33_0804_8P4R_5%
18273645
C4904.7U_0805_16V6K
12
RP85
56 _0804_8P4R_5%
18273645
C4730.1U_0402_10V6K
12
C4740.1U_0402_10V6K
12
C4960.1U_0402_10V6K
12
C4710.1U_0402_10V6K
12
C4650.1U_0402_10V6K
12
RP84
33_0804_8P4R_5%
18273645
12
RP88
56 _0804_8P4R_5%
18273645
RP79
56 _0804_8P4R_5%
18273645
RP92
33_0404_4P2R_5%
1423
C4550.1U_0402_10V6K
12
C4930.1U_0402_10V6K
12
C4610.1U_0402_10V6K
12
C4520.1U_0402_10V6K
1
2
C4620.1U_0402_10V6K
12
RP67
56 _0804_8P4R_5%
18273645
RP75
33_0804_8P4R_5%
18273645
+C491
@100U_D2_10M_R45
12
C4680.1U_0402_10V6K
1
2
C4894.7U_0805_16V6K
12
RP72
33_0404_4P2R_5%
1423
+C492100U_D2_10M_R45
12
C4570.1U_0402_10V6K
12
12
12
C4790.1U_0402_10V6K
12
C4750.1U_0402_10V6K
12
12
C4810.1U_0402_10V6K
12
C4560.1U_0402_10V6K
12
C4800.1U_0402_10V6K
12
R1180
@100_0402_5%
1 2
C4530.1U_0402_10V6K
12
12
C4850.1U_0402_10V6K
12
C4540.1U_0402_10V6K
12
C4870.1U_0402_10V6K
12
RP69
33_0404_4P2R_5%
1423
C4770.1U_0402_10V6K
12
RP93
56 _0804_8P4R_5%
18273645
Trang 17STRAP_EAGP_AD[0 31]
STRAP_MSTRAP_O
STRAP_N
STRAP_DSTRAP_BAGP_ST[0 2]
AGP_SBA[0 7]
AGP_CBE#[0 3]
STRAP_J
XTALIN_SSFREQOUT
STRAP_G
XTALINXTALIN_SS
CRT_RTV_LUMA
AGP_REQ#
AGP_AD12
AGP_RSETTXA0-STRAP_E
AGP_SBA7AGP_SBA2
AGP_AD22AGP_AD2
CRT_HSYNCTXBCLK+
VREFGSTRAP_J
TV_CRMA
AGP_ADSTB0
AGP_AD27AGP_AD16
DVOMODESTRAP_M
AGP_AD10
AGP_SBA1
TXBCLK-AGP_PARAGP_CBE#3
AGP_AD15AGP_AD1
STRAP_K
CRT_G
STRAP_ASTRAP_K
AGP_AD29AGP_AD19AGP_AD4
CRT_B
AGP_DBI_LOAGP_ST1AGP_AD14
3VDDCCLTXB1-
MCLK_SPREADSTRAP_F
AGP_CBE#1
AGP_AD18AGP_AD9
TXB2+
TXA1-STRAP_D
TXB2-SUSSTAT#
AGP_AD26
STRAP_G
TXACLK-SSIN
AGP_SBA0AGP_ADSTB1
CLK_AGP_EXT_66MAGP_CBE#2AGP_AD31AGP_AD0
TXA0+
STRAP_TSTRAP_N
AGP_SBA5AGP_FRAME#
AGP_AD24AGP_AD3
CRT_VSYNC
ENAVDDTXB0-
STRAP_H
AGP_STOP#
TXA2-AGP_SBSTBAGP_SBA6AGP_TRDY#
AGP_AD13
AGP_AD6
DRAM128M
STRAP_SSTRAP_R
+3VS+1.5VS
+3VS
+3VS+3VS
3.3V OSC out for W180
GPIO7
1.5V OSC out for M9+X 1.2V OSC out for M10-P ID_Disable
Rb Divider Circuit for 1.2V/(1.5)dc XTALIN from 3.3Vdc OSC out
AGP, DAC & LVDS INTERFACE
AGP8X_DET#
Low:
AGP3.0(15mil)
(25mil)
(15mil)(15mil)
Selection Table For W180 SS%
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSTHIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
For VGA DDR spread sprum
Vedio Memory Config.
R268122_0402_5%2
R238 2 1 @10K_0402_5%
R234M10@1K_0603_1%
2
R1297M9@10K_0402_5%
R266 715_0603_1%
C1860.1U_0402_10V6K1
2
R248 2 1 @10K_0402_5%
R2761 1K_0603_5%2
C1880.1U_0402_10V6K
12
R269 10K_0402_5%12
R265M9+M10@0_0402_5%1 2
R2491 @10_0402_5%2
C1850.1U_0402_10V6K1
2
D69
@RB751V_SOD323 2 1
GDS
Q30M9@2N7002_SOT232
R26110K_0402_5%
ZV_LCDDATA9 AJ9ZV_LCDDATA10 AK9ZV_LCDDATA11 AH10ZV_LCDDATA12 AE6ZV_LCDDATA13 AG6
ZV_LCDDATA14 AF6ZV_LCDDATA15 AE7ZV_LCDDATA16 AF7ZV_LCDDATA17 AE8ZV_LCDDATA18 AG8
ZV_LCDDATA19 AF8ZV_LCDDATA20 AE9ZV_LCDDATA21 AF9ZV_LCDDATA22 AG10ZV_LCDDATA23 AF10
ZV_LCDCNTL0 AJ10ZV_LCDCNTL1 AK10ZV_LCDCNTL2 AJ11ZV_LCDCNTL3 AH11
DVOMODE AE10
TXOUT_L0N AK16TXOUT_L0P AH16TXOUT_L1N AH17TXOUT_L1P AJ16TXOUT_L2N AH18TXOUT_L2P AJ17TXOUT_L3N AK19TXOUT_L3P AH19TXCLK_LN AK18TXCLK_LP AJ18TXOUT_U0N AG16TXOUT_U0P AF16TXOUT_U1N AG17TXOUT_U1P AF17TXOUT_U2N AF18TXOUT_U2P AE18
TXOUT_U3N AH20TXOUT_U3P AG20TXCLK_UN AF19TXCLK_UP AG19DIGON AE12BLON/(BLON#) AG12
TX0M AJ13
TX0P AH14TX1M AJ14TX1P AH15TX2M AJ15TX2P AK15
TXCM AH13TXCP AK13DDC2CLK AE13DDC2DATA AE14
HPD1 AF12
R AK27
G AJ27
B AJ26HSYNC AG25VSYNC AH25RSET AH26DDC1DATA AF25DDC1CLK AF24AUXWIN AF26
TEST_MCLK/(NC) B6TEST_YCLK/(NC) E8PLLTEST/(NC) AE25RSTB_MSK/(NC) AG29
R2370_0402_5%
R263150_0402_5%
C1900.1U_0402_10V6K
12R255 2 1 @10K_0402_5%
Trang 18NMDA3NMDA1
NMAA11
NMDA25
NMAA12
NDQSA7NMDA11
NMDA46
NMDA50
NMDA2
NDQMA0NMAA4
NMDA52NMDA55
NDQSA2
NMDA49
NDQMA7
NMDA33NMDA19
NMDA54
MVREFD
NMDA58NMDA51
NMDA60NMDA62
MEMORY INTERFACE A
(25 mil)(25 mil)
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSTHIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
R4751K_0402_1%
R486M10@1K_0402_1%
R4781K_0402_1%
R487M10@1K_0402_1%
C4980.1U_0402_10V6K
12
AA2 B23AA3 B24AA4 C23AA5 C22AA6 F22
AA7 F21AA8 C21AA9 A24AA10 C24AA11 A25
AA12/(AA13) E21AA13/(AA12) B20AA14/(NC) C19DQMA#0 J25
DQMA#1 F29DQMA#2 E25DQMA#3 A27DQMA#4 F15DQMA#5 C15
DQMA#6 C11DQMA#7 E11
QSA0 J27QSA1 F30QSA2 F24QSA3 B27QSA4 E16QSA5 B16QSA6 B11QSA7 F10
RASA# A19
CASA# E18WEA# E19CSA0# E20CSA1# F20CKEA B19
CLKA0 B21CLKA0# C20CLKA1 C18CLKA1# A18DIMA0 D30DIMA1 B13
MVREFD B7MVREFS/(NC) B8
C503M10@0.1U_0402_16V4Z
12
Trang 19NMDB25
NMDB2NMDB4
NDQSB1
NDQSB6NDQMB5NMAB13
NDQSB5NDQSB2
NMCKEB
NMCLKB1NMCSB1#
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSTHIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AB2 M3AB3 L3AB4 L2AB5 M2AB6 M5
AB7 P6AB8 N3AB9 K2AB10 K3AB11 J2
AB12/(AB13) P5AB13/(AB12) P3AB14/(NC) P2DQMB#0 E6
DQMB#1 B2DQMB#2 J5DQMB#3 G3DQMB#4 W6DQMB#5 W2DQMB#6 AC6DQMB#7 AD2QSB0 F6QSB1 B3QSB2 K6QSB3 G1QSB4 V5QSB5 W1QSB6 AC5QSB7 AD1
RASB# R2CASB# T5WEB# T6CSB0# R5CSB1# R6
CKEB R3CLKB0 N1CLKB0# N2
CLKB1 T2CLKB1# T3
MEMVMODE0 C6MEMVMODE1 C7DIMB0 E3DIMB1 AA3
MEMTEST C8
R5091 2 4.7K_0402_5%
R5101 2 4.7K_0402_5%
R5111 2 47_0603_1%
Trang 20+2.5VS
+VDD_MEMPLL1.8
+VDD_DAC1.8+VDD_PNLPLL1.8
(20 mil)
(20 mil)(20 mil)(20 mil)
(20 mil)
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSTHIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Note: PLACE CLOSE TO U6 (VGA ATI M10P/M9+X)
C215
0.1U_0402_10V6K
12
C8690.1U_0402_10V6K12C199
0.1U_0402_10V6K12
C1940.1U_0402_10V6K12
R279
M10@0_0805_5%1 2
C2030.1U_0402_10V6K1
2
C20910U_0805_6.3V6M
12
R2811 M9@0_0603_5%2
C2200.1U_0402_10V6K
12
C2022.2U_0603_6.3V4Z
12
C863
0.1U_0402_10V6K
12
C19222U_1206_10V4Z
12
C868
0.1U_0402_10V6K
12
C2080.1U_0402_10V6K1
2
C201
0.01U_0402_16V7K
12
R2771 2 M10@0_0402_5%
L17CHB1608U301_06031 2
C217
0.1U_0402_10V6K
12
C2130.1U_0402_10V6K
12
L20CHB1608U301
R280 M10@0_0603_5%
C8620.1U_0402_10V6K12
C870
0.1U_0402_10V6K
12
C2160.1U_0402_10V6K12
C2000.01U_0402_16V7K12
C8650.1U_0402_10V6K12
C2120.1U_0402_10V6K1
2
C2050.1U_0402_10V6K1
2
C207
0.1U_0402_10V6K
12
C1960.01U_0402_16V7K12
C8710.1U_0402_10V6K12
C9680.1U_0402_10V6K1
2
C21410U_0805_6.3V6M
12
C866
0.1U_0402_10V6K
12
C195
0.01U_0402_16V7K
12
L15CHB1608U301_06031 2
C9670.1U_0402_10V6K
12
L14CHB1608U301_06031 2
C2100.1U_0402_10V6K1
2
C92
0.1U_0402_10V6K
12C197
22U_1206_10V4Z
12
M10-P/(M9+X) (4/6)
VSSRH0 F19VSSRH1 M6
VDDR4 AC10VDDR4 AC9VDDR4 AD10VDDR4 AD9
VDDR4 AG7
VDDP AA23
VDDP AA24VDDP AB30VDDP AC23VDDP AC27VDDP AE30
VDDP AF27VDDP J30VDDP M23VDDP M24VDDP N30VDDP P23VDDP P27VDDP T23VDDP T24VDDP T30VDDP U27VDDP V23VDDP V24VDDP W30VDDP Y27
LVSSR AF20LVSSR AF15
LVSSR AE19LVSSR AE16LPVSS AJ19
VSS1DI AE23
VSS2DI AE21
VDD1DI AE24VDD2DI AE22
TXVDDR AF13TXVDDR AF14
TXVSSR AG13TXVSSR AG14TXVSSR AH12
PVSS AJ28PVDD AK28
VDDR3 AC19VDDR3 AC21VDDR3 AC22VDDR3 AC8VDDR3 AD19
VDDR3 AD21VDDR3 AD22VDDR3 AD7
LVDDR_25/(LVDDR_18_25) AE20LVDDR_25/(LVDDR_18_25) AE17LVDDR_18 AF21LVDDR_18 AE15
LPVDD AJ20
C9312.2U_0603_6.3V4Z1
2
C219
0.1U_0402_10V6K
12
C2041U_0603_10V6K12
C549
@470P_0402_50V7K1
2
L16CHB1608U301_06031 2
C9700.1U_0402_10V6K1
2
C21110U_0805_6.3V6M
12
C198
0.1U_0402_10V6K
12
L19CHB1608U301_06031 2
C8670.01U_0402_16V7K12
C9690.1U_0402_10V6K
12
C21810U_0805_6.3V6M
12
U59
MIC5205-2.8BM5_SOT23-5~D
PG 4VOUT
5
EN 3VIN 1
12
L18CHB1608U301_06031 2
Trang 21Compal Electronics, Inc.
As close as ppossible to related pin
(20 mil)
POWER INTERFACE
As close as ppossible to related pin
480MIL
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSTHIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
(12A,480mils ,Via NO.=24)
2
C230
0.01U_0402_16V7K
12
C238
0.01U_0402_16V7K12C236
0.1U_0402_10V6K12
VSS H4VSS H8VSS H9VSS H12VSS H14VSS H18VSS H21VSS H23VSS H27VSS K1VSS K23VSS K24VSS K27VSS K30VSS K7VSS K8VSS L4VSS M30VSS M7
VSS M8VSS N23VSS N24VSS N27VSS P4
VSS R23VSS R24VSS R30VSS R7VSS R8
VSS T1VSS T27VSS U23VSS U4VSS U8
VSS V30VSS W23VSS W24VSS W27VSS W7
VSS W8VSS Y4VSS G9
VSS G24VSS G21VSS G18
C248
0.1U_0402_10V6K
12C245
0.1U_0402_10V6K12
C227
0.1U_0402_10V6K12
L22CHB1608U301
JOPEN5PAD-OPEN 4x4m
C237
0.1U_0402_10V6K
12
C229
0.01U_0402_16V7K1
2
C2500.01U_0402_16V7K1
M10-P ONLY
M9+X ONLY
U6F
SA002160E00(0301021300)
VDDC AD15VDDC AD13VDDC AC17VDDC AC15VDDC AC13
VSS R12VSS R13VSS T13VSS R14VSS T14VSS N15
VSS P15VSS R15VSS T15VSS U15VSS V15
VSS W15VSS H16VSS M16VSS N16VSS P16
VSS R16VSS T16VSS U16VSS V16VSS R17
VSS T17VSS R18VSS T18VSS T19
VSS W22VSS W9
C244
0.1U_0402_10V6K
12
C235
0.1U_0402_10V6K
12C234
0.1U_0402_10V6K12
C228
0.1U_0402_10V6K
12
C246
0.1U_0402_10V6K
12
C247
0.1U_0402_10V6K12
C2420.1U_0402_10V6K1
2
C231
0.01U_0402_16V7K1
2C223
22U_1206_10V4Z12
C225
0.1U_0402_10V6K12
C240
10U_0805_6.3V6M
12
+C222
150U_D2_6.3VM1
2
C241
0.1U_0402_10V6K12
C233
0.1U_0402_10V6K
12
C249
0.01U_0402_16V7K1
2
C226
0.1U_0402_10V6K12
Trang 22NMDA52NMDA17
NMDA21
NMDA61
NMDA41NMDA10
NMAA5
NMDA34
NMAA12NMAA10
NMAA1
NMDA19NMDA22
NMAA9NMAA7
NMAA4
NMDA29
NDQSA1
NMDA14NMAA12
NMDA53NMAA3
NMDA62NMDA28
NMAA1NMAA2
NMDA35
NMCKEA
NMDA3NDQMA2
NMDA54
NMRASA#
NMDA51NDQSA[0 7]
NMAA8
NMDA45NMDA47NMDA39
NMDA9
NDQSA5NDQSA7
NMDA31
NMDA27NMDA16
NMCLKA0
NMDA11
NMDA59NMDA23
NMDA0VREF_1
NMAA[0 13]
NMAA11
NDQSA6NMAA9
+2.5VS+2.5VS
VGA DDR FOR CHANNEL A
As close as ppossible to related pin
(25mil)
As close as ppossible to related pin
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSTHIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
C506
0.1U_0402_10V6K
12C504
10U_0805_10V3M
12
C512
0.1U_0402_10V6K12C1126
0.1U_0402_10V6K
12
U28
K4D263238A-GC
DQ0 B7DQ1 C6DQ2 B6DQ3 B5
DQ4 C2DQ5 D3DQ6 D2DQ7 E2DQ8 K13
DQ9 K12DQ10 J13DQ11 J12DQ12 G13DQ13 G12
DQ14 F13DQ15 F12DQ16 F3DQ17 F2DQ18 G3
DQ19 G2DQ20 J3DQ21 J2DQ22 K2DQ23 K3DQ24 E13DQ25 D13DQ26 D12DQ27 C13DQ28 B10DQ29 B9DQ30 C9DQ31 B8
VDD L4VDD L7VDD L8VDD L11
VDDQ C3
VDDQ C5VDDQ C7VDDQ C8VDDQ C10VDDQ C12
VDDQ E3VDDQ E12VDDQ F4VDDQ F11VDDQ G4
VDDQ G11VDDQ J4VDDQ J11VDDQ K4VDDQ K11
R62656.2_0402_1%
C515
0.1U_0402_10V6K
12
R4891K_0402_1%
R4881K_0402_1%
C5160.1U_0402_10V6K1
2
R62756.2_0402_1%
R4911K_0402_1%
DQ4 C2DQ5 D3DQ6 D2DQ7 E2DQ8 K13
DQ9 K12DQ10 J13DQ11 J12DQ12 G13DQ13 G12
DQ14 F13DQ15 F12DQ16 F3DQ17 F2DQ18 G3
DQ19 G2DQ20 J3DQ21 J2DQ22 K2DQ23 K3DQ24 E13DQ25 D13DQ26 D12DQ27 C13DQ28 B10DQ29 B9DQ30 C9DQ31 B8
VDD L4VDD L7VDD L8VDD L11
VDDQ C3
VDDQ C5VDDQ C7VDDQ C8VDDQ C10VDDQ C12
VDDQ E3VDDQ E12VDDQ F4VDDQ F11VDDQ G4
VDDQ G11VDDQ J4VDDQ J11VDDQ K4VDDQ K11
10P_0402_50V8K
12
R4901K_0402_1%
C11250.1U_0402_10V6K1
2C510
10U_0805_10V3M
12
C62810P_0402_50V8K
12
C508
0.1U_0402_10V6K
12
C509
0.1U_0402_10V6K12C505
0.1U_0402_10V6K12
C513
10U_0805_10V3M
12C511
0.1U_0402_10V6K
12
C5170.1U_0402_10V6K1
2
R62556.2_0402_1%
C1122
22U_1206_10V4Z12C1123
22U_1206_10V4Z
12
C514
0.1U_0402_10V6K12
C1124
0.1U_0402_10V6K
12
R62856.2_0402_1%
Trang 23NMAB10NMAB11
NMDB12
NDQMB4
NMDB57
NMDB43NMAB4
NMDB40
NDQMB7NMAB2
NMDB9
NMAB6
NMAB13
NMDB34NDQMB2
NMDB54NMDB41
NMDB50NMDB26
NMDB13
NMDB44
NMAB12
NMDB56NDQMB1
NMDB2
NDQSB1
NMDB37NMDB7
NMCKEB
NMAB5
NMDB62NMDB23
NMDB10NDQSB0
NDQMB3
NMDB30NMAB1
NMCLKB1NMCLKB0
NMAB11
NMDB16
NMAB5NMDB3
NMDB51
NMAB1NMAB[0 13]
NMCASB#
NMDB59NDQMB0
NMAB9
NMDB38NMDB36NMDB14
NDQSB[0 7]
NMDB31
NDQSB4NMDB20
NMDB48NMRASB#
NMAB8
NMCKEB
NMDB15NMDB21
NMDB27
NMCSB0#
NMDB0
NDQSB5NMDB[0 63]
VGA DDR FOR CHANNEL B
(25mil)
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSTHIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
C5390.1U_0402_10V6K1
2
C63110P_0402_50V8K
12
C5370.01U_0402_16V7K1
2
U30
K4D263238A-GC
DQ0 B7DQ1 C6
DQ2 B6DQ3 B5DQ4 C2DQ5 D3DQ6 D2
DQ7 E2DQ8 K13DQ9 K12DQ10 J13DQ11 J12
DQ12 G13DQ13 G12DQ14 F13DQ15 F12DQ16 F3
DQ17 F2DQ18 G3DQ19 G2DQ20 J3DQ21 J2DQ22 K2DQ23 K3DQ24 E13DQ25 D13DQ26 D12DQ27 C13DQ28 B10DQ29 B9DQ30 C9DQ31 B8
VDD E4VDD E11VDD L4VDD L7VDD L8
VDD L11
VDDQ C3VDDQ C5VDDQ C7VDDQ C8
VDDQ C10VDDQ C12VDDQ E3VDDQ E12VDDQ F4
VDDQ F11VDDQ G4VDDQ G11VDDQ J4VDDQ J11
VDDQ K4VDDQ K11
C535
0.1U_0402_10V6K
12
R63256.2_0402_1%
C533
22U_1206_10V4Z
12
R4941K_0603_1%
C532
0.01U_0402_16V7K1
2
C5380.1U_0402_10V6K1
2
R629 56.2_0402_1%
C63010P_0402_50V8K
12
U31
K4D263238A-GC
DQ0 B7DQ1 C6
DQ2 B6DQ3 B5DQ4 C2DQ5 D3DQ6 D2
DQ7 E2DQ8 K13DQ9 K12DQ10 J13DQ11 J12
DQ12 G13DQ13 G12DQ14 F13DQ15 F12DQ16 F3
DQ17 F2DQ18 G3DQ19 G2DQ20 J3DQ21 J2DQ22 K2DQ23 K3DQ24 E13DQ25 D13DQ26 D12DQ27 C13DQ28 B10DQ29 B9DQ30 C9DQ31 B8
VDD E4VDD E11VDD L4VDD L7VDD L8
VDD L11
VDDQ C3VDDQ C5VDDQ C7VDDQ C8
VDDQ C10VDDQ C12VDDQ E3VDDQ E12VDDQ F4
VDDQ F11VDDQ G4VDDQ G11VDDQ J4VDDQ J11
VDDQ K4VDDQ K11
C520
0.1U_0402_10V6K12
C528
22U_1206_10V4Z1
2C525
0.1U_0402_10V6K
12
R630 56.2_0402_1%
C534
0.1U_0402_10V6K12C524
0.1U_0402_10V6K12C522
0.01U_0402_16V7K1
2
R4971K_0603_1%
C5270.01U_0402_16V7K1
2
R4951K_0603_1%
C530
0.1U_0402_10V6K12
R63156.2_0402_1%
R4961K_0603_1%
22U_1206_10V4Z
12C521
0.01U_0402_16V7K
12
C526
0.01U_0402_16V7K1
2
C536
0.01U_0402_16V7K1
2C518
22U_1206_10V4Z
1
2
Trang 24+3V_VDD
CLK_BCLK
CLK_NB#
CLK_NBSMB_CK_DAT2
CLK_IREFPCI33/66#
FS1FS2PCI33/66#
CLK_BCLKCLK_BCLK#
AGP_EXT_66MFS4
FS0FS4
+3V_CLK+3VS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSTHIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
0 0 0 0 0 100 100
Spreaf OFF OR Center spread +/-0.3%
L12CHB2012U121_08051 2
R2244.7K_0402_5%
R10681 2@33_0402_1%
C1240.1U_0402_10V6K1
C1230.1U_0402_10V6K12
R9621 210K_0402_5%
C122
0.1U_0402_10V6K
12
IREF
38
VSSA 37VDDA 36
R22610K_0402_5%
R22310K_0402_5%
R9994.7K_0402_5%
Y214.318MHZ
C1190.1U_0402_10V6K12
R22510K_0402_5%
L11HB-1M2012-121JT03_0805
R2051 2 33_0402_1%
C1280.1U_0402_10V6K
12
R2081 2 33_0402_1%
C1210.1U_0402_10V6K12
R2071 233_0402_1%
Trang 25DISPOFF#
CRTL_GCRTL_BCRTL_R
TXBCLK-TXA2+
TXA0-TXB2+_NB
TXB0+_NBTXBCLK+_NBTXBCLK-_NB
TXB1-_NB
TXB0-_NBTXA2+_NB
TXB2-_NBTXA0-_NB
TXB1+_NBTXACLK-_NB
TXA2-_NBTXA1+_NBTXA1-_NB
TXA0+_NBTXACLK+_NB
DISPOFF#
DAC_BRIGINVT_PWMDISPOFF#
DDC_CLK
DDC_CLK
ENAVDDLCDVDD_A
CRT_HSYNCRFL
CRT_VSYNCRFLCRT_HSYNC
CRT_VSYNC
3VDDCDA
3VDDCCL
3VDDCCL3VDDCDA
+3VS
LCDVDD+12VALW
LCDVDD
+3VS+12VALW
SI2301DS: P CHANNELVGS: -4.5V, RDS: 130 mOHMVGS: -2.5V, RDS: 190mOHMId(MAX): 2.3AVGS(MAX): +-8V
AT LEAST 60 MIL
AT LEAST 60 MIL
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSTHIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
For M9/M110P/M11P
For internal AGP
D43DAN217_SOT23
10P_0402_50V8K12
C890.047U_0402_16V4Z1
2
R18575_0402_5%
D21DAN217_SOT23
C10110P_0402_50V8K
12
R1914.7K_0402_5%
C870.1U_0402_10V6K
1
0.1U_0402_10V6K
12
D23DAN217_SOT23
F1FUSE_1A21
R1153 20_0402_5%
R18775_0402_5%
L51 2FCM2012C-800_0805
R175100K_0402_5%
C6200.01U_0402_50V7K1
2
R10072.2K_0402_5%
D16 1 2 RB751V_SOD323
D17RB411D_SOT23
R182100K_0402_5%
L9FBM-L10-160808-300LM-T1 2
C914.7U_0805_10V4Z1
2
R11184.7K_0402_5%
GDS
Q102N7002_SOT23
2
JP6SUYIN_7849S-15G2T-HC6
111122133144105C100
10P_0402_50V8K
12
R1801K_0402_1%
L61 2FCM2012C-800_0805C102
10P_0402_50V8K1
2
C99327P_0402_50V8J
12
C104
22P_0402_25V8K
12
GDS
Q112N7002_SOT232
C6191000P_0402_50V8J12
R1154 20_0402_5%
U5874AHCT1G125GW
C970.1U_0402_10V6K
12
C864.7U_0805_10V4Z1
2
C109
10P_0402_50V8K
12
R10082.2K_0402_5%
R11174.7K_0402_5%
R1744.7K_0402_5%
2
C99427P_0402_50V8J1
2
L10FBM-L10-160808-300LM-T1 2
D42DAN217_SOT23
GD
S Q9SI2302DS 1N_SOT232
L31 2FCM2012C-800_0805
22K22K Q12
DTC124EK_SOT232
2
R11151.2K_0402_5%
2
R11501K_0402
Trang 26PCI_GNT#0
PCI_REQ#4PCI_GNT#1
PCI_REQ#0PCI_REQ#2
PCI_GNT#3
LPC_AD3LPC_AD1
LPC_DRQ#0LPC_AD0CLK_ALINK_SB
A_SERR#
PCI_CLK_R
PCI_AD4
PCI_CBE#3A_SBREQ#
A_CBE#0A_AD19
LPC_DRQ#1
PCI_AD25PCI_AD21PCI_AD16PCI_AD12PCI_AD0
LPC_FRAME#
PCI_CBE#2PCI_MINI
PCI_PIRQC#
A_OFF#
A_AD29A_AD21
A_AD5H_CPUFERR#
PCI_AD26
H_A20M#
RTCX2
A_CBE#2A_AD30
A_AD8A_AD0
LPC_AD1PCI_IRDY#
H_CPUFERR#
A_ACAT#
A_AD26
PCI_AD17PCI_LAN
SBCLK_STP#
A_AD16
PCI_AD18
PCI_AD8PCI_AD2PCI_SIO
A_PAR
A_AD22A_AD14
PCI_GNT#4
PCI_AD24
PCI_GNT#2PCI_REQ#2
SIRQLPC_AD3
PCICLK_STP#
A_DEVSEL#
A_AD20A_AD13
PCI_AD19
PCI_GNT#1PCI_AD11
A_AD27A_AD17
PCI_CBE#[0 3]
PCI_AD30
PCI_AD6PCI_EC
PCI_GNT#0PCI_REQ#3PCI_TRDY#
OVCUR#4
A_CBE#1A_AD31
A_AD10A_AD2
PCI_AD23
PCI_REQ#1
SB_APIC_D1CPURSTIN#
A_SBGNT#
A_CBE#3A_AD11
PCI_AD29PCI_AD14
+RTCBATTOVCUR#3
+RTCVCC
CHGRTC
+RTCBATT
+SB_VBAT+SB_VBAT
Trace length of PCI_CLK_R + PCI_CLK_FB should
be less than 200 mils.
PULL DOWN FOR S3
PLACE CLOSE TO CPU SOCKET
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSTHIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
C8720.1U_0402_10V6K
12
U45F
SN74LVC14APWLE_TSSOP14
O 12I
JOPEN1
D93BAS40-04_SOT23
R1059 1 2 10K_0402_5%R1491 2 200_0402_5%
R401K_0402_5%
C82
12P_0402_50V8J
12
C1065 2 1 220P_0402_50V7K
C617 2 1 220P_0402_50V7K
R1221 2 39_0402_5%
R9214.7K_0402_5%
R169330_0402_5%
R1378.2K_0402_5%
C7715P_0402_50V8J
R1064 1 210K_0402_5%
R1002 1 247K_0402_5%
R1298220_0805_5%
C1067 2 1 220P_0402_50V7K
C11280.1U_0402_16V4Z1
12
PCIRST# C15
CBE#0/ROMA10 B3CBE#1/ROMA1 C5CBE#2/ROMWE# A7
CBE#3/RTC_RD# D10FRAME# B7DEVSEL#/ROMA0 A6IRDY# C7TRDY#/ROMOE# D7
PAR A5STOP# B6PERR# C6REQ#0 B12REQ#1 C12REQ#2 D13REQ#3/PDMAREQ0# A12GNT#0 A13GNT#1 B13GNT#2 C14GNT#3/PDMAGNT0# D14SERR# D6
CLKRUN# A20
LAD0 Y14LAD1 AA14
LAD2 AB14LAD3 AA13LFRAME# AB13LDRQ#0 AC14
SERIRQ AC13
RTC_GND AB11
PCICLK4 A16PCICLK5 A17PCICLK6 D15
AD0/ROMA18 B1AD1/ROMA17 C1AD2/ROMA16 A1AD3/ROMA15 D2AD4/ROMA14 B2AD5/ROMA13 C2AD6/ROMA12 A2AD7/ROMA11 D3AD8/ROMA9 C3AD9/ROMA8 A3AD10/ROMA7 D4AD12/ROMA5 C4AD13/ROMA4 A4AD14/ROMA3 D5
AD15/ROMA2 B5AD16/ROMD0 C8AD17/ROMD1 D8AD18/ROMD2 B8AD19/ROMD3 A8
AD20/ROMD4 C9AD21/ROMD5 D9AD22/ROMD6 B9AD23/ROMD7 A9AD24/RTC_AD7 C10
AD25/RTC_AD6 B10AD26/RTC_AD5 D11AD27/RTC_AD4 A10AD28/RTC_AD3 C11AD29/RTC_AD2 B11
AD30/RTC_AD1 D12AD31/RTC_AD0 A11AD11/ROMA6 B4
CPU_PWRGD
E4
R96610K_0402_5%
R100147K_0402_5%
Trang 27LPC_PME#
SB_GA20SB_KBRST#
LPC_SMI#
SB_EC_SWI#
IDESAA0IDESAA2
IDEIORDYAIDEIRQA
IDEDA7
IDEDA13IDEDA9IDEDA0
IDEDA15
IDEDA8
IDEDA4IDEDA6
IDEDA12IDEDA10IDEDA2
IDEDACK#AIDEREQAIDEIOR#AIDEIOW#AIDECS#A3
IDEREQBIDEDACK#BIDESAB1IDEIRQBIDEIORDYBIDESAB0
IDEIOR#BIDECS#B3IDEIOW#BIDESAB2
IDEDB0IDEDB2
IDEDB7
IDEDB4IDEDB6
IDEDB11
IDEDB8IDEDB10
IDEDB15
IDEDB12IDEDB14
AC97_SDOUTAC97_SDIN1SB_SPKR
32KHZ_S5_OUT
MII_TXD3MII_TXD1MII_TXEN
SB_EEDOSB_EECLK
SPDIF_OUT
SMB_CK_CLK2_SBSMB_CK_DAT2SMB_CK_DAT2_SBAC97_BITCLK
AGP_STP#
USB20P4-USB20P2+
USB20P1+
USB20P2-USB20P3+
USB20P4+
SMB_CK_DAT2SMB_CK_CLK2_SBSMB_CK_CLK2
USB20P3+
USB20P4+
USB20P0-USB20P3-USB20P4-
KBRST# <44>
ACIN <44,48,51>EC_SMI# <44>SCI# <44>
+2.5V
+2.5V
+2.5V+3V
Compal Electronics, Inc.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSTHIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
R952
@10K_0402_5%2 1
R11840_0402_5%
RP10710K_0804_8P4R_5%
D77RB751V_SOD3232 1
R11884.7K_0402_5%
R6312.4K_0603_1%
PIDE_IORDY AB17PIDE_IRQ AC16PIDE_A0 AB15PIDE_A1 AB16PIDE_A2 AC15
PIDE_DACK# Y16PIDE_DRQ AA17PIDE_IOR# AA16PIDE_IOW# AC17PIDE_CS1# Y15
PIDE_CS3# AA15PIDE_D0 AC18PIDE_D1 AA18PIDE_D2 AC19
PIDE_D3 AA19PIDE_D4 AC20PIDE_D5 AA20PIDE_D6 AC21PIDE_D7 AB21
PIDE_D8 AA21PIDE_D9 Y20PIDE_D10 AB20PIDE_D11 Y19PIDE_D12 AB19PIDE_D13 Y18PIDE_D14 AB18PIDE_D15 Y17SIDE_IORDY AA23SIDE_IRQ AA22SIDE_A0 AC23SIDE_A1 Y21SIDE_A2 AB23SIDE_DACK# Y22SIDE_DRQ W21
SIDE_IOR# Y23SIDE_IOW# W20SIDE_CS1# AC22SIDE_CS3# AB22SIDE_D0 W23SIDE_D1 V21SIDE_D2 V23SIDE_D3 U21SIDE_D4 U23
SIDE_D5 T21SIDE_D6 T23SIDE_D7 R21SIDE_D8 R20SIDE_D9 T22
SIDE_D10 T20SIDE_D11 U22SIDE_D12 U20SIDE_D13 V22SIDE_D14 V20
SIDE_D15 W22AC_BITCLK E1AC_SDOUT E2AC_SDIN0 Y1
AC_SDIN1 Y2AC_SDIN2 Y3AC_SYNC E3AC_RST# V5SPDIF_OUT E5
R100333_0402_5%
R6810K_0402_5%
C10100.1U_0402_10V6K1
Trang 28+2.5VS
+3V
+3V_AVDDUSB+3V_AVDDC
Compal Electronics, Inc.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSTHIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
C35
0.1U_0402_10V6K
12
C88710U_0805_10V6K
C340.1U_0402_10V6K12
C460.1U_0402_10V6K12
+
C88847U_B_6.3VM1
2
C2422U_1206_16V4Z_V1
12
R11141K_0402_5%
C66
0.1U_0402_10V6K
12C63
0.1U_0402_10V6K12C64
0.1U_0402_10V6K
12
C51
0.1U_0402_10V6K
12
C9820.01U_0402_16V7Z12
C4922U_1206_16V4Z_V1
12
C530.1U_0402_10V6K1
2
C8770.1U_0402_16V7Z1
VSS M15VSS M14VSS M13VSS M12VSS M11
VSS M10VSS L19VSS L18VSS L14VSS L13
VSS L12VSS L11VSS L10VSS K19VSS K18
VSS K14VSS K13VSS K12VSS K11VSS K10VSS J9VSS J19VSS J18VSS J15VSS J12VSS G6VSS F9VSS F6VSS F18VSS F14VSS F13VSS F10VSS E9
STB_3.3V
V11 STB_3.3VV10V9 STB_3.3V
AVSSRX1 J5AVSSRX0 G4AVSSRX2 M5
VSS N11VSS N12VSS N13
VSS N14VSS N6VSS P10VSS P11VSS P12
VSS P13STB_2.5V
VSS_USB H5VSS_USB G5AVSSC N5
VSS W14VSS W15VSS W16VSS W19
12
C690.1U_0402_10V6K
12
C47
0.1U_0402_10V6K
12
C983
1000P_0402_16V7K
12
C670.1U_0402_10V6K12
C591U_0603_10V6K1
2
C300.1U_0402_10V6K12
C8820.1U_0402_16V7KC55
0.1U_0402_10V6K12
C320.1U_0402_10V6K12
C9800.01U_0402_16V7Z12
C8780.1U_0402_16V7Z
12
C6222U_1206_16V4Z_V1
12
C280.1U_0402_10V6K12
C720.1U_0402_10V6K1
2
C880
0.1U_0402_16V7Z
12
C874
0.1U_0402_16V7Z
12
C650.1U_0402_10V6K12
C390.1U_0402_10V6K1
2
C700.1U_0402_10V6K1
2
C981
1000P_0402_16V7K
12
C29
0.1U_0402_10V6K
12
R62FBM-10-201209-260-T_0805
C8830.1U_0402_16V7K
C420.1U_0402_10V6K12
C580.1U_0402_10V6K1
2
C480.1U_0402_10V6K1
2
C570.1U_0402_10V6K12
C440.1U_0402_10V6K12
C8431U_0603_10V6K12
C8810.1U_0402_16V7Z1
2
C360.1U_0402_10V6K12
C8850.1U_0402_16V7K
C25
0.1U_0402_10V6K
12
C8730.1U_0402_16V7Z
12
R60FBM-10-201209-260-T_0805
C600.1U_0402_10V6K1
2
C43
0.1U_0402_10V6K
12
C680.1U_0402_10V6K1
2
C37
0.1U_0402_10V6K
12
C9660.1U_0402_16V7K
C8790.1U_0402_16V7Z12
C260.1U_0402_10V6K12
R61FBM-10-201209-260-T_0805
C711U_0603_10V6K1
2
C500.1U_0402_10V6K12
C8750.1U_0402_16V7Z12C45
0.1U_0402_10V6K
12C41
0.1U_0402_10V6K
12
C2322U_1206_16V4Z_V1
12
C88922U_1206_16V4Z_V1
12
C31
0.1U_0402_10V6K
12
C5422U_1206_16V4Z_V1
12
C520.1U_0402_10V6K12
C33
0.1U_0402_10V6K
12
C380.1U_0402_10V6K12
Trang 29DEBUG STRAPS
CPU_STP#
STRAP HIGH
ROM ON LPC BUS
ROM ON
DEFAULT
INIT ACTIVE HIGH
DEFAULT
PROCESSOR FREQ MULTIPLIER SIO 48MHz
AUTO PWR ON
ETHERNET TXD[3:0]
AC_SDOUT SPDIF_OUT PWR_STRP
ENABLE SPEED STEP
DISABLE SPEED STEP
DEFAULT
INIT ACTIVE LOW (PIII)
33MHz NB BUS EEDO
DEFAULT
EECK
HI SPEED A-LINK STRAP
LOW
IGNORE DEBUG STRAPS
DEFAULT
DISABLE CPU FREQ SETTING
ENABLE CPU FREQSETTING
TX_EN
MANUAL PWR ON
DEFAULT
32KHZ_S5
32KHZ OUTPUT FROM SB200 (INT RTC)
32KHZ INPUT
TO SB200 (EXT RTC)
DEFAULT
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSTHIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
High : ENE910 Low : NS591L
R4810K_0402_5%
R57
@10K_0402_5%
R4110K_0402_5%
R5110K_0402_5%
R95310K_0402_5%
R4310K_0402_5%
R5210K_0402_5%
Trang 30SD_SBA1
SD_SIOR#
SD_SBA0PD_DACK#
PD_D2
PD_CS#3
PD_D15PD_D13
PD_CS#1
PD_D10PD_D8
PD_IRQAPD_IORDY
SD_DACK#
SD_SBA2
SD_D11SD_D3
SD_CSEL
SD_D8
SD_D2SD_D6
SD_SIORDYSD_D0
SD_SIOR#
CDROM_R
SD_DREQ
SD_SBA0SD_D5
IDEDA7IDEDA6
IDEDA3IDEDA12IDEDA2
PD_D12PD_D3PD_D9
IDEDA11IDEDA4
PD_D11PD_D5PD_D10IDEDA5IDEDA10
PD_D4
PD_IORDYPD_D13
IDEDB[0 15]
CDLED#
SD_D6
SD_D3SD_D12SD_D2SD_D13
SD_D10SD_D8
SD_D0SD_D15SD_D1SD_D14
SD_D5SD_D4SD_D11
PD_A0PD_CS#3PD_A1
PD_CS#1PD_DREQ#
PD_DREQ#
IDECS#A3IDESAA2IDESAA1IDECS#A3
Compal Electronics, Inc.
+5VCD trace to CONN W=100mils
W=100mils
HDD/CD-ROM Module
Placea caps near CDROM CONN.
W=100mils
+5VCD trace to CONN W=100mils
Placea caps near CDROM CONN.
Placea caps near HDD CONN.
W=80mils
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSTHIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DR9701 2 33_0402_5%
C50.1U_0402_10V6K1
2
C12@47P_0402_25V8K1 2
C210U_0805_16V4Z1
2
R26 33_0603_1%
C171000P_0402_50V7K
12
R1510K_0402_5%
C310U_0805_16V4Z1
2
R32 5.6K_0402_5%
RP12433_0804_8P4R_5%
R1110 1 2 @10K_0402_5%
C211000P_0402_50V7K
12
C14
10U_0805_16V4Z
12
2
C15
1U_0603_10V6K
12
R9688.2K_0402_5%
C64.7U_0805_10V4Z12
R195.6K_0402_5%
R41 233_0402_5%
C41U_0603_10V6K1
R61110K_0402_5%2 1
C71U_0603_25V4Z1
2
C610 0.1U_0402_10V6K12
Trang 31PCI_AD1
S1_A6S1_A4S1_A1
PCI_AD4PCI_AD2PCI_AD6
PCI_AD0PCI_AD3PCI_AD5PCI_AD9
PCI_AD12PCI_AD10PCI_AD8
PCI_AD13PCI_AD15PCI_AD17PCI_AD14PCI_AD18PCI_AD20PCI_AD22PCI_AD26PCI_AD31
PCI_AD24PCI_AD27PCI_AD29
S1_A7S1_A17S1_A25
S1_D3
S1_D13S1_D5S1_D12S1_D4S1_D11
S1_IOWR#
S1_A9S1_OE#
PCI_RST#
S1_A8S1_CE1#
S1_A14S1_INPACK#
S1_A20S1_A15
S1_A13
S1_A16S1_WE#
S1_WPS1_BVD1S1_A19
S1_VS1S1_CD1#
S1_D[0 15]
S1_A[0 25]
PCI_AD[0 31]
PCM_IDPCI_AD20
SDCM_XDALE
S1_D2S1_A18S1_D14PCI_PIRQB#
CLK_PCI_PCM
PCI_PIRQA#
SDDA0_XDD7SDDA2_XDCL
PCI_RST#
MSBS_XDD1MSD0_XDD2
SDDA0_XDD7
SDDA2_XDCLSDDA1_XDD0
SDDA3_XDD4
MSD2_XDD5SDCM_XDALE
MSD3_XDD3
MSD2_XDD5MSD3_XDD3MSBS_XDD1
MSD1_XDD6MSD0_XDD2SD_PULLHIGH
+3VS
+3VS
+VCC_5IN1 +VCC_5IN1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIALDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSAND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Compal Electronics, Inc.
Close chip termenal
C10370.1U_0402_16V4Z1
2
R12091 10K_0402_5%2
C10380.1U_0402_16V4Z1
2
C104010P_0402_50V8J
12
R12161 @43K_0402_5%2
R13061 0_0805_5%2
C10290.1U_0402_16V4Z1
2
R12201 @43K_0402_5%2
R12111 100_0402_5%2R20
2
R12181 @43K_0402_5%2R1217 33_0402_5%
R12101 43K_0402_5%2
C10270.1U_0402_16V4Z1
2
R121933_0402_5%
C10300.1U_0402_16V4Z1
CAD4/D12 K13CAD3/D5 J10
CAD6/D13 J11CAD5/D6 J12CAD7/D7 H10
CAD8/D15 H12
CCBE0#/CE1# H13CAD9/A10 G12
CAD15/IOWR# F10CAD14/A9 E13CAD16/A17 E12
CCLK/A16 B12
CTRDY#/A22CIRDY#/A15 A13
A12
CFRAME#/A23 B11CCBE2#/A12 A11
CVS1/VS1 C6CINT#/READY_IREQ# D6CSERR#/WAIT# A5
CAUDIO/BVD2_SPKR# B5
CSTSCHG/BVD1_STSCHG# C5CCLKRUN#/WP_IOIS16# D5
CCD2#/CD2# A4
CAD27/D0 C4CAD28/D8 A3CAD29/D1 B3CAD30/D9 C3CAD31/D10 B2
CRSV1/D14 J13CRSV2/A18CRSV3/D2 E10
A2
MFUNC7
J9
MSINS# H7MSPWREN#/SMPWREN# J8VCC_SD
SMBSY# H6SMCD# J7SMWP# J6SMCE# J5
2
C10350.1U_0402_16V4Z1
2
R13082.2K_0402_5%
2
C10360.1U_0402_16V4Z1
2
R12231 @43K_0402_5%2R12141 43K_0402_5%2
C10330.1U_0402_16V4Z1
2
C10280.1U_0402_16V4Z1
2
R12131 43K_0402_5%2
R12081 43K_0402_5%2
C104110P_0402_50V8J
12
R130543K_0402_5%
Trang 32S1_A11S1_A9S1_A13S1_WE#
S1_RDY#
S1_A16S1_A12S1_A7S1_A5S1_A3S1_A1S1_D0S1_D2S1_WP
S1_CD2#
S1_CD1#
S1_D11S1_D13S1_D15S1_CE2#
S1_VS1S1_IORD#
S1_IOWR#
S1_A17S1_A19S1_A21S1_A22S1_A24S1_VS2S1_RSTS1_WAIT#
S1_INPACK#
S1_REG#
S1_BVD2S1_D8S1_D10
XDCD#
SDDA1_XDD0MSBS_XDD1SDDA3_XDD4MSD3_XDD3
SDDA0_XDD7MSD2_XDD5
SDDA0_XDD7
MSD1_XDD6SDDA0_XDD7
SDDA1_XDD0
SDDA3_XDD4
MSBS_XDD1MSD1_XDD6
SDDA2_XDCLMSD0_XDD2
SDDA3_XDD4SDCM_XDALESDCK_XDWE#
SDWP
SDCK_XDWE#
XDWP#
SDDA2_XDCLSDCM_XDALE
SDWP
SDOC# <31>XDBSY# <31>
S1_IORD# <31>S1_IOWR# <31>
S1_VS2 <31>
S1_RST <31>S1_WAIT# <31>S1_INPACK# <31>S1_REG# <31>S1_BVD2 <31>
+3VS
+S1_VCC
+S1_VPP
+S1_VCC+S1_VPP
+S1_VPP+S1_VCC
+VCC_5IN1
+3VS
+VCC_5IN1 +VCC_5IN1
Tuesday, June 08, 2004
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
xD PU and PD Close to Socket
Reserve for Debug.
PCMCIA Power Controller
CardBus Socket
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL
Compal Electronics, Inc.
AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
C10480.1U_0402_16V4Z
C1042 0.1U_0402_16V4Z1 2
R122847K_0402_5%2 1
C105010U_0805_10V4Z
12
VDD_SD(P4) 26VSS1_SD(P6) 27VSS2_SD(P3) 24
WP_SD 19GND_SD 20CD_SD 21
LVD_SM(P17) 62VCC_SM(P12) 46VCC_SM(P22) 55VSS_SM(P1) 57VSS_SM(P10) 48GND_SM(P18) 58WP1_SM 41WP2_SM 42CD1_SM 43CD2_SM 44
R123047K_0402_5%2 1
R122410K_0402_5%
C1045 10U_0805_10V4Z1 2
C11530.1U_0402_16V4Z
C10534.7U_0805_10V4Z
R12321 43K_0402_5%2
C1057
@10P_0402_50V8K
12
R12351 2.2K_0402_5%2
R122743K_0402_5%2 1
C10550.01U_0402_25V4Z
12
C10440.1U_0402_16V4Z
R123310K_0402_5%
C11520.1U_0402_16V4Z
R12371 @43K_0402_5%2
R12381 43K_0402_5%2
R123147K_0402_5%2 1
C10471 21U_0603_10V4ZU38
CP-2211_SSOP16
VCCD0 1VCCD1 2
VPPD1 14VPPD0 15
C10494.7U_0805_10V4Z
C10544.7U_0805_10V4Z
12
R123410K_0402_5%
C11560.1U_0402_16V4Z
C115110U_0805_10V4Z1
2
C1046 0.01U_0402_25V4Z1 2
C11550.1U_0402_16V4Z
C10510.1U_0402_16V4Z
12