NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.. Security Classification Compal
Trang 1Model Name : A4WAB
File Name : LA-C341P
Trang 2PCH Wildcat point
USB 2.0 conn x1
page 37
USB port 0, 1
USB port 6
page 35 page 7
SPI
3.3V 24MHz
CMOS Camera
page 35
USB 3.0 conn x2
page 39
page 36
port 1 SATA CDROM Conn.
page 36
SATA HDD Conn
port 0 LAN(GbE)/ Card Reader
PCIe 2.0 5GT/s
page 37 USB/B
PCIe 2.0 x4 5GT/s
page 19~27
port 5
Nvidia N16S-GT / N16V-GM with DDR3 x4 or 8
Trang 3S1(Power On Suspend) S3 (Suspend to RAM) S4 (Suspend to Disk) S5 (Soft OFF)
SLP_S1# SLP_S3# SLP_S4# SLP_S5# +VALW +V +VS Clock
Voltage Rails
VIN
+19VB
Adapter power supply (19V)
AC or battery power rail for power circuit.
Core voltage for CPU
Note : ON* means that this power plane is ON only with AC power available, otherwise it is OFF.
ON ON ON ON
ON ON
ON ON ON ON
ON
OFF OFF OFF
OFF OFF OFF OFF OFF
LOW
LOW LOW LOW LOW
LOW LOW LOW LOW LOW LOW
HIGH HIGH HIGH HIGH
HIGH HIGH HIGH HIGH HIGH HIGH S1 S3 S5
ON
ON OFF
N/A N/A N/A
N/A N/A N/A Power Plane Description
OFF OFF OFF +VGA_CORE Core voltage for GPU
BATT+ Battery power supply (12.6V) N/A N/A N/A
CONN@
Connector USB Port (3.0 left back)
0 1 2 3 4 5 6 7 EHCI1
USB Port Table
BOARD ID Table
Board ID
0 1 2 3 4 5 6 7
PCB Revision
0.1 0.2
BTO Option Table
0.3 0.4
3
Port USB 3.0
0 12K +/- 5%
0 V
0.423 V 0.541 V
0.430 V 0.550 V
0.438 V 0.559 V
AD_BID VAD_BIDtyp VAD_BIDmax
7 56K +/- 5%
0.691 V
0.978 V 1.169 V
0.992 V 1.185 V
1.006 V 0.702 V 0.713 V
USB Port (3.0 left front) USB Port(Right 2.0)
USB Port (3.0 left front)
OFF OFF ON +3VS to +3VSDGPU power rail for GPU
+3VSDGPU
ON OFF OFF +0.675VS +0.675VS power rail for DDR3L terminator
+1.5V power rail for CPU +1.05VSDGPU +1.05VSDGPU switched power rail for GPU
ON OFF ON ON
ON ON*
OFF
ON ON*
ON OFF OFF
+3VLP B+ to +3VLP power rail for suspend power ON ON
+1.35V power rail for DDR3L ON ON OFF +1.35V
+1.05VS_VTT +1.05V power rail for CPU
ON OFF OFF
ON OFF OFF +1.5VSDGPU +1.5VSDGPU power rail for GPU
ON OFF OFF
ON +3VALW to +3VS power rail
+5VALWP to +5VALW power rail +5VS +5VALW to +5VS power rail ON OFF OFF
Touch Screen
DGPU_IDEN CPU_IDEN
VGL@, VGM@, SGT@
HW@, BW@
GC6 2.0 non GC6
GC6@
NGC6@
1DMIC@
8 9 10 11 12 13
USB Port (3.0 Left back)
Trang 42.2K 2.2K
2.2K 2.2KEC_SMB_CK2
EC_SMB_DA2
CONN78
77
67+3VALW_EC
EC_SMB_CK1EC_SMB_DA1
BATTERYSCL1
SOC_SML1CLK
+3VALW_PCH 2.2K
2.2K
Dual channel NMOS
AP2 AH1
SOC
PCH_SMBCLKPCH_SMB_DAT A
+3VALW_PCH 2.2K
2.2K
2.2K +3VS 2.2K
SODIMMD_CK_SDAT A
D_CK_SCLKDMN63D8LDW
Dual channel NMOS
SOC_SML0DAT ASOC_SML0CLK
+3VALW_PCH 2.2K
AN1 AK1
1010 0010DIMM1
VGA Internal Thermal Senser 0x9E
1010 0000
On Board Thermal Senser 0x96
DP to CRTEC_SMB_CK2
2.2K G-sensor
+3VS 2.2K
2.2K
2.2K +3V_PTP 2.2K
PTPD_CK_SDAT A
D_CK_SCLKDMN63D8LDW
Dual channel NMOS
F3 F2PCH_I2C0_SCLPCH_I2C0_SDA
+3VS 2.2K
Trang 5SY8208DQNC
R-Short (R126)
+3VALW_PCH
JUMP (J8)
+3V_LAN +3VLP
U11
+5VS SUSP#
TPS22966DPUR
+3VS
+5VS_HDD
R-Short (R126)
+5VS_ODD
JUMP (J8)
+LCDVDD
(U8)
PCH_ENVDD SPOK
Trang 6DP to CRT
HDMI
Close to AV15
eDP Panel eDP reserve to support 4K2K
EDP_COMP
SM_RCOMP0SM_RCOMP2DIMM_DRAMRST#
DDR_PG_CTRL
H_CPUPWRGDH_PROCHOT#_R
XDP_PRDY#_RXDP_PREQ#_RXDP_TCK_RXDP_TRST#_RXDP_TDI_RXDP_TDO_R
ESD@
12
R6862_0402_5%
Trang 7D D
Trace width >= 10milsDDR_A_D56
DDR_A_D48
DDR_A_D59DDR_A_D57
DDR_A_D61
DDR_A_D49
DDR_A_D53DDR_A_D51DDR_A_D54
DDR_A_D58DDR_A_D50
DDR_A_D62DDR_A_D60
DDR_A_D52DDR_A_D55
DDR_A_D63
DDR_A_D2DDR_A_D0DDR_A_D3DDR_A_D5
DDR_A_D9
DDR_A_D14
DDR_A_D7DDR_A_D10DDR_A_D12DDR_A_D15
DDR_A_D23
DDR_A_D27
DDR_A_D31DDR_A_D28DDR_A_D24
DDR_A_D30
DDR_A_D21DDR_A_D17
DDR_A_D26
DDR_A_D16DDR_A_D19
DDR_A_D42
DDR_A_D35DDR_A_D33
DDR_A_D40DDR_A_D38DDR_A_D32
DDR_A_D44DDR_A_D46DDR_A_D41
DDR_A_D45
DDR_A_DQS#0DDR_A_DQS#2
DDR_A_DQS#7DDR_A_DQS#5
DDR_A_DQS1DDR_A_DQS3DDR_A_DQS0
DDR_A_DQS4DDR_A_DQS6
DDRA_CKE1_DIMMA
DDR_A_MA0DDR_A_MA3
DDR_A_MA7
DDR_A_MA13DDR_A_MA2
DDR_A_MA14
DDR_A_MA5
DDR_A_MA10DDR_A_MA4
DDR_A_MA11DDR_A_MA9DDR_A_MA6
DDR_A_MA12DDRA_CS1_DIMMA#
DDR_A_MA15
DDR_A_BS0DDR_A_BS2
SA_CLK_DDR0SA_CLK_DDR#0SA_CLK_DDR1SA_CLK_DDR#1
DDR_B_D3
DDR_B_D8
DDR_B_D13DDR_B_D4
DDR_B_D14
DDR_B_D7DDR_B_D10
DDR_B_D2DDR_B_D0
DDR_B_D15
DDR_B_D6DDR_B_D9DDR_B_D12
DDR_B_D19
DDR_B_D29DDR_B_D20
DDR_B_D31
DDR_B_D17
DDR_B_D25DDR_B_D28DDR_B_D30DDR_B_D27DDR_B_D22DDR_B_D18
DDR_B_D24DDR_B_D16
DDR_B_D32DDR_B_D34
DDR_B_D47
DDR_B_D35DDR_B_D38DDR_B_D41DDR_B_D44
DDR_B_D37
DDR_B_D42
DDR_B_D36
DDR_B_D40DDR_B_D43DDR_B_D46
DDR_B_D62DDR_B_D51
DDR_B_D61DDR_B_D58
DDR_B_DQS#1DDR_B_DQS#3DDR_B_DQS#5DDR_B_DQS#7
DDR_B_DQS3DDR_B_DQS1DDR_B_DQS4DDR_B_DQS7DDR_B_DQS5
DDRB_CKE0_DIMMB
DDR_B_BS2DDR_B_BS0
DDR_B_MA10DDR_B_MA9
DDR_B_MA14DDR_B_MA5
DDR_B_MA13DDR_B_MA11DDR_B_MA7DDR_B_MA2DDR_B_MA0
DDR_B_MA6DDR_B_MA1
DDR_B_MA12
DDR_B_MA4
DDR_B_MA8DDR_B_MA3
DDR_B_MA15DDRB_CS0_DIMMB#
DDR_B_DQS[2 3] <18>DDR_B_DQS[0 1] <18>
DDR_B_DQS[6 7] <18>DDR_B_DQS[4 5] <18>
DDR_B_MA[0 15] <18>DDR_B_BS2 <18>DDR_B_BS0 <18>DDR_B_CAS# <18>DDR_B_WE# <18>DDR_B_RAS# <18>DDRB_CS1_DIMMB# <18>DDRB_CKE1_DIMMB <18>
SB_CLK_DDR#0 <18>SB_CLK_DDR0 <18>SB_CLK_DDR#1 <18>SB_CLK_DDR1 <18>
AW21AY21 SA_DQ50SA_DQ49
AW23AY23 SA_DQ48SA_DQ47
Trang 8SATA_RCOMPPCH_TCK_JTAGX
HDA_BIT_CLKHDA_SYNCHDA_RST#
HDA_SDIN0HDA_SDOUT
PCH_JTAG_RST#
PCH_JTAG_TDIPCH_JTAG_TDO
PCH_GPIO36
PCH_RTCX2PCH_RTCX1
PCH_INTVRMEN
SATA_IREFPCH_GPIO37PCH_JTAG_TCK
C1491U_0402_6.3V6K
12
12
R73 1 2 330K_0402_5%
T7 @
T12 @
Y132.768KHZ_12.5PF_9H03200042
12
JCMOS10_0603_5%
T95 @
C15418P_0402_50V8J
12
R1010K_0402_5% 1 2
GDS
Q52L2N7002LT1G_SOT23-3
@2
JCMOS20_0603_5%
12
Trang 9D D
SPI ROM ( 8MByte )
Reserve for EMI(Near SPI ROM)
Pull high @ VGA side
WLAN PCIE LAN
for Share EC ROM, +3VS change to +3VALW
VGA
DDR , G-Sensor
SPI ROM
From EC(For share ROM)
10/20: 2015 project not implement auto load, change R498, R500, R502, R502 to non-pop.
PU 2.2K at EC side (+3VS)
VGA, EC
XTAL24_OUTXTAL24_IN
LPC_AD2LPC_FRAME#
LPC_AD0LPC_AD3LPC_AD1
SOC_SML0CLKSOC_SML0DATAPCH_GPIO73SOC_SML1CLKSOC_SML1DATAPCH_GPIO60PCH_GPIO11
PCH_SPI_CS0#
SOC_SML0CLK
SOC_SML1CLKSOC_SML1DATA
PCH_SPI_IO3_1PCH_SPI_CLK_1PCH_SPI_CS0#
MINI1_CLKREQ#
CLK_PCIE_MINI1CLK_PEG_VGA#
CLK_PEG_VGAVGA_CLKREQ#
PCH_SPI_IO2_1VGA_CLKREQ#
PCH_SPI_MOSI_1PCH_SPI_CLK_1PCH_SPI_MISO_1PCH_SPI_CS0#
PCH_SMBCLKPCH_SMBDATASOC_SML0DATA
PCH_SPI_WP1#
PCH_SPI_IO2_1
XTAL24_INXTAL24_OUT
XCLK_BIASREF
CLK_BCLK_ITP#
CLK_BCLK_ITPCLKOUT_LPC1
PCH_SPI_IO3_1PCH_SPI_CLK_1PCH_SPI_MOSI_1
PCH_SPI_CLKPCH_SPI_MOSIPCH_SPI_HOLD1#
D_CK_SCLKD_CK_SDATA
R390 2EMI@ 1 22_0402_5%
Y224MHZ_12PF_X3G024000DC1H
1
Q8AL2N7002DW1T1G_SC88-6
16
BDW_ULT_DDR3L(Interleaved)
LPCSMBUS
C-LINKSPI
43
12
C315P_0402_50V8J
1 2
CLOCKSIGNALS
43
R142 1 210K_0402_5%
R140 1 210K_0402_5%
R11510K_0402_5%
R78 1 23.01K_0402_1%
R1164.7K_0402_5%
VGA@
13
R1061 21K_0402_5%
Q7AL2N7002DW1T1G_SC88-6 2
16
Trang 101: Port B or C is detected0: Port B or C is not detected
DDPB_CTRLDATA: Port B Detected
*
(Have internal PD)DDPC_CTRLDATA: P ort C Detected
*
1 1
A4WAB
Project_ID0 Project_ID1
not support Deep S4,S5 can NC
Note: Deep Sx need use EC GPIO for ACPRESENT function
System Power
Management
Reserved Reserved
10/15 : RP27 pin 8 remove G_SEN_INT# pull high
PCH_RSMRST#
PCH_GPIO80DGPU_HOLD_RST#
DGPU_PWR_EN
SYS_RESET#
SYS_PWROK
PM_APWROKPCH_PWROK_RSYS_PWROK_R
PCH_RSMRST#_RSUSWARN#
PBTN_OUT#_RPCH_BATLOW#
PLT_RST#
PCH_ACIN
CLKRUN#
SUSCLKPM_SLP_S5#
PCH_PCIE_WAKE#
Project_ID0
Project_ID1
PCH_GPIO80MINI1_CLKREQ#
DEVSLP0
SOC_DP1_AUXNSOC_DP1_AUXP
+RTCVCC
+3VS+3VALW_PCH
+3VS
+3VALW_PCH
+3VS+3VS
GC6@ 12
R1101 @ 20_0402_5%
U30MC74VHC1G08DFT2G_SC70-5
@
R20710K_0402_5%
@
R2061 @ 20_0402_5%
R11810K_0402_5%@
@
R21510K_0402_5%
Trang 11* (Have internal PD)
1: ENABLED0: DISABLEDSPKR / GPIO81 : NO REBOOT
1
GPIO27
0 Boradwell
CPU INFO
1 Haswell
Touch Pad Touch Screenchange to I2C0 for TS use
Pre MP modify 03/10solve VGA sequence error issue
GPIO49
0
1 DIS,Optimus UMA
DGPU_PRSNT#
GPIO28
0 Single Rank
CPU INFO
1 Dual Rank
H_THERMTRIP#
SERIRQPCH_OPIRCOMPPCH_GPIO8
PCH_GPIO1PCH_GPIO3
PCH_GPIO64PCH_GPIO67PCH_GPIO69
PCH_GPIO94PCH_GPIO0
PCH_GPIO83PCH_GPIO85PCH_GPIO87PCH_GPIO89
PCH_GPIO13PCH_GPIO24
PCH_GPIO25
DGPU_IDENCPU_IDENPCH_GPIO28
PCH_GPIO66PCH_GPIO38
EC_SMI#_SCI#
PCH_GPIO44
PCH_GPIO46
PCH_GPIO47DGPU_PRSNT#
I2C_TS_INT#
PCH_GPIO56PCH_GPIO58
PCH_GPIO76EC_LID_OUT#
PCH_GPIO37
PCH_GPIO64PCH_GPIO67
PCH_GPIO83PCH_GPIO51
EC_KBRST#
PCH_GPIO16
PCH_GPIO13PCH_GPIO11
SUSWARN#
PCH_GPIO73USB_OC1#
PCH_GPIO88PCH_GPIO85EC_SMI#_SCI#
PCH_GPIO46
PCH_GPIO24
PCH_GPIO58PCH_GPIO59PCH_GPIO42
PCH_GPIO2PCH_GPIO93PCH_GPIO1
PCH_GPIO0
PCH_GPIO3
PCH_I2C1_SCL
PCH_I2C1_SDADGPU_PWR_EN
PCH_I2C0_SCL
PCH_I2C0_SDAPCH_I2C0_SCL
PCH_I2C1_SCL
PCH_GPIO93UART_0_CTXD_DRXD
DGPU_PRSNT#
PCH_GPIO28I2C_TS_INT#
PCH_GPIO84PCH_GPIO23
PCH_GPIO44USB_OC0#
PCH_GPIO9PCH_GPIO60PCH_GPIO56
UART_0_CRXD_DTXDUART_0_CTXD_DRXD
+3VALW_PCH
+3VS
+3VS+3VALW_PCH
VGA@
R710_0402_5%
27
36
45
DR@
R22110K_0402_5%
MISCCPU/
BW@
R260810K_0402_5%
SR@
R22010K_0402_5%
VGL@
R1441K_0402_5%
27
36
45
R31110K_0402_5%
27
36
45
R2721 @ 2 1K_0402_5%
Trang 12USB3 Port 1 (MB side)
CAD not e:
Route single-end 50-ohms and max 450-mils length
Recommended minimum spacing to other signal traces is 15 mils
Touch Screen VGA
Trace width=12~15 mil, Spcing=12 milsMax trace length= 500 mil
USB3 Port 2 (MB side)
USB20_P4
PCH_GPIO42 USB_OC1#
PCH_GPIO43
USB20_N0
USB20_N2USB20_N1
USB20_P2
USBRBIASUSB20_P0
PCIE_RCOMPPCIE_IREF
PCIE_PTX_DRX_P3PCIE_PRX_DTX_N3
PCIE_PTX_DRX_N4PCIE_PRX_DTX_P4PCIE_PTX_DRX_P4PCIE_PRX_DTX_N4
C157 1 2 0.1U_0402_16V7KC76 1 2VGA@0.22U_0402_16V7K
C156 1 2 0.1U_0402_16V7K
C89 1 2VGA@0.22U_0402_16V7KC85 1 2VGA@0.22U_0402_16V7K
T34 @
Trang 13+1.05VS_VTT
+1.05VS_VTT+1.05VS_VTT
+1.05VS_VTT
+1.35V +1.35V_CPU
+VCCIO_OUT+1.05VS_VTT
C167.1U_0402_16V7K
@
1 2
T98 @
R17243_0402_1%
12
R169150_0402_1%
T142 @
R1650_0402_5% 1 @ 2
R1640_0603_5%
@12
R173130_0402_1%
R1740_0402_5%
@ 12
R30910K_0402_5%
J6JUMP_43X118
330U_D2_2V_Y
@12
R422100K_0402_5%
@ 12
@ 12
R17175_0402_1%
R1660_0402_5%
Trang 14Near B18
Near B11
Near AA21
Near AC9Near AH10Near V8
Near J18
Near A20
Near J17Near R21
Idc 1.2A Rdc 0.11ohm +/-30%
Idc 1.2A Rdc 0.11ohm +/-30%
Idc 1.2A Rdc 0.11ohm +/-30%
Idc 1.2A Rdc 0.11ohm +/-30%
Idc 1.2A Rdc 0.11ohm +/-30%
+3VALW TO +3VALW(PCH AUX Power) Short J8 for PCH VCCSUS3.3
Near PJ601
Br oadwell onlyIntel recommends a 0.47uF boot strap capacitor to be placed between V3.3DSWand DcpSUSByp power r ail
to support in-rush current
SF000006R00 220U 6.3V OSCON ESR 17mohm@100Khz
+PCH_VCCDSW+VCCRTCEXT
+PCH_VCCDSW_R
+1.05VS_AUSB3PLL+1.05VS_ASATA3PLL+1.05VS_APLLOPI
+1.05VS_VTT
+3VALW_PCH
+1.05VS_AXCK_DCB+1.05VS_AXCK_LCPLL+1.05VS_VTT
+1.5VS+RTCVCC
+3VS+1.05VS_VTT
+3VS
+1.05VS_VTT
+RTCVCC
+1.05VS_VTT+3VALW_PCH
J8JUMP_43X39
C58 @ 1U_0402_16V7K
12
L42.2UH_LQM2MPN2R2NG0L_30%
USB2THERMAL SENSOR
HSIO
BDW_ULT_DDR3L(Interleaved)
USB3OPI
RTC
GPIO/LPCVRMHDA
SERIAL IO
SUS OSCILLATORSPI
M20K18 RSVDVCCCLK
R21J17 VCCCLKVCCACLKPLL
A20
VCC3_3
W9V8 VCC3_3VCCDSW3_3
12
C381U_0402_6.3V6K
12
T102 @
C24 1 2100U_1206_6.3V6M
L32.2UH_LQM2MPN2R2NG0L_30% 1 2
C561U_0402_6.3V6K
12
C571U_0402_6.3V6K
12
C22 1 2100U_1206_6.3V6M
C48 1 21U_0402_6.3V6K
C25@1 2 100U_1206_6.3V6MC28 2 122U_0603_6.3V6M
C541 2.1U_0402_16V7K
C441 2 1U_0402_6.3V6K
L22.2UH_LQM2MPN2R2NG0L_30%
C42 1 21U_0402_6.3V6K
C49 1 21U_0402_6.3V6K
C411U_0402_6.3V6K
1 2
C37 1 2 1U_0402_6.3V6K
Trang 16CFG Straps for Processor
0: ENABLED; SET DFX ENABLED BIT
IN DEBUG INTERFACE MSR
1: DISABLED CFG3
Physical Debug Enable (DFX Privacy)
DC_TEST_AY2_AW2DC_TEST_AY61_AW61
DC_TEST_AY2_AW2DC_TEST_AY61_AW61
DC_TEST_AY62_AW62
DC_TEST_A3_B3
DC_TEST_A3_B3DC_TEST_A61_B61
DC_TEST_A61_B61
DC_TEST_C1_C2DC_TEST_B62_B63
CFG0CFG2CFG4CFG6CFG8CFG10CFG12CFG14CFG16CFG17CFG_RCOMP
TD_IREF
CFG_RCOMPOPI_COMPTD_IREF
R2241K_0402_5%
Trang 17A5WAH PVT: ESD request add
All VREF traces should have 10 mil trace width
DDRA_CS1_DIMMA#
DDR_A_MA1DDR_A_MA5DDR_A_MA9
DDR_A_MA10DDR_A_MA12
DDR_A_MA13DDR_A_BS0DDR_A_BS2
DDR_A_CAS#
DDR_A_WE#
DDRA_CKE0_DIMMA
SA_CLK_DDR0SA_CLK_DDR#0
DDR_A_D3DDR_A_D1
DDR_A_D8
DDR_A_D10
DDR_A_DQS#1DDR_A_DQS1
DDR_A_D19DDR_A_DQS2DDR_A_D17
DDR_A_D18DDR_A_DQS#2
DDR_A_D24
DDR_A_D27DDR_A_D25
DDR_A_D41DDR_A_D35DDR_A_DQS4DDR_A_D33DDR_A_DQS#4
DDR_A_D43DDR_A_D48DDR_A_DQS#6DDR_A_DQS6DDR_A_D50DDR_A_D56
DDR_A_D59
D_CK_SDATAD_CK_SCLK
DDRA_CS0_DIMMA#
SA_ODT0SA_ODT1
SA_CLK_DDR1SA_CLK_DDR#1DDR_A_MA2DDR_A_MA4DDR_A_MA7DDR_A_MA11DDR_A_MA14
DDR_A_BS1DDR_A_RAS#
DDR_A_MA15DDRA_CKE1_DIMMA
DDR_A_D4DDR_A_DQS#0DDR_A_DQS0DDR_A_D6DDR_A_D12
DDR_A_D14
DDR_A_D21
DDR_A_D23DDR_A_D20
DDR_A_D31
DDR_A_D29DDR_A_DQS3DDR_A_DQS#3DDR_A_D28
DDR_A_D39DDR_A_D37
DDR_A_D54DDR_A_D53
DDR_A_D60
DDR_A_D62
DDR_A_DQS#7DDR_A_DQS7DDR_A_D63DDR_A_D61+VREF_CA
R186100K_0402_5%
1
3
R29424.9_0402_1%
@
GDS
Q18LBSS138LT1G_SOT-23-3
@12
@12
R1851.8K_0402_1%
R191100K_0402_5%
R18966.5_0402_1%
330U_D2_2V_Y
12
@12
R561.8K_0402_1%
Trang 18DDR_B_MA13DDR_B_BS0DDR_B_BS2
DDR_B_CAS#
DDR_B_WE#
DDRB_CKE0_DIMMB
SB_CLK_DDR0SB_CLK_DDR#0
DDR_B_D38
DDR_B_DQS#4DDR_B_DQS4DDR_B_D35
DDR_B_D58DDR_B_D62
DDR_B_D42DDR_B_D45
DDR_B_D43
DDR_B_D63
DDR_B_D49DDR_B_DQS#6DDR_B_DQS6DDR_B_D50
DDR_B_D40DDR_B_D32
DDR_B_DQS#0
DDR_B_D31
DDR_B_D1DDR_B_D2
DDR_B_D0DDR_B_D3
DDR_B_D15DDR_B_DQS0
DDR_B_D14
DDR_B_D8DDR_B_DQS1DDR_B_DQS#1DDR_B_D12
DDR_B_D20DDR_B_DQS2DDR_B_DQS#2
DDR_B_D30
DDR_B_D13
DDR_B_D10DDR_B_D6
DDR_B_D11DDR_B_D9
DDR_B_D28DDR_B_DQS3DDR_B_D29DDR_B_DQS#3
D_CK_SDATAD_CK_SCLK
+VREF_CA
DDRB_CS0_DIMMB#
SB_ODT0SB_ODT1
SB_CLK_DDR1SB_CLK_DDR#1DDR_B_MA2DDR_B_MA4DDR_B_MA7DDR_B_MA11DDR_B_MA14
DDR_B_BS1DDR_B_RAS#
DDR_B_MA15DDRB_CKE1_DIMMB
DDR_B_D37
DDR_B_D56DDR_B_DQS#7DDR_B_D33
DDR_B_D60
DDR_B_D57DDR_B_DQS7
DDR_B_DQS#5
DDR_B_D46DDR_B_DQS5DDR_B_D44
+1.35V
+1.35V
+1.35V
+1.35V+1.35V
12
@12
Trang 19RESER VED
GPIO18 GPIO19 GPIO20 GPIO21 GPIO22 GPIO23 GPIO24
I
I I I HPD_C
GPIO12 GPIO13 GPIO14
I O
I HPD_A PWR_LEVEL
HPD_D HPD_E HPD_F or HPD_B Reserved GPU_PEX_RST_HOLD# PWM_VID
17mA, 16mils SM01000AG00 2A 300ohm@100mhz DCR 0.1
O O O O
SYS_PEX_RST_MON#
GC6_FB_EN GPIO0
GPIO5
GPIO1 GPIO2 GPIO3 GPIO4
GPIO6 GPIO7 GPIO8 GPIO9 GPIO10 GPIO11
PLL_VDD0.1Ux1, 22Ux1 33ohm(ESR0.05)x1
SP_PLLVDD+VID_PLLVDD0.1Ux2, 4.7Ux1,22Ux1180ohm(ESR0.2)x1
O
I
GPIO
I I/O USAGE
MEM_VREF_CTL
3D Vision
ALERT
MEM_VDD_CTL LCD_BL_PWM LCD_VCC LCD_BL_EN 3V3_MAIN_EN GPU_EVENT#
O
I/O O O
DVT modify 11/27TXC recommend from 18P change to 10PX2000 from SJ100009700 change to SJ10000G300
N14x for GPIO8N15x, N16x for O VERT
+PLLVDD
I2CS_SCLI2CS_SDA
GPIO8_OVERTGPIO9_ALERTACIN_BUF
PEG_CLKREQ#
PEX_TSTCLK_OUT+
PEX_TSTCLK_OUT-PLTRST_VGA#
PEX_TREMP
ACIN_BUF
GPIO8_OVERTGPIO9_ALERTDGPU_VIDPSI3VSDGPU_MAIN_ENGC6_FB_EN
GPU_EVENT#_R
GPU_PEX_RST_HOLD#
I2CS_SCLI2CS_SDA
+PLLVDD
+GPU_PLLVDD
XTAL_SSINXTAL_OUTBUFF
GPIO9_ALERTPLTRST_VGA#
VGA@
R201710K_0402_5%
R2007 1VGA@21.8K_0402_5%
R20001.8K_0402_5%
L2001 HCB1608KF-301T20_2P
VGA@
D2000RB751V-40_SOD323-2
VGA@
12
R2014200K_0402_5%
GC6@
C200322U_0603_6.3V6M
VGA@
12
X200027MHZ_10PF_7V27000023
GC6@
12
Q2001AL2N7002DW1T1G_SC88-6
VGA@
12
R205610K_0402_5%
@12
R205510K_0402_5%
C2001 1U_0402_16V7KVGA@
1 2
C200747U_0805_6.3V6M
VGA@
Q2000AL2N7002DW1T1G_SC88-6VGA@
RP200110K_0804_8P4R_5%
GC6@
18273645
R20160_0402_5%
VGA@
12
RP200010K_0804_8P4R_5%
VGA@
18273645
R20121VGA@2 10K_0402_5%
Trang 20SM01000I200 3000ma 33ohm@100mhz DCR 0.05
NV 15x DG-06803-V03
NV 16x DG-07158-V04
15+55mA
PVT modify 01/13DQSA, DQSA# reverse
A5MUB exchangeA5MUB exchange
A5MUB exchange
A5MUB exchange
A5MUB exchange
A5MUB exchangeA5MUB exchange
MDA45
MDA57
MDA44MDA40
MDA47MDA41
MDA46MDA42
MDA33MDA35
MDA43
MDA28
MDA38MDA34
MDA39MDA36
MDA20MDA23
MDA30MDA32
MDA21
MDA25MDA22
MDA26MDA24
MDA29
MDA2
MDA15MDA13
MDA27
MDA0
MDA18
MDA9MDA12
MDA1MDA3
MDA16MDA11
MDA5MDA7
MDA14
MDA19
MDA6
MDA17MDA4
CMDA2
CMDA9
CMDA22CMDA16CMDA3
CMDA28
CMDA10
CMDA23CMDA17
CMDA31DQMA0DQMA2DQMA4DQMA6
FBA_CMD34FB_CLAMP
DQSA3DQSA1DQSA4DQSA6
CMDA30CMDA27
CMDA23CMDA21
CMDA24CMDA26
CMDA10CMDA22
CMDA4CMDA12
CMDA8CMDA14
CMDA29CMDA9
CMDA13CMDA5
CMDA6CMDA7
CMDA28CMDA25
CMDA15CMDA11
12
R202260.4_0402_1% 1 @ 2
C2087.1U_0402_16V7K@
12
C2083.1U_0402_16V7K@
12
12
C2092.1U_0402_16V7K@
12
C2086.1U_0402_16V7K@
12
L2002CHILISIN PBY160808T-330Y-N
VGA@
12
12
12
R202810K_0402_5%
VGA@
C2089.1U_0402_16V7K@
12
Trang 21MULTI LEVEL STRAPS
strap3strap2
strap1strap0
For GC62.0 useN14x for CEC ,NCN15x, N16x for GPIO8
Decive ID : 0x1347
For N16V-GM Binary strap table
256Mx16x84G
STRAP0
0x2 (SA000076P20) Samsung K4W4G1646D-BC1A0x1 (SA000077K20) Micron MT41J256M16HA-093G:E0x0 (SA00006E840) Hynix H5TC4G63AFR-11C
VRAMVoltage RANK
VRAMVoltage RANK+1.5V Dual
PU 45.3K PD 45.3K PU 10K PD 4.99K
+1.5V Single
1GHz 256Mx16x42G
0x2 (SA000076P20) Samsung K4W4G1646D-BC1A0x1 (SA000077K20) Micron MT41J256M16HA-093G:E
PD 15K
PD 10K
+1.5V Single
Dual +1.35V
256Mx16x42G1GHz
0x4 (SA000076P20) Samsung K4W4G1646D-BC1A0x1 (SA000077K20) Micron MT41J256M16HA-093G:E
0xC (SA000076P20) Samsung K4W4G1646D-BC1A0xD (SA000077K20) Micron MT41J256M16HA-093G:E
PD 24.9K
PD 10K
PU 24.9K
PU 30.1K0xE (SA00006E840) Hynix H5TC4G63AFR-11C
0x0 (SA00006E840) Hynix H5TC4G63AFR-11C
0x2 (SA00006E840) Hynix H5TC4G63AFR-11C
X76614BOL05 X76614BOL04 X76614BOL06
X76614BOL08 X76614BOL07 X76614BOL09
X76614BOL11 X76614BOL10 X76614BOL12 X76614BOL14
X76614BOL16
X76614BOL13 X76614BOL15
STRAP4
ROM_SOROM_SCLK
ROM_SIROM_SOROM_SCLK
VCCSENSE_VGA
VSSSENSE_VGA
STRAP2STRAP4STRAP0SYS_PEX_RST_MON#
MULTI_STRAP_REF0_GND
JTAG_TCK
JTAG_RST
JTAG_TDIJTAG_TDOTESTMODE
VCCSENSE_VGA <52>
VSSSENSE_VGA <52>
SYS_PEX_RST_MON# <19>
+3VSDGPU_MAIN+3VSDGPU_AON
Security Classification Compal Secret DataTHIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC
Security Classification Compal Secret DataTHIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC
R202949.9K_0402_1%
SGT@
T186PAD@
R204015K_0402_1%@
T1PAD@
R205140.2K_0402_1%
VGA@
R20324.99K_0402_1%
@
R203110K_0402_1%
VGM@
T18PAD@
R20384.99K_0402_1%@
R205010K_0402_5%
@
R20374.99K_0402_1%
VGM@
R205310K_0402_5%
VGA@
R20364.99K_0402_1%
@
R20454.99K_0402_1%SGT@
T3PAD@
R20304.99K_0402_1%
@
R205410K_0402_5%
VGA@
Trang 22Under GPU Near GPU
Under GPU Near GPU
Near GPU
NV 15x DG-06803-V03
NV 16x DG-07158-V04
1.275A 3.24A
+1.5VSDGPU
+1.05VSDGPU
+3VSDGPU_AON
+3VSDGPU_MAIN+1.5VSDGPU
R207840.2_0402_1%
R207942.2_0402_1% VGA@
R208051.1_0402_1% VGA@
R20750_0603_5%
Trang 23Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC
Issued Date Deciphered Date
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC
Issued Date Deciphered Date
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC
Issued Date Deciphered Date
GND_057 K11
GND_101 U2GND_100 U18GND_099 U16GND_098 U14GND_097 U12GND_096 U10GND_095 T17GND_094 T15GND_093 T13GND_092 T11GND_091 R18GND_090 R16GND_089 R14GND_088 R12GND_087 R10GND_086 P5GND_085 P26GND_084 P23GND_083 P2GND_082 P17GND_081 P15GND_080 P13GND_079 P11GND_078 N18GND_077 N16GND_076 N14GND_075 N12GND_074 N10GND_073 M17GND_072 M15GND_071 M13GND_070 M11GND_069 L5GND_068 L25
GND_107 V15GND_053
V17
GND_109 Y2GND_056
H5
GND_110 Y23GND_054
H23
GND_111 Y26GND_055
H25
GND_112 Y5
GND_067 L23GND_066 L2GND_065 L18GND_064 L16GND_063 L14GND_062 L12
GND_052
E8
GND_061 L10GND_060 K17GND_059 K15GND_058 K13
GND AA7GND AB7
Trang 24RST A14
CMD22 CMD23
CMD30
CMD24 CMD25 CMD26 CMD27 CMD28 CMD29 CMD15
Mode E
CMD0 CMD1 CMD2 CMD3 CMD4 CMD5 CMD6 CMD7 CMD8 CMD9 CMD10 CMD11 CMD12 CMD13 CMD14 CMD16 CMD17 CMD18 CMD19 CMD20
A11 CAS*
A10
BA1 A13 A1
A5 A2
BA2 WE*
A8 A0
A1 A3
A10
RAS*
A0
A14 ODT
BA0
A7 A4 A6
DDR3
Command Bit Default Pull-downODTx 10kCKEx 10k
Rank0 Rank1
ODT CS1*
CKE A11 A11 BA1 A12 A12
A12 A12 A0 A0
A2 A2 RAS* RAS* RAS*
A3 A3 A13 A13 CAS* CAS*
CS1* CKE RST RST A6 A6 A5 A5 A9 A9 A1 A1 WE* WE* A4 A4 A10 A10 WE*
BA0 BA0 BA0
Group0
Group3
Group1Group2VRAM P/N: SA00006E840
CMDA4CMDA5CMDA6CMDA7
CMDA8
CMDA9CMDA10
CMDA11
CMDA12
CMDA13CMDA14
CMDA15
CMDA20
CMDA21CMDA22
CMDA23CMDA24
CMDA25CMDA26
CMDA27
CMDA28
CMDA29
CMDA4CMDA5CMDA6CMDA7
CMDA8
CMDA9CMDA10
CMDA12CMDA21CMDA22
CMDA23CMDA24
CMDA25CMDA26
CMDA0CMDA3
CMDA11CMDA13
CMDA15CMDA27
CMDA28
CLKA0#
CLKA0CMDA29
CMDA20
DQMA0DQSA0
DQSA#0
CMDA0CMDA16CMDA20
MDA6MDA4MDA5MDA7
MDA27MDA26
MDA25MDA24
MDA12MDA9MDA14MDA13MDA15MDA8
MDA16
MDA17
+MEM_VREFDQ0
MDA20MDA19MDA22
MDA21MDA23
Security Classification Compal Secret DataTHIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC
Security Classification Compal Secret DataTHIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC
R2087162_0402_1%
VGA@
R2082243_0402_1%
96-BALLSDRAM DDR3
R20851.33K_0402_1%
VGA@
R20921.33K_0402_1%
R20991VGA@ 210K_0402_5%
R20911.33K_0402_1%
VGA@
C2055.1U_0402_16V7KVGA@
12
R2081243_0402_1%
96-BALLSDRAM DDR3
12
R20861.33K_0402_1%
VGA@
Trang 25Lower Rank 1 TOP SIDE
VRAM DDR3 chips
0 31 32 63 ODT
Rank1 Rank0
BA1
A11 A11 CKE CS1*
A8 A8
A12 A12 A0 A12 A12
A8
RAS*
A2 A2 A0
A14 A14 A13
RAS*
RAS*
CAS*
A13 A13 A3 A3
CKE CS1*
ODT ODT
CAS*
A6 A6 RST RST
A9 A9 A5 A5
A4 WE*
WE*
A1 A1
A10 A10 A4
BA0 BA0 BA0 WE*
A9 A6 A9 A7
CMD22
A14
RST
CMD23 CMD25 CMD24
CMD30 CMD29 CMD28 CMD27 CMD26
Mode EAddress
CMD15
32 63
CMD3 CMD2 CMD1 CMD0 0 31
CMD6 CMD5 CMD4
CMD10 CMD9 CMD8 CMD7
CMD14 CMD13 CMD12 CMD11
CMD17 CMD16
CMD20 CMD19 CMD18
CAS*
A11
A7 CMD21
BA1
A10 A2 A5
A1 A13
A2
WE*
BA2
A11 CS0*
BA2
A3
BA1 CAS*
BA2 A5
A4 A7
Default Pull-downCommand Bit
10kCKE
RSTNot Available
10kCS* No Termination
Group0Group3
ZQ3CMDA20
DQSA1
DQMA1
DQSA#1DQSA2
DQSA#2DQMA2
CMDA29CMDA6CMDA30
CLKA0CLKA0#
CMDA3CMDA0CMDA11CMDA15
CMDA20
CMDA9CMDA24CMDA13CMDA22CMDA5CMDA23CMDA4CMDA14
CMDA29CMDA6CMDA30
CLKA0CLKA0#
CMDA3CMDA0CMDA11CMDA15
DQSA0DQMA3DQSA3
DQMA0
MDA1MDA2MDA3MDA0
MDA30MDA28MDA29MDA31
MDA9MDA12MDA14MDA8MDA15MDA13
MDA16
MDA17MDA20
MDA23MDA22
Security Classification Compal Secret DataTHIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC
Security Classification Compal Secret DataTHIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC
R2100243_0402_1%
96-BALLSDRAM DDR3
96-BALLSDRAM DDR3
Trang 26Upper Rank 0 BOT SIDE
0 31 32 63 ODT
Rank1 Rank0
BA1
A11 A11 CKE CS1*
A8 A8
A12 A12 A0 A12 A12
A8
RAS*
A2 A2 A0
A14 A14 A13
RAS* RAS*
CAS*
A13 A13 A3 A3
CKE CS1* ODT ODT
CAS*
A6 A6 RST RST
A9 A9 A5 A5
A4 WE* WE*
A1 A1
A10 A10 A4
BA0 BA0 BA0 WE*
A9 A6 A9 A7
CMD22
A14
RST
CMD23 CMD25 CMD24
CMD30 CMD29 CMD28 CMD27 CMD26
Mode EAddress
CMD15
32 63
CMD3 CMD2 CMD1 CMD0 0 31
CMD6 CMD5 CMD4
CMD10 CMD9 CMD8 CMD7
CMD14 CMD13 CMD12 CMD11
CMD17 CMD16
CMD20 CMD19 CMD18
CAS*
A11
A7 CMD21
BA1
A10 A2 A5
A1 A13
A2
WE*
BA2
A11 CS0*
BA2
A3
BA1 CAS*
BA2 A5
A4 A7
Default Pull-downCommand Bit
10kCKE
RSTNot Available
10kCS* No Termination
Group5Group6
Group7Group4
DQSA6
DQMA6
DQSA#6
CMDA7CMDA24CMDA22CMDA6CMDA26CMDA5CMDA21CMDA8CMDA25CMDA9CMDA12
CMDA29CMDA27
CMDA19
CMDA15
CMDA20
CMDA16CMDA11
CMDA29CMDA27
CMDA19
CMDA15CMDA16CMDA11
+MEM_VREFDQ1+MEM_VREFCA1
MDA50MDA53MDA55MDA52
MDA51MDA48MDA49
MDA54
MDA63MDA58MDA56
MDA60MDA57MDA59
MDA61MDA62
MDA37MDA38MDA36MDA39
MDA41MDA40MDA43MDA42
MDA33MDA32MDA35MDA34
Security Classification Compal Secret DataTHIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC
Security Classification Compal Secret DataTHIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC
R20881.33K_0402_1%
VGA@
96-BALLSDRAM DDR3
R20891.33K_0402_1%
VGA@
C2057.1U_0402_16V7KVGA@
12
96-BALLSDRAM DDR3
R2084243_0402_1%VGA@
C2058.1U_0402_16V7KVGA@
12
R2103162_0402_1%
VGA@
R20961.33K_0402_1%VGA@
Trang 27Upper Rank 1 TOP SIDE VRAM DDR3 chips
0 31 32 63 ODT
Rank1 Rank0
BA1
A11 A11 CKE CS1*
A8 A8
A12 A12 A0 A12 A12
A8
RAS*
A2 A2 A0
A14 A14 A13
RAS*
RAS*
CAS*
A13 A13 A3 A3
CKE CS1*
ODT ODT
CAS*
A6 A6 RST RST
A9 A9 A5 A5
A4 WE*
WE*
A1 A1
A10 A10 A4
BA0 BA0 BA0 WE*
A9 A6 A9 A7
CMD22
A14
RST
CMD23 CMD25 CMD24
CMD30 CMD29 CMD28 CMD27 CMD26
Mode EAddress
CMD15
32 63
CMD3 CMD2 CMD1 CMD0 0 31
CMD6 CMD5 CMD4
CMD10 CMD9 CMD8 CMD7
CMD14 CMD13 CMD12 CMD11
CMD17 CMD16
CMD20 CMD19 CMD18
CAS*
A11
A7 CMD21
BA1
A10 A2 A5
A1 A13
A2
WE*
BA2
A11 CS0*
BA2
A3
BA1 CAS*
BA2 A5
A4 A7
Default Pull-downCommand Bit
10kCKE
RSTNot Available
10kCS* No Termination
Group5Group6
Group7Group4
CMDA29
CMDA10CMDA9
CMDA14CMDA5
CMDA7CMDA8CMDA4
CMDA19
CMDA11CMDA16CMDA15
CMDA20CMDA17
CMDA22CMDA24
CMDA23CMDA13
CMDA28CMDA21CMDA10CMDA9
CMDA14CMDA5
CMDA7CMDA8CMDA4
CMDA30CMDA6CMDA29
CMDA11CMDA16CMDA15CMDA17
DQSA7
DQMA7
DQSA#7DQSA4
DQSA#4
DQMA4
DQMA5DQSA5DQMA6
DQSA#6DQSA6
MDA48MDA51
MDA63MDA61MDA59
MDA60MDA57
MDA56MDA58
MDA38
MDA39MDA36
MDA37
MDA42MDA43
MDA44MDA46MDA45
MDA33MDA32MDA34MDA35
Security Classification Compal Secret DataTHIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC
Security Classification Compal Secret DataTHIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC
R2090243_0402_1%
VGA@
96-BALLSDRAM DDR3
Trang 28Place closed to JLVDS1
W=60mils
W=60mils W=60mils LCD/ LED PANEL Conn.
EDP_TXP1_CEDP_TXN1_C
EDP_HPDEDP_AUXN_C
PCH_INV_PWMBKOFF#
USB20_N6_CAMERA
USB20_P6_CAMERAUSB20_N6_CAMERAUSB20_N6
USB20_P6
PCH_INV_PWMBKOFF#
EDP_HPD
EDP_AUXN_CEDP_TXP0_CEDP_TXN0_CEDP_TXP1_CEDP_TXN1_CEDP_TXP2_CEDP_TXN2_CEDP_TXP3_CEDP_TXN3_C
USB20_P5PCH_I2C0_SCLI2C_TS_RST#
I2C_TS_INT#
EDP_TXP2_CEDP_TXN2_C
EDP_TXP3_CEDP_TXN3_C
+3VS
+3VS
+INVPWR_B+
+3VS+LCDVDD
+5VS
+TS_PWR+3VS
+TS_PWR+LCDVDD
C3674.7U_0603_6.3V6K
12
C3701 2 1U_0402_16V7K
R4271 @ 20_0402_5%
L27CMMI21T-900Y-N_4P
12
C419.1U_0402_16V7K@
12
C36568P_0402_50V8J
XEMI@ 12
C3691 2 1U_0402_16V7KC3741 2 1U_0402_16V7K
R810_0603_5%@
XEMI@
12
R364100K_0402_5%
C3711 2 1U_0402_16V7K
C3750.1U_0402_16V7K
12
R4281 @ 20_0402_5%
L11HCB2012KF-221T30_2P