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Dc dc converters feedback and control

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Nội dung

Design MPPT solar charge controller and understand that by manipulating the load impedance seen from the solar panel (reducing the duty cycle of the buck converter), the input voltage to the DCDC converter (from the solar panel) will increase as the load current will also increase with constant voltage output( the load being the battery). The charge controller will minatan the duty cycle where the load current stop increasing as this is to be the maximum point. The problem is I want the output voltage to be relatively controlled or constant while the load current increasing . How the output voltage is held constant while changing the duty cycle to increase the current? if the answer is by having a feedback loop that change the duty cycle, then this will interfere with reducing producer of the duty cycle to increase the current.

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Dc-dc converters feedback and control

presented by Christophe Basso Product Applications Engineering Director

Pardon his French!

Wild Bill Hickok

Trang 2

 Phase margin and quality coefficient

 Undershoot and crossover frequency

 Compensating the converterp g

 Current-mode converters

 Automated pole-zero placement

 Manual pole-zero placement Oooh, that looksso good!

 Manual pole-zero placement

Trang 3

 Phase margin and quality coefficient

 Undershoot and crossover frequency

 Compensating the converterp g

 Current-mode converters

 Automated pole-zero placement

 Manual pole-zero placement

 Manual pole-zero placement

Trang 4

What do we expect from a dc-dc?

 A stable output voltage, whatever loading, input, temperature and aging conditions

 A fast reaction to a incoming perturbation such as a load g p

transient or an input voltage change

 A quick settling time when starting-up or recovering from a transient state

Trang 5

What is feedback?

A target is assigned to one or several state variables e g V

A target is assigned to one or several state-variables, e.g V out

= 12 V

A dedicated circuit monitors V out deviations

If V out deviates from its target, an error is created and fed-back

to the power stage for action

 The action is a change in the control variable: duty-cycle (VM),

 The action is a change in the control variable: duty cycle (VM), peak current (CM) or switching frequency

Compensating for the converter shortcomings!

Trang 6

The feedback implementation

V is permanently compared to a reference voltage V

V out is permanently compared to a reference voltage V ref

The reference voltage V ref is precise and stable over temperature

 The error,  V ref  V out, is amplified and sent to the control input

 The power stage reacts to reduce  as much as it can

V out

Power stage - H

V out Power stage - H

Error amplifier - G

d

Error amplifier - G d

Control variable

R lower

V ref Modulator - G PWM

V p

+ -

R lower

V ref Modulator - G PWM

V p

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 Phase margin and quality coefficient

 Undershoot and crossover frequency

 Compensating the converterp g

 Current-mode converters

 Automated pole-zero placement

 Manual pole-zero placement

 Manual pole-zero placement

Trang 8

Positive or negative feedback?

 Do we want to build an oscillator?

 = -180°

Trang 9

Observing the 0 dB point

Create phase lag: cascading RC networks

Create phase lag: cascading RC networks

80.0

1 2

R3 1k

3

R2 1k

4

R1 1k

Vout

0 40.0

2

C2 10n

3

C1 10n

4

AC = 1 V1

H(s)

-80.0 -40.0

2

|H| = -29 dB

0 100

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A constant gain with a 180° rotation

Add gain to obtain T(s) 0 dB where 180° (38 kHz)

R3 1k

2

R2 1k

1

R1 1k

Add gain to obtain T(s) = 0 dB where  = -180° (38 kHz)

Gfc=-29 G=10^(-Gfc/20)

Ri 100k

C3 10n

2

C2 10n

1

C1 10n

6

SUM2 K1 = 1 K2 = 1

7

R4 {Ri}

{Rf}

Vin

E1 10k

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A constant gain with a 180° rotation

 Starting the oscillator with a crank play with gain

 Starting the oscillator with a « crank », play with gain

R1 1k

R2 1k

R3 1k

2

1k

C2 10n

3

1k

C3 10n

parameters

Gfc=-29 G=10^(-Gfc/20) Ri=100k

{ } R5

Ri 100k Rf=G*100k

{Ri}

5 {Rf}

Yank me Crank me!

V1 Tran Generators = PWL

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A simple oscillator

 Case n°1 gain is below 1 at 180°

 Case n°1, gain is below 1 at  = -180°

 Oscillations are damped, system is asymptotically stable

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A simple oscillator

 Case n°2 gain is above 1 at 180°

 Case n°2, gain is above 1 at  = -180°

 Oscillations are not damped, system diverges

frequency in hertz -180

-90.0

 = -180°

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A simple oscillator

 Case n°3 gain is equal to 1 at 180°

 Case n°3, gain is equal to 1 at  = -180°

 Oscillations are sustained, we have an oscillator!

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Conditions for oscillations

 when the open-loop gain equals 1 (0 dB) – crossover point

 when the open loop gain equals 1 (0 dB) crossover point

phase rotation is -360° in total (-180° for H and -180° for G)

 we have self-sustaining oscillating conditions

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Conditions for steady-state stability

 We do not want to create an oscillator!

 We do not want to create an oscillator!

 Conditions for non-permanent oscillations are:

 total phase rotation less than -360° at the crossover point

180

Loop gain |T(s)| Gain is 1

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The need for phase margin

 we need phasephase margin when T(s) = 0 dB

 we need phasephase margin when T(s) = 0 dB

 we need gaingain margin when arg T(s) = -360°

Phase margin:

The margin before the loop

phase rotation arg T(s)

phase margin

gain

phase

80.0 180

Trang 18

Hey, -360°, -180° or 0°?

w2 is delayed by -155° compared to w1

w2 is also in advance by 205° compared to w1

 if the delay further shifts to -360° (2) reading goes back to 0°

1.50u 4.50u 7.50u 10.5u 13.5u

time in seconds

µ

Trang 19

Hey, -360°, -180° or 0°?

 all these plots read the same phase margin!

 all these plots read the same phase margin!

0 90.0 180

-180 -90.0 0

-40.0

6

360 80.0

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 Phase margin and quality coefficient

 Undershoot and crossover frequency

 Compensating the converterp g

 Current-mode converters

 Automated pole-zero placement

 Manual pole-zero placement

 Manual pole-zero placement

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Poles, zeros and s-plane

 A plant loop gain is defined by:

 A plant loop gain is defined by:

solving for N(s) 0, the roots are called the zeroszeros

solving for D(s) = 0, the roots are called the polespoles

5

796 2

1

159 2

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Poles, zeros and s-plane

 How do the poles influence the temporal response of the plant?

 How do the poles influence the temporal response of the plant?

 assume an input-step response is wanted:

multiply H(s) by 1/s

 take the inverse Laplace transform

 plot the response

 The roots are the exponentials exponents: -1 and -2

 If the roots are negative the signal is decayingdecaying

 If the roots are negative, the signal is decayingdecaying

 If the roots are positive, the response divergesdiverges

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Poles, zeros and s-plane

The roots can either be real or imaginary:

The roots can either be real or imaginary:

z p p

s s

 We can place these roots in the imaginary plane

root-locus analysis in the s-plane

their positions in the s-plane affect the temporal response!

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Poles, zeros and s-plane

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Poles, zeros and s-plane

 A quick refresh on imaginary numbers

 A quick refresh on imaginary numbers…

N A

D

c

N A

D

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Poles, zeros and s-plane

 A pole lags the phase by 45° at its cutoff frequency

 A pole lags the phase by -45° at its cutoff frequency

20.0

0

Cutoff f

20.0

0

Cutoff f

Vin Vout

-40.0 -20.0 0

C1 V1

V1

AC = 1

-60.0 -40.0 -20.0

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Poles, zeros and s-plane

 Its module at the cutoff frequency is 3 dB

 Its module at the cutoff frequency is -3 dB

Its asymptotic phase at f = ∞ is -90°

 The pole "lags" the phase

out in

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Poles, zeros and s-plane

 A zero boosts the phase by +45° at its cutoff frequency

 A zero boosts the phase by +45° at its cutoff frequency

20 dB decade

frequency in hertz -60.0

-40.0 -20.0

Cutoff frequency -3 dB +1 slope

20 dB decade

frequency in hertz -60.0

-40.0 -20.0

Cutoff frequency -3 dB +1 slope

frequency in hertz

50.0 70.0 90.0

frequency in hertz 10.0

30.0

frequency in hertz 10.0

30.0

frequency in hertz 10.0

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Poles, zeros and s-plane

 Its module at the cuttoff frequency is +3 dB

 Its module at the cuttoff frequency is +3 dB

Its asymptotic phase at f = ∞ is +90°

 The zero "boosts" the phase

0

( )

1 ( )

out in

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Poles, zeros and s-plane

 Poles and zeros can sometimes appear "at the origin"

 Poles and zeros can sometimes appear "at the origin"

 0

( ) ( )

( ) ( )

As f increases the gain decreases

with a -1 slope (-20 dB/decade)

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The Right Half-Plane Zero

In a CCM boost I is delivered during the off time: I I I 1 D

In a CCM boost, I out is delivered during the off time: I outI dI L 1 D

I I

in

V L

I L

1

in

V L

If D brutally increases D' reduces and I drops!

If D brutally increases, D reduces and I out drops!

 What matters is the inductor current slew-rate d V L  t

dt

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The Right Half-Plane Zero

If I (t) can rapidly change I increases when D goes up

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The Right Half-Plane Zero

If I (t) is limited because of a big L I drops when D increases

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The Right Half-Plane Zero

 Small signal equations can help us to formalize it

 Small-signal equations can help us to formalize it

2 '

load z

 Voltage mode or c rrent mode the RHPZ (song) remains the same

 Voltage mode or current mode, the RHPZ (song) remains the same

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The Right Half-Plane Zero

 To limit the effects of the RHPZ limit the duty cycle slew rate

 To limit the effects of the RHPZ, limit the duty-cycle slew-rate

 Chose a cross over frequency equal to 20-30% of RHPZ position

 A simple RHPZ can be easily simulated:

R1 10k

1 2

X1 SUM2 K1 = 1 K2 = 1 10k

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The Right-Half-Plane-Zero

 With a RHPZ we have a boost in gain but a lag in phase!

 With a RHPZ we have a boost in gain but a lag in phase!

40.0

1

-20.0 0 20.0

-180 -90.0

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The Right-Half-Plane-Zero

 A RHPZ also exists in DCM boost buck boost converters

 A RHPZ also exists in DCM boost, buck-boost converters

When D increases [D D ] stays constant but D shrinks

When D1 increases, [D1,D2] stays constant but D3 shrinks

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 The refueling time of the capacitor is delayed and a drop occurs

 The refueling time of the capacitor is delayed and a drop occurs

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The Right-Half-Plane-Zero

If D increases the diode current is delayed by ˆd

If D increases, the diode current is delayed by

300m 340m

5.00 7.00

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The Right-Half-Plane-Zero

 Averaged models can predict the DCM RHPZ

 Averaged models can predict the DCM RHPZ

11

L1 75u

R10 150m

vout

X3 PWMVM

1 1 2

6 8

X2 AMPSIMP V22.5Verr

1

1kH

10

CoL 1kF V1

278mV 278mV

0V

out d

V1x

AC = 1

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The Right-Half-Plane-Zero

 Averaged models can predict the DCM RHPZ

 Averaged models can predict the DCM RHPZ

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 Undershoot and crossover frequency

 Compensating the converterp g

 Current-mode converters

 Automated pole-zero placement

 Manual pole-zero placement

 Manual pole-zero placement

Trang 43

How much margin? The RLC filter

let us study an RLC low pass filter a 2nd order system

let us study an RLC low-pass filter, a 2nd order system

R1

2 3

{R}

1

{L}

C1 {C}

Vout Vin

L

zeta

R=1/((({C}/(4 {L}))^0.5) 2 {Q})

Trang 44

The RLC response to an input step

changing Q affects the transient response

changing Q affects the transient response

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The RLC response to an input step

 Q affects the poles position

Q < 0.5, two real negatives roots

Q = 0.5, two real coincident negative roots

Q > 0 5 two complex roots

Q > 0.5, two complex roots

High Q

LHP RHP

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Where is the analogy with T(s)?

in the vicinity of the crossover point T(s) combines:

in the vicinity of the crossover point, T(s) combines:

 one pole at the origin, 0

 one high frequency pole, 2

-80.0

-180

Trang 47

Closed-loop gain study

Linking the open loop phase margin to the closed loop Q

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Closed-loop gain study

 if we plot the closed loop expression:  

90 arg T i(   )

2  

10 100 1 103 1 104180

2  

m

Closed-loop Q

Trang 49

Linking m and Q

an open loop phase margin leads to a closed loop quality coeff Q

an open-loop phase margin leads to a closed-loop quality coeff Q

we have seen that Q affects the transient response (RLC filter)

 let us link the phase margin to the quality coefficient:

1 calculate the crossover frequency for which |T(s)| = 1

Trang 50

We can now plot Q versus m

a Q factor of 0 5 (critical response) implies a  of 76°

a Q factor of 0.5 (critical response) implies a m of 76

 a 45° m corresponds to a Q of 1.2: oscillatory response!

10 7.5

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Summary on the design criteria

 compensate the open-loop gain for a phase margin of 70°

 compensate the open-loop gain for a phase margin of 70

 make sure the open-loop gain margin is better than 15 dB

 never accept a phase margin lower than 45° in worst case

Trang 52

 Phase margin and quality coefficient

 Compensating the converterp g

 Current-mode converters

 Automated pole-zero placement

 Manual pole-zero placement

 Manual pole-zero placement

Trang 53

 A d d bi i d t d it

Dc-dc output impedance

 A dc-dc conv combines an inductor and a capacitor

As f is swept, different elements dominate Zout

Vout

f0

2 2

frequency in hertz

A buck equivalent circuit

To avoid stability issues,

Trang 54

Closing the loop…

 Any circuit can be represented by its Thévenin model

At high frequency, Cout impedance dominates

Once in closed-loop Z goes down as T(s) is high

Once in closed-loop, Zout goes down as T(s) is high

,

1 2

Trang 55

Closing the loop…

Trang 56

Calculating the output impedance

closed-loop output impedance is dominated by C

closed-loop output impedance is dominated by Cout

 ,

Trang 57

Calculating the output impedance

 Introduce the quality factor coefficient

 Introduce the quality factor coefficient

Trang 58

Calculating the output impedance – 2nd way

Trang 59

Calculating the output impedance – 2nd way

2  

Trang 60

An example with a buck

 Let’s assume an output capacitor of 1 mF

 The spec states a 80-mV undershoot for a 2-A step

c out

I V

out out

I f

Trang 61

Setting the right crossover frequency

Compensate the converter for a 4-kHz fc

80.0

180 Compensated open-loop gain

Buck operated in voltage-mode

gain

frequency in hertz

4 kHz

Trang 62

Step load the output

7

rLf 10m

5

Rupper 10k

GAIN

K = 0.5

8

R7 {R3}

C3 {C3}

13

R2 {R2}

C1 {C1}

{C2}

PWM gain

Rlower 10k

6 1

X2 AMPSIMP V22.5Verr

G(s)

Trang 63

Measure the obtained undershoot

Trang 64

Is my capacitor a real capacitor?

 A capacitor is made of parasitic elements

Trang 65

How these elements affect the undershoot?

R

 The output current slope affects the undershoot

 If slope is steep, stray elements dominate the answer

Trang 66

How these elements affect the undershoot?

Because of bandwidth limits, RESR and LESL play alone

R1 100m

S t

C

Trang 67

The capacitor contribution is small…

200m

-200m

-100m

0 100m

Trang 68

 Phase margin and quality coefficient

 Undershoot and crossover frequency

 Current-mode converters

 Automated pole-zero placement

 Manual pole-zero placement

 Manual pole-zero placement

Trang 69

Compensating the converter

Fix the current error with a proportional proportional term (P)

Fix the current error with a proportional proportional term (P)

 The proportional gain gives fast reaction time but also overshoot

Fix the long-term static error with an integral integral term (I)

 The integral term cancels the static error but slows down the response

 

d t

The integral term cancels the static error but slows down the response

Fix the immediate error by observing the slope with a derivative derivative term (D)

 The derivative term decreases overshoot but slows down the response

dt

Power stage Buck, boost…

dt

Trang 70

What kind of compensation

crossover at f

Trang 71

How do we stabilize the converter?

2 Provide a high dc gain for a low static error and good input rejection

5 Shape the G(s) path to comply with 1, 2 and 3

  A sc OL,  s A

Open-loop Bode plot of the power stage, H(s)

20.0 40.0

40 0 -20.0

|H(s)| @ f c

-180 -40.0

1

Trang 72

First, provide mid-band gain at crossover

1 Adjust G(s) to boost the gain by +21 dB at crossover

1 Adjust G(s) to boost the gain by +21 dB at crossover

180 40.0

Trang 73

Second, provide high gain in dc

2 High dc gain lowers static error and brings good input rejection

2 High dc gain lowers static error and brings good input rejection

High

Gain

180 40.0

Trang 74

Second, provide high gain in dc

2 An integrator provides a high dc gain but rotates by 270°

360 60.0

2 An integrator provides a high dc gain but rotates by -270

C1 100n

60 dB

180 30.0

4

R1 10k

E1 1k

8 10

90 by pole

at the origin

frequency in hertz

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