control speed of DC motor using thysistor and transitor

DC motor are widely industry because of its low cost, less complex control structure and wide range of speed and torque. There are many methods of speed control of DC drives namely field control methods. DC motors provide high starting torque which is required for traction applications. In DC motor control over a large speed range, both below and above the rated speed can be achieved quite easily. DC motors have inherent disadvantage that it needs regular maintenance and it is bulky in size. DC motors are tailor made, so it is difficult to replace them. In general, armature voltage control method is widely used to control the DC drives. In this method, a controlled rectifier, is used but due involvement of power electronics elements, nonlinear torque speed characteristics are observed which are undesirable for control performance . Nowadays state of art speed control techniques of DC motor are available. Thyristor based DC drives with analog and digital feedback control schemes are used. Phase locked loop control technique is also used for precise speed control and zero speed regulation. In past, many researchers presented various new converter topologies of DC motor control for different applications of industry 5,6,8,9, but at the basic level in all of them thyristor based ACDC converter are used.

THAI NGUYEN UNIVERSITY OF TECHNOLOGY

Faculty of International Training

PROJECT 1

Author:

Supervisor: Msc NGUYEN VAN LANH

LE THI GIANG

Student ‘ID: k155905228012

TRAN THI YEN

Student ‘ID: k155905228041

NGUYEN THI NGUYET

Student ‘ID: k155905228028

DECLARATION OF AUTHORSHIP

This thesis has been approved by the

CONTR

OL

SPEED

OF

MOTO

R

Supervisor: Dr.Nguyen Van Lanh

Signed:

Date:

Faculty Dean: Dr Nguyen Tien Hung

Signed:

Date:

Composition of the committee (optional):

Dr Nguyen Tien Hung Thainguyen University of Technology,

Chairman

Dr Vu Quoc Dong Thainguyen University of Technology

Dr Nguyen Tuan Minh Thainguyen University of Technology

Dr Nguyen Minh Y Thainguyen University of Technology

MSc Tran Que Son Thainguyen University of Technology

We are Le Thi Giang Nguyen Thi Nguyet, Tran Thi Yen declare that this title “ Controll speed of motor” and the work presented in it are my own We confirm that:

 This work was done wholly or mainly while in candidature for a research degree at this University

 We have knowledge all main source of help

 Where the thesis is based on work done by ourselves jointly with others,

we have make clear exactly what was done by others and what we have contributed ourselves

ACKNOWLEDGEMENT

First of all we would like to express our gratitude for our supervisor in thesis work Msc Nguyen Van Lanh for give us the opportunity to explore an interesting field of the controlling speed of motor His guidance helped us in all the time of research and writing of thesis I couldn’t have imagined having a better advisor and mentor for my project

We would like to thank my friends for creating a friendly and productive working environment

We also want to thank all the members of our reference group for very

interesting, helpful discussion and and meaningfull comment during the research Finally, We would like to thank my parents for their love and support

Le Thi Giang

Nguyen Thi Nguyet

Tran Thi Yen

CONTENT

Abstract:……….4

CHAPTER I: INTRODUCTION……… 4

1.1: Introduction………4

1.2: Target project……… 4

1.3: Component……….5

CHAPTER II: DESCRIBE PROJECT……… 5

CHAPTER III: DESIGN SPEED CONTROL OF DC MOTOR CIRCUIT…… 5

3.1: Control circuit using Thysistors……….5

3.2: Control circuit using transistor ……….11

CHAPTER IV: RESULT ………15

4.1: Control circuit using Thysistors………15

4.2: Control DC circuit using transistor ……… 16

CHAPTER V: CONCLUSION………17

CHAPTER VI: REFERENCE ………17

Abstract

The versatile control characteristics of DC motor have contributed in the extensive use of DC motor in the industry With the increasing use of power

semiconductor units, the speed control of DC motor is increasingly getting

sophisticated and precise Speed of the DC motor is controlled by controlling the armature voltage Armature voltage is controlled using different single phase AC/DC converter Half converter, semiconductor, full converter and dual converter are some of the thyristor based circuits which are used for speed control of DC motor This paper studies different speed control techniques of DC motor and makes a comparative study of different converter based speed controller

techniques

CHAPTER I: INTRODUCTION

1.1: Introduction

DC motor are widely industry because of its low cost, less complex control

structure and wide range of speed and torque There are many methods of speed control of DC drives namely field control methods DC motors provide high

starting torque which is required for traction applications In DC motor control over a large speed range, both below and above the rated speed can be achieved quite easily DC motors have inherent disadvantage that it needs regular

maintenance and it is bulky in size DC motors are tailor made, so it is difficult to replace them In general, armature voltage control method is widely used to control the DC drives In this method, a controlled rectifier, is used but due

involvement of power electronics elements, nonlinear torque speed

characteristics are observed which are undesirable for control performance Nowadays state of art speed control techniques of DC motor are available

Thyristor based DC drives with analog and digital feedback control schemes are used Phase locked loop control technique is also used for precise speed control and zero speed regulation In past, many researchers presented various new converter topologies of DC motor control for different applications of industry [5,6,8,9], but at the basic level in all of them thyristor based AC-DC converter are used

1.2:Target project

-Control speed of DC motor using thyristor and transistor

-Understanding control circuit,a single phase full wave …

- Understanding action of some devices

1.3:Component

1 DC Speed Control Motors

2 Variable Resistor

3 Amplifier

4 Transistor

5 Capacitor

6 Resistor

CHAPTER II:DESCRIBE PROJECT

-Project: Control speed of DC motors

We have two ways control speed of DC motor:

- Control using thysistors

+ Advantage: using for high-power DC motor, fast speed, applying for devices, …

+ Disadvantage: complex structure,

- Control using transistors

+ Advantage: easy to design, using for low- power DC motor,…

+ Disadvantage: no using for high-power DC motor, only control small devices, slow speed,…

CHAPTER III: DESIGN SPEED CONTROL OF DC MOTOR

CIRCUIT

3.1: Control circuit using Thysistors

SB & PWM is Synchronization block and sawtooth generator wave

 Synchronization block and sawtooth generator wave circuit

a) Synchronization block and Pulse width modulation

SB & SGC block Comparator block Creating pulseblock

 Block diagram.

*

A

cc

+u

1

r t

r 2

o

r 3 r 4

r 0 r

r 5

t r 3

t r 2

t r 4 cc

-u

1

0

*

h 27

m

BA§

m

n

k

u

k

u

n

u

 Working principle

At u®b 0.4 V (Tranzitor- Giecmani) and u®b 0.7 V (Tranzitor - Silic)

-Tr1,Tr2 close, voltage value at Gate is large(level logic ‘1’ ),

Tr3,Tr4 open, voltage value at Gate is small (level logic ‘0’ ) NOR, UK equal‘1’

so uM, uN also equal ‘0’ by Tr1, Tr3 the same as Tr2, Tr4 have large gain so that Uk

is square pulse range having wide small enough

In distances 0 , u®b> 0 , u®b 0.4 V( u®b 0.7 V) =>Tr1passes, Tr3 closes At the same time Tr2 closes , Tr4 passes, uM equal ‘1’ , uK,uN equal ‘0’

In distances  2, u®b< 0 ,u®b 0.4 V (u®b 0.7 V) =>Tr2 passes , Tr4 Tr1 closes, Tr3 passes , uN equals ‘1’ ; uK, uM equal ‘0’ K=M +N

b) Sawtooth generator wave circuit Block diagram

When uK of level logic equal ‘ 0 ’ Tranzitor Tr5 closes, C1 is plus by unchanged current (Assume that IC1 is ideal so iv+= iv-=0 )

iC=-i1vµ i1=−

U cc

WR 1+R7=−I=const

Uc= 1

C ∫ 0

t

ic dt+(Uco=0)

When C1 is plussed by +uccIC1 C1  R7  WR7-ucc

uK of level logic equal ‘ 1 ’ so Tr5opens, C1 fast through Tr5 and C1of voltage decrease equal 0 and keep uK of valuation ‘ 0 ’

So we have:

u

7

r

wr 1

rc

-u cc

c

5

t r

r 6

cc

+u

1

-ic1

-u cc

i c

i v

i v

i 1

-+

k

u

h 28









 





















u M

  

u N

u K

u rc

u

u rcmax

 Comparator block

u®k: control voltage - R9

urc: jagged voltage -R8

urc is taken by sawtooth broadcast circuit come

R8 to comparator with udk passed R9 and open

angle α1 +α2=1800 , we need to move urc ,Uo

( negative valuation) passes R10 to move urc when control voltage equal 0 so

=900

Uo =-0.5urcmax

UVIC2 =urc + u®k

whenu®k urc + th× uss =u+

ramax whenu®k urc + th× uss =u

-ramax

 Creating pulse block a) Edit pulse circuit Block diagram

Assume that:

 





 





u rc





h 34

u

u ss

u rc+Uo u ®k

u rcmax





r 11 c 2

cc

+u

12

r

l

t r 6

r 13

h 35

u u ss

sx

u

r

u

t=0t1 pulse into C2 is plused positive valuation u ra max+ In this process Tr6

always opens, usx of logic valuation equal 0 and voltage at conductor keep value to

t1

t =t1t2 pulse income positive value, so C2: +C2R11D1- C2 when D1

passes Tr6 is revered bias, ubeT6< 0 Tr6 close and appears pulse usx is take logic

valuation ‘1’ When C2 releases voltage, conductor decrease with 0 (uc2 = 0) and

charged reverse C2 : +ucc IC2 D6 - C2 - ucc When C2is charged to u−ramax

valuation ,D1 reveres because of chosing resistor R11=(0.1 0.2)R12 so ubeT6> 0

and Tr6open and disappear, usx of logic valuation ‘0’, voltage keeps value to t2.

t = t2 t3pulse incomes which have positive valuation C2: +C2 RbeT6

source  IC2 R11-C2 voltage in conductor decreases to 0 and charged reverse

for C2: +ucc IC2R11C2RbeT6 mass Voltage in conductor increases u ramax

+

.In this process, Tr6 always opens so logic valuation of usx equal ‘0’ and voltage in

conductor keeps value to t3.

t =t3t4 appears negative pulse the same as this process t =t1t2

b) Diving pulse circuit

Pulse at L of edit pulse circuit haves frequency large

enough to give logic circuit AND is G1 and G4 M and N is

square pulse as 2 half period sync circuit

At half positive period of sync voltage, M haves logic

level‘1’ so G1=M.L haves logic level ‘1’ so G1 haves control

pulse, G4=N.L has logic level ‘0’ and G4 do not have control pulse

At half negative of sync voltage at N has level logic 1, G1=M.L has logic

level ‘1’ => G1has control pulse G4=N.L have logic level ‘0’ =>G4 do not have

control pulse

g 4

l

n m

h 37

and

c)Sending pulse circuit

Because transductor uses 3 phase so we need to design sending pulse circuit

On the other hand sending pulse circuit of two transductor is the same Assume that AND circuit from G1G6

At half positive period of sync phase A, G1 has control signal though D2, R14 and D39, R55 provide signal to 2 amplifier circuit and pass to open T1 vµ T2

At half negative period of sync voltage phase C, G2 has signal through D38,

R54 and D29 R45 plus signal for 2 amplifier circuit and transferred pulse to open T2 and T3

B, G3 has D28 , R44 and D8 , R17 plus 2 amplifier circuit and transfer pulse to open T3 vµ T4

At half negative period of sync voltage phase A, G4 has control sign through

D7, R16 vµ D37, R53 plus 2 amplifier circuit and transferred pulse to open T4 and

T5

At half positive period of sync phase C , G5 has control signal through D36,

R52 and D31, R47 plus 2 amplifier circuit and transferred pulse to open T5 vµ T6

At half negative period of sync voltage phase B, G6 has control signal through D30 ,R46 vµ D3 ,R15 plus 2 amplifier circuit and transferred pulse to open

T6 vµ T1

d Amplifier circuit and transferred pulse

d 6

d 4

k

t r 7

d 5 udkT

g

r 8

t

+u cc

u v

bax

h 38

*

*

1

 When t=0t < t1does not have, Tr7and Tr8 do

not work, no current pass through primary coil BAX so

it does not have voltage pulse BAX => u®kT=0

 When t=t1 appears 1 positive pulse voltage, Tr7

and Tr8 open At primary coil W1 of BAX is suddenly

put voltage =ucc Appearing current passes through W1

of BAX increases (through W1 from sign‘*’ to sign‘* led to W2 appears 1 pulse voltage ‘*’ Second coil W2 put forward D6 and passes through D6 to gate G and K of Tiristor or u®kT > 0

 When t=t’

1= t1+tsxloses pulse, Tr7 and Tr8 close current to pass primary coil decreasing to 0 Because of decreasing of primary coil, magnetic plux in laminated core BAX vary in inverse, Tr7vµ Tr8open gradually BAX and appear photoelectron motive force which again upheavals of current BAX Pulse at secondary coil reverse bias u®kT= 0, this pulse is closed at D5 At primary coil D4 forward bias, D4 open to put down self- inductance electromotive force created in secondary primary coil Self- inductance electromotive force is created in secondary coil BAX This case pulse width import = pulse width export: txr = tsx

3.2: Control circuit using transistor

a) A single phase full wave rectifier

During the first half cycle

During the first half cycle of the input voltage, the upper end of the transformer secondary winding is positive with respect to the lower end Thus during the first

 t1 t'1 t2 t'2 t

t2

u®kT

 t1 t'1 t'2 t

tsx

h 39

usx

txr

Comparator block

AC to DC

block

Transferred square pulse block

Transferred sawtooth generator pulse block

half cycle diodes D1 and D3 are forward biased and current flows through arm AB, enters the load resistance RL, and returns back flowing through arm DC During this half of each input cycle, the diodes D2 and D4 are reverse biased and current is not allowed to flow in arms AD and BC The flow of current is indicated by solid arrows in the figure above See the diagram below – the green arrows indicate the beginning of current flow from the source (transformer secondary) to the load resistance The red arrows indicate the return path of current from load resistance

to the source, thus completing the circuit

During the second half cycle

During the second half cycle of the input voltage, the lower end of the

transformer secondary winding is positive with respect to the upper end Thus diodes D2 and D4 become forward biased and current flows through arm CB, enters the load resistance RL, and returns back to the source flowing through arm DA The flow of current has been shown by dotted arrows in the figure Thus the

direction of flow of current through the load resistance RL remains the same during both half cycles of the input supply voltage See the diagram below – the green arrows indicate the beginning of current flow from the source (transformer

secondary) to the load resistance The red arrows indicate the return path of current from load resistance to the source, thus completing the circuit

b Transferred pulse circuit

If U has logic level equal 0 , Q1 closes, no current passes through

U has logic level equal 1, Q1 opens, and current passes though R2 and sawtooth broadcast circuit

c Sawtooth generator circuit

u

7

r

wr 1

rc

-u cc

c

5

tr

r 6

cc

+u

1

-ic1

-u cc

i c

i v

i v

i 1 -+

k

u

h 28

When uK of level logic equal ‘ 0 ’ Tranzitor Tr2 closes, C1 is plus by unchanged current (Assume that IC1 is ideal so iv+= iv-=0 )

iC=-i1vµ i1=−

U cc

WR 1+R7=−I=const

Uc= 1

C ∫ 0

t

ic dt+(Uco=0)

When C1 is plused by +uccIC1 C1  R4-ucc (-12v)

uK of level logic equal ‘ 1 ’ so Tr2opens, C1 fast through Tr2 and C1of voltage decrease equal 0 and keep uK of valuation ‘ 0 ’

So we have:

d Comparator circuit







































u M

 

h 29

u N

u K

u rc

u

u ®b u ®bo

u rcmax

It has two analog input terminals V+and V- and one binary digital output Vo The output is ideally

We have :

If V+ > V- => V0= 1

V+ < V- => V0 = 0

CHAPTER IV: RESULT

4.1: Control speed using thyristor

We have circuit:

We show you this circuit and action of its , we do not have real circuit because we

do not have time so much and it is complex to practice for us

4.2: Control speed of DC motor using transitor

We have circuit:

We can see that:

When we put variable resistor up and down, we can control speed of DC motor And then experimental

CHAPTER V: CONCLUSION