DSpace at VNU: Using high algebra to design frequency divider include hazard

M odeling of function circuit Follow [1,2] show that w ith one frequency divider has 4/3 factor we need 2 flip flop FF and NAND gates to control chain so that with 4 input im pulse we ju

V N Ư Journal o f Science, M athem atics - P hysics 24 (2008) 163-170

U sing high algebra to design frequency divid er include hazard

Nguyen Quy Thuong*

VNƯ, 144 Xuan Thuy, Cau Giay, Hanoi, Vietnam

R eceiv ed 8 Ju ly 200 8 ; received in revised form 8 A u g u st 2008

A b s tr a c t N o rm a lly th e freq u en cy d iv id er desig n ed b y B oole alg eb ra a n d to d esig n a freq u en cy

d iv id er w ith an y d iv id e factor, we h av e to re p eat all over again ev e ry d e sig n step as the sam e So

to avoid o f w asting tim e an d m oney, instead o f using trad itio n al B o o le a lg e b ra in d ig ital tech n ical

w e replace it b y m ath em atica l m odels in h ig h algebra A nd b e c a u se o f th at we can design

frequency d iv id ers use Com puter.

1 M odeling of function circuit

Follow [1,2] show that w ith one frequency divider has 4/3 factor we need 2 flip flop (FF) and NAND gates to control chain so that with 4 input im pulse we ju s t have only 3 output im pulse

H ow ever using N A N D gate to control output impulse likes this, it ju s t right in some cases So to design frequency divider w ith any divider K factor (m eaning with any input and output im pulse follow request o f user) w e use O R gate to control output impulse

Investigate, for exam ple, the input static D and output static Q o f D FF in asynchronous Divider, real binary, 3 input, c ivide factor K= 7/6)

m

F ig 1 D ia g ra m im pulse o f freq u en cy d iv id er 7/6.

CO-8 Q 1 D -c m

R Q i

D

■c m

08

m

oi

&08

02

& 04

Fig 2 F req u e n cy d iv id er 7/6 execute fo llo w d iag ra m im p u lse F ig 1

E-mail: thuongnq@vnu.edu.vn

163

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From circuit o f frequency divider picture 2 and impulse diagram Fig 1, we realize that in the time

o f first impulse to sixth impulse have at lease one o f three input signal o f NAND gate G1 receive 0, so output o f G3 {G1,G2} - 1 In this time frequency divider will receive 6 impulses from output gate G4

To impulse 7 output o f gate G2 {Q l, Q2, Q3} receive level 0 and because o f that G3 - 0, follow G4 receive level 0 too So because o f OR gate G2, we conữolled output frequency divider is M 6

From Fig 2 w e have circuit function o f frequency divider 7/6

o

If frequency divider has K - — w ith any X input im pulse, m ean any n Flip Flop , example

6

8/6, 9/6, .x/6 then discover m ore output 0 4, Qs o f FF4, F F 5 from OR input Now frequency

divider w ith K = — have circuit function:

6

o Obvious, because o f O R gates then after output im pulse position M, circuit will reset

Same as above we have Table 1, X is num ber o f input im pulse, M is num ber output impulse and

K is a divider factor

Table 1 Circuit function of frequency divider with any divide factor K = — , X is number of input impulse,

M

M is number output impulse, here M € [4,31

K = ^

X / s QrQzQiiQi {Q 1 Q 2 Q 3 + Qá)Qh

X /1 0 Q\Q-2Q:iQA{Qi + Q-2)Q: ì + Q^ÌQ->

x / u Q\Q2Q: ì Q a {Q ì + Qi + Q.ị + QJQs

x / 1 5

X / 16

x / 1 7 Qì Q-1 Q a Q\ Ọ5 {Q‘i Q:\ Q\ + ộó )Qcy

N.Q T ỉm o n g / V N U J o u rn a l o f Science, M a th em a tics - P hysics 24 (2008) 1 6 3 -1 70 165

x / 1 7 q , q , q , Q A Á Q A A + Q r M

x / 1 8 Q,Q,Q,Q,Q,[(Q, + Q,)Q,Q, + Q , u

x / l 9 Q M A A Q Á Q A + QủQ>,

x / 2 2 Q,Q,Q,Q„QJ(Q, + Q, + Q JQ , +

x / 2 4 Q m Q M Q m Q + Qủ

x / 2 5 Q m Q M Q A > + Q.^ + Q r M

x / 2 6 Q A Q Q M Ả iQ + Q M + + Q r ,U

x / 2 7 Q ^ Q A Q M Q , + Q.^ + QủQ.

x / 2 8 Q m A M Q A + Q + a + Q r M

x / 2 9 Q m Q A i Q + Q ) Q + Q r M

From table 1 and com m ent above, we realize circuit function o f frequency divider with any divider factor have 2 forms:

/ -I

A part o f function left over in brackets (Table 1) is a second form :

W e need to define function y

2 Define y o f circuit function

From circuit function (Table 1) we found the form 2 (Table 2)

166 N Q T h u o n g / VN U J o u rn a l o f Science, M a th em a tics - P h ysics 24 (2008) 163-170

X

Table 2 Circuit function form 2 apply to frequency divider with divide factor K = — , n is number of Flipflop

M

F is frequency appear circuit function in proportion to K factor, Fj, e\ 0,1,2,3 I is a basic frequency to show

circulate of circuit function Flipflop n B asis

freq u en z F b F req u e n z F K = x/M F o rm 2

1

■Q:iQ\ +

•Q:,Q, + a ,

N.Q T h u o ĩig / V N U J o u rn a l o f Science M ath em a tics - P h ysics 24 (2008) 163-170 67

From table 2 w e realize: circuit function need to find m atching with each divide K factor

depend on n and F, also we can build the relationship betw een n, F, M

Provide: - n is a num ber o f Flipflop take parts o f divider

- F is frequency appear o f circuit function in each frequency divider n- FF, follow one circulate from 0 to 2" - 1

A lso from table 2 w e realize a part o f circuit function o f frequency divider having output

impulse M from 4 to 7 (in proportion to n = 3, F = (0, 1, 2, 3)) is ju s t a part o f circuit function have

output im pulse M > 8 ( this is Q1Q2; Q2 ; Qi + Q2 ; !)• So we take this circuit function make a basic

form and sym bol as y„=3 to define circuit function o f all other frequency divider:

(7)

(8)

In which:

Ai = (Q | + Ỉ ,) Qĩ w ith =

It call Product F orm

A2 = (Q, +^) + Q2

Ẩ, i f F = 0, 2 '" ' - 1

0 i f F = 0

1 i f F = r ~ - - \

w ith ặ =

0 i f F ^ r - ^

1 i f F = r ~ ' - 1

(9)

It call Sum Form

From (8) and (9) and consider Qi = K ị we have:

In which:

0 i f F = [0, 2 ”- ' - 1

/? =

+ a

(12)

Thus:

From table 2 show that circuit function in proportion to n = 4, w hen Frequency Fb = (0 , 3 ) =

0 2"'^ -1] th en circu it function has also product form and sum form as y„=3 and this circuit

function include circu it function o f y„=3- W e call this circuit function form is Yn=4

0 ỉ / F = [o, 2"'" - 1'

1 i f F = [2 '' , 2"-' - 1

2

In which:

Thus:

(15)

Same as let n = 5 w ith F b = (0, 7) = [0, and n = 6 w ith F b = (0, 15) = [ 0 , 2 " ^ -1]

w ith : 1 = 0 i f F = 0, 2 "“' - 1'

1 i f F = 2 " -', 2 '" '- - 1'

(1 7 )

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Thus:

and:

K l , = y „ ^ , + Q ,

= ( Ổ 5 + ớ )>'„=5 + ^ t

0 i f F = 0, 2" -' - l ' with

- yn=(, + Ô í

(18) (19)

(20)

3 The existence o f circuit functions follows a certain law

From a result above we realize circuit function to n = 6 follow a certain law W i t h repeat periode Fb= [0, 2"'^ -1], a problem now is how to prove with variable intput n > 6 and any value then circuit function follow a certain law w hen n < 6 or not

A ssum ing that f { M ) = K is a function satisfying term D irichlet o f Fourier [3] theorem on period [0, 2”'^ - 1] = [a,b] In order to develop f(M) into Fourier series, we form a periodic

so that

function g(Fb) having a period either bigger or equal to [b - a"

g { F , ) = f { M ) V F , G

Obviously there are m any ways to develop g(Fb) into Fourier series For each g(Fb) there are coưesponding Fourier series, therefore there are a num ber o f Fourier series dem onstrating f(M) = K„

in other words, the circuit function f(M) = Kn w ith every M is periodical! w ith period AFb= 2"'“ - 1, in here A Fb D eterm ine from table 2

From dem onsfration above, we realize that circuit function depend on AFb = [0, 2"'" -1], With circuit functions in proportion to F b Ể [0, -1] then we have to change F to Fb so to determine o f circuit function we need to find the value Fb- From table 2 we have:

Now that we can assert that with any variable input n, that is the frenquency divider can (theoretically) divide to infinite num ber, then the impulse diagram o f circuit function change periodically in those periods w hich have sim ilar impulses, that is circuit functions alw ays have form 1

and 2 according to certain A F

To here, we define that circuit function o f frequency divider is change periodically follow a certain circulate, in other w ords, circuit function in any form K„.3, K„.4, K„.5 , K„,6, have same form apply w ith same F frequency From (11) to (18) we can define o f 2 com prehensive forms o f circuit function o f one frequency divider w ith output impulse and input as we expect:

(24)

K = { Q n - ^ - ^ ( P ) ■ f n i y ) + (P■Qn-^+Qn

0 i f F = [o, 2"“' - f

\ i f T ~ \ 2"-' - 1

(25)

/ „ ừ ) =

>^4

(26)

N.Q T huong / V N U J o u r n a l o f Science, M athem atics - P h ysics 24 (2008) 16 3 -1 7 0 169

Com bine form 1 and 2 we realize that circuit function o f frequency divider coưespondence with any num ber o f input im pulse and num ber o f output impulse expect:

K =

1 Provide: - n is a num ber o f FF participate in frequency divider

- cp is show as function (25)

- f ( y ) is show as function (26)

- K„ Kn-I, K4, K3 are circuit function coưesponding to different n

(27)

(28)

4 Determ ine hazard o f circuit function

From circuit function (28) we can see output state Q o f Fflipflop in negative (Q ) and not

negative Q Follow [4,5] w hen have same output in negative form and not negative form then a chance

to create hazard IS big, so w e need to D eterm inated that circuit s ta y jn one o f static - 0 hazard XX

(Fig.3a), static-1 hazard x + x (Fig 3b), dynam ic hazard XX+ x , (x + x ) x ( Fig.3c,d) or not

a)

c)

(x + x)x

Fig 3 Basis hazards

From function (28) w e can build com prehensive circuit o f frequency divider:

From com prehensive circuit w e can construct the residual circuit

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Shown in Fig 5:

Fig 5 The residual circuit of frequency divider

Compare residual circuit o f frequency divider (Fig 5) w ith circuit show ing basic hazards (Fig.3), w e realize circuits o f basic h azard s where X and X stay in tw o d iffe re n t flat su rfa c e algo rith m and connected series (Fig 6b) It w ill appear delay in surface X before com e to surface JC, this is cause

o f hazard On the c o n ừ a ry , w ith fre q u e n c y divider X and X also stay in one su rfa c e algo rith m (Fig

6a), they are “equal” on another, so it not delay circuit X to appear hazard In other word, the frequency divider showing in (28) is free hazard

b) Fig 6 Illusfration that frequecy divider is free Hazard

So because o f function (28) we design frequency divider w ith M atlab softw are w ithout using Boole algebra From that we can design frequency divider w ith any divider factor K using computer, and free hazard in circuit function

References

[1] G Scarbata, Synthese imd Analyse digitaler Schaltungen, Oldenbourg Vcrlag Muenchen Wien (2000).

[2] Nguyen Quy Thuong, Digital Technics, Vietnam University Publishing House, Hanoi (in Vietnamese), (2008) 575 [3] Nguyen Dinh Tri, Ta Van Dinh, Nguyen Ho Quynh, High Mathematics, Education Publishing House, Hanoi (in

Vietnamese), {2004} 415.

[4] John Knight, Cliches and Hazard in Digital Circuits, Elctronics Department, Carleton University (2006).

[5] Erik Meijer, Hazard Algebra for Asynchronous Circuits, POBox 80.089 NL-3508 7B Utrccht The Netherlands (2006).