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phân tích mạch trong Miền S của mạch điện tử phân tích mạch trong Miền S của mạch điện tử phân tích mạch trong Miền S của mạch điện tử phân tích mạch trong Miền S của mạch điện tử phân tích mạch trong Miền S của mạch điện tử phân tích mạch trong Miền S của mạch điện tử phân tích mạch trong Miền S của mạch điện tử phân tích mạch trong Miền S của mạch điện tử phân tích mạch trong Miền S của mạch điện tử phân tích mạch trong Miền S của mạch điện tử phân tích mạch trong Miền S của mạch điện tử phân tích mạch trong Miền S của mạch điện tử

Trang 1

S-Domain Analysis

Trang 2

s-Domain Circuit Analysis

Time domain

(t domain)

Complex frequency domain (s domain)

Algebraictechniques

Responsetransform

Trang 3

Kirchhoff’s Laws in s-Domain

Kirchhoff’s current law (KCL)

Kirchhoff’s voltage law (KVL)

) (

1 t i

) (

4 t i

) (

2 t i

) (

3 t i

0 )

( )

( )

( )

1 t + i ti t + i t =

i I1( s ) + I2( s ) − I3( s ) + I4( s ) = 0

0 )

( )

( )

v t v t v tV1( s ) + V2( s ) + V3( s ) = 0

− +v2(t) +v4(t) −

+

) (

1 t v

+

) (

3 t v

+

) (

5 t v

Trang 4

Signal Sources in s Domain

Voltage Source:

_

+ )

depends )

(

) ( )

(

= =

s I

s V s

+

_ )

depends

)

(

) ( )

depends )

(

) ( )

(

=

=

s V

s V s

Trang 5

Time and s-Domain Element Models

Impedance and Voltage Source for Initial Conditions

t

v L( ) = L( )

Inductor:

_ +

_

+ )

(s

V L

Ls

) 0 (

) ( )

(

L

L L

Li

s LsI s

Inductor:

_

+ )

) (

1 )

(

0

C

t C C

v

d

i C

s

I Cs

s V

C

C C

0

) (

1 )

Capacitor:

Trang 6

Impedance and Voltage Source for Initial

Conditions

R s

I

s V s

) ( )

(

0 ) 0 (

th

wi )

(

) ( )

s V s

Z

0 0

th wi

1 )

(

) ( )

Cs s

I

s V s

C

C C

• Impedance Z(s)

with all initial conditions set to zero

ansform current tr

transform voltage

) (s =

Z

• Impedance of the three passive elements

Trang 7

Time and s-Domain Element Models

Admittance and Current Source for Initial Conditions

1 )

R

s

I R = RResistor:

_

+ )

) (

i

d

v L

s

V Ls

s I

L

L L

0

) (

1 )

_

+ )

) ( )

(

C

C C

Cv

s CsV s

Capacitor:

_

+ )

Trang 8

Admittance and Current Source for Initial

Conditions

R s

V

s I s

Y

R

R R

1 )

(

) ( )

0 ) 0 (

th wi

1 )

(

) ( )

V

s I s

Y

0 0

th

wi )

(

) ( )

s V

s I s

C

C C

• Admittance Y(s)

with all initial conditions set to zero

) (

1 transform

voltage

ansform current tr

)

(

s Z

s

• Admittance of the three passive elements

Trang 9

Example: Solve for Current Waveform i(t)

(s

V L

) 0 (

L

Li

− +V R (s)

0 )

( )

A

By KVL:

) ( )

Resistor: Inductor: V L(s) = LsI(s) − Li L( 0 )

0 )

0 ( )

( )

+

s V

L R s

i L

R s

R V

s

R V

L R s

i L

R s

s

L

V s

I

L A

A

L A

+

+ +

=

+

+ +

=

) 0 (

) 0 ( )

(

) (

) ( )

0 ( )

R

V R

V t

R L

t L

R A

Trang 10

Series Equivalence and Voltage Division

) ( ) ( )

( ) ( )

1 s Z s I s Z s I s

) ( )) ( )

( (

) ( )

( )

(

2 1

2 1

s I s Z s

Z

s V s

V s

)

( )

(

)

( ) (

)

( )

(

2 2

1 1

s

V s Z

s

Z s

V

s

V s Z

s

Z s

( ) ( )

2 s Z s I s Z s I s

) ( )

( )

+

) (

)

(s I

) (

1 s I

) (

2 s I

)

(s I

2

1 Z Z

Trang 11

Parallel Equivalence and Current Division

) ( ) ( )

1 s Y s V s

) ( )) ( )

( (

) ( )

( )

(

2 1

2 1

s V s Y s

Y

s I s

I s

)

( )

(

)

( ) (

)

( )

(

2 2

1 1

s

I s Y

s

Y s

I

s

I s Y

s

Y s

2 s Y s V s

) ( )

( )

)

(s I

2

1 Y Y

)

(s I

) (

2 s I

) (

1 s I

Trang 12

2 s V

2 s V

(

2 1

=

RCs

R Ls

RLCs

RCs

R Ls

s Z

Ls s

R

RCs Cs

R s

Z

s Y

EQ EQ

1 1

) (

1 )

(

1 1

+

= +

2 t v

2 s V

2 s V

A

B

) (

) (

)

( )

(

1 2

1

1 2

s

V R Ls

RCLs

R

s

V Z

s

Z s

V

EQ EQ

+ +

2 s V

A

Trang 13

General Techniques for s-Domain Circuit

Analysis

• Node Voltage Analysis (in s-domain)

– Use Kirchhoff’s Current Law (KCL)– Get equations of node voltages

– Use current sources for initial conditions– Voltage source current source

• Mesh Current Analysis (in s-domain)

– Use Kirchhoff’s Voltage Law (KVL)– Get equations of currents in the mesh– Use voltage sources for initial conditions– Current source voltage source

(Works only for “Planar” circuits)

Trang 14

Formulating Node-Voltage Equations

Step 0: Transform the circuit into the s domain using current sources to represent capacitor and inductor initial conditions

Step 1: Select a reference node Identify a node voltage at each

of the non-reference nodes and a current with every element

in the circuit

Step 2: Write KCL connection constraints in terms of the

element currents at the non-reference nodes

Step 3: Use the element admittances and the fundamental

property of node voltages to express the element currents in terms of the node voltages

Step 4: Substitute the device constraints from Step 3 into the KCL connection constraints from Step 2 and arrange the

resulting equations in a standard form

Trang 15

Example: Formulating Node-Voltage Equations

inductor initial conditions

Step 1: Identify N-1=2 node voltages and a current with each element

Step 2: Apply KCL at nodes A and B:

0 ) ( )

( )

0 ( )

0 (

: B Node

0 ) ( )

( )

0 ( )

( : A Node

3 1

2 1

S

=

− +

I s

i Cv

s I s

I s

i s I

L C

( ) ( )

(

1 where

) ( )

( ) ( )

(

) ( )

(

1 )

( )

( ) ( )

(

3 2 1

s CsV s

V s Y s

I

R G

s GV s

V s Y s

I

s V s

V Ls

s V s

V s Y s

I

B B

C

A A

R

B A

B A

Trang 16

Formulating Node-Voltage Equations (Cont’d)

Step 2: Apply KCL at nodes A and B:

0 ) ( )

( )

0 ( )

0 (

: B Node

0 ) ( )

( )

0 ( )

( : A Node

3 1

2 1

S

=

− +

I s

i Cv

s I s

I s

i s I

L C

L

Step 3: Express element equations in terms of node voltages

) ( )

( ) ( )

(

1 where

) ( )

( ) ( )

(

) ( )

(

1 )

( )

( ) ( )

(

3 2 1

s CsV s

V s Y s

I

R G

s GV s

V s Y s

I

s V s

V Ls

s V s

V s Y s

I

B B

C

A A

R

B A

B A

Step 4: Substitute eqns in Step 3 into eqns in Step 2 and collect

common terms to yield node-voltage eqns.

s

i Cv

s V

Cs Ls

s

V Ls

s

i s I s

V Ls

s

V Ls G

L C

B A

L S

B A

) 0 ( )

0 ( )

(

1 )

(

1

: B Node

) 0 ( )

( )

(

1 )

(

1

: A Node

Trang 17

Solving s-Domain Circuit Equations

• Circuit Determinant:

Ls

G Cs GLCs

Ls Ls

Cs Ls

G

Ls Cs

Ls

Ls Ls

G s

+ +

=

− +

1 (

1 1

1

1 )

(

Depends on circuit element parameters: L, C, G=1/R,

not on driving force and initial conditions

• Solve for node A using Cramer’s rule:

G Cs GLCs

Cv LCsi

G Cs GLCs

s I LCs

s

Ls Cs

Cv s

i

Ls s

i s I

s

s s

V

C L

S

C L

L S

A A

+ +

+

− + +

− +

2

) 0 ( )

0 ( )

( ) 1 (

) (

1 )

0 ( )

0 (

1 )

0 ( )

(

) (

) ( )

(

Zero State when initial condition sources are turned off

Zero input when input sources are turned off

Trang 18

Solving s-Domain Circuit Eqns (Cont’d)

• Solve for node B using Cramer’s rule:

G Cs GLCs

Cv GLs

GLi G

Cs GLCs

s I

s

Cv s

i Ls

s i

s I Ls

G

s

s s

V

C L

S

C L

L S

B B

+ +

+ +

+ +

) 0 ( )

1 (

) 0 ( )

(

) (

) 0 ( )

0 ( 1

) 0 ( )

( 1

) (

) ( )

(

Zero State Zero input

Trang 19

Network Functions

• Driving-point function relates the voltage and

current at a given pair of terminals called a port

Transform Signal

Input

Transform Response

state -

Zero function

) (

1 )

(

) ( )

(

s Y s

I

s V s

• Transfer function relates an input and response at

different ports in the circuit

) (

) ( Function

Transfer Voltage

) (

1

2

s V

s V s

Circuit

in the zero-state

) ( Function

Transfer Current

) (

1

2

s I

s I s

) (

) ( Admittance

Transfer )

(

1

2

s V

s I s

) (

) ( Impedance

Transfer )

(

1

2

s I

s V s

Trang 20

Calculating Network Functions

2 s V

2 s I

) ( )

( )

) ( )

(

) ( )

(

) ( )

(

2 1

2 1

2

s Z s

Z

s Z s

V

s V s

(

) ( )

2 1

2

s Z s

Z

s Z s

( )

) ( )

(

) ( )

(

) ( )

(

2 1

2 1

2

s Y s

Y

s Y s

I

s I s

(

) ( )

2 1

2

s Y s

Y

s Y s

Trang 21

Impulse Response and Step Response

T(s) Circuit

(s T s X s

• Input-output relationship in s-domain

)(1

)()

• When input signal is an impulse

– Impulse response equals network function

– H(s) = impulse response transform

– h(t) = impulse response waveform

s

s H s

s

T s

G( ) = ( ) = ( )

• When input signal is a step

– G(s) = step response transform

– g(t) = step response waveform

)()

(t u t

)()

(=) means equal almost everywhere,

excludes those points at which g(t)

has a discontinuity

dt

t

dg t

h d

h s

g( ) t ( ) , ( )( ) ( )

= ∫ τ τ

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