Fabrication and characterization of semiconductor nanowires for thermoelectric application 1 2

10" 2.3" Growth mechanism and different synthesis techniques of germanium nanowires ..... In order to achieve high efficiency for a thermoelectric material, it must have a high Seebeck c

Fabrication and Characterization of

Semiconductor Nanowires for

Thermoelectric Application

Kwok Wai Keung

A Thesis Submitted to the

Department of Electrical and Computer Engineering

in Partial Fulfilment of the Requirement for the Degree of Master of Engineering National University of Singapore

2011

Abstract

In this dissertation, the fabrication and characterization of germanium (Ge) and silicon

(Si) nanowires are presented Ge nanowires were grown using the vapour-liquid-solid

(VLS) method while Si nanowires were fabricated by catalytic etching The nanowires

were then characterized in terms of their electrical resistivity and thermal conductivity

The 3! method was used to measure the thermal conductivity of the Ge nanowires It was found that the thermal conductivity of the Ge nanowire was reduced by about 6

times as compared to bulk Ge

Catalytic etching using a metal catalyst was used to fabricate Si nanowires in this

project The mechanism of the catalytic etching fabrication technique is of interest

since several details of the exact mechanism are still not clear Different thicknesses of

metals were investigated as a bi-layer blocking layer to test how these would affect the

etching process In order to understand better the catalytic etching mechanism, XPS

and Auger SEM was used to find out if Si atoms diffused through the metal catalyst

during the etching It was found that there is no significant diffusion of Si from the

underlying substrate through the metal catalyst during the catalytic etching process It

is therefore likely that catalytic etching of Si took place at the interface between the

metal catalyst layer and the Si substrate, rather than at the interface between metal

catalyst and the etchant solution as the latter would require Si atoms to diffuse from

the underlying substrate through the metal catalyst to the metal-solution interface

ii

Acknowledgements

I would like to show appreciation and gratitude to my thesis supervisor A/Prof Chim

Wai Kin for his support and guidance He has been an inspiring and patient supervisor

who encourages me to try various approaches in the research and experimental work

He also gave me invaluable advices that will be extremely useful for my career in

future I would also like to thank Huang Jin Quan, Huang Zhi Qiang and Chiam Sing

Yang who have given me great support and guidance in the analysis of my

experimental results Without the knowledge of these two veterans, my work will not

be as smooth

I would also like to give special thanks to a few research students from CICFAR1 who

taught me how to do several processes such as the e-beam lithography and wire

bonding Zi Qian, Wang Rui and Liu Dan in particular were selfless in divulging their

important experiences gained from many rounds of processes They are really nice

people

Lastly, I would like to thank my family For many nights, I was required to run

germanium samples late at night as germanium nanowires tend to oxidize quickly and

the machine is more available at night My family only got to see me a few nights per

week during the really busy period They gave me strong support and had been my

source of energy and fighting spirit during the rough times

Table of Content

Abstract i"

Acknowledgements ii"

Table of Content iii"

List of Figures vii"

List of Tables xiv"

Chapter 1" Introduction and Motivation 1"

1.1" Background 1"

1.2" Efficiency of a thermoelectric material 3"

1.3" Opportunity in semiconductor nanowires 4"

1.4" Organization of thesis 4"

Chapter 2" Literature Review 6"

2.1" The early development of thermoelectrics 6"

2.2" Factors affecting thermoelectric properties in nanowires 6"

coefficient in laboratory created nanowires 7"

2.2.2 Effect of surface roughness on the thermal conductivity of large area wafer-scale arrays of nanowires 9"

2.2.3" Choice of materials on electrical resistivity 10"

2.3" Growth mechanism and different synthesis techniques of germanium

nanowires 11"

iv

2.3.2 Different nanowire synthesis techniques 18"

2.4 Fabrication of silicon nanowires by catalytic etching 21"

2.4.1 Introduction 21"

2.4.2" Methods to deposit the metal catalyst 23"

2.5 Methods to test the thermal conductivity of nanoscale thermoelectric materials 27"

2.5.1 3! method 28"

2.5.2 Thermoreflectance Method 36"

2.5.4 Suspended microstructure method 43"

Chapter 3" Experimental Details 48"

3.1" Four-point probe structure test device 48"

3.2 Sample preparation 50"

3.2.1 Si substrate for Ge nanowire growth 50"

3.2.2 Si substrate for dispersing Ge nanowire and depositing the contacting electrodes 52"

3.7 Electron beam lithography 60"

3.8 Electrode deposition 63"

3.10 Thermal conductivity measurement 66"

3.11 Ceramic heater setup for temperature dependence characterization of thermal conductivity 68"

3.12 X-ray photoelectron spectroscopy (XPS) 69"

3.13 Auger electron spectroscopy (AES) 70"

4.1 Introduction 72"

4.3 Results and discussion 76"

4.3.2 Effect of annealing on contact resistance 82"

4.3.3 Effect of the process time on GeNw sample 86"

4.4 Final result on thermal conductivity of GeNw 89"

4.5 Summary 92"

5.1 Introduction 93"

5.3 XPS results on the catalytic etching mechanism 97"

List of Figures

Figure 1 In situ TEM images recorded during the process of nanowire growth (a)

Au nanoclusters in solid state at 500&C (b) Alloying initiates at 800&C, at this stage Au exists in mostly solid state (c) Liquid Au/Ge alloy (d) The

nucleation of Ge nanocrystal on the alloy surface (e) Ge nanocrystal

elongates with further Ge condensation and eventually a wire forms (f) (g)

Several other examples of Ge nanowire nucleation, (h,i) TEM images

Figure 2 (a) Schematic illustration of vapor-liquid-solid nanowire growth

mechanism including three stages: (I) alloying, (II) nucleation, and (III) axial

growth The three stages are projected onto the conventional Au-Ge binary

phase diagram (b) to show the compositional and phase evolution during the

nanowire growth process [46] 13"

Figure 3 High-resolution scanning electron microscopy (HRSEM) images of (a)

the crude Ge nanowire synthesis product, (b) redeposited and purified Ge

nanowires [48] 16"

Figure 4 (a) Under optimum growth conditions of Ge nanowires, growth of one

nanowire per Au seed is achieved (b) Under-growth at low temperature and

(c) over-growth at high temperature [50] 17"

viii

Figure 6 SEM image of germanium nanowires after vacuum thermal treatment

The scale bar corresponds to 1 µm The images were taken on either JEOL

Figure 7 Cross-sectional SEM images of the pores bored in a Si(100) sample with

(a) a single spherical Au particle, (b) an aggregate composed of two Au

particles, and (c) an aggregate composed of a large number of Au particles

after etching in an aqueous solution containing 2.6 mol/dm3 HF and 8.1

mol/dm3 H2O2 for 1 hour Insets show their corresponding enlarged images

of the bottom parts of pores [71] 24"

Figure 8 Schematics of the Si nanowire catalytic etching fabrication process [76]

25"

Figure 9 Schematic of the SiNW fabrication process (a) AAO membrane is

transferred onto the surface of a Si substrate (b) Evaporation of Cr/Au

nanodots through the AAO pores forming the blocking metal nanodots on Si

(c) Removal of the AAO template before the subsequent deposition of a thin

Au layer that will act as the etching catalyst (d) Anisotropic etching and

Figure 10 Illustration of the four-probe configuration for measuring the specific

heat and thermal conductivity of a rod- or filament-like specimen is shown

The specimen is heat sunk to the sapphire substrate through the four electric

contacts, but the part in-between the two inner voltage contacts needs to be

suspended to allow the temperature variation A high vacuum is needed and

a thermal shielding is preferred to eliminate the radial heat current from the

specimen to the environment [6] 29"

Figure 11 The amplitude reaches a maximum as !" → 0, i.e., when the thermal

wavelength # >> L, where λ is defined as λ = √(α/2ω) and α =

temperature accumulation when !" >> 1 (# << L) [6] 31"

Figure 12 Block diagram of the thermal conductivity measurement setup A

digital lock-in amplifier SR830 or SR850 was chosen to measure the 3!

voltage The 1! voltage from the sine out of the lock-in amplifier was

boosted into an ac current by a simple electronic circuit (lower panel) before

being fed into the specimen The feedback resistor R* should be nearly

temperature independent to prevent it from generating a 3! component in the

current [6] 34"

Figure 13 Schematic picture of microdevice for nanowire electrical connection

[88] 37"

Figure 16 T- setup type sensor [89] 41"

Figure 17 SEM image of the suspended heater The lower inset shows a 100 nm

Si nanowire bridging the two heater pads, with wire-pad junctions wrapped

x

with amorphous carbon deposits (shown by arrows) The scale bar in the

inset represents 2 mm [82] 44"

Figure 18 Schematic setup of the thermal probe [90] 46"

Figure 22 Block diagram of the evaporator system 51"

Figure 23 SEM micrograph of individual Au-dots obtained by annealing a 5 nm

Au film 52"

Figure 24 (a) Setup for GeNW growth, and (b) temperature profiles for GeNW

growth 55"

Figure 26 Measurements of the location of the selected Ge nanowire were

Figure 27 Pattern of the 4 electrodes drawn after e-beam exposure and PMMA

development 63"

Figure 28 Image of the 4 electrodes with Ge nanowire across after the liftoff

process 64"

Figure 29 The in-house constructed vacuum chamber used for the 3!-method

thermal conductivity measurement 67"

Figure 30 Watlow ceramic heater to heat up the whole cerdip package with the Ge

nanowire sample 69"

Figure 33 Ge precipitates on Ge nanowires when the amount of Ge powder source

was doubled 77"

Figure 37 (a) SEM image of the GeNw sample after thermal anneal (b)

Estimation of the diameter of the GeNW sample 83"

Figure 38 I vs V plot of the GeNw sample measured by the HP 4155B

parameter analyzer 84"

Figure 39 I vs V plot of the control sample (no nanowire) where the 4 electrodes

were not connected by GeNw 85"

Figure 40 (a) SEM image of the GeNw sample annealed after 60 hours from

xii

fabrication (b) SEM image of the GeNw sample annealed within 24 hours

from fabrication 88"

Figure 41 V3! vs I plot for the GeNw sample 89"

Figure 42 Measured/Extracted thermal conductivity of GeNw at various

temperatures from 300 K to 500 K 92"

Figure 43 SEM image of the etched Si marker sample with (a) Ti/Au (5/10 nm)

Figure 44 SEM image of the etched Si sample with (a) Cr/Au (5/10 nm) and (b)

Figure 45 Sample with circular Au dots of different size were subjected to

substantial etching XPS analysis was carried out on the circular Au dot as

indicated by the red arrow 97"

Figure 46 XPS spectra obtained from the analysis of the spot shown in figure 45

98"

Figure 47 High magnification SEM image of the Au dot from figure 45 after etch

99"

Figure 48 Sample locations 1 and 2 analysed in the following AES spectra shown

in subsequent figures The sample was fabricated by depositing 21nm of Au

on Si with a shadow mask 101"

Figure 49 AES spectra from locations 1 and 2 The surface of the metal was not

ion etched 102"

Figure 50 AES spectra from locations 1 and 2 after ion etch Approximately 1 nm

Figure 53 SEM image of the triangular pillar structure after catalytic etching for

40 seconds 105

xiv

List of Tables

Chapter 1 Introduction and Motivation

1.1 Background

Crude oil consists of mineral deposits formed deep under the earth or sea bed Fossil

fuels and its refined products have been the engine that helps sustain global economic

growth for many centuries However, oil production of the world is now peaking as

more oil fields are mined and depleted Even with more advanced technology in

discovering and mining oil, there are fewer and fewer places to find oil This has also

been the centre of argument for environmentalists and many governments Extraction,

refining and usage of fossil fuel have brought about immense pollution to the

environment and irrevocable destruction to the habitat of animals, driving many

species to extinction The forever rising oil price, coupled with the undesirable effects

mentioned above, lead to an urgent need to either search for an alternative energy

source or to increase the efficiency of fossil fuel usage The best solution seems to lie

in clean energy sources of which thermoelectric technology has a part to play

One of the most forthcoming, non-polluting and renewable sources of energy is solar

energy The best solar cells based on single-crystal silicon are about 25% efficient,

which is still below the theoretical limit of 31% [1] (see Table 1.1) Increasing

efficiency by converting solar energy into electricity reduces cost and increases

capacity, which raises solar energy to a new level of competitiveness

Introduction and Motivation 2

#$%&'"(!("#)'*+',-.$&"'//-.-'0.1"&-2-,3"*/"4$+-*53",)'+2*'&'.,+-."2$,'+-$&3"678"

An efficient thermoelectric material can help to harness waste heat from the fossil fuel

combustion process and convert it to electricity This can potentially increase the

electricity produced per unit of fossil fuel, thus reducing usage and the resultant

pollution Thermoelectric materials have long been too inefficient to be cost-effective

in most applications However, a resurgence of interest in thermoelectric materials

began in the mid 1990s when theoretical predictions suggested that thermoelectric

efficiency could be greatly enhanced through nanostructural engineering, which led to

experimental efforts to demonstrate proof-of-principle of high-efficiency

low-dimensional materials Two recent papers in the literature have significant impact

with regards to this issue Boukai et al [3] use silicon nanowires with a rectangular

cross-section and Hochbaum et al [4] use round silicon nanowires to achieve

thermoelectric efficiencies comparable to those of the best commercial thermoelectric

materials

1.2 Efficiency of a thermoelectric material

Thermoelectric efficiency is described in terms of the thermoelectric ‘figure of merit’,

ZT, defined as S2T/!k Here, T is the temperature of the material ! is the electrical

resistivity, or a measure of how strongly a material opposes the flow of electric current

k is thermal conductivity, or the property of a material that indicates its ability to

conduct heat Last but not least, the Seebeck coefficient (S) is a measure of the

magnitude of an induced thermoelectric voltage in response to a temperature

difference across that material It is defined as the increase in potential difference per

unit temperature rise In order to achieve high efficiency for a thermoelectric material,

it must have a high Seebeck coefficient (S), high electrical conductivity (! = 1/ !) and low thermal conductivity (k)

semiconductors have a respectable thermoelectric figure-of-merit of 0.7-1.0 However,

synthetic nanostructures for this purpose is even more difficult and expensive Bulk

silicon (Si), on the other hand, has a ZT of 0.01 at 300K [5], which is too low for

practical use However, the ZT of Si increases to 0.6 (quoted by Hochbaum et al [4])

when Si is in the form of nanowires With the encouraging results from research so far,

nanowires potentially possess much higher thermoelectric capability than bulk

thermoelectric materials Also, there already exists a multibillion dollar infrastructure

for low-cost and high-yield processing and packaging for Si or germanium (Ge) based

semiconductors Semiconductor nanowires could be efficient enough (in terms of cost

and electricity produced) for practical application to convert excess heat back to

Introduction and Motivation 4

electricity

1.3 Opportunity in semiconductor nanowires

As described in previous section, there are existing infrastructure to fabricate

semiconductor nano structures in the industry so semiconductor can potentially be the

thermoelectric material of the future to harness waste heat from anything like

electronic chips to mechanical parts that produce unwanted heat If semiconductor

nanowire is proven to have much higher thermoelectric figure-of-merit than bulk and

fabrication technique is advanced enough, semiconductor nanowires can be

incorporated almost anything anywhere as a thermoelectric material This leads to the

objective of this research where the thermal conductivity of nanowire structures will be

measured using the 3! method and a lock-in amplifier technique The developed setup will be verified using a platimum microwire test structure With the test

structures and a set of calibrated working conditions for the tests ready, we will be able

to carry out experiments to find out how each type of nanowire fare in terms of thermal

conductivity

1.4 Organization of thesis

Chapter 2 gives a literature review on factors affecting the thermoelectric properties in

nanowires The effects of geometries, surface roughness and choice of materials on the

thermoelectric properties of nanowires are highlighted in this chapter Following this,

the growth mechanism and synthesis techniques of Ge and Si nanowires will be

described There will be more coverage on the catalytic etching mechanism for Si as

the mechanism is also investigated in this work This is followed a description of

methods to characterize the thermal conductivity of nanoscale thermoelectric materials

The 3! method by Lu et al [6] is described in detail in this chapter as this research

work is based on this method

Chapter 3 presents the experimental details of the Ge nanowire growth by the

vapour-liquid-solid (VLS) method as well as the Si nanowire fabrication by catalytic

etching The process of fabricating a test structure for thermoelectric characterization

by dispersing the nanowires on a substrate, e-beam lithography and electrode

deposition to form the contacts will also be covered in this chapter Various methods

of measuring the thermal conductivity are also discussed

Chapter 4 presents results of the thermal conductivity measurement and the analysis of

the factors affecting the measurement The mechanism of catalytic etching is

investigated in chapter 5 Catalytic etching is an important method to prepare Si

nanostructure and the method used to prepare Si nanowires

A conclusion of the results and findings in this project is provided in chapter 6 Some

recommendations for future work are also discussed in this chapter

Literature Review 6

Chapter 2 Literature Review

2.1 The early development of thermoelectrics

For three decades since 1960, there has been little attention on thermoelectrics in the

scientific research community until the US Department of Defense (DoD) started to

show interest in the potential of thermoelectric materials for new types of application

in the 1990s A few years later, a great deal of interest in the research field was started

with theoretical predictions that the thermoelectric efficiency could be greatly

enhanced through nanostructural engineering Two research approaches were

simultaneously considered: using new families of advanced bulk thermoelectric

materials [7-9] and using low-dimensional material systems [10-13] Among the

proposed advanced bulk materials, phonon-glass/electron-crystal (PGEC) materials[14]

quickly became prominent As for low-dimensional material systems, major efforts

focused on nanocomposites These structures contain a coupled assembly of

nanoclusters showing short-range low dimensionality embedded in a host material [15,

16], resulting in a bulk material with nanostructures and many interfaces that scatter

phonons more effectively than electrons

2.2 Factors affecting thermoelectric properties in nanowires

Before looking into the factors affecting the performance of thermoelectric materials, it

will be useful to try to understand how electricity is created from a temperature

difference An applied temperature difference causes charged carriers in the material

(i.e., electrons or holes) to diffuse from the hot side to the cold side, similar to gas

diffusion Mobile charged carriers migrating to the cold side leave behind their

oppositely charged and immobile ions at the hot side, thus giving rise to a

thermoelectric voltage (thermoelectric refers to the fact that the voltage is created by a

temperature difference) Since a separation of charges also creates an electric field

The buildup of charged carriers on the cold side eventually ceases at some maximum

field value since there exists an equal amount of charged carriers drifting back to the

hot side as a result of the electric field at steady state When connected in a complete

circuit, the thermoelectric voltage will then drive charge carriers around the circuit,

producing an electric current

The research into the field of low-dimensional thermoelectricity started with the

following two strategies The first is the use of the quantum-confinement phenomenon

to enhance the Seebeck coefficient (S) and to control S and the electrical conductivity

(") somewhat independently The phonon is a quantized mode of vibration occurring in

a rigid crystal lattice, such as the atomic lattice of a solid Since heat transfer is

dependent on phonons, the second strategy is to use numerous interfaces to scatter

phonons more effectively than electrons, and to scatter preferentially those phonons

that contribute most strongly to the thermal conductivity (k)

2.2.1 Effect of nanoscale geometries on thermal conductivity and Seebeck coefficient in laboratory created nanowires

As explained previously, thermal conductivity has to be low in order to achieve a high

thermoelectric figure-of-merit (ZT) Boukai and colleagues fabricated rectangular Si

nanowires having a cross section of 20 nm by 20 nm [17] The small size and

two-dimensional confinement give the nanowires a lower thermal conductivity and

Literature Review 8

higher Seebeck coefficient Boukai attributes the improvement to a phenomenon

known as phonon drag Phonons are not always in local thermal equilibrium; they

move against the thermal gradient Phonons lose momentum by interacting with

electrons (or other carriers) and imperfections in the crystal lattice If the

phonon-electron interaction is predominant, the phonons will tend to push the electrons

to one end of the material, thus losing momentum in the process This contributes to

the already present thermoelectric field This contribution is most important in the

temperature region where phonon-electron scattering is predominant

Umklapp (non-momentum-conserving) phonon–phonon scattering processes

determine the rate of phonon heat dissipation The Debye energy (%D) sets the energy

scale for Umklapp scattering The number of Umklapp phonons (Nu) available to

dissipate the long wavelength phonons is given by the Bose–Einstein function as

follows:

Nu = 1 / (e%D / kBT – 1) (2.1)

scattering rate 1/&ph ' Nu When kBT >> %D, 1/&ph ' T where &ph is the phonon

Since 1/&ph ' Nu and Sph ' &ph, this clearly shows that if the number of Umklapp

phonons available to dissipate the long wavelength phonons is suppressed, there will

be more phonon-electron scattering This results in a larger Seebeck coefficient, a

larger thermal voltage and a higher thermoelectric efficiency

2.2.2 Effect of surface roughness on the thermal conductivity of large area wafer-scale arrays of nanowires

For large wafer-scale arrays of rough Si nanowires that are 20 to 300 nm in diameter,

the nanowires have Seebeck coefficient and electrical resistivity values that are similar

as bulk Si [18] However, those with diameters of about 50 nm exhibit a hundred-fold

reduction in thermal conductivity (k), yielding ZT = 0.6 at room temperature Because

frequency, low-frequency acoustic phonons have long mean free paths and contribute

significantly to k at high temperatures [19-22] Thus, by rational incorporation of

phonon-scattering elements at several length scales, the k of Si is expected to decrease

dramatically, raising the overall thermoelectric efficiency

The conclusion above may seem to be in contradiction to the phonon drag

phenomenon mentioned in section 2.2.1, where phonons help to “drag” carriers along,

leading to a higher Seebeck coefficient and higher thermoelectric efficiency However,

the CALTECH group’s nanowires [5] were synthesized by the SNAP process [23]

while the group from University of California, Berkeley [24] synthesized wafer-scale

arrays of Si nanowires using an aqueous electroless etching (EE) method [24-26] One

must bear in mind that other than size, there are other crucial factors of difference such

as surface roughness, nanowire length and substrate material All these factors will

Literature Review 10

decide which mechanism has a more significant influence on the Seebeck coefficient,

thermal conductivity, electrical resistivity and the overall thermoelectric figure of

merit In this case, the wafer-scale arrays of Si nanowires were synthesized using a

different method from Boukai’s nanowires Thus the surface roughness of the

nanowires becomes the significant factor in reducing the thermal conductivity while

the Seebeck coefficient and electrical resistivity remain almost the same as that of bulk

Si

2.2.3 Choice of materials on electrical resistivity

In seeking new materials, researchers have focused on substitutes with superior

electronic properties Compared with silicon (Si), germanium (Ge) has a smaller band

gap and higher carrier mobilities This means that Ge has a lower electrical resistivity

and thus a potentially higher thermoelectric efficiency Together with

low-dimensional design like nanowires, Ge has gained interest as a thermoelectric

material [27-30]

2.2.4 Keeping power factor !"#! while lowering thermal conductivity

High ZT is necessary for a thermoelectric material to be accepted and adopted

lowering thermal conductivity (k) This idea has materialized in quantum dot

superlattice systems and in nanocomposite thermoelectric materials The high ZT

values achieved in superlattices are due to their low thermal conductivity However, it

was shown that periodicity is not necessary to reduce thermal conductivity It is then

important to introduce many interfaces to reduce the thermal conductivity more than

the electrical conductivity by interface scattering as well as increasing the carrier

mobility (and hence electrical conductivity ") by quantum confinement The Seebeck

coefficient or thermopower (S) is proportional to the energy derivative of the density

of electronic states In low-dimensional (nanostructured) systems, the density of

electronic states has sharp peaks [31-33], theoretically resulting in a high S

Nanostructures may be prepared with one or more dimensions smaller than the mean

free path of the phonons and yet larger than that of electrons and holes This can

potentially reduce k by boundary scattering without affecting the electrical

conductivity [34]

Molecular dynamics simulations [35, 36] have shown that for nanostructures (e.g.,

wires of nanometer diameter), the thermal conductivities could be two orders of

magnitude smaller than that of bulk Si or bulk Ge However, to the best of our

knowledge, no systematic experimental results have been reported on the thermal

conductivities of Ge nanowires It is, therefore, important to experimentally validate

these theoretical predictions to understand the underlying physics This is why there is

a motivation for researching on the thermal conductivity of Ge nanowires which will

be used in my test structure for this project

2.3 Growth mechanism and different synthesis techniques

of germanium nanowires

2.3.1 Growth mechanism of germanium nanowires

Synthesis of semiconductor nanowires has been one of the core research areas in

nanotechnology as nanowires are widely viewed as potential replacements to provide

Literature Review 12

the basic building blocks for future electronics when current CMOS technology

reaches its ultimate limit of downscaling Even though the initial motivation was not so

much for thermoelectric applications, the immense studies on nanowire fabrication

techniques and growth mechanisms provide a good platform of knowledge for research

into thermoelectric nanowire materials In this section, a review of published literature

on the growth mechanisms, as well as different fabrication techniques, for nanowires

that have been carried out are presented Two growth mechanisms, the

vapour-liquid-solid (VLS) mechanism and the supercritical fluid-liquid-solid (SFLS)

mechanism are discussed in the first half of this section while the second half focuses

on the common growth techniques of nanowires

2.3.1.1 Vapour-Liquid-Solid (VLS) Mechanism

Semiconductor nanowires with different compositions have been successfully

synthesized using either vapour [37-40] or solution-based methodologies [41-43] One

key feature of these syntheses is the promotion of anisotropic crystal growth using

metal nanoparticles as catalysts The growth mechanism is based on the

vapour-liquid-solid (VLS) mechanism (see Figures 1 and 2), which was proposed in

the 1960-1970 for large whisker growth [44, 45]

9-:5+'" (" ;0" 3-,5" #<=" -2$:'3" +'.*+>'>" >5+-0:" ,)'" ?+*.'33" */" 0$0*@-+'" :+*@,)!" A$B" C5" 0$0*.&53,'+3"-0"3*&->"3,$,'"$,"DEE$F!"A%B"C&&*1-0:"-0-,-$,'3"$,"GEE$FH"$,",)-3"3,$:'"C5"'I-3,3"-0" 2*3,&1"3*&->"3,$,'!"A.B"J-K5->"C5LM'"$&&*1!"A>B"#)'"05.&'$,-*0"*/"M'"0$0*.+13,$&"*0",)'"$&&*1" 35+/$.'!"A'B"M'"0$0*.+13,$&"'&*0:$,'3"@-,)"/5+,)'+"M'".*0>'03$,-*0"$0>"'4'0,5$&&1"$"@-+'" /*+23"A/B!"A:B"N'4'+$&"*,)'+"'I$2?&'3"*/"M'"0$0*@-+'"05.&'$,-*0H"A)H-B"#<="-2$:'3"3)*@-0:" ,@*"05.&'$,-*0"'4'0,3"*0"$"3-0:&'"$&&*1">+*?&',"6OP8!"

"

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Literature Review 14

(I) Alloying process (Figure 1 a-c and Figure 2, stage I): Au clusters remain in the

vapour condensation With increasing amount of Ge vapour condensation and

dissolution, Ge and Au form an alloy and liquefy The volume of the alloy droplets

increases, and the elemental contrast under TEM examination decreases (due to

dilution of the heavy metal Au with the lighter element Ge) The alloy composition

crosses sequentially, from left to right, a biphasic region (solid Au and Au/Ge liquid

alloy) and a single phase region (liquid) This alloying process can be depicted as an

isothermal line in the Au-Ge phase diagram as shown in Figure 2(b)

(II) Nucleation (Figure 1 d-e and Figure 2, stage II): Once the composition of the alloy

crosses the second liquidus line, it enters another biphasic region (Au/Ge alloy and Ge

crystal) This is where nanowire nucleation starts Knowing the alloy volume change,

it is estimated that the nucleation generally occurs at Ge weight percentage of 50-60%

This value differs from the composition calculated from the equilibrium phase diagram

which indicates the first precipitation of Ge crystal should occur at 40% Ge (weight)

supersaturated alloy liquid Occasionally, it can be observed that two Ge nanocrystals

precipitate from single alloy droplets and create two liquid/solid interfaces (Figure 1 h

number of possible heterogeneous nucleation events, unlike those of microscopic

systems where tens or hundreds of whiskers can be observed on single alloy droplet

[44]

(III) Axial growth (Figure 1 d-f and Figure 2, stage III): Once the Ge nanocrystal

nucleates at the liquid/solid interface, further condensation/dissolution of Ge vapour

into the system will increase the amount of Ge crystal precipitation from the alloy The

incoming Ge species prefer to diffuse to and condense at the existing solid/liquid

interface, primarily due to the fact that less energy will be involved with the crystal

step growth as compared with secondary nucleation events in a finite volume

Consequently, secondary nucleation events are efficiently suppressed, and no new

solid/liquid interface will be created The existing interface will then be pushed

forward (or backward) to form a nanowire (Figure 1f and Figure 2b) After the system

cools, the alloy droplets solidify on the nanowire tips

Generally, the diameters of the nanowires are larger than the sizes of the initial clusters

by several nanometers due to the Au/Ge alloying process This allows one to control

the diameter of the Ge nanowire by depositing catalysts of different sizes

2.3.1.2 Supercritical Fluid-Liquid-Solid (SFLS) mechanism

The SFLS synthesis of Ge and Si nanowires follows very similar procedures as the

VLS mechanism The method relies on the thermal degradation of an organosilane or

organogermane precursor in the presence of sterically stabilized gold nanoparticles A

precursor solution composed of alkanethiol passivated Au nanoparticles and a liquid

germanium precursor is injected through a six-way valve into preheated and

pre-pressurized supercritical hexane typically at 375°C and 20 MPa in a titanium

reactor [47] The high precursor solubility and the high particle concentrations in the

supercritical fluid environment permit the synthesis of large quantities of single-crystal

nanowires Germanium nanowires synthesized under such conditions have diameters

ranging from 5 to 30 nm with lengths of the order of several micrometers Figure 3(a)

Literature Review 16

shows the as-formed Ge nanowire material deposited on a Si substrate during the

synthesis The Ge nanowires in Figure 3(b) were deposited from an ethanol suspension

Their length is shorter because many of the nanowires were broken by sonication

during dispersion

9-:5+'"T"U-:)Q+'3*&5,-*0"3.$00-0:"'&'.,+*0"2-.+*3.*?1"AUVN<=B"-2$:'3"*/"A$B",)'".+5>'"M'" 0$0*@-+'"310,)'3-3"?+*>5.,H"A%B"+'>'?*3-,'>"$0>"?5+-/-'>"M'"0$0*@-+'3"6OG8!"

Also worth mentioning is the ability to control the nanowire growth direction by the

SFLS method [48] Ge and Si nanowires synthesized by SFLS at 375°C predominantly

grow in the [110] growth direction Si nanowires produced by Lieber and co-workers

at 440°C mostly have [111] direction for larger diameter wires [49] Based on

supersaturation criterion, a shift in the predominant growth direction from [110] to

[111] is expected as the level of supersaturation in the alloy seed droplet increases

The conclusion is that the SFLS method offers better control over nanowire sizes since

they are essentially controlled by the size of the growth seed Controlling size of the

nanowire is very important because it appears to have a direct relationship with

thermal conductivity and consequently the thermoelectric figure-of-merit when its

diameter is in the nanoscale Also, this is critical for their potential implementation