Fabrication and characterization of semiconductor nanowires for thermoelectric application 5 6

Si diffusion through the metal catalyst during catalytic etching and at which interface i.e., Si-metal or metal-solution interface did the etching action takes place.. In the work of Hua

Chapter 5 Investigation on the Catalytic Etching Mechanism of Silicon

5.1 Introduction

Metal assisted catalytic etching was used in the fabrication of silicon nanowires (SiNw) for testing the thermal conductivity measurement setup and potential thermoelectric application(for potential thermoelectric application?) The catalytic etching process attracted increasing attention recently because there is a need for nanostructures with specific orientation as explained in section 2.4.1 in Chapter 2 Catalytic etching has many advantages such as being a simple and inexpensive process It is able to control parameters such as diameter, length and orientation of the nanostructures The etching process can also produce nanowires with high crystalline quality [75,76] [Quote some relevant refs.]

Some aspects of the actual reaction mechanism in catalytic etching are still unclear because of the difficulty in accessing and characterizing the etching interface which is covered by the metal catalyst Currently, there are two possible models proposed to explain the catalytic etching mechanism [80] [Quote refs.] One model states that the etching takes place at the interface between the metal catalyst and the silicon substrate

In the other model, silicon atoms diffuse up through the metal layer and react at the interface between the metal catalyst and the hydrofluoric acid/hydrogen peroxide (HF/H2O2) solution X-ray photoelectron spectroscopy (XPS) and Auger electron spectroscopy (AES) were used in this work to reveal more information on the actual mechanism that takes place during catalytic etching For example, whether there is any

Si diffusion through the metal catalyst during catalytic etching and at which interface (i.e., Si-metal or metal-solution interface) did the etching action takes place

Recently, Huang et al [79] made use of an anodic aluminium oxide (AAO) template

mask to produce Si nanowires by catalytic etching For the reduction-oxidation (redox) reaction in the catalytic etching process to occur, the catalyst needs to have a higher electronegativity than Si so that electrons can be pulled away from Si atoms and the

oxidation of Si can take place [97] In the work of Huang et al., a non-catalyst metal

that has a lower electronegativity than Si, such as chromium (Cr), was deposited onto the AAO and used as a blocking material for the catalytic etching process After removing the AAO, a blanket layer of Au catalyst was deposited to produce Cr/Au dots (at regions which are originally the pores of the AAO) and Si regions covered by

Au Those areas of Si protected by the Cr/Au dots will remain after etching in the HF/H2O2 solution, leaving behind regular array of Si nanowires with diameters that can be adjusted depending on the pore diameter in the AAO mask In this work, experiments were carried out to investigate the effect of a bi-layer of two different metals on catalytic etching of Si so as to understand better the actual mechanism involved

5.2 Effect of the metal film thickness on the etching process

HF of 4.6M and H2O2 of 0.44M were used as the etching solution in this experiment The samples were cleaned as discussed in the sample preparation section in Chapter 3 Since Cr/Au was verified to be an effective protective metal layer that can block etching [79], Cr/Au (10/30 nm) markers were prefabricated to make comparison with

the surrounding etched Si areas not covered by the markers Using a standard optical lithography process, micron-sized marker patterns, formed by 10 nm Cr and 30 nm Au through evaporation, were formed on a Si (100) surface The Si (100) substrate with the markers were then used as the starting substrate for deposition of the bi-layer metals before subjecting the samples to chemical etching in the HF/H2O2 etching solution The marker regions were not expected to be etched as the underlying Si in these regions are covered by the Cr/Au (10/30 nm) layer and another bi-layer metal, and Cr/Au (10/30 nm) had been demonstrated to block the chemical etching [79] As for the remaining non-marker regions where the underlying Si was just covered by the bi-layer metal, whether chemical etching takes place or not depended on the bi-layer metal materials selected and the thickness of the layers

Figure 43 shows the SEM images of two etched Si samples with Ti/Au bi-layer of different thickness deposited on top of the Si marker sample Both samples were etched in a fresh solution with the same HF/H2O2 composition for 5 minutes Figure 43(a) shows the sample that has a bi-layer of Ti/Au (5/10 nm) where 5 nm of Ti was first deposited on the Si substrate with markers, followed by 10 nm of Au It can be seen clearly that chemical etching has taken place in the non-marker regions The etched depth was about 6 µm In Figure 43(b), a bi-layer of Ti/Au (5/15 nm) was deposited on the Si substrate with markers and the sample was etched for 5 minutes; however, there was only very limited (negligible) etching observed in the non-marker regions Although Ti itself has lower electronegativity than Si and can act as a blocking layer in etching, Ti will react with HF and get dissolved The only difference

in the two samples is the thickness of the protective Au layer above Ti From the results, it shows that at least 15 nm of Au is required to protect the Ti underneath

Therefore only a bi-layer of Ti/Au with 15 nm of Au on 5 nm of Ti will be able to be used as an effective blocking layer for catalytic etching

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A similar experiment was repeated with Cr/Au as the blocking bi-layer metal with two different thicknesses of the Au layer (10 nm and 15 nm) and 5 nm of Cr investigated Both Figures 44(a) and 44(b) show some chemical etching in the non-marker regions, although this is somewhat limited, after the samples were immersed in the HF/H2O2 etching solution for 5 minutes This shows that 5 nm of Cr is still sufficient as a blocking layer This is due to the fact that Cr does not react with HF or H2O2 Although 10 nm of Au is not enough to block HF and H2O2, the Cr/Au blocking layer still remained intact after the reaction Therefore, summarizing the results from Figures

43 and 44, the reactivity of the blocking material with the etching solution has to be taken into account when choosing an appropriate blocking material in addition to the thickess of the bi-layer

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5.3 XPS results on the catalytic etching mechanism

To check if Si has diffused through the catalyst metal layer during the catalytic etching process, XPS technique is used Figure 45 shows the sample where XPS analysis was carried out 21nm of Au was deposited on a Si substrate with a shadow mask

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Figure 46 shows the XPS spectra obtained at the Au dot indicated above Different colors were used for the spectra obtained at different timing of sputtering during depth profiling A net offset was added to each line so that the graphs can be seen more clearly for analysis The Si2p peak at 99.7eV can be clearly observed so it was suspected that there was substantial diffusion of Si species from the substrate through the metal catalyst to the surface of catalyst layer

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However, a SEM image obtained in figure 47 shows that there were cracks and trenches on the Au layer Since the spot size of XPS is relatively large, the large area beam will cover regions with the metal film with cracks as well as those without cracks The underlying Si could give rise to the Si2p peaks obtained in the XPS spectra AES was used subsequently for further investigation with the consideration that AES

has a much smaller spot size than XPS Thus, it can be performed on an area without cracks

Another batch of sample was fabricated exactly the same way as the one used for the

XPS analysis in Chapter 5.3 After cleaning, 21nm of Au was deposited on the Si substrate with a shadow mask Figure 48 shows the sample locations 1 and 2 chosen for the AES analysis Figure 49 shows the AES spectra of the two locations before ion etch while Figure 50 shows the AES spectra after ion etch to remove a layer of approximately 1 nm thickness The AES analysis shows that Si is only present at an appreciable detectable level in a thin (approximately 1 nm) layer on the surface as seen from Figure 49 This could be due to redeposition of Si species or etched products in the solution After removal of a 1 nm surface layer, there is no detectable Si signal as seen from Figure 50 However, there is no indication that the Si signal present in Figure 49 is associated with pinholes or grain boundaries of the Au layer on the Si sample which could have aided any Si diffusion from the underlying substrate

Therefore in summary, the AES analysis shows that there is no evidence of Si atoms diffusing up through the Au metal layer from the underlying Si substrate during the catalytic etching process It is likely that the etching of this sample took place at the interface between the metal catalyst layer and the Si substrate, rather than at the interface between metal catalyst and the etchant solution as the latter would require Si atoms to diffuse from the underlying substrate through the metal catalyst to the metal-solution interface The implication for etching to take place at the interface between the metal catalyst layer and the Si substrate is that it is necessary for the etchant species in the solution to be transported to the Si-metal interface This will not

be a problem if the metal catalyst is in the form of small area structures, such as Au nanodots on Si obtained from an AAO template mask However if the Si substrate is covered by a continuous layer of large area metal catalyst, it will make the transport of the etchant species to the Si-metal interface difficult unless there are cracks or pinholes

in the metal catalyst layer which allows the etchant species to seep through

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5.4 Effect of the size of the metal mask on the etched structure

It is of interest to find out if the anisotropic nature of the etching process will be affected by the size of the metal catalyst since most of the features required for the modern technology have to be of nano-size dimensions Triangular Cr/Au (10/30 nm) masks (see Figures 51 and 52) with about 100 nm long edge were deposited on lowly doped (160!cm) n-type Si (100) using an electron beam lithography process An Au

catalyst layer of 7nm was deposited on the substrate by thermal evaporation The samples were then etched in HF of 4.6M and H2O2 of 0.44M for 40 seconds As mentioned previously, Cr/Au (10/30 nm) regions were able to block the chemical etching of Si

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Figure 53 shows the triangular shaped Si nanowires produced after the chemical etch The geometry of the triangular mask was preserved during the etch for most of the nanowires The side walls for some of the nanowires show the presence of facets after the chemical etching This shows that the etching can be anisotropic even for extremely small features Silicon nanowires with such special geometry could be of interest for various applications in electronics, photonics, photovoltaics, thermoelectrics, etc

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5.5 Summary

In summary, the thickness of the blocking bi-layer required for the catalytic etching process was investigated It is important to look into the reaction of the blocking materials with the etchant solution The mechanism of the catalytic etching was also investigated with AES It was found that there is no significant diffusion of Si from the underlying substrate through the metal catalyst during the catalytic etching process It

is therefore likely that catalytic etching of Si took place at the interface between the metal catalyst layer and the Si substrate, rather than at the interface between metal catalyst and the etchant solution as the latter would require Si atoms to diffuse from the underlying substrate through the metal catalyst to the metal-solution interface Last but not least, the catalytic etching was tested with a nano-size mask produced by electron beam lithography with special geometry (triangular shape) features The result shows that the etching process can remain anisotropic even with the nano-size mask

Chapter 6 Conclusion

6.1 Conclusion

In conclusion, the fabrication of Ge nanowires and characterization of its thermal

conductivity (k) were investigated Experimental measurements show a 6 times decrease in the k value of the Ge nanowires as compared to bulk Ge However, the actual k value could be lower if possible source of errors introduced by heat loss to the

surrounding and the substrate could be minimized

The catalytic etching fabrication process for Si nanowires was also investigated Various aspects such as the mechanism of catalytic etching, consideration in choosing appropriate blocking materials and nanowires with special geometry were investigated

in this work It was found that there is no significant diffusion of Si from the underlying substrate through the metal catalyst during the catalytic etching process It

is therefore likely that catalytic etching of Si took place at the interface between the metal catalyst layer and the Si substrate, rather than at the interface between metal catalyst and the etchant solution as the latter would require Si atoms to diffuse from the underlying substrate through the metal catalyst to the metal-solution interface

6.2 Recommendations for future work

For future work, the thermal conductivity measurement can be performed on a special substrate where there are trenches between electrodes so that the heat loss to the surrounding can be minimized Multiple Ge nanowires, rather than just a single Ge