MPP 5 V CC Uses push-pull eff ect and com-
25. Transconductance indicates how eff ectively the input voltage
a. Voltage gain b. Input resistance c. Supply voltage d. Output current
SEC. 11-1 BASIC IDEAS
11-1 A 2N5458 has a gate current of 1 nA when the reverse voltage is 215 V. What is the input resistance of the gate?
11-2 A 2N5640 has a gate current of 1 A when the reverse voltage is 220 V and the ambient temperature is 100°C. What is the input resistance of the gate?
SEC. 11-2 DRAIN CURVES
11-3 A JFET has IDSS 5 20 mA and VP 5 4 V. What is the maximum drain current? The gate-source cutoff voltage? The value of RDS?
11-4 A 2N5555 has IDSS 5 16 mA and VGS(off ) 5 22 V.
What is the pinchoff voltage for this JFET? What is the drain-source resistance RDS?
11-5 A 2N5457 has IDSS 5 1 to 5 mA and VGS(off ) 5 20.5 to 26 V. What are the minimum and maximum values of RDS?
SEC. 11-3 THE TRANSCONDUCTANCE CURVE 11-6 A 2N5462 has IDSS 5 16 mA and VGS(off ) 5 26 V.
What are the gate voltage and drain current at the half cutoff point?
11-7 A 2N5670 has IDSS 5 10 mA and VGS(off ) 5 24 V.
What are the gate voltage and drain current at the half cutoff point?
11-8 If a 2N5486 has IDSS 5 14 mA and VGS(off ) 5 24 V, what is the drain current when VGS 5 21 V? When VGS 5 23 V?
SEC. 11-4 BIASING IN THE OHMIC REGION 11-9 What is the drain saturation current in Fig. 11-43a?
The drain voltage?
11-10 If the 10-kV resistor of Fig. 11-43a is increased to 20 kV, what is the drain voltage?
11-11 What is the drain voltage in Fig. 11-43b?
11-12 If the 20-kV resistor of Fig. 11-43b is decreased to 10 kV, what is the drain saturation current? The drain voltage?
SEC. 11-5 BIASING IN THE ACTIVE REGION For Problems 11-13 through 11-20, use preliminary analysis.
11-13 What is the ideal drain voltage in Fig. 11-44a?
11-14 Draw the dc load line and Q point for Fig. 11-44a.
11-15 What is the ideal drain voltage in Fig. 11-44b?
11-16 If the 18 kV of Fig. 11-44b is changed to 30 kV, what is the drain voltage?
11-17 In Fig. 11-45a, what is the drain current? The drain voltage?
Problems
IDSS = 5 mA VDD +15 V
0 V
VGS(off) = –3 V
(a) RD 10 kΩ
IDSS = 30 mA 0 V
VGS(off) = –6 V
(b) RD 20 kΩ
VDD +20 V
Figure 11-43
VDD +25 V
(a) RD 10 kΩ
RS 22 kΩ R2
1 MΩ R1 1.5 MΩ
VDD +25 V
VSS –25 V
(b) RD 7.5 kΩ
RS 18 kΩ RG
3.3 MΩ
Figure 11-44
VDD +15 V
VEE –9 V (a)
RD 7.5 kΩ
RE 8.2 kΩ RG
2.2 MΩ
VDD +25 V
(b) (c)
RD 8.2 kΩ
RS 1 kΩ RG
1.5 MΩ
+2 V +4 V +6 V +8 V –2 V
1 mA 2 mA 3 mA 4 mA
0
–4 V +10 V
VGS ID
Figure 11-45
464 Chapter 11 11-18 If the 7.5 kV of Fig. 11-45a is changed to 4.7 kV,
what is the drain current? The drain voltage?
11-19 In Fig. 11-45b, the drain current is 1.5 mA. What does VGS equal? What does VDS equal?
11-20 The voltage across the 1K V of Fig. 11-45b is 1.5 V. What is the voltage between the drain and ground?
For Problems 11-21 through 11-24, use Fig. 11-45c and graphical methods to fi nd your answers.
11-21 In Fig. 11-44a, fi nd VGS and ID using the transconductance curve of Fig. 11-45c.
11-22 In Fig. 11-45a, fi nd VGS and VD using the transconductance curve of Fig. 11-45c.
11-23 In Fig. 11-45b, fi nd VGS and ID using the transconductance curve of Fig. 11-45c.
11-24 Change RS in Fig. 11-45b from 1 kV to 2 kV. Use the curve of Fig. 11-45c to fi nd VGS, ID, and VDS.
SEC. 11-6 TRANSCONDUCTANCE
11-25 A 2N4416 has IDSS 5 10 mA and gm0 5 4000 S.
What is its gate-source cutoff voltage? What is the value of gm for VGS 5 21 V?
11-26 A 2N3370 has IDSS 5 2.5 mA and gm0 5 1500 S.
What is the value of gm for VGS 5 21 V?
11-27 The JFET of Fig. 11-46a has gm0 5 6000 S. If IDSS 5 12 mA, what is the approximate value of ID for VGS of 22 V? Find the gm for this ID.
SEC. 11-7 JFET AMPLIFIERS
11-28 If gm 5 3000 S in Fig. 11-46a, what is the stage input impedance and ac output voltage?
11-29 The JFET amplifi er of Fig. 11-46a has the
transconductance curve of Fig. 11-46b. What is the approximate ac output voltage?
11-30 If the source follower of Fig. 11-47a has gm 5 2000
S, what is the ac output voltage and stage output impedance?
VGS ID
12 mA 10 mA
5 mA
–1 V –2 V
–3 V
–4 V 0
RG 10 kΩ
vg
2 mV R2
10 MΩ
RL 10 kΩ VDD +30 V RD
1 kΩ
RS 2 kΩ R1
20 MΩ
(a) (b)
Figure 11-46
VDD +30 V
vg 5 mV
(a) R1
20 MΩ
R2
10 MΩ RS
3.3 kΩ
RL 1 kΩ RG
10 kΩ
(b)
6 mA 5 mA
2.5 mA
0 –1 V –2 V –3 V –4 V
VGS ID
Figure 11-47
11-31 The source follower of Fig. 11-47a has the transconductance curve of Fig. 11-47b. What is the ac output voltage?
SEC. 11-8 THE JFET ANALOG SWITCH
11-32 The input voltage of Fig. 11-48a is 50 mVp-p. What is the output voltage when VGS 5 0 V? When VGS 5 210 V? The on-off ratio?
11-33 The input voltage of Fig. 11-48b is 25 mVp-p. What is the output voltage when VGS 5 0 V? When VGS 5 210 V? The on-off ratio?
vin vout vout
VGS
vin
VGS
(a) (b)
IDSS= 10 mA Vp = 2 V
IDSS= 5 mA Vp = 3 V
RD 33 kΩ RD
22 kΩ
Figure 11-48
Critical Thinking
11-34 If a JFET has the drain curves of Fig. 11-49a, what does IDSS equal? What is the maximum VDS in the ohmic region? Over what voltage range of VDS
does the JFET act as a current source?
11-35 Write the transconductance equation for the JFET whose curve is shown in Fig. 11-49b. How much drain current is there when VGS 5 24 V? When VGS 5 22 V?
11-36 If a JFET has a square-law curve like Fig. 11-49c, how much drain current is there when VGS 5 21 V?
11-37 What is the dc drain voltage in Fig. 11-50? The ac output voltage if gm 5 2000 S?
11-38 Figure 11-51 shows a JFET dc voltmeter. The zero adjust is set just before a reading is taken. The calibrate adjust is set periodically to give full-scale defl ection when vin 5 22.5 V. A calibrate adjust- ment like this takes care of variations from one FET to another and FET aging eff ects.
a. The current through the 510 V equals 4 mA.
How much dc voltage is there from the source to ground?
b. If no current fl ows through the ammeter, what voltage does the wiper tap off the zero adjust?
c. If an input voltage of 2.5 V produces a defl ec- tion of 1 mA, how much defl ection does 1.25 V produce?
11-39 In Fig. 11-52a, the JFET has an IDSS of 16 mA and an RDS of 200 V. If the load has a resistance of 10 kV, what are the load current and the voltage across the JFET? If the load is accidentally shorted, what are the load current and the voltage across the JFET?
11-40 Figure 11-52b shows part of an AGC amplifi er.
A dc voltage is fed back from an output stage to an earlier stage such as the one shown here.
Figure 11-46b is the transconductance curve.
What is the voltage gain for each of these?
a. VAGC 5 0 b. VAGC 5 21 V c. VAGC 5 22 V d. VAGC 5 23 V e. VAGC 5 23.5 V
20 mA
5 15 30
VGS (off) = – 5
(a)
32 mA
– 8 V (b)
ID ID
ID
VGS VGS
VDS
12 mA
– 5 V (c)
Figure 11-49
466 Chapter 11 VDD
+15 V
vg 3 mV
VEE –10 V RG
10 MΩ RGEN 50 Ω
RD 3.3 kΩ
RL 15 kΩ
RE 4.7 kΩ
Figure 11-50
RS 510 Ω RG
10 MΩ vin
MPF102 R1
3.5 kΩ
A
R2 470 Ω CALIBRATE
≈ 500 Ω ZERO VDD +10 V
+ –
Figure 11-51
LOAD
(a) VDD +30 V
VDD +15 V
vout
RG 1 MΩ
RD 1 kΩ
vin
(b) VAGC
Figure 11-52
Troubleshooting
Use Fig. 11-53 and the troubleshooting table to solve the remaining problems.
11-41 Find the trouble T1.
11-42 Find the trouble T2.
11-43 Find the trouble T3.
11-44 Find the trouble T4.
11-45 Find the trouble T5.
11-46 Find the trouble T6.
11-47 Find the trouble T7.
11-48 Find the trouble T8.
R2 100 mV 1 MΩ
1 mF C1
R1 2 MΩ
10 mF C2
C3 10 mF
RL 10 kΩ VDD = 24 V
RD 1 kΩ
Q1 2N5486
RS 2 kΩ Vin
Figure 11-53 Troubleshooting.
Trouble VGS
−1.6 V
−2.75 V
−0.6 V
−0.56 V
−8 V 8 V
−1.6 V
−1.6 V 0
4.8 mA 1.38 mA 7.58 mA
0 0 0 4.8 mA 4.8 mA 7.5 mA
9.6 V 19.9 V 1.25 V
0 8 V 24 V 9.6 V 9.6 V 1.5 V
100 mV 100 mV 100 mV 100 mV 100 mV 100 mV 100 mV 100 mV 1 mV
0 0 0 0 0 0 87 mV
0 0
357 mV 200 mV 29 mV
0 0 0 40 mV 397 mV
0
357 mV 200 mV 29 mV
0 0 0 40 mV
0 0
ID VDS Vg Vs Vd Vout
OK T1 T2 T3 T4 T5 T6 T7 T8
468 Chapter 11
Multisim Troubleshooting Problems
The Multisim troubleshooting fi les are found on the Instructor Resources section of Connect for Electronic Principles, in a folder named Multisim Troubleshooting Circuits (MTC). See page XVI for more details. For this chapter, the fi les are labeled MTC11-49 through MTC11-53 and are based on the circuit of Figure 11-53.
Open up and troubleshoot each of the respec- tive fi les. Take measurements to determine if there is a fault and, if so, determine the circuit fault.
11-49 Open up and troubleshoot fi le MTC11-49.
11-50 Open up and troubleshoot fi le MTC11-50.
11-51 Open up and troubleshoot fi le MTC11-51.
11-52 Open up and troubleshoot fi le MTC11-52.
11-53 Open up and troubleshoot fi le MTC11-53.
Job Interview Questions
1. Tell me how a JFET works, including the pinch off and gate-source cutoff voltage in your explanation.
2. Draw the drain curves and the transconductance curve for a JFET.
3. Compare the JFET and the bipolar junction transistor.
Your comments should include advantages and dis- advantages of each.
4. How can you tell whether an FET is operating in the ohmic region or the active region?
5. Draw a JFET source follower and explain how it works.
6. Draw a JFET shunt switch and a JFET series switch.
Explain how each works.
7. How can the JFET be used as a static electricity switch?
8. What input quantity controls the output current in a BJT? A JFET? If the quantities are diff erent, explain.
9. A JFET is a device that controls current fl ow by plac- ing a voltage on the gate. Explain this.
10. What is the advantage of a cascode amplifi er?
11. Tell me why JFETs are sometimes found as the fi rst amplifying device at the front end of radio receivers.
Self-Test Answers
1. a 2. d 3. c 4. d 5. b 6. b 7. d 8. c 9. d
10. c 11. c 12. a 13. c 14. d 15. a 16. b 17. c 18. c
19. a 20. c 21. c 22. b 23. b 24. d 25. d
Practice Problem Answers
11-1 Rin 5 10,000 MV 11-2 RDS 5 600 V;
Vp 5 3.0 V 11-4 ID 5 3 mA;
VGS 5 23 V 11-5 RDS 5 300 V;
VD 5 0.291 V 11-6 RS 5 500 V;
VD 5 26 V 11-7 VGS(min) 5 20.85;
ID(min) 5 2.2 mA;
VGS(max) 5 22.5 V;
ID(max) 5 6.4 mA 11-8 ID 5 4 mA;
VDS 5 12 V 11-9 ID(max) 5 5.6 mA 11-11 ID 5 4.3 mA;
VD 5 5.7 V 11-12 VGS(off ) 5 23.2 V;
gm 5 1,875 S 11-13 vout 5 5.3 mV
11-14 vout 5 0.714 mV 11-15 Av 5 0.634 11-16 Av 5 0.885 11-17 RDS 5 400 V;
on-off ratio 5 26 11-18 Vout(on) 5 9.6 mV;
vout(off ) 5 10 V on-off ratio 5 960 11-19 Vpeak 5 99.0 mV
470 chapter
12 MOSFETs
The metal-oxide semiconductor FET, or MOSFET, has a source, gate, and drain. The MOSFET diff ers from the JFET, however, in that the gate is insulated from the channel. Because of this, the gate current is even smaller than it is in a JFET.
There are two kinds of MOSFETs, the depletion-mode type and the enhancement-mode type. The enhancement-mode MOSFET is widely used in both discrete and integrated circuits.
In discrete circuits, the main use is in power switching, which means turning large currents on and off . In integrated circuits, the main use is in digital switching, the basic process behind modern computers. Although their use has declined, depletion- mode MOSFETs are still found in high-frequency front-end communications circuits as RF amplifi ers.
© Nick Koudis/Getty Images
Chapter Outline
12-1 The Depletion-Mode MOSFET
12-2 D-MOSFET Curves 12-3 Depletion-Mode MOSFET
Amplifi ers
12-4 The Enhancement-Mode MOSFET
12-5 The Ohmic Region 12-6 Digital Switching 12-7 CMOS
12-8 Power FETs
12-9 High-side MOSFET Load Switches
12-10 MOSFET H-Bridge 12-11 E-MOSFET Amplifi ers 12-12 MOSFET Testing
Objectives
After studying this chapter, you should be able to:
■ Explain the characteristics and operation of both depletion- mode and enhancement-mode MOSFETs.
■ Sketch the characteristic curves for D-MOSFETs and E-MOSFETs.
■ Describe how E-MOSFETs are used as digital switches.
■ Draw a schematic of a typical CMOS digital switching circuit and explain its operation.
■ Compare power FETs with power bipolar junction transistors (BJTs).
■ Name and describe several power FET applications.
■ Describe the operation of high- side load switches.
■ Explain the operation of discrete and monolithic H-bridge circuits.
■ Analyze the dc and ac operation of both D-MOSFET and
E-MOSFET amplifi er circuits.
active-load resistors analog
complementary MOS (CMOS)
dc-to-ac converter dc-to-dc converter depletion-mode MOSFET digital
drain-feedback bias enhancement-mode MOSFET
high-side load switch inrush current interface
metal-oxide semiconductor FET (MOSFET)
parasitic body-diode power FET
substrate
threshold voltage uninterruptible power supply (UPS)
vertical MOS (VMOS)
Vocabulary
472 Chapter 12
12-1 The Depletion-Mode MOSFET
Figure 12-1 shows a depletion-mode MOSFET, a piece of n material with an insulated gate on the left and a p region on the right. The p region is called the substrate. Electrons fl owing from source to drain must pass through the narrow channel between the gate and the p substrate.
A thin layer of silicon dioxide (SiO2) is deposited on the left side of the channel. Silicon dioxide is the same as glass, which is an insulator. In a MOSFET, the gate is metallic. Because the metallic gate is insulated from the channel, neg- ligible gate current fl ows even when the gate voltage is positive.
Figure 12-2a shows a depletion-mode MOSFET with a negative gate voltage. The VDD supply forces free electrons to fl ow from source to drain. These electrons fl ow through the narrow channel on the left of the p substrate. As with a JFET, the gate voltage controls the width of the channel. The more negative the gate voltage, the smaller the drain current. When the gate voltage is negative enough, the drain current is cut off. Therefore, the operation of a depletion-mode MOSFET is similar to that of a JFET when VGS is negative.
Since the gate is insulated, we can also use a positive input voltage, as shown in Fig. 12-2b. The positive gate voltage increases the number of free elec- trons fl owing through the channel. The more positive the gate voltage, the greater the conduction from source to drain.
12-2 D-MOSFET Curves
Figure 12-3a shows the set of drain curves for a typical n-channel, depletion-mode MOSFET. Notice that the curves above VGS 5 0 are positive and the curves below VGS 5 0 are negative. As with a JFET, the bottom curve is for VGS 5 VGS(off) and the drain current will be approximately zero. As shown, when VGS 5 0 V, the drain current will equal IDSS. This demonstrates that the depletion-mode MOSFET, or D-MOSFET, is a normally on device. When VGS is made negative, the drain cur- rent will be reduced. In contrast to an n-channel JFET, the n-channel D-MOSFET can have VGS made positive and still function properly. This is because there is no pn junction to become forward biased. When VGS becomes positive, ID will increase following the square-law equation:
ID 5 IDSS ( 1 2 — VVGS(off)GS ) 2 (12-1)
n
n
SUBSTRATE DRAIN
GATE
SOURCE SiO2
p
Figure 12-1 Depletion-mode MOSFET.
GOOD TO KNOW
Like a JFET, a depletion-mode MOSFET is considered a nor- mally on device. This is because both devices have drain current when VGS 5 0 V. Recall that for a JFET, IDSS is the maximum possible drain current. With a depletion-mode MOSFET, the drain current can exceed IDSS if the gate voltage is of the correct polarity to increase the number of charge carriers in the channel.
For an n-channel D-MOSFET, ID is greater than IDSS when VGS is positive.
n p n
DRAIN
GATE
SOURCE VGG
VDD
(a)
n p n
DRAIN
GATE
SOURCE VGG
VDD
(b) –
– + +
– + –
+
Figure 12-2 (a) D-MOSFET with negative gate; (b) D-MOSFET with positive gate.
When VGS is negative, the D-MOSFET is operating in the depletion mode.
When VGS is positive, the D-MOSFET is operating in the enhancement mode. Like the JFET, the D-MOSFET curves display an ohmic region, a current-source region, and a cutoff region.
Figure 12-3b is the transconductance curve for a D-MOSFET. Again, IDSS is the drain current with the gate shorted to the source. IDSS is no longer the maximum possible drain current. The parabolic transconductance curve follows the same square-law relation that exists with a JFET. As a result, the analysis of a depletion-mode MOSFET is almost identical to that of a JFET circuit. The major difference is enabling VGS to be either negative or positive.
There is also a p-channel D-MOSFET. It consists of a drain-to-source p-channel, along with an n-type substrate. Once again, the gate is insulated from the channel. The action of a p-channel MOSFET is complementary to the n-channel MOSFET. The schematic symbols for both n-channel and p-channel D-MOSFETs are shown in Fig. 12-4.
(a)
(b) ID
VDS VDD
VDD RD
+2 +1
–1 –2 0
VGS(off) IDSS
ID
VGS ENHANCEMENT MODE
DEPLETION MODE
VGS(off)
IDSS
Figure 12-3 An n-channel, depletion-mode MOSFET: (a) Drain curves;
(b) transcon ductance curve.
DRAIN
SOURCE GATE
(a)
DRAIN
SOURCE GATE
(b)
Figure 12-4 D-MOSFET schematic symbols: (a) n-channel; (b) p-channel.
474 Chapter 12
12-3 Depletion-Mode MOSFET Amplifi ers
A depletion-mode MOSFET is unique because it can operate with a positive or a negative gate voltage. Because of this, we can set its Q point at VGS 5 0 V, as shown in Fig. 12-5a. When the input signal goes positive, it increases ID above IDSS. When the input signal goes negative, it decreases ID below IDSS. Because there is no pn junction to forward bias, the input resistance of the MOSFET remains very high. Being able to use zero VGS allows us to build the very simple bias circuit of Fig. 12-5b. Because IG is zero, VGS 5 0 V and ID 5 IDSS. The drain voltage is:
VDS 5 VDD 2 IDSS RD (12-2)
Due to the fact that a D-MOSFET is a normally on device, it is also pos- sible to use self-bias by adding a source resistor. The operation becomes the same as a self-biased JFET circuit.
Example 12-1
A D-MOSFET has the values VGS(off) 5 23 V and IDSS 5 6 mA. What will the drain current equal when VGS equals 21 V, 22 V, 0 V, 11 V, and 12 V?
SOLUTION Following the square-law equation (12-1), when VGS 5 21 V ID 5 2.67 mA
VGS 5 22 V ID 5 0.667 mA VGS 5 0 V ID 5 6 mA VGS 5 11 V ID 5 10.7 mA VGS 5 12 V ID 5 16.7 mA
PRACTICE PROBLEM 12-1 Repeat Example 12-1 using the values VGS(off ) 5 24 V and IDSS 5 4 mA.
VGS ID
RG
+VDD
RD (a)
(b) Q
Figure 12-5 Zerobias.
Ch t 12
Example 12-2
The D-MOSFET amplifi er shown in Fig. 12-6 has VGS(off) 5 22 V, IDSS 5 4 mA, and gmo 5 2000 μS. What is the circuit’s output voltage?
SOLUTION With the source grounded, VGS 5 0 V and ID 5 4 mA.
VDS 5 15 V – (4 mA)(2 kV) 5 7 V
Since VGS 5 0 V, gm 5 gmo 5 2000 μS.
The amplifi er’s voltage gain is found by:
Av 5 gmrd
The ac drain resistance is equal to:
rd 5 RD i RL 5 2 kV i 10 kV 5 1.67 kV and Av is:
Av 5 (2000 μS)(1.67 kV) 5 3.34 Therefore,
vout 5 (vin)(Av) 5 (20 mV)(3.34) 5 66.8 mV
PRACTICE PROBLEM 12-2 In Fig. 12-6, if the MOSFET’s gmo value is 3000 S, what is the value of vout?
As shown by Example 12-2, the D-MOSFET has a relatively low volt- age gain. One of the major advantages of this device is its extremely high input resistance. The input resistance remains high when VGS is positive or negative.
This allows us to use this device when circuit loading could be a problem. Also, MOSFETs have excellent low-noise properties because no electron-hole pair combinations are required for current fl ow as in BJTs. This is a defi nite advantage for any stage near the front end of a system where the signal is weak. This is very common in many types of electronic communications circuits.
Some D-MOSFETs, as shown in Fig. 12-7, are dual-gate devices. One gate can serve as the input signal point, while the other gate can be connected to an automatic gain control dc voltage. This allows the voltage gain of the MOSFET to be controlled and varied depending on the input signal strength.
Figure 12-6 D-MOSFET amplifi er.
vin 20 mV
vout
RG 1 MΩ
2 kΩ RD +VDD
RL 10 kΩ 15 V
476 Chapter 12