acer aspire 5742 compal la 6582p pew7181 uma schematic diagram

NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.SCHEMATIC,MB A6582Custom THIS SH

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THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

SCHEMATIC,MB A6582Custom

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC

Friday, July 02, 2010

Compal Electronics, Inc.

Intel Arrandale Processor with DDRIII + Ibex Peak-M

PEW71_81_91 UMA <LA-6582P> M/B Schematics Document

REV:0.2

Compal Confidential

2010-06-18

www.masteram.su

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SCHEMATIC,MB A6582B

6.4G/8.5G/10.6G 100M/133M/166M(CFD)

100MHz

33MHz

100MHz

100MHz 1GB/s x4

DMI x4 FDI x8

CMOS Camera

PCI-Express x 8 (ABD PCIE1 2.5GT/S CKD PCIE1/2 2.5/5GT/S)

page 26

USB port 0 (Left Low) USB Port 1 (Left High) USB port 2 (sub board)

port 1

SATA ODD Conn.

HDMI Conn.

USB port 9

Card Reader

Clock Generator

IDT: 9LRS3199AKLFT SILEGO: SLG8SP587

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SCHEMATIC,MB A6582B

+1.8VS 1.8V switched power rail

+3VALW 3.3V always on power rail

EC SM Bus1 address

Device

OFF

+1.05VS_VTT 1.05V switched power rail (1.05 for AUB CPU) ON OFF OFF

1.5V switched power rail +CPU_CORE

Ibex SM Bus address

Adapter power supply (19V)

AC or battery power rail for power circuit.

Core voltage for CPU

1.05V switched power rail for PCH

External PCI Devices

EC SM Bus2 address Device

Smart Battery

OFF OFF

OFF ON

Ext3 Right USB Ext3 Right USB

Ext1 Left Low USB Ext2 Left High USB

STATE SIGNAL Full ON

S1(Power On Suspend) S3 (Suspend to RAM) S4 (Suspend to Disk) S5 (Soft OFF)

SLP_S1# SLP_S3# SLP_S4# SLP_S5# +VALW +V +VS Clock

USB 2.0 USB 1.1 Port 4 External

USB Port

3 External USB Port Ext1 Left Low USB

Ext2 Left High USB

ON

Blue Tooth Blue Tooth

ON ON ON

ON ON

ON

OFF OFF OFF

0 1 2

3

OFF OFF

LOW

LOW LOW

4 5 6 7 8

LOW LOW LOW LOW LOW LOW

9 10 11 12 13

LOW LOW HIGH HIGH HIGH

BTO Option Table

BTO Item BOM Structure

Project ID Board ID

Project ID / Board ID Table for EC-AD channel

0 8.2K +/- 5%

0 V 0.216 V 0.250 V 0.289 V 0.436 V

0.712 V

0.503 V 0.819 V

0.538 V 0.875 V

1.036 V 1.453 V 1.650 V 1.759 V 1.935 V

2.500 V

2.200 V 3.300 V

2.341 V 1.185 V 1.264 V

0.1 0.2 0.3 1.0

Original NEW70/80/90/50/71/91 PEW71/81/91 Audio Mono/Crystal

PEW71/81/91 Audio Mono/SUSCLK NEW71/91 Optumis

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WW41 Recommend not pull down PCIE2.0 Jitter is over on ES1

*1:Disabled; No Physical Display Port attached to Embedded Display Port 0:Enabled; An external Display Port device is connected to the Embedded Display Port

CFG0 - PCI-Express Configuration Select

CFG3 - PCI-Express Static Lane Reversal

*1:Single PEG 0:Bifurcation enabled

eDP Signals Mapping

PEG_HTX_C_GRX_N1

PEG_GTX_C_HRX_N2 PEG_HTX_C_GRX_P2 PEG_HTX_C_GRX_P0

PEG_HTX_C_GRX_N2 PEG_HTX_C_GRX_P3

PEG_GTX_C_HRX_P3

PEG_HTX_C_GRX_N0

PEG_HTX_C_GRX_N3 PEG_HTX_C_GRX_P1

@R90_0402_5%

2

R83.01K_0402_1%

@R8

3.01K_0402_1%

@

R73.01K_0402_1%

@R7

3.01K_0402_1% 1@ 2

R110_0402_5%

@R110_0402_5%

JCPU1E

IC,AUB_CFD_rPGA,R1P0CONN@

RSVD38 AJ26

RSVD_NCTF_42 AT3

RSVD39 AJ27

RSVD_NCTF_40 AP1RSVD_NCTF_41 AT2

RSVD_NCTF_43 AR1

RSVD_TP_86

H16

RSVD45 AL28RSVD46 AL29RSVD47 AP30RSVD48 AP32RSVD49 AL27RSVD50 AT31RSVD51 AT32RSVD52 AP33RSVD53 AR33RSVD_NCTF_54 AT33RSVD_NCTF_55 AT34RSVD_NCTF_56 AP35RSVD_NCTF_57 AR35RSVD58 AR32

RSVD16

A19 RSVD15B19

RSVD22

AB9 RSVD21AC9

RSVD_TP_71 AA2RSVD_TP_72 AA1RSVD_TP_73 R9RSVD_TP_69 AD3

RSVD_TP_74 AG7RSVD_TP_70 AD2

RSVD_TP_75 AE3

RSVD_TP_76 V4RSVD_TP_77 V5RSVD_TP_78 N2

RSVD_TP_81 W3RSVD_TP_82 W2RSVD_TP_83 N3RSVD_TP_79 AD5

RSVD_TP_84 AE5RSVD_TP_80 AD7

RSVD_TP_85 AD9

RSVD36 AL26RSVD_NCTF_37 AR2

RSVD_TP_59 E15RSVD_TP_60 F15KEY A2RSVD62 D15RSVD63 C15RSVD64 AJ15RSVD65 AH15

VSS AP34

R100_0402_5%

@R100_0402_5%

3.01K_0402_1% 1@ 2

R120_0402_5%

@R120_0402_5%

JCPU1A

PEG_RX#[0] K35PEG_RX#[1] J34PEG_RX#[2] J33PEG_RX#[3] G35PEG_RX#[4] G32PEG_RX#[5] F34PEG_RX#[6] F31PEG_RX#[7] D35PEG_RX#[8] E33PEG_RX#[9] C33PEG_RX#[10] D32PEG_RX#[11] B32PEG_RX#[12] C31PEG_RX#[13] B28PEG_RX#[14] B30PEG_RX#[15] A31PEG_RX[0] J35PEG_RX[1] H34PEG_RX[2] H33PEG_RX[3] F35PEG_RX[4] G33PEG_RX[5] E34PEG_RX[6] F32PEG_RX[7] D34PEG_RX[8] F33PEG_RX[9] B33PEG_RX[10] D31PEG_RX[11] A32PEG_RX[12] C30PEG_RX[13] A28PEG_RX[14] B29PEG_RX[15] A30PEG_TX#[0] L33PEG_TX#[1] M35PEG_TX#[2] M33PEG_TX#[3] M30PEG_TX#[4] L31PEG_TX#[5] K32PEG_TX#[6] M29PEG_TX#[7] J31PEG_TX#[8] K29PEG_TX#[9] H30PEG_TX#[10] H29PEG_TX#[11] F29PEG_TX#[12] E28PEG_TX#[13] D29PEG_TX#[14] D27PEG_TX#[15] C26PEG_TX[0] L34PEG_TX[1] M34PEG_TX[2] M32PEG_TX[3] L30PEG_TX[4] M31PEG_TX[5] K31PEG_TX[6] M28PEG_TX[7] H31PEG_TX[8] K28PEG_TX[9] G30PEG_TX[10] G29PEG_TX[11] F28PEG_TX[12] E27PEG_TX[13] D28PEG_TX[14] C27PEG_TX[15] C25

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SM_RCOMP_1

H_TCKH_TMS

+3VS+1.05VS_VTT

Title

#425302

CP_S3PowerReduction

WhitePaper_Rev0.7

2009/04/23 Intel CRB 1.55 Update Change R68 to 1.1K_1%, R71 to 3.01K_1%

Need to check Voltage Level

2009/8/14 change back to 2K

del net for XDP remove

del R27 / R29 / R30 / R31 / R33 for XDP remove

del R41 / R43 / R48 / R49 XDP remove

U1 / U2 change to SA00000OH00

20100610 Add

R691.5K_0402_1%

R500_0402_5%

R500_0402_5%1 2

R57750_0402_1%

R713.01K_0402_1%

@R713.01K_0402_1%

@

R561.5K_0402_1%

R561.5K_0402_1%1 2

R621K_0402_1%

R260_0402_5%1 2

@T26PAD

@

R470_0402_5%

R420_0402_5%

R420_0402_5%1 2

R612K_0402_1%

U2

MC74VHC1G08DFT2G_SC70-5U2

MC74VHC1G08DFT2G_SC70-5

B 2

A 1Y

R360_0402_5%

R72750_0402_1%

@ PADT27

@

T24 PAD @T24 PAD @

R681.1K_0402_1%

@R681.1K_0402_1%

SM_RCOMP[1] AM1SM_RCOMP[2] AN1

SM_DRAMRST# F6SM_RCOMP[0] AL1

BCLK# B16BCLK A16

BCLK_ITP# AT30BCLK_ITP AR30

PEG_CLK# D16PEG_CLK E16

DPLL_REF_SSCLK# A17DPLL_REF_SSCLK A18CATERR#

PRDY# AT28PREQ# AP27TCK AN28TMS AP28TRST# AT27TDI AT29TDO AR27TDI_M AR29TDO_M AP29DBR# AN25

BPM#[0] AJ22BPM#[1] AK22BPM#[2] AK24BPM#[3] AJ24BPM#[4] AJ25BPM#[5] AH22BPM#[6] AK23BPM#[7] AH23

R450_0402_5%

R440_0402_5%

R440_0402_5%1 2

@

T25PAD

@T25PAD

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DDR_A_D59DDR_A_D57

DDR_A_D47DDR_A_D43DDR_A_D41

DDR_A_D45DDR_A_D39DDR_A_D35DDR_A_D33

DDR_A_D37

DDR_A_D61

DDR_A_D2DDR_A_D0

DDR_A_D53

DDR_A_D13

DDR_A_D29DDR_A_D23DDR_A_D19DDR_A_D17

DDR_A_D21

DDR_A_BS2DDR_A_BS0

DDR_A_MA5DDR_A_MA7DDR_A_MA9

DDR_A_MA12DDR_A_MA10

DDR_A_MA15

DDR_A_DQS#0

DDR_A_DQS#3DDR_A_DQS#5DDR_A_DQS#7

DDR_A_DQS0DDR_A_DQS2DDR_A_DQS4DDR_A_DQS6

DDR_A_DM7DDR_A_DM5DDR_A_DM2

DDR_A_DM6DDR_A_DM4DDR_A_DM0

DDR_A_DM3

DDR_B_D32

DDR_B_D36DDR_B_D38

DDR_B_D48

DDR_B_D52DDR_B_D54DDR_B_D50

DDR_B_D56

DDR_B_D34

DDR_B_D40

DDR_B_D0

DDR_B_D4DDR_B_D6

DDR_B_D16

DDR_B_D24

DDR_B_D2

DDR_B_D8

DDR_B_MA2

DDR_B_MA10DDR_B_MA8

DDR_B_MA15

DDR_B_DQS#5DDR_B_DQS#7DDR_B_DQS#3DDR_B_DQS#1

DDR_B_DQS#6DDR_B_DQS#2

DDR_B_DQS7

DDR_B_DQS0

DDR_B_DQS5DDR_B_DQS3

DDR_B_DQS6DDR_B_DQS2

DDR_B_DM3DDR_B_DM0

DDR_B_DM5DDR_B_DM7

DDR_B_DM2DDR_B_DM4

DDR_B_BS2DDR_B_BS0

JCPU1D

SB_CK#[1] V6SB_CKE[0] M3

SB_CKE[1] M2

SB_CS#[0] AB8SB_CS#[1] AD6

SB_ODT[0] AC7SB_ODT[1] AD1

SB_DM[0] D4SB_DM[1] E1SB_DM[2] H3SB_DM[3] K1SB_DM[4] AH1SB_DM[5] AL2SB_DM[6] AR4SB_DM[7] AT8

SB_DQS[4] AG2SB_DQS#[4] AH2

SB_DQS[5] AL5SB_DQS#[5] AL4

SB_DQS[6] AP5SB_DQS#[6] AR5

SB_DQS[7] AR7

SB_DQS#[7] AR8

SB_DQS[0] C5SB_DQS#[0] D5

SB_DQS[1] E3SB_DQS#[1] F4

SB_DQS[2] H4SB_DQS#[2] J4

SB_DQS[3] M5SB_DQS#[3] L4

SB_MA[0] U5SB_MA[1] V2SB_MA[2] T5SB_MA[3] V3SB_MA[4] R1SB_MA[5] T8SB_MA[6] R2SB_MA[7] R6SB_MA[8] R4SB_MA[9] R5SB_MA[10] AB5SB_MA[11] P3SB_MA[12] R3SB_MA[13] AF7SB_MA[14] P5SB_MA[15] N1

JCPU1C

SA_CK#[1] Y5SA_CKE[0] P7

SA_CKE[1] P6

SA_CS#[0] AE2SA_CS#[1] AE8

SA_ODT[0] AD8SA_ODT[1] AF9

SA_DM[0] B9SA_DM[1] D7SA_DM[2] H7SA_DM[3] M7SA_DM[4] AG6SA_DM[5] AM7SA_DM[6] AN10SA_DM[7] AN13

SA_DQS[0] C8SA_DQS#[0] C9

SA_DQS[1] F9SA_DQS#[1] F8

SA_DQS[2] H9SA_DQS#[2] J9

SA_DQS[3] M9SA_DQS#[3] N9

SA_DQS[4] AH8SA_DQS#[4] AH7

SA_DQS[5] AK10SA_DQS#[5] AK9

SA_DQS[6] AN11SA_DQS#[6] AP11

SA_DQS[7] AR13SA_DQS#[7] AT13

SA_MA[0] Y3SA_MA[1] W1SA_MA[2] AA8SA_MA[3] AA3SA_MA[4] V1SA_MA[5] AA9SA_MA[6] V8SA_MA[7] T1SA_MA[8] Y9SA_MA[9] U6SA_MA[10] AD4SA_MA[11] T2SA_MA[12] U3SA_MA[13] AG8SA_MA[14] T3SA_MA[15] V9

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CPU_VID0CPU_VID1

CPU_VID2CPU_VID3

CPU_VID6H_DPRSLPVR

CPU_VID4CPU_VID5

Title

Friday, July 02, 2010

(Place these capacitors between inductor and socket on Bottom)

(Place these capacitors on CPU cavity, Bottom Layer)

TOP side (under inductor)

MLCC 0805 X5R

+CPU-CORE Decoupling

16X22uF

ESR, mohm SPCAP,Polymer

Stuffing Option 2X470uF

H_VTTVID1 = low, 1.1V H_VTTVID1 = high, 1.05V

(Place these capacitors under CPU socket, top layer)

CSC (Current Sense Configuration) 8/25

VTT Rail Auburndale +1.1VS_VTT=1.05V Clarksfield +1.1VS_VTT=1.1V

Peak 21A WW15 MOW

20090915 Modify

Change to OS-CON20100414

Del C106

C97

22U_0805_6.3V6MC97

C6910U_0805_6.3V6M

1

10U_0805_6.3V6MC8110U_0805_6.3V6M1

2

C10222U_0805_6.3V6MC10222U_0805_6.3V6M1

2

C74

10U_0805_6.3V6MC74

10U_0805_6.3V6M

1

2

C7710U_0805_6.3V6MC7710U_0805_6.3V6M1

22U_0805_6.3V6M

1

2

C8510U_0805_6.3V6M

C8510U_0805_6.3V6M1

10U_0805_6.3V6M

1

2

C7110U_0805_6.3V6M

+

C105330U_D2E_2.5VM_R6M

1

2

C9622U_0805_6.3V6MC9622U_0805_6.3V6M1

2

C10422U_0805_6.3V6MC10422U_0805_6.3V6M1

ISENSE AN35

VTT_SENSE B15

PSI# AN33

VID[0] AK35VID[1] AK33VID[2] AK34VID[3] AL35VID[4] AL33VID[5] AM33VID[6] AM35PROC_DPRSLPVR AM34

VTT0_37 Y10VTT0_38 W10VTT0_39 U10VTT0_40 T10VTT0_41 J12

VTT0_42 J11

VTT0_1 AH14VTT0_2 AH12VTT0_3 AH11

VTT0_4 AH10VTT0_5 J14VTT0_6 J13VTT0_7 H14VTT0_8 H12

VTT0_9 G14VTT0_10 G13VTT0_11 G12VTT0_12 G11VTT0_13 F14VTT0_14 F13VTT0_15 F12VTT0_16 F11VTT0_17 E14VTT0_18 E12VTT0_19 D14VTT0_20 D13VTT0_21 D12VTT0_22 D11VTT0_23 C14VTT0_24 C13VTT0_25 C12VTT0_26 C11VTT0_27 B14VTT0_28 B12VTT0_29 A14

VTT0_30 A13VTT0_31 A12VTT0_32 A11

VSS_SENSE AJ35

VTT0_43 J16VTT0_44 J15

C6710U_0805_6.3V6M

1

10U_0805_6.3V6MC7310U_0805_6.3V6M1

2

T14PAD

@T14PAD

@

C95

22U_0805_6.3V6MC95

2

C88

10U_0805_6.3V6MC88

10U_0805_6.3V6M

1

2C66

10U_0805_6.3V6MC66

C8710U_0805_6.3V6M1

2

C9222U_0805_6.3V6MC9222U_0805_6.3V6M1

2

C8910U_0805_6.3V6M

C8910U_0805_6.3V6M1

2

C99

22U_0805_6.3V6MC99

10U_0805_6.3V6M1

2

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+1.5V+1.5V_1

Title

4.7U_0805_10V4Z

1

2

C12222U_0805_6.3V6MC12222U_0805_6.3V6M

1

2

+C107

330U_D2E_2.5VM_R6M

+C107

330U_D2E_2.5VM_R6M

1

2

C1171U_0402_6.3V6K

C1171U_0402_6.3V6K1

2

C1302.2U_0603_6.3V6K

C1302.2U_0603_6.3V6K1

2

C11310U_0805_6.3V6M

1

2

C11922U_0805_6.3V6M

C11922U_0805_6.3V6M1

2

+ C121330U_D2E_2.5VM_R6M+ C121

330U_D2E_2.5VM_R6M1

2

C12410U_0805_6.3V6MC12410U_0805_6.3V6M1

2

C12522U_0805_6.3V6MC12522U_0805_6.3V6M

1

2

C672 0.1U_0402_16V4ZC6721 0.1U_0402_16V4Z2

J1

JUMP_43X118

@J1

JUMP_43X118

@

1 12

2

J3

JUMP_43X118

@J3

JUMP_43X118

@

1 12

2C118

1U_0402_6.3V6KC118

1

2

C11122U_0805_6.3V6M

C11122U_0805_6.3V6M1

2

C129

1U_0402_6.3V6KC129

1U_0402_6.3V6K

1

2

C12322U_0805_6.3V6MC12322U_0805_6.3V6M1

2

C114

1U_0402_6.3V6KC114

22U_0805_6.3V6M

1

2

C673 0.1U_0402_16V4ZC6731 0.1U_0402_16V4Z2

C116

1U_0402_6.3V6KC116

22U_0805_6.3V6M

1

2

C671 0.1U_0402_16V4ZC6711 0.1U_0402_16V4Z2

22U_0805_6.3V6M1

2

C670 0.1U_0402_16V4ZC6701 0.1U_0402_16V4Z2

C12622U_0805_6.3V6MC12622U_0805_6.3V6M1

2

C1151U_0402_6.3V6K

C1151U_0402_6.3V6K1

2

C112

10U_0805_6.3V6MC112

GFX_VID[0] AM22GFX_VID[1] AP22GFX_VID[2] AN22GFX_VID[3] AP23GFX_VID[4] AM23GFX_VID[5] AP24GFX_VID[6] AN24

GFX_VR_EN AR25GFX_DPRSLPVR AT25GFX_IMON AM24

VAXG_SENSE AR22VSSAXG_SENSE AT22VAXG1

VTT0_59 P10VTT0_60 N10VTT0_61 L10VTT0_62 K10

VCCPLL1 L26VCCPLL2 L27VCCPLL3 M26

VTT1_63 J22VTT1_64 J20VTT1_65 J18VTT1_66 H21VTT1_67 H20VTT1_68 H19

R990_0805_5%

C12722U_0805_6.3V6MC12722U_0805_6.3V6M1

2

Trang 9

VSS

JCPU1I

@T5PAD

@

VSS

JCPU1H

VSS

JCPU1H

T3PAD

@T3PAD

@ PADT2

@

T4PAD

@T4PAD

@

Trang 10

DDR_A_CS1#

DDR_A_D39

DDR_A_BS1DDR_A_WE#

DDR_A_MA7

DDR_A_MA0

DDR_A_DQS7DDR_A_D57

DDR_A_D46DDR_A_DQS#5

DDR_A_D40

DDR_A_MA9

DDR_A_DQS#4

DDR_A_D52DDR_A_DQS5

DDR_A_D54DDR_A_D49

DDR_A_D62DDR_A_D56

DDR_A_D53DDR_A_D47DDR_A_ODT1

DDR_A_D43DDR_A_D34

DDR_A_CLK1DDR_A_CLK1#

DDR_A_D48

D_CK_SDATA

DDR_A_D38

DDR_A_CLK0DDR_A_CLK0#

DDR_A_D32DDR_A_MA13

DDR_A_D35

DDR_A_MA12

DDR_A_DQS4

DDR_A_DM6DDR_A_D42

DDR_A_CKE1

PM_EXTTS#0_1

DDR_A_MA15DIMM_DRAMRST#

RST_GATE

DDR_VREF_CA_DIMMA

DDR_A_D5

DDR_A_D22DDR_A_D14DDR_A_DQS#0

DDR_A_D31

DDR_A_D12DDR_A_D6DDR_A_DQS0

DDR_A_DM2DDR_A_DM1

DDR_A_D28DDR_A_D4

DDR_A_D30DDR_A_DQS3

DIMM_DRAMRST#

DDR_A_D29

DDR_A_D7DDR_A_D13

DDR_A_D20DDR_A_D15

DDR_A_D23

DDR_A_DQS#3+DIMM_VREFDQA

DDR_A_D19DDR_A_DQS2DDR_A_D10DDR_A_D3DDR_A_D1

DDR_A_D16

DDR_A_DM3

DDR_A_D9DDR_A_DQS#1

DDR_A_D24DDR_A_D18DDR_A_DQS#2DDR_A_D11

+0.75VS

+DIMM_VREFDQA+1.5V

+DIMM_VREFCA+1.5V

+1.5V+DIMM_VREFDQA

Title

Change to Reverse Type DDR3 SO-DIMM A

Layout Note: Place these 4 Caps near Command and Control signals of DIMMA

Layout Note:

Place near JDIMM1.203 & JDIMM1.204

Layout Note:

Place near JDIMM1

DIMMA VREFDQ M1 Circuit

DIMMA & DIMMB VREFCA circuit

#425302CP_S3PowerReductionWhitePaper_Rev1.0

M1 Circuit

8mm High

C15410U_0805_6.3V6MC15410U_0805_6.3V6M1

2C1531U_0402_6.3V6K

1

2

C143

0.1U_0402_16V4ZC143

0.1U_0402_16V4Z

1

2C137

2

C14010U_0805_6.3V6M

Q2BSS138LT1G_SOT23-3

13

0.1U_0402_16V4Z

1

2

R11010K_0402_5%

C1460.1U_0402_16V4Z

1

2

C1490.1U_0402_16V4ZC1490.1U_0402_16V4Z1

2

C617

0.047U_0402_16V7KC617

R1031K_0402_1%

10U_0805_6.3V6M

1

2

C1440.1U_0402_16V4Z

1

2

R1020_0402_5%

@R1020_0402_5%

@

C1482.2U_0603_6.3V6KC1482.2U_0603_6.3V6K

1

2

C14210U_0805_6.3V6M

1

2

JDIMM1

FOX_AS0A626-U8RN-7FJDIMM1

1

2

Trang 11

DDR_B_D12DDR_B_D6DDR_B_DQS0

DDR_B_DM2DDR_B_DM1

+DIMM_VREFDQBDDR_B_D0

DDR_B_D28DDR_B_DM0

DDR_B_D9

DDR_B_D7

DDR_B_D13

DDR_B_D20DDR_B_DQS#1

DDR_B_D21

DDR_B_D24

DDR_B_D15

DDR_B_D23DDR_B_D18

DDR_B_DQS#2DDR_B_D11

DDR_B_MA1

DDR_B_BS0DDR_B_CAS#

DDR_B_MA5

DDR_B_CLK0DDR_B_CLK0#

DDR_B_MA13

DDR_B_DQS6

DDR_B_D35DDR_B_DQS4

DDR_B_D42

DDR_B_D59DDR_B_D57DDR_B_D51DDR_B_D33

DDR_B_D58

DDR_B_DM5

DDR_B_DQS#6

DDR_B_D49

DDR_B_DM7DDR_B_D56DDR_B_D43DDR_B_D34

DDR_B_D48DDR_B_D32

DDR_B_D50DDR_B_D41

DDR_B_MA11

DDR_B_MA2DDR_B_MA15

DDR_B_D62

DDR_B_D36

DDR_B_DM6DDR_B_D39

DDR_B_DQS7

DDR_B_DM4

DDR_B_D44

DDR_B_DQS#7

DDR_B_D52DDR_B_DQS5

DDR_B_D54DDR_B_D45

DDR_B_D61

D_CK_SCLKD_CK_SDATAPM_EXTTS#0_1DDR_VREF_CA_DIMMB

+DIMM_VREFDQB

+0.75VS+3VS

+DIMM_VREFCA

Title

2008/9/8 #400755Calpella Clarksfield DDR3 SO-DIMM VREFDQ Platform Design Guide Change Details

Layout Note:

Place near JDIMM2

Layout Note:

Place near JDIMM2.203 & JDIMM2.204

Layout Note: Place these 4 Caps near Command and Control signals of DIMMB

DIMMB VREFDQ M1 Circuit

M1 Circuit

4mm High

C16310U_0805_6.3V6M

1

2

C164

10U_0805_6.3V6MC164

JDIMM2

FOX_AS0A626-U4RN-7FCONN@

C1650.1U_0402_16V4Z

2

C166

0.1U_0402_16V4ZC166

0.1U_0402_16V4Z

1

2

C1580.1U_0402_16V4ZC1580.1U_0402_16V4Z1

2

C172

1U_0402_6.3V6KC172

0.1U_0402_16V4Z

1

2C1670.1U_0402_16V4Z

C1670.1U_0402_16V4Z

1

2C161

10U_0805_6.3V6M

C16110U_0805_6.3V6M

1

2

C1731U_0402_6.3V6K

10U_0805_6.3V6M1

2C171

1

2

C156

0.1U_0402_16V4ZC156

0.1U_0402_16V4Z

1

2

R1141K_0402_1%

Trang 12

D_CK_SCLKD_CK_SDATA

H_STP_CPU#

REF_0/CPU_SELD_CK_SCLKD_CK_SDATA

CLK_XTAL_OUTCLK_XTAL_INCK505_PWRGD

CLK_BUF_DREF_96MCLK_BUF_DREF_96M#

CLK_BUF_CPU_DMI#

CLK_BUF_CPU_DMI

CLK_BUF_PCIE_SATACLK_BUF_PCIE_SATA#

CLK_BUF_CPU_BCLKCLK_BUF_CPU_BCLK#

+3VS

+CLK_3VS

+3VS

+CLK_1.5VS+1.5VS

+CLK_1.5VS+CLK_3VS

+CLK_1.5VS+CLK_1.05VS

Y1 Change to SJ100009R0020091117

For Cardreader

Silego Have Internal Pull-Up

IDT Have Internal Pull-Down

1

CPU_1 PIN 30 CPU_0

0 (Default) 133MHz 133MHz

100MHz 100MHz

Change to 2N7002DW20100416

Del 3G solution

Del L3

change to +1.05VS20100429

L2FBMA-L11-201209-221LMA30T_0805L2

FBMA-L11-201209-221LMA30T_08052 1

C182

10U_0805_10V4ZC182

10U_0805_10V4Z

1

2C178

10U_0805_10V4ZC17810U_0805_10V4Z1

2

Y114.31818MHZ 20PF 7A14300003

C1830.1U_0402_16V4Z1

2

R12010K_0402_5%

C190

33P_0402_50V8JC190

33P_0402_50V8J12

L1FBMA-L11-201209-221LMA30T_0805L1

FBMA-L11-201209-221LMA30T_08052 1

Q4B2N7002DW-T/R7_SOT363-6Q4B

2N7002DW-T/R7_SOT363-63

4

U3

SLG8SP587VTR_QFN32_5X5U3

VDD_CPU 24CPU_0 23

27MHZ_SS

7

XTAL_IN 2827MHZ

6

USB_48

8

CPU_1 20VSS_CPU 21

2

C179

0.1U_0402_16V4ZC179

0.1U_0402_16V4Z

1

2

C18610U_0805_10V4ZC18610U_0805_10V4Z

1

2

GD

2N7002_SOT23GD

2N7002_SOT232

2

R1254.7K_0402_5%

C191

33P_0402_50V8JC191

33P_0402_50V8J12

R1181 2 33_0402_5%

C1800.1U_0402_16V4Z

C1800.1U_0402_16V4Z1

2

R1234.7K_0402_5%

C184

0.1U_0402_16V4ZC184

0.1U_0402_16V4Z

1

2

Q4A2N7002DW-T/R7_SOT363-6Q4A

0.1U_0402_16V4Z

1

2

R1220_0402_5%

@R1220_0402_5%

@

C187

0.1U_0402_16V4ZC187

0.1U_0402_16V4Z

1

2

C17710U_0805_10V4ZC17710U_0805_10V4Z1

2

L4FBMA-L11-201209-221LMA30T_0805L4

FBMA-L11-201209-221LMA30T_08052 1

C1880.1U_0402_16V4Z

C1880.1U_0402_16V4Z1

2

R1241 2 10K_0402_5%

Trang 13

PCH_SRTCRST#

HDA_BITCLK_PCHHDA_SYNC_PCH

SERIRQ

SATA_PTX_DRX_N0SATA_DTX_C_PRX_P0SATA_PTX_DRX_P0

SATA_PTX_DRX_N1SATA_PTX_DRX_P1SATA_DTX_C_PRX_P1

SATA_COMP

PCH_GPIO19PCH_SPI_CS0#_R

PCH_SPKR

SERIRQ

PCH_GPIO21PCH_SPI_CS1#

PCH_SPI_CS0#

PCH_SPI_CLK_1

PCH_SPI_MOSIPCH_SPI_MOSI_1

SPI_HOLD1#

PCH_SPI_CLK_1PCH_SPI_MOSI_1

PCH_GPIO33#

PCH_SPI_CLK_1PCH_JTAG_TCK

INTVRMEN - Integrated SUS 1.1V VRM Enable High - Enable Internal VRs

close to RAM door

SATA for ODD

SATA for HDD1 HDA for AUDIO

GPIO33 can not pull down (manufacturing environments)

RC Delay 18~25mS

Have internal PD

SPI ROM Footprint 200mil

2/10 SATA2, SATA3 not support on HM55

If GPIO33 pull down, ME will not working.

For factory update ME, pull down resistor pull

under door.

modify to 330K

X1 Change to mini type20091102

GPIO33 has a weak internal pull-up

NOTE: Asserting the GPIO33 low on the

rising edge of PWROK will also halt Intel

Management Engine after chipset bringup

and disable runtime Intel Management

Engine features This is a debug mode and

must not be asserted after manfacturing/

debug.

For 3G teamClose to U5 20090915CRB 1.0 Change to 4.7K

enable iTPM: SPI_MOSI High

SG

dGPU iGPU

VGA_PRSNT_L#PCH_GPIO19

GPIO21 Project 0

1 NEW50/70/80/90 NEW71/91

R12810M_0402_5%

R14910K_0402_5%

18P_0402_50V8J12

U18

MX25L1605DM2I-12G SOP 8PSA000021A00U18

MX25L1605DM2I-12G SOP 8PSA000021A00

CS#

1

SO 2WP#

SQ72N7002_SOT23G

D

SQ72N7002_SOT232

@R12710K_0603_5%

LDRQ1# / GPIO23 F34FWH4 / LFRAME# C34LDRQ0# A34RTCRST#

SATA1RXN AH6SATA1RXP AH5SATA1TXN AH9SATA1TXP AH8SATA2RXN AF11SATA2RXP AF9SATA2TXN AF7SATA2TXP AF6SATA3RXN AH3SATA3RXP AH1SATA3TXN AF3SATA3TXP AF1SATA4RXN AD9SATA4RXP AD8SATA4TXN AD6SATA4TXP AD5SATA5RXN AD3SATA5RXP AD1SATA5TXN AB3SATA5TXP AB1

@R13010K_0603_5%

@

R340 10_0402_5%

@R340 10_0402_5%

R15010K_0402_5%

DAN202UT106_SC70-3

231

R140100K_0402_5%

C1941U_0402_6.3V6KC1941U_0402_6.3V6K

R1531 @ 2 51_0402_5%

Trang 14

PCIE_PTX_DRX_P2PCIE_DTX_C_PRX_N2PCIE_PTX_DRX_N2

PCH_SMBDATAPCH_SMBCLKEC_LID_OUT#

PCH_GPIO60

PCH_GPIO74

XTAL25_INXTAL25_OUTXCLK_RCOMP

EC_LID_OUT#

PCH_SMBCLKPCH_SMBDATAPCH_GPIO60

PCH_GPIO73PCH_GPIO25

PCH_GPIO20

MINI1_CLKREQ#

PCH_GPIO26

PROJECT_ID0PROJECT_ID1

PCH_SML1DATPCH_SML1CLK

CLK_CPU_DP <5>

CLK_CPU_DP# <5>

+3VALW+3VS

+3VALW

+1.05VS+3VS

+3VS+3VS+3VALW

Title

For Wireless LAN

For PCIE LAN

For Wireless LAN

For PCIE LAN

2 Level Shift1, Pull-Up to +3VS CLOCK GEN, DIMM1, DIMM2

3 Level Shift2, Pull-Up to +3VS LAN

4 Level Shift3, Pull-Up to +3VS CPU & PCH XDP

1 Connect Directly EXPRESS CARD, MINI1, MINI2

6/9 MOW23 Request add 25MHz crystal supporting Integrated Graphics

Project Port ID

2/10 PCIE7, PCIE8 not support on HM55

Change to 5x3.2

Pull high +3VS at KB926 side

2009/08/13: Change back to +3VALW

20090915 Add

2009/09/23:Change to +3VALW

GPIO66 6L/8L SATA register separe

1 0 8L

6L

0602 GPIO65 no use PULL HIGH:PVT PULL DOWN:DVT

R1701M_0402_5%

SML0CLK C6SML0DATA G8

CLKIN_BCLK_N AP3CLKIN_BCLK_P AP1

CLKIN_DMI_N AW24CLKIN_DMI_P BA24

CLKIN_DOT_96N F18CLKIN_DOT_96P E18

CLKIN_SATA_N / CKSSCD_N AH13CLKIN_SATA_P / CKSSCD_P AH12

XTAL25_IN AH51XTAL25_OUT AH53

REFCLK14IN P41

CLKIN_PCILOOPBACK J42

CLKOUT_PEG_A_N AD43CLKOUT_PEG_A_P AD45PEG_A_CLKRQ# / GPIO47 H1

PEG_B_CLKRQ# / GPIO56

P13

CLKOUT_PEG_B_P

AK51 CLKOUT_PEG_B_NAK53

SML1ALERT# / GPIO74 M14SML1CLK / GPIO58 E10SML1DATA / GPIO75 G12

R15910K_0402_5%

25MHZ_20PF_7A25000012

C20327P_0402_50V8JC20327P_0402_50V8J

Trang 15

H_FDI_TXN0H_FDI_TXN2H_FDI_TXN4H_FDI_TXN6

EC_SWI#

PCH_GPIO72SUS_PWR_ACK

PM_SLP_LAN#

PCH_PCIE_WAKE#

VGATESYS_PWROK

+3VALW

+1.05VS+3VS

Title

No used Integrated LAN, connecting LAN_RST# to GND

10/2

R199 Intel suggestion change to 10K

R195 Change to 10K for WW3720090916

@T10PAD

@

R190 8.2K_0402_5%

R1901 8.2K_0402_5%2

R2042.2K_0402_5%R2042.2K_0402_5%

R19249.9_0402_1%

BAV99DW-7_SOT363

453

D3A

BAV99DW-7_SOT363D3A

BAV99DW-7_SOT363

126

FDI_FSYNC0 BF13FDI_FSYNC1 BH13FDI_LSYNC0 BJ12FDI_LSYNC1 BG14FDI_INT BJ14

PMSYNCH BJ10TP23 N2SLP_M# K8SLP_S3# P12SLP_S4# H7SLP_S5# / GPIO63 E4

@T9PAD

Q11MMBT3906_SOT23-31

R20110K_0402_5%

D2CH751H-40PT_SOD323-2

21

T7PAD

@T7PAD

MC74VHC1G08DFT2G_SC70-5

B 2

A 1Y

Trang 16

PCH_CRT_RPCH_CRT_GPCH_CRT_B

PCH_LCD_CLKPCH_LCD_DATA

PCH_CRT_DATAPCH_CRT_CLK

PCH_CRT_BPCH_CRT_RPCH_CRT_G

PCH_TXCLK-LCTLA_CLKLCTLB_DATAPCH_CRT_CLKPCH_CRT_DATA

PCH_DPB_N3

PCH_DPB_P0PCH_DPB_P1

PCH_DPB_P3

PCH_DPB_N0PCH_DPB_N1

PCH_DPB_P2

PCH_DPB_HPDLVD_VREF

2/3 Change to 1K_0402_0.5% from Intel Suggestion (EDS 1.0 is incorrect)

SDVO_CTRLDATA strap Pull High at Level Shift Page

C205 HDMI@ 0.1U_0402_16V7KC2052 1HDMI@ 0.1U_0402_16V7K

R2161 2 10K_0402_5%

R2102.37K_0402_1%

R2102.37K_0402_1%1 2

R2151 2 10K_0402_5%

R2171 2 2.2K_0402_5%

R2221K_0402_1%

R2110_0402_5%1 2

R209100K_0402_5%

DDPB_2N BB40DDPB_3N AW38

DDPC_0N BE40DDPC_1N BF41DDPC_2N BD38DDPC_3N BB36

DDPD_0N BJ40DDPD_1N BJ38

DDPB_0P BC42DDPB_1P BG42

DDPD_2P BH37DDPD_3P BD36

DDPB_2P BA40DDPB_3P BA38

DDPC_2P BC38DDPC_3P BA36

DDPD_0P BG40DDPD_1P BG38

DDPC_CTRLCLK Y49DDPC_CTRLDATA AB49

DDPD_CTRLCLK U50DDPD_CTRLDATA U52

SDVO_STALLP BG48SDVO_STALLN BJ48

SDVO_INTP BH45SDVO_INTN BF45

R2181 2 2.2K_0402_5%

C207 HDMI@ 0.1U_0402_16V7KC2072 1HDMI@ 0.1U_0402_16V7KC206 HDMI@ 0.1U_0402_16V7KC2062 1HDMI@ 0.1U_0402_16V7K

Trang 17

USB_OC#7_RUSB_OC#5_R

USB_OC#0_R

USB_OC#2_R

USB20_N9USB20_P9

USB20_P11USB20_P12

Title

A16 swap override Strap/Top-Block

PCI_GNT#3

Swap Override jumper

Low = A16 swap High = Default

Boot BIOS Strap

PCI_GNT#0 PCI_GNT#1 Boot BIOS Location

Reserved (NAND) PCI

OC[0 3] use for EHCI 1 OC[4 7] use for EHCI 2

2/10 USB6, USB7 not support on HM55

USB Port (Left Side High) USB/B (Right Side)

*

override/Top-Block

Low=A16 swap

PCI_GNT3#

A16 swap overide Strap/Top-Block

Swap Override jumper

Swap Override enabled

High=Default

Set to Vcc when HIGH DMI Termination Voltage NV_CLE

Set to Vss when LOW

Intel Anti-Theft Techonlogy

*

NV_ALE High=Endabled Low=Disable(floating)

NV_ALE

NV_CLE

Enable Intel Anti-Theft Technology ： 8.2K PU to +3VS Disable Intel Anti-Theft Technology ： floating(internal PD)

DMI termination voltage.

weak internal PU, don't PD

U7 change to SA00000OH00

Del SIM Card USB

Del 3G Card USB

NV_CLE AY6

NV_DQS0 AV9NV_DQS1 BG8NV_DQ0 / NV_IO0 AP7NV_DQ1 / NV_IO1 AP6

NV_DQ10 / NV_IO10 BD6NV_DQ11 / NV_IO11 BB7NV_DQ12 / NV_IO12 BC8NV_DQ13 / NV_IO13 BJ8NV_DQ14 / NV_IO14 BJ6NV_DQ15 / NV_IO15 BG6

NV_DQ2 / NV_IO2 AT6NV_DQ3 / NV_IO3 AT9NV_DQ4 / NV_IO4 BB1NV_DQ5 / NV_IO5 AV6NV_DQ6 / NV_IO6 BB3NV_DQ7 / NV_IO7 BA4NV_DQ8 / NV_IO8 BE4NV_DQ9 / NV_IO9 BB6

NV_RB# AV7NV_RCOMP AU2

NV_WR#0_RE# AY8NV_WR#1_RE# AY5NV_WE#_CK0 AV11NV_WE#_CK1 BF5

USBP0N H18USBP0P J18

USBP10N A22USBP10P C22USBP11N G24USBP11P H24USBP12N L24USBP12P M24USBP13N A24USBP13P C24

USBP1N A18USBP1P C18USBP2N N20USBP2P P20USBP3N J20USBP3P L20USBP4N F20USBP4P G20USBP5N A20USBP5P C20USBP6N M22USBP7N B21USBP7P D21USBP8N H22USBP8P J22USBP9N E22USBP9P F22

USBRBIAS# B25USBRBIAS D25USBP6P N22

R24922.6_0402_1%

R226100K_0402_5%

Trang 18

PCH_GPIO22

PCH_GPIO27PCH_GPIO28

PCH_GPIO27

PCH_GPIO15EC_SMI#

DGPU_PWR_ENPCH_GPIO39PCH_GPIO22DGPU_HOLD_RST#

DGPU_PWROK_1PCH_GPIO35

+1.05VS+3VALW

Title

GPIO27 (Have internal Pull-High)

High: VCCVRM VR Enable

Low: VCCVRM VR Disable

(Have internal PD,Do not pull high)

(GPIO8 Should not be Pull-Low)

This signal has weak internal

PU, can't pull low

INIT3_3V

On-Die PLL Voltage Regulator

This signal has a weak internal pull up

GPIO27

H ： On-Die voltage regulator enable

L ： On-Die PLL Voltage Regulator disable

*

can't Pull low

This signal has a weak internal pull up GPIO8

GPIO15

L ： Intel ME Crypto Transport

Layer Security(TLS) chiper suite

with no confidentiality

H ： Intel ME Crypto Transport

Layer Security(TLS) chiper suite

@R288330_0402_5%

@CBEQ122SC2411KT146_SOT23-3

@T13PAD

THRMTRIP# BD10

GPIO8

F10

CLKOUT_PCIE6N AH45CLKOUT_PCIE6P AH46

PCIECLKRQ6# / GPIO45

H3

CLKOUT_PCIE7N AF48CLKOUT_PCIE7P AF47

PCIECLKRQ7# / GPIO46

F1

TP5 AY46TP4 AY45

TP6 AV43TP7 AV45

BMBUSY# / GPIO0

Y3

TP16 M30TP17 N30

NC_1 AB45NC_2 AB38NC_3 AB42NC_4 AB41

TP14 M32TP15 N32

Trang 19

All Ibex Peak-M Power rails with netnames +1.1VS and

+1.1V rails are actually +1.05VS and +1.05V rails

Near AB34

Near AT16

Near AP43 Near AB24

CRB 0.9 is 180 ohm @ 100MHz DG0.8 is 600 ohm FB (Page 290)

DG 1.6 (Page 329) Intel suggest follow CRB 8/21

Near AN35

0.1uH inductor, 200mA

Follow Intel suggestion 8/21

Top Side

DG 1.6 (Page 329)

Change to 0_040220090914

Change to 0_0805_5%

20090923

Near AE50

For CRT Issue 20091105

220 ohm bead,350mA L5 Change to 220ohm bead

1U_0402_6.3V6K

1

2

C2150.01U_0402_16V7KC2150.01U_0402_16V7K1

VCCTX_LVDS[1] AP43VCCTX_LVDS[2] AP45VCCALVDS AH38

VCCIO[1]

AM23

VCC3_3[2] AB34VCC3_3[3] AB35VCC3_3[4] AD35

VCC3_3[1]

AN35

VCCME3_3[1] AM8VCCME3_3[2] AM9VCCME3_3[3] AP11VCCME3_3[4] AP9

VCCPNAND[2] AK16

VCCPNAND[9] AM15VCCPNAND[1] AM16

VCCDMI[1] AT16VCCDMI[2] AU16

0.1UH_MLF1608DR10KT_10%_160812

C2290.1U_0402_16V4ZC229

0.1U_0402_16V4Z12

C2281U_0402_6.3V6KC2281U_0402_6.3V6K1

2

C2190.01U_0402_16V7KC2190.01U_0402_16V7K1

2

C22310U_0805_10V4Z

C223

10U_0805_10V4Z1

2

C21310U_0805_10V4Z

C213

10U_0805_10V4Z1

2

C21722U_0805_6.3V6MC21722U_0805_6.3V6M1

2

C2180.01U_0402_16V7KC2180.01U_0402_16V7K12

R2961@ 2 0_0805_5%

C22122U_0805_6.3V6MC22122U_0805_6.3V6M1

2

C2251U_0402_6.3V6K

C225

1U_0402_6.3V6K1

2

C22022U_0805_6.3V6MC22022U_0805_6.3V6M12

C2271U_0402_6.3V6K

C227

1U_0402_6.3V6K1

1U_0402_6.3V6K

1

2

C2300.1U_0402_16V4ZC2300.1U_0402_16V4Z1

2

L5MBK1608221YZF_2PL5

MBK1608221YZF_2P

C2320.1U_0402_16V4ZC2320.1U_0402_16V4Z1

2

C2220.1U_0402_16V4ZC2220.1U_0402_16V4Z1

2

C2141U_0402_6.3V6K

C214

1U_0402_6.3V6K1

2

C2160.1U_0402_16V4ZC2160.1U_0402_16V4Z1

2

Trang 20

+1.05VS

+1.05VS+1.05VS

+1.05VS

+1.05VS+1.05VS

All Ibex Peak-M Power rails with netnames +1.1VS and

+1.1V rails are actually +1.05VS and +1.05V rails

Near V9

Near AT18

Near V12 Near Y22

Near A12

Near P18

Near AH23 Near AH35

Near AF23

Near L30 Near AB19

Near U23

Near BD51

Near BB51

163mA 1998mA

344mA 52mA

357mA

73mA 72mA

Follow Intel suggestion

10uH inductor, 120mA

2/12 Follow EDS1.11 Change to 100 ohm Change to 1U for power

sequence issue on ICH9

2/12 Follow EDS1.11 Change to 100 ohm

DG 1.6 (Page 329)

Near AF32

09/09/21 WW37 remove +VCCADPLLA,+VCCADPLLB external 1U

+C247220U_6.3V_M_R17

C247220U_6.3V_M_R17

@

D5CH751H-40PT_SOD323-2D5

CH751H-40PT_SOD323-2

C2420.1U_0402_16V4ZC2420.1U_0402_16V4Z1

2

C2670.1U_0402_16V4ZC2670.1U_0402_16V4Z1

2

C2570.1U_0402_16V4ZC2570.1U_0402_16V4Z

C2501U_0402_6.3V6KC2501U_0402_6.3V6K1

2

R3040_0402_5%R3040_0402_5%

C2481U_0402_6.3V6K

@C2481U_0402_6.3V6K

2

R305100_0402_5%

C237

1U_0402_6.3V6KC237

1U_0402_6.3V6K

1

2

C2490.1U_0402_16V4ZC2490.1U_0402_16V4Z

R3030_0603_5%

@R3030_0603_5%

@

R306100_0402_5%

C268 1U_0402_6.3V6KC2681 2 1U_0402_6.3V6K

C2531U_0402_6.3V6KC2531U_0402_6.3V6K

1

2

+C244220U_6.3V_M_R17

C2710.1U_0402_16V4ZC2710.1U_0402_16V4Z1

2

C2551U_0402_6.3V6KC2551U_0402_6.3V6K1

2

L1110UH_LB2012T100MR_20%

@ L1110UH_LB2012T100MR_20%

C2411U_0402_6.3V6K

@C2411U_0402_6.3V6K

@1

2

C2654.7U_0805_10V4ZC2654.7U_0805_10V4Z

1

2

C2460.1U_0402_16V4ZC2460.1U_0402_16V4Z1

2

C2391U_0402_6.3V6KC2391U_0402_6.3V6K1

2

C2520.1U_0402_16V4ZC2520.1U_0402_16V4Z1

2

C2691U_0402_6.3V6KC2691U_0402_6.3V6K

1

2

L1010UH_LB2012T100MR_20%

L1010UH_LB2012T100MR_20%1 2

VCCIO[13] AD19VCCIO[14] AF20VCCIO[15] AF19

VCCRTC

A12

VCCSUS3_3[27] A26VCCSUS3_3[26] A28VCCSUS3_3[25] B27VCCSUS3_3[24] C26VCCSUS3_3[23] C28VCCSUS3_3[22] E26VCCSUS3_3[21] E28VCCSUS3_3[20] F26VCCSUS3_3[19] F28VCCSUS3_3[18] G26VCCSUS3_3[17] G28VCCSUS3_3[16] H26VCCSUS3_3[15] H28VCCSUS3_3[14] J26VCCSUS3_3[13] J28VCCSUS3_3[12] L26VCCSUS3_3[11] L28VCCSUS3_3[10] M26VCCSUS3_3[9] M28VCCSUS3_3[8] N26VCCSUS3_3[7] N28VCCSUS3_3[6] P26VCCSUS3_3[5] P28VCCSUS3_3[4] U24VCCSUS3_3[3] U26VCCSUS3_3[2] U28VCCSUS3_3[1] V28

VCCIO[11] AD20

VCCIO[20] AD22VCCIO[10] AH19

2

C2541U_0402_6.3V6KC2541U_0402_6.3V6K

C2511U_0402_6.3V6KC2511U_0402_6.3V6K1

2

C2621U_0402_6.3V6KC2621U_0402_6.3V6K1

2

C235

22U_0805_6.3V6MC235

22U_0805_6.3V6M

1

2

C2610.1U_0402_16V4ZC2610.1U_0402_16V4Z

1

2

C2600.1U_0402_16V4ZC2600.1U_0402_16V4Z

C23622U_0805_6.3V6M

C236

22U_0805_6.3V6M1

2

C23822U_0805_6.3V6M

@C23822U_0805_6.3V6M

2

C2630.1U_0402_16V4ZC2630.1U_0402_16V4Z

1

2

D4CH751H-40PT_SOD323-2D4

CH751H-40PT_SOD323-2

R3020_0402_5%

T23PAD

@T23PAD

@

C266

0.1U_0402_16V4ZC266

0.1U_0402_16V4Z

1

2

C2451U_0402_6.3V6K

@C2451U_0402_6.3V6K

2

C2401U_0402_6.3V6KC2401U_0402_6.3V6K12

C2560.1U_0402_16V4ZC2560.1U_0402_16V4Z

0.1U_0402_16V4Z1

2

Trang 21

VSS[96] AM20VSS[97] AM22VSS[98] AM24VSS[99] AM26VSS[100] AM28VSS[102] AM30VSS[103] AM31VSS[104] AM32VSS[105] AM34VSS[106] AM35VSS[107] AM38VSS[108] AM39VSS[109] AM42VSS[110] AU20VSS[111] AM46VSS[112] AV22VSS[113] AM49VSS[114] AM7VSS[116] BB10VSS[117] AN32VSS[118] AN50VSS[119] AN52VSS[120] AP12VSS[121] AP42VSS[122] AP46VSS[123] AP49VSS[124] AP5VSS[125] AP8VSS[126] AR2VSS[127] AR52VSS[128] AT11

VSS[131] AT32VSS[132] AT36VSS[133] AT41VSS[134] AT47VSS[135] AT7VSS[136] AV12VSS[137] AV16VSS[138] AV20VSS[139] AV24VSS[140] AV30VSS[141] AV34VSS[142] AV38VSS[143] AV42VSS[144] AV46VSS[145] AV49VSS[146] AV5VSS[147] AV8VSS[148] AW14VSS[149] AW18VSS[150] AW2VSS[151] BF9VSS[152] AW32VSS[153] AW36VSS[154] AW40VSS[155] AW52VSS[156] AY11VSS[157] AY43VSS[158] AY47

VSS[101] BA42

VSS[95] AD24VSS[94] BB44

VSS[345] P24VSS[287] AD15

VSS[262] K11VSS[263] K43

VSS[259] H49VSS[260] H5VSS[261] J24

Trang 22

PCH_TXOUT0-PCH_TXOUT1+

PCH_TXOUT2+

PCH_TXOUT2-INVTPWM

USB20_N8USB20_P8

LOCAL_DIM

PCH_LCD_CLKPCH_LCD_DATA

+3VS

Title

W=40mils

11/21 intel JIM suggest Pull high at LVDS Conn

Q17 change to SB934130020

U8 change to SA00000U50020091216

Add R96 for SA00000U500 part20091216

L13FBMA-L11-201209-221LMA30T_0805L13

FBMA-L11-201209-221LMA30T_08052 1

C6210.1U_0402_16V4ZC6210.1U_0402_16V4Z1

2

C6184.7U_0805_10V4ZC6184.7U_0805_10V4Z1

FBMA-L11-201209-221LMA30T_08052 1

U874AHCT1G125GW_SOT353-5

C6204.7U_0805_10V4ZC6204.7U_0805_10V4Z

1

2

R7261K_0402_5%

12

R725100K_0402_5%

C62368P_0402_50V8JC62368P_0402_50V8J1

2

R729100K_0402_5%

C6190.047U_0402_16V7KC6190.047U_0402_16V7K

JLVDS1

STARC_107K40-000001-G2CONN@

R72710K_0402_5%

G

D

S

Q17AO3413_SOT23-32

Q65B2N7002DW-T/R7_SOT363-6Q65B

Trang 23

DSUB_12

DSUB_15

CRT_G_2CRT_B_2CRT_G_1

CRT_R_1

CRT_B_1

PCH_CRT_R

PCH_CRT_GPCH_CRT_B

Title

SCHEMATIC,MB A6582B

Change to 12pf for Discrete

pull-up 2k on GPU SIDE pull-up 2.2k on PCH side

D6 change to SCS00002000

D7 / D8 / D9 change to SC6BAV99390

C51868P_0402_50V8JC51868P_0402_50V8J1

2L34 MBC1608121YZF_0603

L34 MBC1608121YZF_0603

R7432.2K_0402_5%R7432.2K_0402_5%

C520 0.1U_0402_16V4ZC5201 2 0.1U_0402_16V4Z

D9DAN217_SC59D9DAN217_SC59

2 3

Q19B2N7002DW-T/R7_SOT363-6Q19B2N7002DW-T/R7_SOT363-63

4

C5010.1U_0402_16V4ZC5010.1U_0402_16V4Z

1

2

C51610P_0402_50V8JC51610P_0402_50V8J

1

2

C505

10P_0402_50V8JC505

10P_0402_50V8J1

2

L27 FBMA-L11-160808-800LMT_0603L271 FBMA-L11-160808-800LMT_06032

C509

22P_0402_50V8JC509

22P_0402_50V8J1

2R474

150_0402_1%

R474150_0402_1%

C508

22P_0402_50V8JC508

22P_0402_50V8J

1

2

L33 MBC1608121YZF_0603L33 MBC1608121YZF_0603

L25 FBMA-L11-160808-800LMT_0603L251 FBMA-L11-160808-800LMT_06032L26 FBMA-L11-160808-800LMT_0603L261 FBMA-L11-160808-800LMT_06032

D6RB491D_SC59-3D6RB491D_SC59-3

C514100P_0402_50V8JC514100P_0402_50V8J1

2

F21.1A_6VDC_FUSEF21.1A_6VDC_FUSE21

R473150_0402_1%

1

2C510

22P_0402_50V8JC510

22P_0402_50V8J

1

2

C51968P_0402_50V8JC51968P_0402_50V8J1

2U22

74AHCT1G125GW_SOT353-5U22

G

JCRT1

C-H_13-12201513CPCONN@

6111122133144105

16C512

10P_0402_50V8JC51210P_0402_50V8J1

2

2 3

Q19A2N7002DW-T/R7_SOT363-6Q19A

2N7002DW-T/R7_SOT363-661

2 3

C51710P_0402_50V8JC51710P_0402_50V8J1

2

R7422.2K_0402_5%

U23

74AHCT1G125GW_SOT353-5U23

2C506

10P_0402_50V8JC506

10P_0402_50V8J

1

2

C515 0.1U_0402_16V4ZC5151 20.1U_0402_16V4Z

C507

10P_0402_50V8JC507

10P_0402_50V8J1

2R475

Trang 24

HDMI_TX1-

HDMI_R_D1-HDMI_TX2-

HDMI_HPDOE#

LS_HDMI_DET

HDMI_TX1+

HDMI_TX1-HDMI_TX2+

HDMI_TX2-HDMI_CLK+

HDMI_CLK-HDMI_TX0+

HDMI_TX0-HDMI_CG2

SDVO_SDATASDVO_SCLK

OC_S2

HDMI_SDATAHDMI_SCLK

HDMI_HPDOE#

HDMI_R_CK+

HDMI_HPD

HDMI_R_D0+

HDMI_R_D1-HDMI_R_D2+

PCH_TMDS_CKPCH_TMDS_CK#

+3VS

+3VS+3VS

+3VS

+3VS+3VS

NAL00 HDMI connector

HDMI Conn

Change to DC23200090020090917

1 1

0 0 1 0

1

Equalization EQ0 EQ1

3dB 6dB 12dB 0

(default)

0 0

0 0 0

0 2db 2db

-3db 0

0 0

-4db -3db 0 1

0

1

Swing 0

0

420 0

CG2

0

400 340 1

For HDMI SW Issue

@L15WCM-2012-900T_0805

SQ202N7002_SOT23HDMI@

GD

SQ202N7002_SOT23HDMI@

2

D17 CH751H-40PT_SOD323-2HDMI@

21

R778 2.2K_0402_5%

@R778 2.2K_0402_5%

@

R7642.2K_0402_5%

@R7642.2K_0402_5%

@

C6470.1U_0402_16V4Z

HDMI@

C6470.1U_0402_16V4Z

HDMI@

C6460.1U_0402_16V4Z

HDMI@

1

2

R7660_0402_5%

HDMI@

R7660_0402_5%

C6510.1U_0402_16V4ZHDMI@ 1

2

R76920K_0402_5%

@R76920K_0402_5%

@

L16WCM-2012-900T_0805

@L16WCM-2012-900T_0805

@

1

3 34

4

F1

1.1A_6VDC_FUSEHDMI@ F1

1.1A_6VDC_FUSE

HDMI@

21

HDMI@

R74510K_0402_5%

JHDMI1

SUYIN_100042MR019S153ZLCONN@

GND 20GND 21GND 22GND 23

GD

SQ21

GD

SQ21

HDMI@

ASM1442T_QFN48_7X7U11

IN_D1- 38

OE# 25

SCL_SINK 28SDA_SINK 29

HPD_SINK 30DDC_EN 32

GND 49

L17WCM-2012-900T_0805

@L17WCM-2012-900T_0805

@

1

3 34

D12 CH751H-40PT_SOD323-2HDMI@

21

@L14WCM-2012-900T_0805

@

1

3 34

HDMI@

C6490.1U_0402_16V4Z

HDMI@

1

2

R746100K_0402_5%

HDMI@

R746100K_0402_5%

C6520.1U_0402_16V4ZHDMI@

Định dạng
Số trang	48
Dung lượng	892,94 KB