NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.SCHEMATIC, M/B LA-3121PCustom ,
Trang 2THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
SCHEMATIC, M/B LA-3121PCustom
, 星期一 五 08, 2006月
ALC883 Audio CKT Realtek
Thermal Sensor ADM1032ARM
Trang 3+1.8VS 1.8V switched power rail
+1.8V 1.8V power rail for DDR
BOARD ID Table
EC SM Bus1 address
Device
ON OFF OFF
0 8.2K +/- 5%
0 V 0.216 V 0.250 V 0.289 V 0.436 V
0.712 V
0.503 V 0.819 V
0.538 V 0.875 V
AD_BID VAD_BIDtyp VAD_BIDmax
1.036 V 1.453 V 1.650 V 1.759 V 1.935 V
2.500 V
2.200 V 3.300 V
2.341 V 1.185 V 1.264 V
Board ID
0 1 2 3 4 5 6 7
PCB Revision Board ID / SKU ID Table for AD channel
SB460 SM Bus address
Device
Clock Generator(ICS951462)
Adapter power supply (19V)
AC or battery power rail for power circuit.
Core voltage for CPU
1.05V switched power rail
External PCI Devices
Device IDSEL# REQ#/GNT# Interrupts
ADM1032
ON ON ON ON
ON ON
ON ON
ON
OFF OFF OFF
OFF OFF OFF
2
OFF OFF
LOW
LOW LOW LOW LOW LOW LOW
1
PIRQE/PIRQH
PIRQG/PORQH
HIGH HIGH HIGH HIGH HIGH HIGH HIGH
EC SM Bus2 address
Device
Smart Battery
OFF OFF
Note : ON* means that this power plane is ON only with AC power available, otherwise it is OFF.
WITH EXPRESS CARD EXPRESS@
8110SB@
8110SC@
WITH PATA HDD WITH SATA HDD WITH BLUETOOTH WITH USBx2
0 1 2 3 4 5 6 7
ON VSB always on power rail
+VSB
5V switched power rail
3.3V switched power rail 5V always on power rail
ON*
ON ON ON
ON
OFF ON
ON +RTCVCC
OFF ON*
OFF
ON RTC power
+1.8VALW 1.8V always on power rail ON ON ON*
SIO1@
SIO2@
SIOALL@
WITH LPC47N207 WITH SIO1036 WITH SIO BOTH
UMA DISCRETE
WITH SATA
W / O SATA
WITH SSC W/O SSC
SPREAD@
NOSPREAD@
45@
DIP CAP
Trang 4THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
SCHEMATIC, M/B LA-3121PCustom
, 星期一 五 08, 2006月
33MHZ
EC-CB714PCI CLK1
33MHZ
48MHZ
14.318MHZ NB-OSC
MINI CARD - 1 LANE
100MHZ PCIE CLK
100MHZ PCI EXPRESS CARD - 1 LANEPCIE CLK
14.31818MHz
SUPER IO
PCI CLK5 33MHZ
AZALIA CODECAZALIA_BITCLK
33MHZ PCI CLK3
Cardbus CB714
MINI PCI SLOTPCI CLK2
33MHZ
USB CLK
SIO CLK 14.318MHZ
14.318MHZ SIO CLK
48MHZ
SD CLK
TOUCH PADTP_CLK
33MHZ 1394 VT6311SPCI CLK4
48MHZ
SD CLK
Compal Electronics inc
Trang 5D D
Trang 6H_CADON15H_CADIN15
H_CADIN11
H_CLKIP0
H_CADIP11
H_ CADIN4H_CADIP4
H_ CADIN0H_CADIP0
H_CADON12H_CADOP12
H_CADON8H_CADOP8
H_CADON4H_CADOP4
H_CADON0H_CADOP0
H_CTLOP0H_CADIN14
H_ CADIN3
H_CTLIN0H_CADIP3
H_CTLIP0H_CTLIP1
H_CADON11H_CADOP11
H_CADON7H_CADOP7
H_CLKIN1H_CLKIN0H_CLKIP1
H_CADON3H_CADOP3
H_CLKON0
H_CLKOP1H_CLKON1
H_CADIP15
H_CADIN13
H_ CADIN9H_CADIP9
H_ CADIN6H_CADIP6
H_ CADIN2H_CADIP2
H_CTLIN1
H_CADON14H_CADOP14
H_CADON10H_CADOP10
H_CADON6H_CADOP6
H_CADON2H_CADOP2
H_CADOP15
H_CADIN12
H_ CADIN8H_CADIP8
H_ CADIN5H_CADIP5
H_ CADIN1H_CADIP1
H_CADON13H_CADOP13
H_CADON9H_CADOP9H_CADIP10
EN_DFAN1
F AN1
H_CTLIP0(12)
H_CTLIN0(12)
H_CLKIN0(12)
H_CLKIP0(12)
H_CLKIN1(12)
H_CLKIP1(12)
H_CLKON0 (12)H_CLKON1 (12)
H_CTLON0 (12)H_CTLOP0 (12)
EN_DFAN1(28)
FAN_SPEED1(28)+1.2V_HT
+VCC_FAN1
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC
SCHEMATIC, M/B LA-3121PCustom
, 星期一 五 08, 2006月
PROCESSOR HYPERTRANSPORT INTERFACE
ON THE BOARD TO DECOUPLING NEAR THE CPU PACKAGE
Athlon 64 S1Processor Socket
VLDT_Ax AND VLDT_Bx ARE CONNECTED TO THE LDT_RUN POWER SUPPLY THROUGH THE PACKAGE OR ON THE DIE IT IS ONLY CONNECTED
PLACE CLOSE TO VLDT0 POWER PINS
TO OTHER HT POWER PINS
LAYOUT: Place bypass cap on topside of board
NEAR HT POWER PINS THAT ARE NOT CONNECTED DIRECTLY
D3CH355PT_SOD323
R371 251_0402_1%
C152180P_0402_50V8J
1
2
R381 251_0402_1%
C4554.7U_0805_10V4Z
C831 210U_0805_10V4Z
C921000P_0402_50V7K
1
2
R3410K_0402_5%
L0_CLKOUT_H1 Y4L0_CLKOUT_L1 Y3
Trang 7DDR_A_MA9
DDR_CS0_DIMMA#
DDR_A_MA14DDR_CS3_DIMMB#
DDR_A_MA8
DDR_CS3_DIMMA#
DDR_A_MA13DDR_CKE0_DIMMB
DDR_A_MA12
DDR_A_MA7
DDR_CKE1_DIMMBDDR_CKE0_DIMMA
DDR_B_BS#2DDR_B_BS#0DDR_B_CAS#
DDR_B_WE#
DDR_B_D40
DDR_B_D6
DDR_B_D38DDR_B_D50
DDR_B_D35
DDR_B_D47
DDR_B_D41DDR_B_D44DDR_B_D54
DDR_B_D60
DDR_B_D55
DDR_B_D34
DDR_B_D49DDR_B_D56
DDR_B_D4DDR_B_D12
DDR_B_D53
DDR_B_D46
DDR_B_D19DDR_B_D22DDR_B_D25
DDR_B_D16
DDR_B_D0
DDR_B_D31DDR_B_D43
DDR_B_D11DDR_B_D33
DDR_B_D10DDR_B_D23DDR_B_D36
DDR_B_D21DDR_B_D27
DDR_B_D1
DDR_B_D61
DDR_B_D5
DDR_B_D30DDR_B_D32DDR_B_D42
DDR_B_D9
DDR_B_D39DDR_B_D48
DDR_B_D3
DDR_B_D51
DDR_B_D14DDR_B_D20DDR_B_D45
DDR_B_D2DDR_B_D29
DDR_B_D59
VTT_SENSE
M_ZP
DDR_B_DM1DDR_B_DM3DDR_B_DM5DDR_B_DM7
DDR_B_DM2DDR_B_DM4DDR_B_DM6
DDR_B_DM0
DDR_B_DQS6DDR_B_DQS#6
DDR_B_DQS2DDR_B_DQS#2
DDR_B_DQS5DDR_B_DQS#5
DDR_B_DQS1DDR_B_DQS#1
DDR_B_DQS4DDR_B_DQS#4
DDR_B_DQS0DDR_B_DQS#0
DDR_B_DQS7DDR_B_DQS#7
DDR_B_DQS3DDR_B_DQS#3
DDR_A_DM1DDR_A_DM3DDR_A_DM5DDR_A_DM7
DDR_A_DM0
DDR_A_DQS0DDR_A_DQS#0
DDR_A_DQS7DDR_A_DQS#7
DDR_A_DQS3DDR_A_DQS#3
DDR_A_DQS6DDR_A_DQS#6
DDR_A_DQS2DDR_A_DQS#2
DDR_A_DQS5DDR_A_DQS#5
DDR_A_DQS1DDR_A_DQS#1
DDR_A_DQS4DDR_A_DQS#4DDR_A_D4DDR_A_D23
DDR_A_D60
DDR_A_D34DDR_A_D50
DDR_A_D3DDR_A_D7DDR_A_D27
DDR_A_D44
DDR_A_D35DDR_A_D40DDR_A_D43
DDR_A_D39DDR_A_D41
DDR_A_D32
DDR_A_D57DDR_A_D55
DDR_A_D9
DDR_A_D37DDR_A_D42
DDR_A_D6
DDR_A_D51
DDR_A_D13DDR_A_D38
DDR_A_D0
DDR_A_D19DDR_A_D21
DDR_A_D1DDR_A_D15DDR_A_D62
DDR_A_D5
DDR_A_D31
DDR_A_D46DDR_A_D53
DDR_A_D36DDR_A_D52
DDR_A_D8
DDR_A_D25
DDR_A_D11DDR_A_D14DDR_A_D22
DDR_A_D49
DDR_A_D45DDR_A_D47
DDR_A_D33
DDR_A_D28DDR_A_D26
CPU_VREF_REF
DDR_A_MA0DDR_A_MA3DDR_A_MA1DDR_A_MA4
DDR_B_MA1DDR_B_MA5
DDR_B_CLK#2DDR_A_CLK#2
DDR_B_MA8
DDR_B_ODT1DDR_B_CLK2
DDR_B_MA14
DDR_B_MA3
DDR_B_CLK1DDR_A_CLK2
DDR_B_MA9
DDR_B_MA4
DDR_B_MA15DDR_A_ODT0
DDR_B_MA6DDR_B_ODT0
DDR_B_MA0
DDR_B_MA12DDR_A_ODT1
DDR_B_MA10DDR_A_CLK1
DDR_B_MA7
DDR_B_MA2
DDR_B_MA13DDR_B_MA11
DDR_B_D57
DDR_A_D18DDR_A_CLK#1
DDR_B_CLK#1DDR_B_RAS#
DDR_A_CLK2 (10)DDR_A_CLK#2 (10)DDR_A_CLK1 (10)DDR_A_CLK#1 (10)DDR_B_CLK2 (11)DDR_B_CLK#2 (11)DDR_B_CLK1 (11)DDR_B_CLK#1 (11)DDR_B_ODT1 (11)DDR_A_ODT1 (10)DDR_B_MA[15 0] (11)
DDR_B_BS#2 (11)DDR_B_BS#0 (11)DDR_B_RAS# (11)DDR_B_WE# (11)
DDR_A_BS#2(10)DDR_A_BS#1(10)DDR_A_BS#0(10)DDR_A_RAS#
(10)DDR_A_CAS#
(10)DDR_A_WE#
DDR_CKE0_DIMMB(11)
DDR_CKE1_DIMMA(10)
DDR_CKE0_DIMMA(10)
DDR_B_DQS#6(11)DDR_B_DQS#5(11)DDR_B_DQS#4(11)DDR_B_DQS#3(11)DDR_B_DQS#2(11)DDR_B_DQS#1(11)DDR_B_DQS#0(11)
DDR_B_DM[7 0]
DDR_A_DQS7 (10)DDR_A_DQS6 (10)DDR_A_DQS5 (10)DDR_A_DQS4 (10)DDR_A_DQS3 (10)DDR_A_DQS2 (10)DDR_A_DQS1 (10)DDR_A_DQS0 (10)
DDR_A_DQS#7 (10)DDR_A_DQS#6 (10)DDR_A_DQS#5 (10)DDR_A_DQS#4 (10)DDR_A_DQS#3 (10)DDR_A_DQS#2 (10)DDR_A_DQS#1 (10)DDR_A_DQS#0 (10)DDR_A_D[63 0] (10)
+0.9VREF_CPU+1.8V
ON THE BOARD TO DECOUPLING NEAR THE CPU PACKAGE
VDD_VTT_SUS_CPU IS CONNECTED TO THE VDD_VTT_SUS POWER
SUPPLY THROUGH THE PACKAGE OR ON THE DIE IT IS ONLY CONNECTED
Athlon 64 S1ProcessorSocket
Athlon 64 S1 Processor Socket
PLACE THEM CLOSE TO
CPU WITHIN 1"
Processor DDR2 Memory Interface
PLACE CLOSE TO PROCESSOR
2
C281U_0402_6.3V4Z1
2R23
MA_DM7 Y13MA_DM6 AB16MA_DM5 Y19MA_DM4 AC24MA_DM3 F24MA_DM2 E19MA_DM1 C15MA_DM0 E12
MA_DATA0 G12MA_DATA1 F12MA_DATA2 H14MA_DATA3 G14MA_DATA4 H11MA_DATA5 H12MA_DATA6 C13MA_DATA7 E13MA_DATA8 H15MA_DATA9 E15MA_DATA10 E17MA_DATA11 H17MA_DATA12 E14MA_DATA13 F14MA_DATA14 C17MA_DATA15 G17MA_DATA16 G18MA_DATA17 C19MA_DATA18 D22MA_DATA19 E20MA_DATA20 E18MA_DATA21 F18MA_DATA22 B22MA_DATA23 C23MA_DATA24 F20MA_DATA25 F22MA_DATA26 H24MA_DATA27 J19MA_DATA28 E21MA_DATA29 E22MA_DATA30 H20MA_DATA31 H22MA_DATA32 Y24MA_DATA33 AB24MA_DATA34 AB22MA_DATA35 AA21MA_DATA36 W22MA_DATA37 W21MA_DATA38 Y22MA_DATA39 AA22MA_DATA40 Y20MA_DATA41 AA20MA_DATA42 AA18MA_DATA43 AB18MA_DATA44 AB21MA_DATA45 AD21MA_DATA46 AD19MA_DATA47 Y18MA_DATA48 AD17MA_DATA49 W16MA_DATA50 W14MA_DATA51 Y14MA_DATA52 Y17MA_DATA53 AB17MA_DATA54 AB15MA_DATA55 AD15MA_DATA56 AB13MA_DATA57 AD13MA_DATA58 Y12MA_DATA59 W11MA_DATA60 AB14MA_DATA61 AA14MA_DATA62 AB12MA_DATA63 AA12
MA_DQS_L0 H13MA_DQS_L1 G15MA_DQS_L2 C21MA_DQS_L3 G21MA_DQS_L4 AC23MA_DQS_L5 AB20MA_DQS_L6 W15MA_DQS_L7 W13
MA_DQS_H0 G13MA_DQS_H1 G16MA_DQS_H2 C22MA_DQS_H3 G22MA_DQS_H4 AD23MA_DQS_H5 AB19MA_DQS_H6 Y15MA_DQS_H7 W12
MB_DATA0C11 MB_DATA1A11 MB_DATA2A14 MB_DATA3B14 MB_DATA4G11 MB_DATA5E11 MB_DATA6D12 MB_DATA7A13 MB_DATA8A15 MB_DATA9A16 MB_DATA10A19 MB_DATA11A20 MB_DATA12C14 MB_DATA13D14 MB_DATA14C18 MB_DATA15D18 MB_DATA16D20 MB_DATA17A21 MB_DATA18D24 MB_DATA19C25 MB_DATA20B20 MB_DATA21C20B24 MB_DATA22MB_DATA23C24 MB_DATA24E23 MB_DATA25E24 MB_DATA26G25 MB_DATA27G26 MB_DATA28C26 MB_DATA29D26 MB_DATA30G23 MB_DATA31G24 MB_DATA32AA24 MB_DATA33AA23 MB_DATA34AD24 MB_DATA35AE24 MB_DATA36AA26 MB_DATA37AA25 MB_DATA38AD26 MB_DATA39AE25 MB_DATA40AC22 MB_DATA41AD22 MB_DATA42AE20 MB_DATA43AF20 MB_DATA44AF24 MB_DATA45AF23 MB_DATA46AC20 MB_DATA47AD20 MB_DATA48AD18 MB_DATA49AE18 MB_DATA50AC14 MB_DATA51AD14 MB_DATA52AF19 MB_DATA53AC18 MB_DATA54AF16 MB_DATA55AF15 MB_DATA56AF13 MB_DATA57AC12 MB_DATA58AB11 MB_DATA59Y11 MB_DATA60AE14 MB_DATA61AF14 MB_DATA62AF11 MB_DATA63AD11
MB_DQS_L0B12MB_DQS_L1C16MB_DQS_L2A23MB_DQS_L3E26MB_DQS_L4AC26MB_DQS_L5AF22MB_DQS_L6AD16MB_DQS_L7AE12
MB_DQS_H0C12MB_DQS_H1D16MB_DQS_H2A24MB_DQS_H3F26MB_DQS_H4AC25MB_DQS_H5AF21MB_DQS_H6AE16MB_DQS_H7AF12C66
1.5P_0402_50V8C1
2
C291
2
C331000P_0402_50V7K1
M_VREFW17
VTT_SENSEY10
M_ZNAE10M_ZPAF10
MA0_CS_L3V19MA0_CS_L2J22MA0_CS_L1V22MA0_CS_L0T19
MB_CKE1H26MB_CKE0J23MA_CKE1J20MA_CKE0J21
MA_ADD13V24MA_ADD12K24MA_ADD11L20MA_ADD10R19MA_ADD9L19MA_ADD8L22MA_ADD7L21MA_ADD6M19MA_ADD5M20MA_ADD4M24MA_ADD3M22MA_ADD2N22MA_ADD1N21MA_ADD0R21
MA_BANK1R20MA_BANK0T22
MA_RAS_LT20MA_CAS_LU20MA_WE_LU21
MB_RAS_L U24MB_CAS_L V26MB_WE_L U22
MB_BANK1 T26MB_BANK0 U26
MB_ADD13 W25MB_ADD12 L23MB_ADD11 L25MB_ADD10 U25MB_ADD9 L24MB_ADD8 M26MB_ADD7 L26MB_ADD6 N23MB_ADD5 N24MB_ADD4 N25MB_ADD3 N26MB_ADD2 P24MB_ADD1 P26MB_ADD0 T24
MA0_CLK_H2 Y16MA0_CLK_L2 AA16MA0_CLK_H1 E16MA0_CLK_L1 F16MB0_CLK_H2 AF18MB0_CLK_L2 AF17MB0_CLK_H1 A17MB0_CLK_L1 A18MB0_CS_L3
Y26MB0_CS_L2J24MB0_CS_L1W24MB0_CS_L0U23
MA0_ODT0 U19MA0_ODT1 V20
MA_BANK2K22
MA_ADD15K19MA_ADD14K20
MB0_ODT0 W26MB0_ODT1 W23
MB_BANK2 K26
MB_ADD14 J26MB_ADD15 J25VTT5 W10
C340.1U_0402_16V4Z1
2
C1321.5P_0402_50V8C1
Trang 8CPU_HTREF1
VID0VID5CPU_PROCHOT#_1.8
CPU_PRESENT#
C PU_DBRDYCPU_TMSCPU_TCKCPU_TRST#
CPU_TDI
CPU_TDO
PSI#
VID2VID4
CPU_PROCHOT#_1.8
CPU_TEST25_H_BYPASSCLK_HCPU_TEST25_L_BYPASSCLK_L
CPU_THERMDC
CPU_TEST21_SCANEN
CPU_TEST26_BURNIN#
CPU_TEST29_L_FBCLKOUT_NCPU_TEST19_PLLTEST0
CPU_DBREQ#
CPU_TEST21_SCANENCPU_TEST25_L_BYPASSCLK_LCPU_TEST19_PLLTEST0
CPU_TEST26_BURNIN#
CPU_TEST25_H_BYPASSCLK_HCPU_PRESENT#
CPU_THERMDA
H_THERMTRIP_S#
VID1
CPU_THERMDACPU_THERMDC
EC_SMB_DA2EC_SMB_CK2
CPU_TEST18_PLLTEST1
CPU_TMSCPU_TDI
C PU_DBRDYCPU_DBREQ#
CPU_TCK
CPU_TDOCPU_TRST#
EC_SMB_DA2(28)
MAINPWON (42,43,45)H_THERMTRIP# (19)
CPU_VCC_SENSE(48)CPU_VSS_SENSE(48)
VID0 (48)VID2 (48)VID4 (48)
PSI# (48)
CPUCLK(17)
+3VALW+3VALW
+1.8V
+1.8V
+3VALW+3VS
+1.8VS
+1.8V+3VS
+1.8V
+1.8V+1.8VS
+1.8VS
+1.8VS
CPU_SIC(18)CPU_SID(18)
Title
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
SCHEMATIC, M/B LA-3121PC
LAYOUT: ROUTE VDDA TRACE APPROX.
EXIT BALL FIELD) AND 500 mils LONG.
AMD NPT S1 SOCKET Processor Socket
ATHLON Control and Debug
place them to CPU within 1"
PLACE IT CLOSE TO CPU WITHIN 1" ROUTE AS 80 Ohm DIFFERENTIAL PAIR
W=50mils
5:10
5:5:5
10:1012/22 Modify
R810K_0402_5%
C5013900P_0402_50V7K
R41K_0402_5%
@
261014182223191511951
26
R64.7K_0402_5%
R790_0402_5%
@
R310K_0402_5%
TP1PAD
2
R700_0402_5%
2
L4FCM2012C-800_0805
2
Q3MMBT3904_SOT23
@
R572220_0402_5%
R7300_0402_5%
2
R63300_0402_5%
D+
2
3
D-SCLK8
SDATA7
1
2
Q2MMBT3904_SOT23
2
U6
NC7SZ08P5X_NL_SC70-5
B2
R389169_0402_1%
R78300_0402_5%
RESET_LB7PWROKA7LDTSTOP_LF10
HTREF1P6HTREF0R6
VDDIO_FB_HW9VDDIO_FB_LY9
CLKIN_HA9CLKIN_LA8
DBRDYG10
TMSAA9TCKAC9TRST_LAD9TDIAF9
TDO AE9DBREQ_L E10
VID4 C6VID3 A6VID2 A4VID1 C5VID0 B5THERMTRIP_L AF6
CPU_PRESENT_L AC6
SICAF4SIDAF5
VDD_FB_HF6VDD_FB_LE6
VID5 A5PROCHOT_L AC7
PSI_L A3
TEST2AB6 TEST3Y6 THERMDAW8 THERMDCW7 TEST6AA6C3 TEST7
TEST8 C4TEST10 K8TEST26 AE6TEST27 AF8TEST28_L H8TEST28_H J7TEST20 AF7TEST21 AB8TEST22 AE8TEST23 AD7TEST24 AE7
TEST12AC8 TEST14C7F7 TEST15TEST16E7 TEST17D7 TEST9C2 TEST13AA7 TEST18H10 TEST19G9E8 TEST25_LTEST25_H
TEST29_L C8
RSVD0P20RSVD1P19RSVD2N20RSVD3N19
RSVD4R26RSVD5R25RSVD6P22RSVD7R22
RSVD8 H16RSVD9 B18RSVD10 B3RSVD11 C1RSVD12 H6RSVD13 G6RSVD14 D5RSVD15 R24RSVD16 W18RSVD17 R23RSVD18 AA8RSVD19 H18RSVD20 H19
R650_0402_5%
C5023900P_0402_50V7K
R71300_0402_5%
Trang 9CPU SOCKET S1 DECOUPLING
Athlon 64 S1g1
PROCESSOR POWER AND GROUND
Athlon 64 S1 Processor Socket
Athlon 64 S1 Processor Socket
DECOUPLING BETWEEN PROCESSOR AND DIMMs PLACE CLOSE TO PROCESSOR AS POSSIBLE
C192
10U_0805_10V6M1
2
C1884.7U_0805_10V4Z1
2
C105180P_0402_50V8J1
2
C4804.7U_0805_10V4Z1
2
+ C452330U_D2E_2.5VM_R9
1
2
C1610U_0805_10V6M1
VDD43 V12VDD44 V14VDD45 W4VDD46 Y2VDD47 J15VDD48 K16VDD49 L15VDD50 M16VDD51 P16VDD52 T16VDD53 U15VDD54 V16
VDDIO1 H25VDDIO2 J17VDDIO3 K18VDDIO4 K21VDDIO5 K23VDDIO6 K25VDDIO7 L17VDDIO8 M18VDDIO9 M21VDDIO10 M23VDDIO11 M25VDDIO12 N17VDDIO13 P18VDDIO14 P21VDDIO15 P23VDDIO16 P25VDDIO17 R17VDDIO18 T18VDDIO19 T21VDDIO20 T23VDDIO21 T25VDDIO22 U17VDDIO23 V18VDDIO24 V21VDDIO25 V23VDDIO26 V25VDDIO27 Y25
C304.7U_0805_10V4Z1
2
C11822U_0805_6.3V6M1
2
C1040.22U_0402_10V4Z1
2
C270.22U_0402_10V4Z1
2
C179180P_0402_50V8J1
2
C4714.7U_0805_10V4Z1
2
C850.01U_0402_16V7K1
2
C364.7U_0805_10V4Z1
2
C1850.22U_0402_10V4Z1
VSS66 J6VSS67 J8VSS68 J10VSS69 J12VSS70 J14VSS71 J16VSS72 J18VSS73 K2VSS74 K7VSS75 K9VSS76 K11VSS77 K13VSS78 K15VSS79 K17VSS80 L6VSS81 L8VSS82 L10VSS83 L12VSS84 L14VSS85 L16VSS86 L18VSS87 M7VSS88 M9VSS89 M11VSS90 M17VSS91 N4VSS92 N8VSS93 N10VSS94 N16VSS95 N18VSS96 P2VSS97 P7VSS98 P9VSS99 P11VSS101 R8VSS102 R10VSS103 R16VSS104 R18VSS105 T7VSS106 T9VSS107 T11VSS108 T13
VSS123 V13VSS124 V15VSS125 V17VSS126 W6VSS127 Y21VSS128 Y23VSS129 N6
VSS109 T15VSS110 T17VSS111 U4VSS112 U6VSS113 U8VSS114 U10VSS115 U12VSS116 U14VSS117 U16VSS118 U18VSS119 V2VSS120 V7VSS121 V9VSS122 V11VSS100 P17
+ C453330U_D2E_2.5VM_R9
1
2
C700.22U_0402_10V4Z1
2
+C505330U_D2E_2.5VM_R9
@1
2
C12422U_0805_6.3V6M1
2
C1781000P_0402_50V7K1
2
C1814.7U_0805_10V4Z1
2
C26180P_0402_50V8J1
2
C1710U_0805_10V6M1
2C194
10U_0805_10V6M1
2
C1290.22U_0402_10V4Z1
2
C8210U_0805_10V6M1
2C91
0.01U_0402_16V7K1
2
C10910U_0805_10V6M1
2
C9610U_0805_10V6M1
2
C10210U_0805_10V6M1
2
C221000P_0402_50V7K1
2
C175180P_0402_50V8J1
2
C1280.01U_0402_16V7K1
2
C840.22U_0402_10V4Z1
2
C9710U_0805_10V6M1
2
C720.22U_0402_10V4Z1
2
C11310U_0805_10V6M1
2
C100180P_0402_50V8J1
2
C1160.22U_0402_10V4Z1
2
C1840.22U_0402_10V4Z1
2
C1270.22U_0402_10V4Z1
2
C7322U_0805_6.3V6M1
2
C4724.7U_0805_10V4Z1
2
C230.22U_0402_10V4Z1
2
C4794.7U_0805_10V4Z1
2
C1200.22U_0402_10V4Z1
2
C182180P_0402_50V8J1
2
+C504330U_D2E_2.5VM_R9
@1
2
C391000P_0402_50V7K1
2
+ C450820U_E9_2.5V_M_R7
45@
1
2C195
10U_0805_10V6M1
2
C411000P_0402_50V7K1
2
C68180P_0402_50V8J1
2
C8910U_0805_10V6M1
2
+ C449820U_E9_2.5V_M_R7
45@
1
2
C7622U_0805_6.3V6M1
2
C8610U_0805_10V6M1
2
C19310U_0805_10V6M1
2
Trang 10DDR_A_D42
DDR_A_D44DDR_A_D40
DDR_A_D58
DDR_A_D61
DDR_A_D63DDR_A_D60
DDR_A_D3DDR_A_D8
DDR_A_D6DDR_A_D5
DDR_A_D14DDR_A_D9
DDR_A_D11
DDR_A_D13
DDR_A_D16
DDR_A_D15DDR_A_D12
DDR_A_D17
DDR_A_D20
DDR_A_D19DDR_A_D24
DDR_A_D21
DDR_A_D23
DDR_A_BS#2
DDR_A_BS#1DDR_A_D25
DDR_A_D62DDR_A_DM7
DDR_A_DM2
DDR_A_DM4
DDR_A_DM3
DDR_A_DM1DDR_A_DM0
DDR_A_DM6DDR_A_DM5
DDR_A_MA6DDR_A_MA8
DDR_A_MA14DDR_A_DQS2
DDR_A_DQS#2
DDR_A_DQS#6
DDR_A_DQS#3DDR_A_DQS1
DDR_A_DQS#5DDR_A_ODT1
DDR_A_CLK#1DDR_A_CLK1
DDR_A_MA14DDR_A_MA6
DDR_A_MA2
DDR_A_MA0DDR_A_BS#1
DDR_A_RAS#
DDR_CS0_DIMMA#
DDR_A_ODT0DDR_A_MA13DDR_A_ODT1
DDR_CS3_DIMMA#
DDR_CS2_DIMMA#
DDR_CKE0_DIMMA
DDR_A_BS#2DDR_A_MA12DDR_A_MA9
DDR_A_MA5
DDR_A_BS#0DDR_A_WE#
DDR_A_CAS#
DDR_CS1_DIMMA#
DDR_A_MA10DDR_A_MA1
DDR_A_MA11DDR_A_MA7
(7)
DDR_A_DQS#[0 7]
(7)
DDR_A_CLK1 (7)DDR_A_CLK#1 (7)
DDR_CS3_DIMMA# (7)
DDR_CS0_DIMMA# (7)
DDR_A_ODT0 (7)DDR_A_RAS# (7)DDR_A_BS#1 (7)DDR_CKE1_DIMMA (7)
+1.8V
+1.8V+DIMM_VREF+1.8V
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC
SCHEMATIC, M/B LA-3121PCustom
, 10, 2006星期三 五月
1
2
C6440.01U_0402_16V7K
1
2
C6520.22U_0603_16V7K
1
2
+ C477220U_D2_4VM_R151
1
2
+C636150U_D2_6.3VM
DM0 10VSS 12DQ6 14DQ7 16VSS 18
DQ12 20DQ13 22VSS 24DM1 26VSS 28
CK0 30CK0# 32VSS 34DQ14 36DQ15 38VSS 40
NC 50DM2 52VSS 54DQ22 56
DQ23 58VSS 60DQ28 62DQ29 64VSS 66
DQS3# 68DQS3 70VSS 72DQ30 74DQ31 76
VSS 78NC/CKE1 80VDD 82NC/A15 84NC/A14 86
VDD 88A11 90A7 92A6 94VDD 96
A4 98A2 100A0 102VDD 104BA1 106
RAS# 108S0# 110VDD 112ODT0 114NC/A13 116VDD 118
NC 120VSS 122DQ36 124DQ37 126VSS 128DM4 130VSS 132DQ38 134DQ39 136VSS 138
DQ44 140DQ45 142VSS 144DQS5# 146DQS5 148
VSS 150DQ46 152DQ47 154VSS 156DQ52 158
DQ53 160VSS 162CK1 164CK1# 166VSS 168
DM6 170VSS 172DQ54 174DQ55 176VSS 178
DQ60 180DQ61 182VSS 184DQS7# 186DQS7 188
VSS 190DQ62 192DQ63 194VSS 196SAO 198SA1 200
Trang 11DDR_B_D42
DDR_B_D44DDR_B_D40
DDR_B_D58
DDR_B_D61
DDR_B_D63DDR_B_D60
DDR_B_D3DDR_B_D8
DDR_B_D6DDR_B_D5
DDR_B_D14DDR_B_D9
DDR_B_D11
DDR_B_D13
DDR_B_D16
DDR_B_D15DDR_B_D12
DDR_B_D17
DDR_B_D20
DDR_B_D19DDR_B_D24
DDR_B_D21
DDR_B_D23
DDR_B_BS#2
DDR_B_BS#1DDR_B_D25
DDR_B_D62DDR_B_DM7
DDR_B_DM2
DDR_B_DM4
DDR_B_DM3
DDR_B_DM1DDR_B_DM0
DDR_B_DM6DDR_B_DM5
DDR_B_MA6DDR_B_MA8
DDR_B_MA14DDR_B_DQS2
DDR_B_DQS#2
DDR_B_DQS#6
DDR_B_DQS#3DDR_B_DQS1
DDR_B_DQS#5DDR_B_ODT1
DDR_B_CLK#1DDR_B_CLK1
DDR_B_ODT1DDR_CS3_DIMMB#
DDR_CKE1_DIMMBDDR_B_MA15DDR_B_MA14
DDR_B_MA7
DDR_B_MA4
DDR_B_MA0DDR_B_BS#1
DDR_B_ODT0DDR_B_MA13DDR_B_RAS#
DDR_CS0_DIMMB#
DDR_CS1_DIMMB#
DDR_B_CAS#
DDR_B_MA1DDR_B_MA10
(7)
DDR_B_DQS#[0 7]
(7)
DDR_B_CLK1 (7)DDR_B_CLK#1 (7)
DDR_CS3_DIMMB# (7)
DDR_CS0_DIMMB# (7)
DDR_B_ODT0 (7)DDR_B_RAS# (7)DDR_B_BS#1 (7)DDR_CKE1_DIMMB (7)
DM0 10VSS 12DQ6 14DQ7 16VSS 18
DQ12 20DQ13 22VSS 24DM1 26VSS 28
CK0 30CK0# 32VSS 34DQ14 36DQ15 38VSS 40
NC 50DM2 52VSS 54DQ22 56
DQ23 58VSS 60DQ28 62DQ29 64VSS 66
DQS3# 68DQS3 70VSS 72DQ30 74DQ31 76
VSS 78NC/CKE1 80VDD 82NC/A15 84NC/A14 86
VDD 88A11 90A7 92A6 94VDD 96
A4 98A2 100A0 102VDD 104BA1 106
RAS# 108S0# 110VDD 112ODT0 114NC/A13 116VDD 118
NC 120VSS 122DQ36 124DQ37 126VSS 128DM4 130VSS 132DQ38 134DQ39 136VSS 138
DQ44 140DQ45 142VSS 144DQS5# 146DQS5 148
VSS 150DQ46 152DQ47 154VSS 156DQ52 158
DQ53 160VSS 162CK1 164CK1# 166VSS 168
DM6 170VSS 172DQ54 174DQ55 176VSS 178
DQ60 180DQ61 182VSS 184DQS7# 186DQS7 188
VSS 190DQ62 192DQ63 194VSS 196SAO 198SA1 200
Trang 12H_CLKOP1H_CLKON1H_CADOP13
H_CLKIP1H_CLKIN1
H_CLKIN0H_CLKIP0H_CLKOP0
H_CLKON0
H_CADIP14
H_CADIP8H_ CADIN8
H_CADIP9H_ CADIN9
H_CADON12
H_CADOP10
H_CADIP0H_CADOP8
H_ CADIN0
H_CADIP1H_ CADIN1
H_CADIP7H_ CADIN7H_CADON10
H_CADOP11
H_CADIP4H_ CADIN4
H_CADIP5H_ CADIN5
H_CADON11
H_CADIP2H_ CADIN2
H_CADIP3H_ CADIN3
H_CADON9
H_CADOP7
HT_RXCALPHT_RXCALNH_CTLON0
(6)
H_CLKON0(6)
H_CLKON1(6)
H_CLKOP0(6)
H_CTLOP0(6)
H_CLKOP1(6)
H_CADON0(6)
H_CADON1(6)
H_CADON2(6)
H_CADON3(6)
H_CADON4(6)
H_CADON5(6)
H_CADON6(6)
H_CADON7(6)
H_CADOP0(6)
H_CADOP1(6)
H_CADOP2(6)
H_CADOP3(6)
H_CADOP4(6)
H_CADOP5(6)
H_CADOP6(6)
H_CADOP7(6)
H_CADOP8(6)
H_CADOP9(6)
H_CADOP10(6)
H_CADOP11(6)
H_CADOP12(6)
H_CADOP13(6)
H_CADOP14(6)
H_CADOP15(6)
H_CADON8(6)
H_CADON9(6)
H_CADON10(6)
H_CADON11(6)
H_CADON12(6)
H_CADON13(6)
H_CADON14(6)
H_CADON15(6)
H_CTLIN0 (6)H_CLKIN0 (6)H_CLKIP0 (6)H_CLKIN1 (6)H_CLKIP1 (6)H_CADIN0 (6)H_CADIN1 (6)H_CADIN2 (6)H_CADIN3 (6)H_CADIN4 (6)H_CADIN5 (6)H_CADIN6 (6)H_CADIN7 (6)H_CADIN8 (6)H_CADIN9 (6)H_CADIN10 (6)H_CADIN11 (6)H_CADIN12 (6)H_CADIN13 (6)H_CADIN14 (6)H_CADIN15 (6)H_CADIP15 (6)
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC
SCHEMATIC, M/B LA-3121PCustom
, 星期三 五 10, 2006月
HT_TXCAD11N L19HT_TXCAD10P G22HT_TXCAD10N G21HT_TXCAD9P J20HT_TXCAD9N J21HT_TXCAD8P F21HT_TXCAD8N F22HT_TXCAD7P N24HT_TXCAD7N N25HT_TXCAD6P L25HT_TXCAD6N M24HT_TXCAD5P K25HT_TXCAD5N K24HT_TXCAD4P J23HT_TXCAD4N K23HT_TXCAD3P G25HT_TXCAD3N H24HT_TXCAD2P F25HT_TXCAD2N F24HT_TXCAD1P E23HT_TXCAD1N F23HT_TXCAD0P E24HT_TXCAD0N E25HT_TXCLK1P L21HT_TXCLK1N L22HT_TXCLK0P J24HT_TXCLK0N J25HT_TXCTLP N23HT_TXCTLN P23HT_TXCALP C25HT_TXCALN D24
Trang 13PCIE_MRX_PTX_P1_R
PCIE_MRX_PTX_P0_RPCIE_MRX_PTX_N0_R
PCIE_MTX_PRX_N1
PCIE_MTX_C_PRX_P1PCIE_MTX_C_PRX_N1PCIE_MTX_PRX_P1
PCIE_MTX_PRX_N0
PCIE_MTX_C_PRX_P0PCIE_MTX_C_PRX_N0PCIE_MTX_PRX_P0
A_MRX_STX_P0
A_MTX_SRX_N0
A_MTX_C_SRX_P0A_MTX_SRX_P0
A_MTX_C_SRX_N0A_MRX_STX_P1
PCIE_MRX_PTX_N1_R
A_MTX_C_SRX_P0 (18)A_MRX_STX_P0
(18)A_MRX_STX_N0(18)
A_MRX_STX_P1(18)
A_MRX_STX_N1(18)
A_MTX_C_SRX_N0 (18)
A_MTX_C_SRX_P1 (18)A_MTX_C_SRX_N1 (18)
PCIE_MRX_PTX_P0(31)
PCIE_MRX_PTX_N0(31)
PCIE_MRX_PTX_P1(34)
PCIE_MRX_PTX_N1(34)
PCIE_MTX_C_PRX_P0 (31)PCIE_MTX_C_PRX_N0 (31)
PCIE_MTX_C_PRX_P1 (34)PCIE_MTX_C_PRX_N1 (34)
+1.2V_HT
8.25KOhm FOR RS485 DNI FOR RS690
10KOhm FOR RS485 1.47KOhm FOR RS690
150 Ohm FOR RS485
82.5 Ohm FOR RS485 2KOhm FOR RS690 R215:
GFX_TX7N R2GFX_TX8P T2GFX_TX8N U1GFX_TX9P V2GFX_TX9N V1GFX_TX10P V3GFX_TX10N W3GFX_TX11P W1GFX_TX11N W2GFX_TX12P Y2GFX_TX12N AA1GFX_TX13P AA2GFX_TX13N AB2GFX_TX14P AB1GFX_TX14N AC1GFX_TX15P AE3GFX_TX15N AE4
C4571 20.1U_0402_10V6K
Trang 14DFT_GPIO4
VGA_CRT_HSYNCVGA_CRT_VSYNC
VGA_TV_LUMAVGA_TV_COMPS
LVDS_TXLP0
LVDS_TXLN2LVDS_TXLP1LVDS_TXLP2LVDS_TXLN0
LVDS_TXUP0LVDS_TXUN0LVDS_TXUP1LVDS_TXUN1LVDS_TXUP2LVDS_TXUN2
LVDS_TXLCKPLVDS_TXLCKNLVDS_TXUCKN
DDC_DATA
DFT_GPIO0LDT_STOP#_NB
CRT_GCRT_B
EDID_LCD_DAT
VGA_TV_LUMAVGA_TV_CRMAVGA_TV_COMPS
LVDS_TXUN1 (25)
LVDS_TXUN2 (25)
LVDS_TXLCKP (25)LVDS_TXLCKN (25)
LVDS_TXUCKN (25)LVDS_TXUCKP (25)
CRT_R(24)CRT_G(24)CRT_B(24)
VGA_TV_CRMA(24)
VGA_TV_LUMA(24)VGA_TV_COMPS(24)
VGA_CRT_VSYNC(24)
VGA_CRT_HSYNC(24)
EDID_LCD_CLK(25)
LDT_STOP#
(8,19)
HTREFCLK(17)
SB_OSCIN(17,19)NB_OSC(17)
NB_RST#
(18,23,28,31,36)NB_PWROK(37)
NBSRC_CLKP(17)NBSRC_CLKN(17)
SBLINK_CLKP(17)SBLINK_CLKN(17)
VGA_DDC_DATA(24)
VGA_DDC_CLK(24)
LOAD_ROM#
(16)
EDID_LCD_DAT(25)
ENVDD (25)ENBKL (28)
ALLOW_LDTSTOP(18)
HTPVDD
AVSSQ_GNDAVSSQ_GND
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC
SCHEMATIC, M/B LA-3121PCustom
, 星期三 五 10, 2006月
TXOUT_L1N A13TXOUT_L2P H14TXOUT_L2N G14TXOUT_L3P D17
TXOUT_U0P A15TXOUT_L3N E17
TXOUT_U0N B16TXOUT_U1P C17TXOUT_U1N C18TXOUT_U2P B17TXOUT_U2N A17TXOUT_U3P A18TXOUT_U3N B18TXCLK_LP E15TXCLK_LN D15TXCLK_UP H15TXCLK_UN G15LPVDD D14LPVSS E14
LVSSR5 D12LVSSR6 C19LVSSR7 C15LVSSR8 C16
LVDS_DIGON E12LVDS_BLON G12LVDS_BLEN F12
LVSSR12 F14LVSSR13 F15
R73 1 2@ 2.7K_0402_5%
D27
1N4148_SOT23
12
L55CHB2012U121_0805
R461K_0402_5%
L44CHB2012U121_08051 2
C4924.7U_0805_10V4Z
1
2
R60 1 2@ 2.7K_0402_5%
C4962.2U_0805_10V6K
1
2+
C186150U_D2_6.3VM
1
2
R59 1 2@ 2.7K_0402_5%
C4831U_0603_10V4Z
R412K_0402_5%
@
TP5PAD
C1170.1U_0402_16V4Z
@1
R3774.7K_0402_5%
C4892.2U_0805_10V6K
1
2
R590150_0402_1%
2
C63518P_0402_50V8J
1
2
C1540.1U_0402_16V4Z
1
2
C4841U_0603_10V4Z
1
2
R5401 20_0805_5%
L57CHB2012U121_0805
TP4 PAD
R5754.7K_0402_5%
C4884.7U_0805_10V4Z
2
R62 1 2 0_0402_5%
L43CHB2012U121_08051 2
R57 1 2@ 2.7K_0402_5%
R3832 110K_0402_5%
R56910K_0402_5%
Trang 15OFF
S0
ON ON ON ON ON ON ON
ON ON ON ON ON ON ON
OFF OFF OFF OFF OFF AVDD
Power Signal
VDDA18
HTPVDD PLLVDD
S1
AVDDDI VDDR
LVDDR18D LPVDD
OFF OFF OFF
ON ON ON
ON ON ON
OFF OFF OFF
OFF OFF OFF
ON ON ON
ON ON ON
OFF OFF OFF
OFF OFF OFF OFF OFF OFF
S4/S5
OFF
OFF OFF OFF OFF OFF OFF OFF
VDDA_12_11 L9
VDDA18_8
AE1 VDDA18_7AD2 VDDA18_6AC3 VDDA18_5AB4 VDDA18_4W7
VDDC_1 L11VDDC_2 L13VDDC_3 L15VDDC_4 M12VDDC_5 R15VDDC_6 M14VDDC_7 N11VDDC_8 N13VDDC_9 N15VDDC_10 J11VDDC_11 H11VDDC_12 P12VDDC_13 P14VDDC_14 R11
VDDA_12_10 D3VDDA_12_9 B1
C1422.2U_0805_10V6K
1
2
C791U_0402_6.3V4Z
VSSA35 Y9VSSA36 Y11
VSSA37 R9VSSA38 AD1VSSA39 AC5VSSA40 AC6VSSA41 AC7VSSA42 AD3VSSA43 AC9VSSA44 AC10VSSA45 G6
VSSA31 Y15VSSA29 AC4VSSA23 P9
VSSA14 AE6VSSA12 AE10VSSA1 M3
VSSA93 Y12VSSA94 Y14VSSA95 AA3
Trang 16THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
SCHEMATIC, M/B LA-3121PCustom
, 星期三 五 10, 2006月
High, LOAD ROM STRAP DISABLE
LOAD_ROM#: LOAD ROM STRAP ENABLE
Low, LOAD ROM STRAP ENABLE
Compal Electronics inc.
H13H_S354D138
2
H15H_S394D138
@
H1H_S394D138
@
H31H_S315D118
@
H34H_O217X157D217X157N
2
H22H_S394D138
@
H11H_O134X118D55X39
@
H7H_C236D165
@
H19H_C276D118
@
H25H_S354D138
2
H6H_C236D161
@
H29H_C236D161
@
H21H_S394D138
@
H4H_S394D138
@
H3H_C236D161
2
H2H_S394D138
@
H35H_C163D163N
@
H24H_S354D138
@
H16H_C276D118
@
H8H_C236D165
@
H33H_C315D236
Trang 17NBSRC_CLKP_R
CLK_PCIE_CARD_RCLK_PCIE_CARD#_R
SBSRC_CLKP_RSBSRC_CLKN_RNBSRC_CLKN_R
HTREFCLK_RNB_OSCIN_R
SBLINK_CLKP_RSBLINK_CLKN_R
CLK_48M_USB_RCLK_SD_48M_R
CLK_VDD48CLK_VDDREF
CLK_X2
SB_CK_SCLK
CLK_PCIE_MINI_RCLK_PCIE_MINI#_R
CPUCLK (8)CPUCLK# (8)
SBLINK_CLKP (14)
NBSRC_CLKP (14)
SBSRC_CLKP (18)SBSRC_CLKN (18)CLK_PCIE_CARD (34)CLK_PCIE_CARD# (34)
CLK_PCIE_MINI (31)CLK_PCIE_MINI# (31)
CLK_SD_48M (32)CLK_USB_48M (19)
SB_OSCIN (14,19)CLK_14M_SIO (36)NB_OSC (14)
HTREFCLK (14)
SB_CK_SCLK(10,11,19,31,34)
SB_CK_SDAT(10,11,19,31,34)
MINI_CLKREQ# (31)EXP_CLKREQ# (34)+3VS
48.00 48.00 48.00 48.00 48.00
Reserved
FS2
Hi-Z SRCCLK
X/6 X/3
CPU FS1
X
EXT CLK FREQUENCY SELECT TABLE(MHZ)
180.00 220.00 100.00 133.33 200.00
Reserved Reserved
[2:1]
Reserved
Hi-Z Hi-Z 100.00 Reserved
COMMENT
100.00 100.00 100.00 100.00 100.00 100.00
Parallel Resonance Crystal
1- PLACE ALL SERIAL TERMINATION
RESISTORS CLOSE TO U800
2- PUT DECOUPLING CAPS CLOSE TO U800
POWER PIN
Ioh = 5 * Iref (2.32mA) Voh = 0.71V @ 60 ohm
L10CHB2012U121_0805
R3992 1 @0_0402_5%
R4041 28.2K_0402_5%
R433475_0402_1%
R4022.2K_0402_5%
R42051.1_0402_1%
1
2
L9CHB2012U121_08051 2
R4092.2K_0402_5%
12
R41510K_0402_5%
IREF
48
GNDA 49VDDA 50
ATIGCLKT2 35ATIGCLKC2 34
SRCCLKT5 18SRCCLKC5 19SRCCLKT4 20SRCCLKC4 21SRCCLKT3 24SRCCLKC3 25SRCCLKT2 26SRCCLKC2 27
CLKREQA# 57CLKREQB# 32
48MHz_0 6
FS1/REF1 63FS0/REF0 64
SMBDAT
10 SMBCLK9
VDDREF
2
SRCCLKT0 47SRCCLKC0 46
22
SRCCLKT1 43SRCCLKC1 42SRCCLKT7 12SRCCLKC7 13
48MHz_1 7CLKREQC# 33
1
2
C2522.2U_0805_10V6K
R417 0_0402_5%
12
Trang 18A_MRX_STX_N0A_MRX_STX_P0
A_MRX_STX_N1A_MRX_STX_P1
PCIRST#
A_RST#
SERIRQPCI_PLOCK#
LPC_FRAME#
PCI_PERR#
PCI_AD26
PCI_AD12PCI_AD3
PCI_TRDY#
PCI_DEVSEL#
PCI_CBE#3
PCI_AD2A_MRX_C_STX_N0
A_MTX_C_SRX_N0
PCI_REQ#4PCI_AD13
PCI_AD11
PCI_AD27PCI_AD24PCI_AD14PCI_AD1
LPC_AD3LPC_AD0
32K_X1
PCI_AD31PCI_AD16
PCI_GNT#0PCI_REQ#1
PCI_PIRQG#
PCI_AD28
LPC_DRQ#0PM_CLKRUN#
LPC_DRQ#1
PCI_AD25PCI_AD21PCI_AD17PCI_AD15
PCI_AD8PCI_AD6
PCI_I RDY#
PCI_CBE#2
PCI_AD9PCI_AD7
32K_X1
+RTCBATT
PCI_DEVSEL#
PCI_PLOCK#PCI_I RDY#PCI_PERR#
PCI_STOP#PCI_SERR#PCI_FRAME#PCI_TRDY#
PCI_PIRQE#LPC_AD0
VBAT_IN
A_MTX_C_SRX_N3A_MTX_C_SRX_P3A_MTX_C_SRX_N2A_MTX_C_SRX_P2
CLK_PCI_LAN_R
CLK_PCI_1394_RCLK_PCI_SIO_RCLK_PCI_MINI_R
PCI_PIRQG#
PCI_REQ#0PCI_REQ#2
PCI_REQ#4PCI_PAR
CLK_PCI_LAN_R
CLK_PCI_1394_RCLK_PCI_SIO_RCLK_PCI_MINI_RCLK_PCI_LPC_R
A_RST#
CPU_PW RGD(8,19)
PCI_CLK6 (22)SB_SPDIF (22)
A_MTX_C_SRX_P0(13)
A_MTX_C_SRX_N0(13)
A_MTX_C_SRX_P1(13)
A_MTX_C_SRX_N1(13)
A_MRX_STX_P0(13)A_MRX_STX_N0(13)A_MRX_STX_P1(13)A_MRX_STX_N1(13)
PCI_GNT#0 (35)
RTC_CLK (22)
PCI_PIRQE# (32,35)PCI_PIRQF# (26)PCI_PIRQG# (31)PCI_PIRQH# (26,31,32)
LPC_AD0 (28,36)LPC_AD2 (28,36)
SBSRC_CLKP(17)SBSRC_CLKN(17)
LDT_RST#
(8)
ALLOW_LDTSTOP(14)
PCI_AD[31 0] (22,26,31,32,35)
PCI_CBE#[3 0] (26,31,32,35)
PCI_FRAME# (26,31,32,35)PCI_DEVSEL# (26,31,32,35)PCI_IRDY# (26,31,32,35)PCI_TRDY# (26,31,32,35)PCI_PAR (26,31,32,35)PCI_STOP# (26,31,32,35)PCI_PERR# (26,31,32,35)PCI_SERR# (26,31,32)
PCI_GNT#1 (31)PCI_GNT#3 (26)
PCI_REQ#0 (35)PCI_REQ#2 (32)
PM_CLKRUN# (26,31,36)
RTC_IRQ# (22)
LPC_FRAME# (22,28,36)LPC_DRQ#0 (36)BMREQ# (14)SERIRQ (28,32,36)
AZ_DOCK_EN#
(19)
PCI_RST# (26,31,32,34,35)
CLK_PCI_SIO_R (22)CLK_PCI_1394_R (22)CLK_PCI_MINI_R (22)CLK_PCI_LPC_R (22)
NB_RST# (14,23,28,31,36)
CLK_PCI_LAN (26)
CLK_PCI_SIO (36)CLK_PCI_1394 (35)CLK_PCI_MINI (31)CLK_PCI_LPC (28)
CLK_PCI_LAN_R (22)
CLK_PCI_LAN (26)
CLK_PCI_SIO (36)CLK_PCI_1394 (35)CLK_PCI_MINI (31)CLK_PCI_LPC (28)
+RTCVCC
+CHGRTC+RTCBATT
+3VS
+3VS
+3VS+3VS+3VS
+3VALW
+3VALW
CPU_SIC(8)CPU_SID(8)
Title
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC
SCHEMATIC, M/B LA-3121PCustom
FOR SB600, CONNECT TO CPU_PG/LDT_PG
RTC Battery
Please Closed RAMDoor
-2005/10/27 Added, Near U4520, Need equal length
2005/12/30 Change net to +3VALW 2005/12/30 Change net to +3VALW
Compal Electronics inc.
DLY CNTRL8CLKIN1VDD3CLKOUT1 2
GND12VDD13SSON9SS%
4GND5CLKOUT2 6
CLKOUT7 15
CLKOUT3 7CLKOUT4 10CLKOUT5 11CLKOUT6 14CLKOUT8 16
R411 49.9_0402_1%
R2551 222_0402_5%NOSPREAD@
C3261U_0402_6.3V4Z
2
C2990.1U_0402_16V4Z
PCIE_RX0PT25
PCIE_TX1PM29PCIE_TX1NM28
PCIE_RX1PT22PCIE_RX1NT23
PCIE_TX2PK29PCIE_TX2NK28
PCIE_RX2PM25PCIE_RX2NM26
PCIE_TX3PH29PCIE_TX3NH28
PCIE_RX3PM22PCIE_RX3NM23
PCIE_RCLKPJ24PCIE_RCLKNJ25
PCIE_CALRPE29PCIE_CALRNE28
PCIE_CALIE27
PCIE_PVDDU29
PCIE_VDDR_2F28PCIE_VDDR_3F29PCIE_VDDR_4G26PCIE_VDDR_1F27
PCIE_VDDR_5G27PCIE_VDDR_6G28PCIE_VDDR_7G29
NCB24 CPU_STP#/DPSLP_3V#
AH9
X1D2
X2C1
VBAT E1
INTR/LINT0W26
SMI#
AA24
STPCLK#/ALLOW_LDTSTPAA25
NMI/LINT1W24
FERR#
Y27IGNNE#
AA22A20M#
AA26NCAA23INIT#
W25
LDT_RST#
AC25
PCICLK0 U2PCICLK1 T2PCICLK2 U1PCICLK3 V2
PCIRST# AJ9
CBE0#/ROMA10 AB9CBE1#/ROMA1 AF9CBE2#/ROMWE# AJ5CBE3# AG3FRAME# AA2DEVSEL#/ROMA0 AH6IRDY# AG5TRDY#/ROMOE# AA1PAR/ROMA19 AF7STOP# Y2PERR# AG8REQ0# AJ8REQ1# AE2REQ2# AG9REQ3#/PDMA_REQ0# AH8GNT0# AD11GNT1# AF2GNT2# AH7GNT3#/PLL_BP66/PDMA_GNT0# AB12
SERR# AC11
CLKRUN# AG7
LAD0 AG24LAD1 AG25LAD2 AH24LAD3 AH25LFRAME# AF24LDRQ0# AJ24
SERIRQ AF23
RTC_GND D1
PCICLK4 W3PCICLK5 U3PCICLK6 V1
AD0/ROMA18 W7AD1/ROMA17 Y1AD2/ROMA16 W8AD3/ROMA15 W5AD4/ROMA14 AA5AD5/ROMA13 Y3AD6/ROMA12 AA6AD7/ROMA11 AC5AD8/ROMA9 AA7AD9/ROMA8 AC3AD10/ROMA7 AC7AD12/ROMA5 AD4AD13/ROMA4 AB11AD14/ROMA3 AE6AD15/ROMA2 AC9AD16/ROMD0 AA3AD17/ROMD1 AJ4AD18/ROMD2 AB1AD19/ROMD3 AH4AD20/ROMD4 AB2AD21/ROMD5 AJ3AD22/ROMD6 AB3AD23/ROMD7 AH3AD24 AC1AD25 AH2AD26 AC2AD27 AH1AD28 AD2AD29 AG2AD30 AD1AD31 AG1AD11/ROMA6 AJ7
REQ4#/PLL_BP33/PDMA_REQ1# AH5
GNT4#/PLL_BP50/PDMA_GNT1# AG4
LDRQ1# AH26
DPRSLPVRW23
CPU_PGAC26
PCIE_VDDR_8J27PCIE_VDDR_9J29
RTCCLK D3RTC_IRQ#/ACPWR_STRAP F5
PCIE_RX0NT26
INTE#/GPIO33 AD3INTF#/GPIO34 AF1INTG#/GPIO35 AF4INTH#/GPIO36 AF3LOCK# AF6
PCIE_VDDR_10L25PCIE_VDDR_11L26
PCIE_PVSSU28
SPDIF_OUT/GPIO41 T1
BMREQ# W22
PCIE_VDDR_12L29PCIE_VDDR_13N29C515
22U_0805_6.3V6M1
2
R2261 222_0402_5%NOSPREAD@
C24410U_0805_10V4Z
1
2
R19047K_0402_5%
C30718P_0402_50V8J
R45210K_0402_5%
@
R17747K_0402_5%
NC2
U16SN74AHC1G08DCKR_SC70
IN11
C322
1U_0402_6.3V4Z1
2
R25310K_0402_5%
C2491U_0603_10V6K
1U_0603_10V6K1
2
D7BAS40-04_SOT23
R19310K_0402_5%
C3150.1U_0402_16V4Z1
2
R2521 222_0402_5%NOSPREAD@
Trang 19USB20_P0USB20_N2
USB20_N0
USB20_P6
USB20_P5
USB20_N1USB20_P2USB20_N3USB20_P3
EC_RSMRST#
SB_OSC_INT
USB_OC#1H_THERMTRIP#
SB_AZ_BITCLK
SB_AZ_RST#
SB_AZ_SYNCSB_AZ_SDOUT
BLINK/GPM6#
USB_OC#3
EC_SWI#
USB_OC#0USB_OC#2
EC_SCI#
USB_OC#6USB_OC#6
SB_CK_SCLKREQ5#
SB_CK_SCLK(10,11,17,31,34)
SB_CK_SDAT(10,11,17,31,34)
CLK_USB_48M (17)
EC_THERM#
(8,28)
USB20_N0 (34)USB20_N1 (34)USB20_N2 (34)USB20_N3 (31)USB20_N4 (38)USB20_N5 (38)USB20_N6 (38)
SB_AC_SDOUT(22)
ACZ_SDIN0(39)ACZ_SDIN1(38)
USB_OC#0(34)
EC_SWI#
(28)EC_SCI#
(28)
PM_SLP_S5#
(28)PM_SLP_S3#
(28)
PWRBTN_OUT#
(28)SB_PWROK(8,37)SUS_STAT#
(30)
SB460_GPIO13(22)
AZ_DOCK_EN#
(18)SB460_GPIO14(22)
(28)
SB_SPKR(39)
SB_OSCIN(14,17)
EC_LID_OUT#
(28)
S3_STATE(28)
USB_OC0#/GPM0#
A8
USB_HSDP5+ D16USB_HSDM5- E16USB_HSDP4+ D18USB_HSDM4- E18USB_HSDP3+ G16USB_HSDM3- H16USB_HSDP2+ G18USB_HSDM2- H18USB_HSDP1+ D19USB_HSDM1- E19USB_HSDP0+ G19USB_HSDM0- H19
AVSSC A13AVSS_USB_1 A16
AVDDRX_0 A9AVDDRX_1 B10AVDDTX_3 B16
AVDDTX_0 B9AVDDTX_1 B11
AVDDRX_2 B12
AVDDC A12USB_OC4#/GPM4#
A6
USB_OC3#/GPM3#
C8
AVSS_USB_16 E21AVSS_USB_15 E11AVSS_USB_14 D21AVSS_USB_12 C20AVSS_USB_11 C19AVSS_USB_9 C17
AVSS_USB_3 C10AVSS_USB_2 C9
USB_HSDP6+ G14USB_HSDM6- H14
AVDDTX_2 B13
AVDDRX_3 B14
AVSS_USB_13 D11AVSS_USB_8 C16
USB_OC6#/GEVENT6#
B4 USB_OC7#/GEVENT7#
C4
AVSS_USB_6 C13AVSS_USB_7 C14AVSS_USB_4 C11
AVSS_USB_18 F12AVSS_USB_19 F14AVSS_USB_20 F16AVSS_USB_21 F18AVSS_USB_10 C18
Trang 20IDE_D8IDE_D2IDE_A1
IDE_D5IDE_D7
IDE_D[15 0]
IDE_CS3#
IDE_D9
IDE_D12IDE_D14IDE_IOR#
IDE_D15
IDE_D1IDE_DACK#
IDE_D13
IDE_D0
IDE_D10IDE_D3
IDE_DREQIDE_IOW#
IDE_IRQ
IDE_D6SATA_STX_DRX_P0
SATA_CAL
SATA_DTX_C_SRX_P0
SATA_X2SATA_X1
IDE_IOR DYSATA_STX_DRX_N0
SATA_STX_C_DRX_N0SATA_STX_C_DRX_P0
SATA_X2SATA_X1
IDE_A2 (23)IDE_DACK# (22,23)IDE_DREQ (23)IDE_IOR# (23)IDE_IOW# (23)IDE_CS1# (23)
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC
SCHEMATIC, M/B LA-3121PCustom
, 星期四 五 11, 2006月
OF U18
R462 IS 1K 1% FOR 25MHz XTAL, 4.99K 1% FOR 100MHz INTERNAL CLOCK NOTE:
Compal Electronics inc.
SATA@1 2
C5442.2U_0603_6.3V6K
@
C5650.01U_0402_16V7K
L47CHB2012U121_0805
PATA@
C29527P_0402_50V8J
SATA@
Y225MHZ_20P
SATA@
1
2
C53922U_0805_6.3V6M
PATA@
C5241U_0402_6.3V4Z
SATA@
1
2
R1464.7K_0402_5%
R17610M_0402_5%
SATA@
C5540.01U_0402_16V7K
SATA@
R5470_0402_5%
Trang 21+3VALW
AVDDCK_1.8V+3VS
VSS_15 G1VSS_14 F23
S5_1.8V_1
G4
S5_1.8V_4
H3 S5_1.8V_3H2
VSS_23 M18VSS_22 M15
P27 PCIE_VSS_29T21 PCIE_VSS_30T24 PCIE_VSS_31T27 PCIE_VSS_32T28 PCIE_VSS_33T29 PCIE_VSS_34U27 PCIE_VSS_35V22 PCIE_VSS_36V23 PCIE_VSS_37V24 PCIE_VSS_38V25 PCIE_VSS_39V26 PCIE_VSS_40V27 PCIE_VSS_41V28
2
C5320.1U_0402_16V4Z
C5530.1U_0402_16V4Z
1
2
C2622.2U_0805_10V6K
1
2
R1731K_0402_5%1
1
2
C5200.1U_0402_16V4Z
12
Trang 22CLK_PCI_SIO_R(18)
LPC_FRAME#
(18,28,36)
SB_SPDIF(18)
SB_AC_SDOUT
(19)
RTC_CLK(18)
SB460_GPIO13(19)
+3VS+3VS
+3VS+3VS
+3VS
+3VS+3VS
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC
SCHEMATIC, M/B LA-3121PCustom
, 星期四 五 11, 2006月
PCI_LPC_R PCI_LAN_R
PULL
LOW
DEBUG STRAPS
IGNORE DEBUG STRAPS
PULL
HIGH
USE DEBUG STRAPS
OVERLAP COMMON PADS WHERE POSSIBLE FOR DUAL-OP RESISTORS.
AC_SDOUT REQUIRED STRAPS
PCI_AD25
INTERNAL RTC
DEFA ULT
RTC_CLK
PCI_AD24
USE EEPROM PCIE STRAPS
USE DEFAULT PCIE STRAPS
DEFA ULT
BYPASS ACPI BCLK
USE ACPI BCLK
DEFA ULT
IDE_DACK#
USE IDE PLL USE
LONG RESET
USE SHORT RESET
USE PCI PLL
DEFA ULT
DEFA ULT
BYPASS IDE PLL
DEFA ULT
USE SHORT RESET
DEFA ULT
H, H = PCI ROM
NOTE: FOR SB460, PCICLK[8:7] ARECONNECTED TO SUBSTRATEBALLS PCICLK[1:0]
ROM TYPE:
L, L = FWH ROM
DEFA ULT
PCI_LPC_R PCI_LAN_R
PULL HIGH ACPWRON
AUTO PWR ON
MANUAL PWR ON
PCI_MINI_R
USB PHY POWERDOWN DISABLE
PCI_PCM_R
DEFA ULT
USB PHY POWERDOWN ENABLE
N OT SUPPORTED
SB460 ONLY
LFRAME#
DEFA ULT
ENABLE THERMTRIP#
DISABLE THERMTRIP#
XTAL MODE
LOW
PCIE_CM_SET HIGH
SB600 = PCI REQ4#/GNT4#
SB460 = GPIO13 (NC3), GPIO14 (NC5)
BOOTFAILTIMER ENABLED
BOOTFAILTIMER DISABLED
NOTE: FORSB460,PCI_AD23 ISRESERVED
NOTE: R751 PU RESISTOR FOR RTC_IRQ# IS REQUIRED FOR SB600
TO KEEP THE INPUT FROM FLOATING.
DEFA ULT
Compal Electronics inc.
R1981K_0402_5%
@
R11810K_0402_5%
R18910K_0402_5%
@
R19510K_0402_5%
@
R24510K_0402_5%
R21610K_0402_5%
@
R49310K_0402_5%
R19610K_0402_5%
@
R50310K_0402_5%
@
R49210K_0402_5%
R46910K_0402_5%
@
R23910K_0402_5%
R18810K_0402_5%
R20210K_0402_5%
R47310K_0402_5%
C3020.1U_0402_16V4Z
@1
2
R50410K_0402_5%
@
R22010K_0402_5%
R22110K_0402_5%
@
R24810K_0402_5%
R26210K_0402_5%
@
R49410K_0402_5%
R48810K_0402_5%
R2001 20_0402_5% @
R21510K_0402_5%
@
R21110K_0402_5%
R49610K_0402_5%
R49110K_0402_5%
R1991 20_0402_5% @
R24110K_0402_5%
@
R24910K_0402_5%
@
R49810K_0402_5%
@
R49510K_0402_5%
R49710K_0402_5%
@
R11910K_0402_5%
@
R25710K_0402_5%
R21210K_0402_5%
@
R48110K_0402_5%
@
Trang 23IDE_D15IDE_D11IDE_D8
IDE_D13
I DE_IRQ
IDE_D2IDE_D0
IDE_D5IDE_D7
IDE_D4IDE_D6IDE_RESET#
SATA_STX_C_DRX_N0
SATA_DTX_C_SRX_P0
IDE_LED#
IDE_DREQIDE_IOW#
IDE_IOR#
ID E_IORDYIDE_DACK#
I DE_IRQIDE_A1IDE_CS1#
IDE_CSEL
IDE_PDIAG#
IDE_A2IDE_CS3#
IDE_D7IDE_D5IDE_D3IDE_D1
IDE_LED#
IDE_D8IDE_D10IDE_D12IDE_D14
IDE_A[0 2]
(20)
CD_AGND(39)
(20)IDE_IOR#
(20)IDE_IORDY(20)IDE_DACK#
(20,22)IDE_IRQ(20)
80mils 80mils
If CDROM is Slave then SD_CSEL= Floating else SD_CSEL= Low
Close to SATA HDD
2006/05/03 modify
R45100K_0402_5%
33
33
34 3435
R282 475_0402_1%
PATA@
C3470.1U_0402_16V4Z
1
2
C35110U_0805_10V4Z
Trang 24CRT_B_LCRT_G_L
TV_LUMA_LVGA_TV_CRMA_R
VGA_TV_COMPS_RVGA_TV_LUMA_R
HSYNC_L
VSYNC_L
D_DDC_DATA
VGA_CRT_HSYNC(14)
VGA_CRT_VSYNC(14)
VGA_DDC_DATA (14)
VGA_DDC_CLK (14)
CRT_R(14)
CRT_B(14)
CRT_G(14)
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC
SCHEMATIC, M/B LA-3121PCustom
1
2
D18DAN217_SC59
F1
1.1A_6VDC_FUSE
21
Q24BSS138_SOT23
8
L411 FCM1608C-121T_06032 TV@
C418220P_0402_50V7K
TV@
1
2
D23DAN217_SC59
@
2 3
C4136P_0402_50V8C
1
2
C4070.1U_0402_16V4Z
1
2
L32FCM2012C-800_0805
@
2 3
R3510_0402_5%TV@
L33FCM2012C-800_0805
1
2
C42410P_0402_25V8K
1
2
D22DAN217_SC59
122
133
14410
5
16 17
L401 FCM1608C-121T_06032 TV@
U36SN74AHCT1G125GW_SOT353-5A
C425220P_0402_50V7K
TV@
1
2
C406100P_0402_50V8J
C4341 20.1U_0402_16V4Z
C42310P_0402_25V8K
1
2
C4331 20.1U_0402_16V4ZR3541 2 0_0402_5%
R3561 2 0_0402_5%
D24DAN217_SC59
C428220P_0402_50V7K
TV@
1
2
U35SN74AHCT1G125GW_SOT353-5A
C4291 2 22P_0402_50V8JTV@
C419220P_0402_50V7K
1
2
L34FCM2012C-800_0805
Trang 25LVDS_TXLN1
LVDS_TXLN0LVDS_TXUP0
LVDS_TXUN0
LVDS_TXLCKPLVDS_TXLCKNLVDS_TXLP2
LVDS_TXUCKPLVDS_TXUCKN
LVDS_TXUP2LVDS_TXUN2
EDID_LCD_CLK(14)
LVDS_TXUP1(14)LVDS_TXUN1(14)
LVDS_TXLN1 (14)LVDS_TXLP1 (14)LVDS_TXLP0 (14)LVDS_TXLN0 (14)LVDS_TXUP0
(14)LVDS_TXUN0(14)
ENVDD
(14)
LVDS_TXLCKP (14)LVDS_TXLCKN (14)
LVDS_TXLP2 (14)LVDS_TXLN2 (14)
LVDS_TXUCKN(14)
LVDS_TXUCKP(14)
LVDS_TXUP2(14)LVDS_TXUN2(14)
(SAME AS ACES_87216-4016)
04/17 modify
R14.7K_0402_5%
2
GD
S
Q25BSS138_SOT23
2
D2CH751H-40PT _SOD323
21
R342
100K_0402_5%
12G
D
S
Q222N7002_SOT23
2
L35FBMA-L11-201209-121LMA40T _0805
C4161U_0402_6.3V4Z @1
2
JP1
ACES_88107-4000G13579101214161820
21232527293133353739
C4154.7U_0805_10V4Z
1
2
R3431K_0402_5%
C4260.1U_0402_16V4Z
@1
2
R341300_0603_1%
C4310.047U_0402_16V7K
1
2
R347100K_0402_5%
R34510K_0402_5%
L42FBMA-L11-201209-121LMA40T _0805
L36FBMA-L11-201209-121LMA40T _0805
C4200.1U_0402_16V4Z
1
2