PULSE CODE MODULATION

figure 8A b Input to PCM timing The output muxed with the input is shown in figure below figure 8A c Output Muxed with Input for PCM timing The block parameters of the quantizer is show

EXPERIMENT # 8

PULSE CODE MODULATION

1/27/2010

Group:

PURPOSE

The objectives of this laboratory are:

1 To investigate the serially encoded PCM signal

2 To make signal-to-noise measurements of the PCM system

3 To investigate synchronous and asynchronous PCM techniques

4 To investigate properties of the TDM-PCM communication system

EQUIPMENT LIST

1 PC With Matlab and Simulink

Laboratory Procedure

I PCM Familiarization

A The analog to digital conversion properties of the PCM was investigated in the last

experiment

The “start” bit and the 7 data bits and two “stop” bits were identified It was also found that if the parity switch is on, then the 1st stop bit is changed to an even parity bit That is, the 7 data bits

plus the parity bit will always be an even number (refer to figure 8 B)

B Set up Figure 8A the MSB-LSB quantization switches are to be implemented using the Sample and hold and Quantizer blocks The outputs is to be fed via a MUX and the input compared with the output and the error in tracing the signal is observed using a very low frequency sine wave The effect of changes in amplitude should also be studied All the results should match the ones summarized below

figure 8A (a) PCM timing

The output of the above circuit implementation is shown below in the following CRO’s

figure 8A (b) Input to PCM timing

The output muxed with the input is shown in figure below

figure 8A (c) Output Muxed with Input for PCM timing

The block parameters of the quantizer is shown below

figure 8A (d) Quantizer block parameters

The whole PCM timing block implementation is shown below

figure 8A (e) PCM timing- Full implementation

Here are the block paramters of the quantizer encode and the decode blocks The triger signal is provided using a pulse generator

figure 8A (f) Block Parameters Enabled quantizer encode

Similarly the block parameters for the quantization decode is shown below

figure 8A (g) Block Parameters Enabled quantizer decode

The digital output signal is as shown below

figure 8A (h) Block Parameters Enabled quantizer decode

The quantization values are shown below

figure 8A (i) Quantization values

The distortion is shown below

figure 8A (j) Distortion of the signal

The final output of the decoder is shown below

figure 8A (k) Output in comparision with the input

C The switches in the PCM-Analog module was set to

SYNC / ASYNC - SYNC

Adjust the analog input signal for a 1 kHz since wave The output of the PCM decoder was observed The output was also fed to a LPF to reconstruct the signal The effect of the LPF to signal reconstruction is important since it changes the amplitude of the frequency domain signal

II PCM SNR MEASURMENT

A As shown in figure 8c a communication channel has been added to the PCM system A

constant number of quantization levels (27), the error signal will be a function of the communication channel SNR Therefore, we measured the SNR at the output of the system and compared it to the SNR in the communication channel The output SNR was plotted as a function of the channel SNR ( A 20 Hz since wave (3v p-p) should be used

as the analog input.)

We could have also decreased the signal level in the channel to get a wide variation of S/N ratio

by inserting the 50Ω feedthru

B A scheme as been incorporated into the PCM system for the compensation of errors

generated by noise With the parity switch ON, one of the stop bits is changed to a parity bit Now the eight-bit data word (surrounded by the start and stop bits) will always have

an even number of bits The error compensation scheme works as follows:

figure 8B (a) PCM channel in Noise

The output block looks like this

figure 8B (b) Output of PCM channel in Noise

The block parameters of the Band limited White noise looks like this

figure 8B (c) Block Parameters of Band limited White Noise

The other module outputs are shown below

The digital signal generated looks like this

figure 8B (d) Output of the digital signal generator

The quantization values and the error is shown below

figure 8B (e) Quantization values

figure 8B (f) Distortion

1 Received parity is even: It will be assumed that no error was made in the channel

2 Received parity is odd: An error has been made

a Compensation On: The most recent even parity sample will be retained at the output ( Now this is always used.)

The ability to compensate to increase the output SNR of the PCM system was observed and a plot similar to the previous time was done

C The parity switch was turned off and the system has been operating in a “synchronous”

mode That is, the timing system is common to both encoder and decoder Asynchronous mode will utilize the start and stop bits of the PCM word for obtaining word timing The loss of the start bit due to channel noise will not only causes a word error, but also causes loss of synchronization It this happens, it may take several PCM words to reestablish synchronization resulting in a lower output SNR This was verified

III ASYNCRONOUS PCM TRANSMISSION

Two lab groups coordinated this portion of the experiment Two separate co-axial cables were prepared long enough to reach the two CMDS mainframes The output of out Analog-PCM module was connected tot he input of their PCM-Analog module Sampling frequencies was close

to the same frequency of 5kHz for asynchronous operation A two-way communication was established between the two parties It was observed that the systems don’t work in SYNC mode

IV TWO CHANNEL TDM PCM SYSTEM

A channel TDM PCM system built using CMDS as shown in figure 8D was used The overall system parameters, such as SNR properties and the cross channel separation throughout the system and system performance as a function of the system sampling frequency were

investigated

figure 8D (f)Two channel TDM/ PCM System

The wave forms are as shown below at different stages

figure 8D (b)Two channel TDM/ PCM System – Digital Signal

figure 8D (c)Two channel TDM/ PCM System – quantization values

figure 8D (d)Two channel TDM/ PCM System – block parameters

figure 8D (e)Two channel TDM/ PCM System – Output signal 1

figure 8D (f)Two channel TDM/ PCM System – Output signal 2

figure 8D (g)Two channel TDM/ PCM System –Signal before demuxing

V Report

The report with all the questions in the lab procedure were answered and the plot of the SNR curves and the evaluations of the various systems were done