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Tiêu đề Analog interfacing to embedded microprocessors
Tác giả Stuart Ball
Trường học Newnes
Chuyên ngành Embedded Computer Systems
Thể loại sách
Năm xuất bản 2001
Thành phố Boston
Định dạng
Số trang 284
Dung lượng 3,53 MB

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Nội dung

Whether measuring a signal from a satellite or the temperature of atoaster, embedded systems must measure, analyze, and control analog values.That’s what this book is about—connecting an

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Analog Interfacing to Embedded Microprocessors

Real World Design

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Analog Interfacing to Embedded Microprocessors

Real World Design

Stuart Ball

Boston Oxford Auckland Johannesburg Melbourne New Delhi

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Newnes is an imprint of Butterworth–Heinemann.

Copyright © 2001 by Butterworth–Heinemann

A member of the Reed Elsevier group

All rights reserved.

No part of this publication may be reproduced, stored in a retrieval system, or transmitted in any form or by any means, electronic, mechanical, photocopying, recording, or otherwise, without the prior written permission of the publisher.

Recognizing the importance of preserving what has been written, Butterworth–Heinemann prints its books on acid-free paper whenever possible.

Library of Congress Cataloging-in-Publication Data

Ball, Stuart R., 1956 –

Analog interfacing to embedded microprocessors : real world design / Stuart Ball.

p cm.

ISBN 0-7506-7339-7 (pbk : alk paper)

1 Embedded computer systems—Design and construction 2 Microprocessors.

I Title.

TK7895.E42 B33 2001

British Library Cataloguing-in-Publication Data

A catalogue record for this book is available from the British Library.

The publisher offers special discounts on bulk orders of this book.

For information, please contact:

Manager of Special Sales

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Avoiding Excess Speed 7

Other System Considerations 8

Sample Rate and Aliasing 11

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Measuring and Analyzing Control Loops 130

6 Solenoids, Relays, and Other Analog Outputs 137

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Temperature Effects in General 221

Noise and Grounding 222

Supply-Based References 227

IEEE 1451.2 229

4-20 ma Current Loop 231

Four Opamp Configurations 233

General Opamp Design Equations 237

Reversing the Inputs 238

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There often seems to be a division between the analog and digital worlds.Digital designers usually do not like to delve into analog, and analog design-ers tend to avoid the digital realm The two groups often do not even use thesame buzzwords.

Even though microprocessors have become increasingly faster and morecapable, the real world remains analog in nature The digital designers whoattempt to control or measure the real world must somehow connect thisanalog environment to their digital machines There are books about analogdesign and books about microprocessor design This book attempts to get atthe problems encountered in connecting the two together

This book came about because of a comment made by someone about my

first book (Embedded Microprocessor Systems: Real World Design): “it needs more

analog interfacing information.” I felt that adding this material to that bookwould cause the book to lose focus However, the more I thought about it,the more I thought that a book aimed at interfacing the real world to micro-processors could prove valuable This book is the result I hope it provesuseful

Preface

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Modern electronic systems are increasingly digital: digital microprocessors,digital logic, digital interfaces Digital logic is easier to design and understand,and it is much more flexible than the equivalent analog circuitry would be.

As an example, imagine trying to implement any kind of sophisticated processor with analog parts Digital electronics lets the PC on your deskexecute different programs at different times, perform complex calculations,and communicate via the World Wide Web

micro-While the electronic world is nearly all digital, the real world is not Thetemperature in your office is not just hot or cold, but varies over a wide range.You can use a thermometer to determine what the temperature is, but how

do you convert the temperature to a digital value for use in a controlled thermostat? The ignition control microprocessor in your car has

microprocessor-to measure the engine speed microprocessor-to generate a spark at the right time A processor-controlled machining tool has to position the cutting bit in the rightplace to cut a piece of steel

micro-This book provides coverage of practical control applications and givessome opamp examples; however, its focus is neither control theory nor opamptheory Primarily, its coverage includes measurement and control of analogquantities in embedded systems that are required to interface with the realworld Whether measuring a signal from a satellite or the temperature of atoaster, embedded systems must measure, analyze, and control analog values.That’s what this book is about—connecting analog input and output devices

to microprocessors for embedded applications

Introduction

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System Design 1

Most embedded microprocessor designs involve processing some kind ofinput to produce some kind of output, and one or both of these is usuallyanalog The digital portions of an analog system, such as the microprocessor-to-memory interface, are outside the scope of this book However, there aresome system considerations in any design that must interface to the real world,and these will be considered here

to measure In simplest terms, the dynamic range can be thought of as thelargest value that must be measured compared to (or divided by) the small-est In most cases, the essential number that needs to be known is the number

of bits of precision required to measure or control something

As an example, say that we want to measure temperatures between 0°C and 100°C If we want to measure with 1°C accuracy, we would need 100 discrete values to accomplish this An 8-bit analog-to-digital converter (ADC)can divide an input voltage into 256 discrete values, so this system would onlyneed 8 bits of precision On the other hand, what if we want to measure the

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same temperature range with 1°C accuracy? Now we need 100/.1, or 1000discrete values, and that means a 10-bit ADC (which can produce 1024 dis-crete values).

Voltage Precision

The number of bits required to measure our example temperature range isdependent on the range of what we are measuring (temperature, voltage,light intensity, pressure, etc.) and not on a specific voltage range In fact, our0-to-100°C range might be converted to a 0-to-5 volt swing or a 0-to-1 voltswing In either case, the dynamic range that we have to measure is the same.However, the 0-to-5V range uses 19.5 mV steps (5v/256) for 1°C accuracy and4.8 mV steps (5v/1024) for 1°C accuracy If we use a 0-to-1V swing, we havestep sizes of 3.9 mV and 976mV This affects the ADC choices, the selection ofopamps, and other considerations These will be examined in more detail inlater chapters The important point is that the dynamic range of the systemdetermines how many bits of precision are needed to measure or controlsomething; how that range is translated into analog and then into digitalvalues further constrains the design

For example, say we’re still trying to measure that 0-to-100°C temperaturerange Measurement with 1°C accuracy may be achievable without adjust-ments However, you might find that the 1°C figure requires some kind ofcalibration because you can’t get a temperature sensor in your price rangewith that accuracy You may have to include an adjustment in the design tocompensate for this variation

The need for a calibration step implies other things Will the part of thesystem with the temperature sensor be part of the board that contains thecompensation? If not, how do you keep the two parts together once calibra-tion is performed? And what if the field engineer has to change the sensor

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in the field? Will he be able to do the calibration? Will it really be cheaper,

in production, to add a calibration step to the assembly procedure than topurchase a more accurate sensor?

In many cases where an adjustment is needed, the resulting calibrationparameters can be calculated in software and stored For example, you mightbring the system (or just the sensor) to a known temperature and measurethe output You know that an ideal sensor should produce an output voltage

X for temperature T, but the real sensor produces an output voltage Y fortemperature T By measuring the output at several temperatures, you canbuild up a table of information that relates the output of that specific sensor to

temperature This information can be stored in memory When the processor reads the sensor, it looks in the memory (or does a calculation) todetermine the actual temperature

micro-You would want to look at storing this calibration with the sensor if it is notphysically located with the microprocessor This way, the sensor can bechanged without recalibrating Figure 1.1 shows three means of handling thiscalibration

In diagram A, a microprocessor connects to a remote sensor via a cable.The microprocessor stores the calibration information in its EEPROM or flashmemory The tradeoffs for this method are:

• Once the system is calibrated, the sensor has to stay with that processor board If either the sensor or the microprocessor is changed, thesystem has to be recalibrated

micro-• If the sensor or microprocessor is changed and recalibration is not performed, the results will be incorrect, but there is no way to know thatthe results are incorrect unless the microprocessor has a means to identifyspecific sensors

• Data for all the sensors can be stored in one place, requiring less memorythan other methods In addition, if the calibration is performed by calcula-tion instead of by table lookup, all sensors that are the same can use the samesoftware routines, each sensor just having different calibration constants.Diagram B shows an alternate method of handling a remote sensor, wherethe EEPROM that contains the calibration data is located on the board withthe sensor This EEPROM could be a small IC that is accessed with an I2C ormicrowire interface (more about those in Chapter 2, “Digital-to-Analog Conversion”) The tradeoffs here are:

• Since each sensor carries its own calibration information, sensors andmicroprocessor boards can be interchanged at will without affecting results.Spare sensors can be calibrated and stocked without having to be matched

to a specific system

• More memories are required, one for each sensor that needs calibration

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Finally, diagram C takes this concept a step further, adding a controller to the sensor board, with the microcontroller performing the cal-ibration and storing calibration data in an internal EEPROM or flash memory.The tradeoffs here are:

micro-• More processors and more firmware to maintain In some applications withrigorous software documentation requirements (medical, military) this may

be a significant development cost

• No calibration effort required by main microprocessor For a given world condition, such as temperature, it will always get the same value,regardless of the sensor output variation

real-• If a sensor becomes unavailable or otherwise has to be changed in duction, the change can be made transparent to the main microprocessor

pro-Figure 1.1

Sensor calibration methods.

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code, with all the new characteristics of the new sensor handled in theremote microcontroller.

Another factor to consider in calibration is the human element If a systemrequires calibration of a sensor in the field, does the field technician needarms twelve feet long to hold the calibration card in place and simultaneouslyreach the “ENTER” key on the keyboard? Should a switch be placed near thesensor so calibration can be accomplished without walking repeatedly around

a table to hit a key or view the results on the display? Can the adjustmentprocess be automated to minimize the number of manual steps required? Themore manual adjustments that are needed, the more opportunities there arefor mistakes

Bandwidth

Several years ago, I worked on an imaging application This system was tocapture data using a CCD (Charge Coupled Device) image sensor We werecapturing 1024 pixels per scan We had to capture items moving 150 inchesper second at a resolution of 200 pixels per inch Each pixel was convertedwith an 8-bit ADC, resulting in 1 byte per pixel The data rate was therefore

150 ¥ 1024 ¥ 200, or 30,720,000 bytes per second

We planned to use the VME bus as the basis for the system Each scan fromthe CCD had to be read, normalized, filtered, and then converted to 1-bit-per-pixel monochrome During the meetings that were held to establish thesystem architecture, one of the engineers insisted that we pass all the datathrough the VME bus In those days, the VME bus had a maximum bandwidthspecification of 40 megabytes per second, and very few systems could achievethe maximum theoretical bandwidth The bandwidth we needed looked like this:

Read data from camera into system: 30.72 Mbytes/sec

Pass data to normalizer: 30.72 Mbytes/sec

Pass data to filter: 30.72 Mbytes/sec

Pass data to monochrome converter: 30.72 Mbytes/sec

Pass monochrome data to output: 3.84 Mbytes/sec

If you add all this up, you get 126.72 Mbytes/sec, well beyond even the retical capability of the VME bus back then More recently, I worked on asimilar imaging application that was implemented with DSPs (Digital SignalProcessors) and multiple PCI buses, and one of the PCI buses was near itsmaximum capability when all the features were added The point is, know

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theo-how much data you have to push around and what buses or data paths youare going to use If you are using a standard interface such as Ethernet orFirewire, be sure it will support the total bandwidth required.

Processor Throughput

In many applications, the processor throughput is an important tion In the imaging example just mentioned, most of the functionality wasperformed in hardware because the available microprocessors could not keep

considera-up As processor speeds increase, more functionality is pushed into the ware The key factors that you must consider to determine your throughputrequirements are:

soft-Interrupts

How often must the interrupts occur, and how much processing must be formed in each ISR (interrupt service routine)? What is the maximum allow-able latency for servicing an interrupt? Will interrupts need to be turned offfor an extended length of time, and how will that affect the latency of otherinterrupts? You may find that you need two (or more) processors—one tohandle high-speed interrupts with short latency requirements but low com-plexity processing needs, and another to handle low-rate interrupts with morecomplex processing requirements

per-Interfaces

What must the system talk to? How will the data be passed around or get tothe outside world? How much hardware support will there be for the inter-face and how much of the functionality will be performed in software? To take

a simple example, an I2C interface that is implemented on a microcontroller

by flipping bits in software will impact overall throughput more than an I2Cinterface that is implemented in hardware This issue will likely be related tothe interrupt considerations, because the interface will probably use inter-rupts (If you don’t know what I2C is, it will be covered in Chapter 2, “Digital-to-Analog Converters.”)

Hardware Support

An imaging application that has a DMA (Direct Memory Access) controller

to move large amounts of data around will not need as much processor power as one that has to move the data in software A processor that has to

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horse-move the data in software but that has some kind of block-horse-move instruction

in the hardware will probably be faster than one that has to have a series ofinstructions to construct a loop Similarly, if the CPU has an on-chip FPU(floating point coprocessor), then floating point operations will be muchfaster than if they have to be executed in software

actu-or no analysis of the amount of processing the CPU actually has to do

Operating System Requirements

If you use an operating system (OS), how long will interrupts be turned off?

Is this compatible with the interrupt latency requirements? What if the OSoccasionally stops processing to spend a few seconds thrashing the hard disk?Will this cause data to be lost?

Language/Compiler

If you plan to use an object-oriented language such as C++, what happenswhen the CPU has to do garbage collection on the memory? Will data be lost?Does choosing this approach mean you have to go from a 100 MHz processor

to a 500 MHz processor just to keep the garbage collection interval short?

Avoiding Excess Speed

Choosing a bus architecture and a processor that is fast enough to do the job is important, but it can also be important to avoid too much speed It maynot seem obvious that you wouldn’t always want the fastest bus and the fastestmicroprocessor, but there are applications where that is exactly the case Thereare two basic reasons for this: cost and EMC (electromagnetic compatibility)

Cost

The PC/104 standard defines mechanical and electrical characteristics of PCboards, optimized for embedded applications PC/104 CPU boards come withthe original PC/104 bus, which has electrical and timing characteristics

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similar to the ISA bus used in personal computers and is capable of data fers in the 5 Mbytes/sec range Many CPU boards also have the PC/104 Plusbus, which has characteristics similar to the much faster (133 Mbytes/sec) PCIbus Although it might seem that the faster bus is always preferred, it is oftenless expensive to design a peripheral board for the PC/104 bus than for thePC/104 Plus PC/104, due to the slower clock rates, allows longer traces andsimpler logic If you have a relatively large analog I/O board plugged into aPC/104 CPU board, the relaxed timing constraints of PC/104 may makelayout easier Many low-volume products simply do not sell enough units tojustify the higher development costs associated with PC/104 Plus Of course,this assumes that the PC/104 bus will support the necessary data rates Similarconsiderations apply to other buses, such as PCI and Compact PCI.

trans-EMC

Almost every microprocessor-based design will have to undergo EMC tromagnetic compatibility) testing before it can be sold in the United States

(elec-or Europe EMC regulations limit the amount of energy the product can emit,

to prevent interference with other equipment such as televisions and radios.Generally, the higher the clock rates are, the more emissions the equipmentgenerates Current EMC standards test radiated emissions in the frequencyrange between 30 MHz and 1 GHz A processor running with a 6 MHz clockwill not have any fundamental emissions in this range; the only frequencies inthe test range will be those from the fifth and higher harmonics of the proces-sor clock The higher harmonics typically have less energy On the other hand,

a 33 MHz processor will produce energy in the test band from its tal frequency and higher In addition, a faster processor clock rate means fasterlogic with faster edges and correspondingly higher energy in the harmonics.Although using a 6 MHz example in an era of 1000 MHz Pentiums mayseem archaic, it does illustrate the point EMC concerns are a valid reason tolimit bus and processor speeds only to what is actually needed for the appli-cation The caution here is not to limit the design too much If the processorcan just barely keep up with the application, there is no margin left to fixproblems or add enhancements

fundamen-Other System Considerations

Peripheral Hardware

An imaging system was having problems with lost data This particular systembuffered considerable image data on a hard disk drive The problem was

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traced to the disk drive, where the drive would just stop accepting data for awhile and the image buffers would overflow It turned out that this particu-lar drive had a thermal compensation feature that required the on-drive CPU

to “go away” for a few tens of milliseconds every so often The applicationrequired continuous access to the drive Be sure the peripheral hardware iscompatible with your application and does not introduce problems

Shared Interfaces

What is the impact of shared interfaces? For example, if you are continuouslybuffering data from two different image cameras on two disk drives, a singleIDE interface may not be fast enough You may need separate IDE interfacesfor the two drives so they can operate independently, or you may need to go

to a higher-performance interface Similarly, will 10-baseT Ethernet handle

all your data, or will you need 100-baseT? Look at all the data on all the

inter-faces and make sure the bandwidth you need is there

Task Priorities

The IBM PC architecture has been used for all number of applications It is

a well-documented standard with an enormous number of compatible ware packages available But it has some drawbacks, including the non-real-time nature of the standard Windows operating system You have probablyexperienced having your PC stop responding for a few seconds while itthrashes the hard disk for some unknown reason If you are typing a docu-ment on a word processor, this is a minor annoyance—whatever you typed iscaptured (as long as it isn’t too many characters) and shows up on the screenwhenever the operating system gets back to processing the keyboard.What happens if you are getting a continuous stream of data from an audio

soft-or video device when this happens? If your system isn’t constructed to permityour data stream to have a high priority, some data may be lost If you areusing a PC-like architecture, be sure the hardware and operating system soft-ware will support the things you need to do

Hardware Requirements

Do you need a floating-point processor to do calculations on the data you will

be processing? If so, you won’t be able to use a simple 8-bit processor, you willneed at least a 486-class machine Does the data rate require a processor with

a DMA controller in order to keep up? This limits your potential CPU tions to just a few In some cases, you can make system adaptations that willlower hardware costs, as the following example will illustrate

selec-Imagine that you have a motor-driven wheel that produces an interrupt toyour processor every 20° of rotation (see Figure 1.2) The motor runs at varying

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speeds and the processor has to schedule some event, such as activating a noid to open a valve, some number of degrees after the interrupt occurs.The 20° interrupts will occur 3.3 ms apart if the wheel spins at 1000 rpm,and 666 mS apart if the wheel spins at 5000 RPM If the processor uses a timer

sole-to measure the rotation speed (time between interrupts), and if the timerruns at 1 MHz, then the timer will increment 3300 counts between interrupts

at 1000 RPM, and 666 counts at 5000 RPM

Say that the CPU has to open our hypothetical solenoid when the wheelhas rotated 5° past one of the interrupts, as shown in Figure 1.2 The formulafor calculating the timer value (how much must be added to the current countfor a 5° delay) looks like this:

So at 1000 RPM, the 5° delay is 825 timer counts, and at 5000 RPM, the delay

is 166 counts The problem with this approach in an embedded system is theneed to divide by 20 in the formula Division is a time-consuming task toperform in software, and this approach might require that you choose aprocessor with a hardware divide instruction

If we change our measurement system so that the 20° divisions are dividedinto binary values, the math gets easier Say that we decide to divide the 20°divisions into 32 equal parts, each part being 625 degrees We’ll call theseincrements units just so we have a name for them The 5° increment is now5/.625 or 8 units Now our formula looks like this:

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This gives us the same result as before (825 at 1000 RPM, 166 at 5000 RPM),but division by 32 can be performed with a simple shift operation instead of

a complex software algorithm A change such as this may make the differencebetween a simple 8-bit microcontroller and a more complex and expensivemicroprocessor All we did was change measuring degrees of rotation to mea-suring something that is easier to calculate

Word Width

If you are connecting a processor to a 12-bit ADC, you will probably want a

16-bit processor instead of an 8-bit processor While you can perform 16-bit

operations on an 8-bit CPU, it usually requires multiple instructions and hasother limitations Unless the processor is simply passing the data on to someother part of the system, you will want to match the CPU to the devices withwhich it must interface Similarly, if you will be performing calculations to 32-bit accuracy, you will want to consider a CPU with at least 16- and probably32-bit word width to make computation easier and faster

Interfaces

Be sure that interface conditions that are unusual but normal don’t causedamage to any part of the system For instance, a microprocessor board mayconnect to a motor control board with a cable What happens if the serviceengineer leaves the cable unplugged and turns the system on? Will the motorsremain stationary, or will they run out of control? Make sure that issues likethis are addressed

Sample Rate and Aliasing

Figure 1.3 shows a sinusoidal input signal and an ADC that is sampling slowerthan the signal is changing If the system measuring this system assumed itwas measuring a sinusoid of some frequency, it would conclude that it wasmeasuring a sinusoid exactly half the frequency of the real input This is calledaliasing Aliasing can occur any time that the input frequency is a multiple ofthe sample frequency

Also shown in Figure 1.3 is another input waveform that is not a sinusoid

In this case, the system doesn’t assume it is sampling a sine, so it just stores

Timer increment value =

8 units

32 units per interrupt ¥Number of timer counts per interrupt

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the samples as they are read As you can see, the resulting pattern of datavalues does not match the input at all.

Any system must be designed so that it can keep up with whatever it is suring This includes the speed at which the ADC can collect samples and thespeed at which the microprocessor can process them If the input frequencywill be greater than the measurement capability of the system, there are threeways to handle it:

mea-1 Speed up the system to match the input

2 Filter out high-frequency components with external hardware ahead of theADC measuring the signal

3 Filter out or ignore high-frequency components in software This soundssilly—how do you filter something faster than you can measure? But if thevalid input range is known, such as the number of cars entering a parkinglot over any given time, then bogus inputs may be detectable In thisexample, any input frequency greater than a couple per second can beassumed to be the result of noise or a faulty sensor—real cars don’t enterparking lots that fast

Good system design depends on choosing the right tradeoffs betweenprocessor speed, system cost, and ease of manufacture

Figure 1.3

Aliasing.

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Digital-to-Analog Converters 2

Although this chapter is primarily about analog-to-digital converters (ADCs),

an understanding of digital-to-analog converters (DACs) is important tounderstanding how ADCs work

Figure 2.1 shows a simple resistor ladder with three switches The resistorsare arranged in an R/2R configuration The actual values of the resistors areunimportant; R could be 10K or 100K or almost any other value

Each switch, S0–S2, can switch one end of one 2R resistor between groundand the reference input voltage, VR The figure shows what happens whenswitch S2 is ON (connected to VR) and S1 and S2 are OFF (connected toground) By calculating the resulting series/parallel resistor network, the finaloutput voltage (VO) turns out to be 5 ¥ VR If we similarly calculate VO forall the other switch combinations, we get this:

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We could add another R/2R pair and another switch to the circuit, making a 4-switch circuit with 16 steps of VR/16 volts each An 8-switch circuitwould have 256 steps of VR/256 volts each Finally, we can replace the mechan-ical switches in the schematic with electronic switches to make a true DAC.

Analog-to-Digital Converters

The usual method of bringing analog inputs into a microprocessor is to use

an analog-to-digital converter (ADC) An ADC accepts an analog input, avoltage or a current, and converts it to a digital word that can be read by amicroprocessor Figure 2.2 shows a simple ADC This hypothetical part hastwo inputs: a reference and the signal to be measured It has one output,

an 8-bit digital word that represents, in digital form, the input value For the moment, ignore the problem of getting this digital word into the microprocessor

Reference Voltage

The reference voltage is the maximum value that the ADC can convert Ourexample 8-bit ADC can convert values from 0v to the reference voltage Thisvoltage range is divided into 256 values, or steps The size of the step is given by:

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This is the step size of the converter It also defines the converter’s resolution.

Output Word

Our 8-bit converter represents the analog input as a digital word The mostsignificant bit of this word indicates whether the input voltage is greater thanhalf the reference (2.5v, with a 5v reference) Each succeeding bit representshalf of the previous bit, like this:

Bit: Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0

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Bit: Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0

Volts: 2.5 1.25 625 3125 156 078 039 0195 Output

For the example we’ve been using so far, an 8-bit ADC with a 5v reference,the resolution is 0195 v (19.5 mv) This means that any input voltage below19.5 mv will result in an output of 0 Input voltages between 19.5 and 39 mvwill result in an output of 1 Between 39 mv and 58.6 mv, the output will be 3.Resolution can be improved by reducing the reference input Changingfrom 5v to 2.5v gives a resolution of 2.5/256, or 9.7 mv However, themaximum voltage that can be measured is now 2.5v instead of 5v

The only way to increase resolution without changing the reference is touse an ADC with more bits A 10-bit ADC using a 5v reference has 210, or 1024possible output codes So the resolution is 5v/1024, or 4.88 mv

up If the input is lower than the DAC voltage, the counter counts down

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The DAC input is connected to the counter output Say the referencevoltage is 5v This would mean that the converter can convert voltages between0v and 5v If the most significant bit of the DAC input is “1,” the output voltage

is 2.5v If the next bit is “1,” 1.25v is added, making the result 3.75v Each cessive bit adds half the voltage of the previous bit, so the DAC input bits correspond to the following voltages:

suc-Bit: Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0

Volts: 2.5 1.25 625 3125 156 078 039 0195

Figure 2.3 shows how the tracking ADC resolves an input voltage of 37v.The counter starts at zero, so the comparator output will be high The countercounts up, once for every clock pulse, stepping the DAC output voltage up.When the counter passes the binary value that represents the input voltage,the comparator output will switch and the counter will count down Thecounter will eventually oscillate around the value that represents the inputvoltage

The primary drawback to the tracking ADC is speed—a conversion can take

up to 256 clocks for an 8-bit output, 1024 clocks for a 10-bit value, and so on

In addition, the conversion speed varies with the input voltage If the voltage

in this example were 18v, the conversion would take only half as many clocks

as the 37v example

The maximum clock speed of a tracking ADC depends on the propagationdelay of the DAC and the comparator After every clock, the counter outputhas to propagate through the DAC and appear at the output The compara-tor then takes some amount of time to respond to the change in DAC voltage,producing a new up/down control input to the counter

Tracking ADCs are not commonly available; in looking at the parts able from Analog Devices, Maxim, and Burr-Brown (all three are manufac-turers of ADC components), not one tracking ADC is shown This only makessense: a successive approximation ADC with the same number of bits is faster.However, there is one case where a tracking ADC can be useful If the inputsignal changes slowly with respect to the sampling clock, a tracking ADC mayproduce an output in fewer clocks than a successive approximation ADC Isaw a design once that implemented a tracking ADC in discrete hardware inexactly this situation

avail-Flash ADC

The flash ADC is the fastest type available A flash ADC has one comparatorper voltage step A 4-bit ADC will have 16 comparators, an 8-bit ADC will have

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Digital-to-Analog Conver

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256 comparators One input of all the comparators is connected to the input

to be measured

The other input of each comparator is connected to one point in a string

of resistors As you move up the resistor string, each comparator trips at ahigher voltage All of the comparator outputs connect to a block of logic thatdetermines the output based on which comparators are low and which arehigh

The conversion speed of the flash ADC is the sum of the comparator delaysand the logic delay (the logic delay is usually negligible) Flash ADCs are veryfast, but take enormous amounts of IC real estate to implement Because ofthe number of comparators required, they tend to be power hogs, drawingsignificant current A 10-bit flash ADC IC may use half an amp

Successive Approximation Converter

The successive approximation converter is similar to the tracking ADC in that

a DAC/counter drives one side of a comparator while the input drives theother The difference is that the successive approximation register performs

a binary search instead of just counting up or down by one

As shown in Figure 2.3, say we start with an input of 3v, using a 5v ence The successive approximation register would perform the conversionlike this:

refer-Set MSB of SAR, DAC voltage = 2.5v

Comparator output high, so leave MSB set

Result = 1000 0000

Set bit 6 of SAR, DAC voltage = 3.75v (2.5 + 1.25)

Comparator output low, reset bit 6

Result = 1000 0000

Set bit 5 of SAR, DAC voltage = 3.125v (2.5 + 625)

Comparator output low, reset bit 5

Result = 1000 0000

Set bit 4 of SAR, DAC voltage = 2.8125v (2.5 + 3125)

Comparator output high, leave bit 4 set

Result = 1001 0000

Set bit 3 of SAR, DAC voltage = 2.968v (2.8125 + 15625)

Comparator output high, leave bit 3 set

Result = 1001 1000

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Set bit 2 of SAR, DAC voltage = 3.04v (2.968 + 078125)

Comparator output low, reset bit 2

Result = 1001 1000

Set bit 1 of SAR, DAC voltage = 3.007v (2.8125 + 039)

Comparator output low, reset bit 1

Result = 1001 1000

Set bit 0 of SAR, DAC voltage = 2.988v (2.8125 + 0195)

Comparator output high, leave bit 0 set

Dual-Slope (Integrating) ADC

A dual-slope converter (Figure 2.4) uses an integrator followed by a parator, followed by counting logic The integrator input is first switched tothe input signal, and the integrator output charges toward the input voltage.After a specified number of clock cycles, the integrator input is switched to

com-a reference voltcom-age (VREF1 in Figure 2.4) com-and the integrcom-ator chcom-arges downtoward this value

When the switch occurs to VREF1, a counter is started, and it counts usingthe same clock that determined the original integration time When the inte-grator output falls past a second reference voltage (VREF2 in Figure 2.4), thecomparator output goes high, the counter stops, and the count represents theanalog input voltage

Higher input voltages will allow the integrator to charge to a higher voltageduring the input time, taking longer to charge down to VREF2, and resulting

in a higher count at the output Lower input voltages result in a lower grator output and a smaller count

inte-A simpler integrating converter, the single-slope, runs the counter whilecharging up and stops counting when a reference voltage is reached (instead

of charging for a specific time) However, the single-slope converter is affected

by clock accuracy The dual-slope design eliminates clock accuracy problems,

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since the same clock is used for charging and incrementing the counter Notethat clock jitter or drift within a single conversion will affect accuracy.The dual-slope converter takes a relatively long time to perform a conver-sion, but the inherent filtering action of the integrator eliminates noise.

Sigma-Delta

Before describing the sigma-delta converter, we need to look at how

oversam-pling works, since it is key to understanding the sigma-delta architecture.

Figure 2.5 shows a noisy 3v signal, with 2v peak-to-peak of noise As shown inthe figure, we can sample this signal at regular intervals Four samples areshown in the figure; by averaging these we can filter out the noise:

Obviously this example is a little contrived, but it illustrates the point If oursystem can sample the signal four times faster than data is actually needed,

we can average four samples If we can sample ten times faster, we can averageten samples for an even better result The more samples we can average, thecloser we get to the actual input value The catch, of course, is that we have

to run the ADC faster than we actually need the data, and have software to

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Figure 2.6 shows how a sigma-delta converter works The input signal passesthrough one side of a differential amp, through a low-pass filter (integrator),and on to a comparator The output of the comparator drives a digital filterand a 1-bit DAC The DAC output can switch between +V and -V In theexample shown in Figure 2.6, +V is 5v, and -V is -.5V.

The output of the DAC drives the other side of the differential amp, so theoutput of the differential amp is the difference between the input voltage andthe DAC output In the example shown, the input is 3v, so the output of thedifferential amp is either 8v (when the DAC output is -.5v) or -.2v (whenthe DAC output is 5v)

The output of the low-pass filter drives one side of the comparator, and theother side of the comparator is grounded So any time the filter output isabove ground, the comparator output will be high, and any time the filteroutput is below ground, the comparator output will be low The thing toremember is that the circuit tries to keep the filter output at 0v

As shown in Figure 2.6, the duty cycle of the DAC output represents theinput level; with an input of 3v (80% of the -.5 to 5v range), the DAC outputhas a duty cycle of 80% The digital filter converts this signal to a binary digitalvalue

Figure 2.5

Oversampling.

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The input range of the sigma-delta converter is the plus-and-minus DACvoltage The example in Figure 2.6 uses 5 and -.5v for the DAC, so the inputrange is -.5v to 5v, or 1v total For ±1v DAC outputs, the range would be ±1v,

or 2v total

The primary advantage of the sigma-delta converter is high resolution.Since the duty cycle feedback can be adjusted with a resolution of one clock, the resolution is limited only by the clock rate Faster clock = higherresolution

All of the other types of ADCs use some type of resistor ladder or string

In the flash ADC the resistor string provides a reference for each tor On the tracking and successive approximation ADCs, the ladder is part

compara-Figure 2.6

Sigma-delta ADC.

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of the DAC in the feedback path The problem with the resistor ladder is thatthe accuracy of the resistors directly affects the accuracy of the conversionresult Although modern ADCs use very precise, laser-trimmed resistor networks (or sometimes capacitor networks), there are still some inaccuracies

in the resistor ladders The sigma-delta converter does not have a resistorladder; the DAC in the feedback path is a single-bit DAC, with the outputswinging between the two reference endpoints This provides a more accu-rate result

The primary disadvantage of the sigma-delta converter is speed Becausethe converter works by oversampling the input, the conversion takes manyclocks For a given clock rate, the sigma-delta converter is slower than otherconverter types Or, to put it another way, for a given conversion rate, thesigma-delta converter requires a faster clock

Another disadvantage of the sigma-delta converter is the complexity of thedigital filter that converts the duty cycle information to a digital output word.The sigma-delta converter has become more commonly available with theability to add a digital filter or DSP to the IC die

Half-Flash

Figure 2.7 shows a block diagram of a half-flash converter This exampleimplements an 8-bit ADC with 32 comparators, instead of 256 The half-flashconverter has a 4-bit (16 comparators) flash converter to generate the MSB

of the result The output of this flash converter then drives a 4-bit DAC togenerate the voltage represented by the 4-bit result The output of the DAC

is subtracted from the input signal, leaving a remainder that is converted byanother 4-bit flash to produce the LS 4 bits of the result

Figure 2.7

Half-flash converter.

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If the converter shown in Figure 2.7 were a 0–5v converter, converting a3.1v input, then the conversion would look like this:

Upper flash converter output = 9

Subtracter output = 3.1v - 2.8125v = 2875v

Half-flash converters can also use three stages instead of two; a 12-bit converter might have three stages of 4 bits each The result of the MS 4 bitswould be subtracted from the input voltage and applied to the middle 4-bitstate The result of the middle stage would be subtracted from its input andapplied to the least significant 4-bit stage A half-flash converter is slower than

an equivalent flash converter, but uses fewer comparators, so it draws lesscurrent

ADC Comparison

Figure 2.8 shows the range of resolutions available for integrating, sigma-delta,successive approximation, and flash converters The maximum conversionspeed for each type is shown as well As you can see, the speed of availablesigma-delta ADCs reaches into the range of the SAR ADCs, but is not as fast

as even the slowest flash ADCs What these charts do not show is tradeoffsbetween speed and accuracy For instance, while you can get SAR ADCs thatrange from 8 to 16 bits, you won’t find the 16-bit version to be the fastest in

a given family of parts The fastest flash ADC won’t be the 12-bit part, it will

Sample and Hold

ADC operation is straightforward when a DC signal is being converted What happens when the signal is changing? Figure 2.9 shows a successive-

Final result = 9E hex 158 decimal( ), ( )

Lower flash converter output = E hex( )

DAC output=2 8125 9 v( ¥16¥19 53 mv)

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Figure 2.8

ADC comparison.

Figure 2.9

ADC inaccuracy caused by a changing input.

approximation ADC attempting to convert a changing input When the ADCstarts the conversion, the input voltage is 2.3v This should result in an outputcode of 117 (decimal) or 75 (hex) The SAR register sets the MSB, makingthe internal DAC voltage 2.5v Since the signal is below 2.5v, the SAR resetsbit 7 and sets bit 6 on the next clock The ADC “chases” the input signal,

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