A practical guide to RF and mixed signal printed circuit board layout

Layer 2 And Layer 3 UsageChoosing Between Single And Dual Stripline Useful RF And Mixed Technology Stackups 4 Layer RF Only Design Stackup 6 Layer RF Only Design Stackup 8 Layer XYZ Mixe

So What’s The Difference Between Analog And Digital?

Do We Still Use Analog?

What’s The Frequency?

When Does Analog Become RF?

Noise / Coupling / EMI / Shielding

Clean Power Delivery

A Few things Before Starting The Design

The Schematic And Mechanical Drawings

The Circuit Blocks

Slots And Splits In Power And Ground Planes

High speed return current

Layer 2 And Layer 3 Usage

Choosing Between Single And Dual Stripline

Useful RF And Mixed Technology Stackups

4 Layer RF Only Design Stackup

6 Layer RF Only Design Stackup

8 Layer XYZ Mixed RF - Digital Design Stackup – Low Density Digital

10 Layer Mixed RF - Digital Design Stackup – Low To Medium Density Digital

12 Layer Mixed RF - Digital Design Stackup – Medium To High Density Digital

14 Layer Mixed RF - Digital Design Stackup – High Density Digital

16 Layer Mixed RF - Digital Design Stackup – High Density Digital

It’s A Material World

On The Right Wavelength ?

Processes And Cost

A Place For Everything

The Long And The Short Of It

Power Delivery, Decoupling and Bypassing

Do Not Route Signals Over Splits In Reference Planes

No Vias In RF Or High Speed Digital Signal Paths

No Stubs Allowed In Signal Path Routing

Traces, Shapes And Modified Footprints

Corners In RF Traces

T-Junctions And Power Dividers In RF Traces

Matching Transmission Line Width To Pad GeometriesGround: Copper Floods, Vias and Shielding

Flooding Unused Areas With GroundAdding Ground Vias

Ground Shielding Vias

Ground Stitching Vias

Ground Transition Vias

EMI Shielding Vias

Shielding

Summary

Conclusion

Table of Figures

Figure 1 Cross Section Of Current Flow At low And High Frequencies Showing Skin Effect.Figure 2 Voltage Reflection Where Load Impedance Is Higher Than Line Impedance

Figure 3 Voltage Reflection Where Load Impedance Is Lower Than Line Impedance

Figure 4 Power Implemented As A Wide Trace

Figure 5 Power Implemented As A Local Plane - Potential Patch Antenna

Figure 6 Example Of When An Impedance Mismatch Becomes An Issue - @ f = 5GHz

Figure 7 Floorplan View Of X/Y Axis RF And Digital Zone Isolation

Figure 8 Cross Section View X/Y Axis Only RF And Digital Zone Isolation

Figure 9 Z Axis Isolation Of RF And Digital Circuitry

Figure 10 Floorplan View X/Y And Z Axis RF And Digital Zone Isolation

Figure 11 Cross Section View X/Y And Z Axis RF And Digital Zone Isolation

Figure 12 Layer 3 As Reference Ground For Microstrip Allows Wider Transmission Line.Figure 13 Difference Between Past And Present Typical Digital Routing

Figure 14 Typical 4 Layer RF Only Stackup Cross Section

Figure 15 Typical 6 Layer RF Only Stackup Cross Section

Figure 16 Typical 8 Layer Mixed RF/Digital Stackup Cross Section

Figure 17 Typical 10 Layer Mixed RF/Digital Stackup Cross Section

Figure 18 Typical 12 Layer Mixed RF/Digital Stackup Cross Section

Figure 19 Typical 14 Layer Mixed RF/Digital Stackup Cross Section

Figure 20 Typical 16 Layer Mixed RF/Digital Stackup Cross Section

Figure 21 Differences In Fiber Density With Different Weave Styles

Figure 22 Advantages And Examples Of Via In Pad Technology

Figure 23 Resistive Model Of A DC Or Low Speed Transmission Line

Figure 24 Complete Model Of A High Speed Transmission Line Showing Parasitic Elements.Figure 25 Microstrip Transmission Line Construction

Figure 26 Embedded Microstrip Transmission Line Construction

Figure 27 Stripline Transmission Line Construction

Figure 28 Coplanar Waveguide Transmission Line Construction.

Figure 29 Example Of Keeping Input And Output Of A Circuit Block Well Distanced

Figure 30 Amplifier And Filter With Overlapping Loop Areas

Figure 31 Modified Amplifier Bypassing To Reduce Loop Area

Figure 32 Floorplan Of Typical RF Modem Design With Baseband Processing And Power

Supplies

Figure 33 Noise Transients Can Travel Anywhere On The Board

Figure 34 Well Selected And Placed Decoupling Capacitors Can Keep Power Planes Much

Cleaner

Figure 35 Bypass Capacitors On Analog Device Can Remove Noise Already Existing On PowerConnections

Figure 36 Bypass Network Frequency Response With All Low ESR Capacitors

Figure 37 Bypass Network Frequency Response May Improve If One Or More Capacitors HaveHigher ESR

Figure 38 General Placement Of Discrete Parts Around Large Integrated Devices

Figure 39 Placement And Via Usage For BGA Bypassing

Figure 40 Placement And Connections For Bypassing QFP With Thermal Pad

Figure 41 Placement And Connections For Bypassing QFP Without Thermal Pad

Figure 42 Connections To Power Plane For Decoupling Capacitors Around High Density DigitalDevices

Figure 43 Connections To Plane With Bypass Capacitors ‘On The Way’ For An Analog Amplifier.Figure 44 Slot In Ground Plane Causes Long Ground Return Path

Figure 45 Example Placement With Resulting Return Paths And Loop Areas

Figure 46 Adding A Ground Plane Split To Restrict Ground Current Paths

Figure 47 Stub Caused By A Through Via Being Accessed On An Internal Layer

Figure 48 Back-drill Eliminates Most Of The Stub, Blind Via Or Microvia Eliminates The Stub.Figure 49 Routing The Same Connection With And Without Stubs

Figure 50 Improved Placement And Via-In-Pad Technology Can Easily Remove Stubs In RF Design.Figure 51 Offset Pad Origin Can Resolve DRC Errors On Small Components

Figure 52 Footprint Based Rule Area Can Resolve DRC Errors On Small Components

Figure 53 Tapered Transitions To Transmission Line Width Can Be Built Into The Footprints

Figure 54 The 90 Degree Corner - Worst Case Method And Best Case Method.

Figure 55 Different Ways To Implement 90 Degree Bends in RF Transmission Lines.Figure 56 Impedance Mismatch Area With Simple T-Junction

Figure 57 T-Junction Impedance Mismatch And Commonly Used Compensations Figure 58 Transmission Line Geometry Does Not Match Component Pad Geometry.Figure 59 Removing Planes Copper Beneath Large Component Pads

Figure 60 Stepped And Tapered Matching Of Transmission Line To Pad Geometry.Figure 61 Ground Stitching Along RF Signal Paths - Maintain 3H Spacing To Traces.Figure 62 Ground Stitching Along RF Traces And Under Perimeter Shield Walls.Figure 63 Ground Stitching Vias Added Where Space Permits Around The Design.Figure 64 Effect On Ground Return Current If There Are No Ground Vias NearbyFigure 65 Ground Vias And Antipad At Differential Pair Layer Transition

Figure 66 Some Typical Perimeter EMI Shielding Via Patterns

Figure 67 An Example Of Standard Off The Shelf Shielding Products

Figure 68 Photo Etched Shielding Can Be Custom Shaped And More Complex

Figure 69 Some Examples Of Custom Milled RF Enclosures

List Of Tables

Table 1 Common Circuit Board Materials Of Different Compositions With Loss And DielectricConstant

Table 2 Suggested Layer Usage For Typical 4 Layer RF Only Stackup

Table 3 Suggested Layer Usage For Typical 6 Layer RF Only Stackup

Table 4 Suggested Layer Usage For Typical 8 Layer Mixed Technology Stackup

Table 5 Suggested Layer Usage For Typical 10 Layer Mixed Technology Stackup

Table 6 Suggested Layer Usage For Typical 12 Layer Mixed Technology Stackup

Table 7 Suggested Layer Usage For Typical 14 Layer Mixed Technology Stackup

Table 8 Suggested Layer Usage For Typical 16 Layer Mixed Technology Stackup

Table 9 Difference In Signal Wavelength In Air And In Different Circuit Board Environments.Table 10 Typical SMD Bypass Capacitors And Their Useful Frequency Ranges

The author would like to express thanks and appreciation to the following people, without whom itwould not have been possible to put this guideline together

Nick Barbin President - Optimum Design Associates For providing the idea, encouragement,

patience, and the time to compile and present the guideline This guideline took many hours to

produce and would not have been possible if the time was not proved to do so

Scott Nance Senior Designer - Optimum Design Associates For his invaluable assistance in so manyways Scott spent many hours reading word by word, providing extremely useful content, corrections,feedback and suggestions for improvement Scott has also presented this guideline in slide

show/discussion form at trade shows and at specific customer sites

Rick Hartley Industry recognized consultant on the topic of High Speed and Mixed Technology

Design Rick was kind enough to volunteer his time to read the guideline completely and providedmuch extremely useful feedback and some very critical and needed corrections to the content

Robert Frank Marketing Manager - Optimum Design Associates For many hours of proof-reading,grammar correction and for getting this book published

Optimum Design Associates Designers The entire design group at Optimum Design Associates

These include Randy Holt, Scott Nance, Juliet Wang, Tom Stout, Mark Gutierrez, Frank Jacobson,Brian Noble, Rick Dachauer All of these designers have contributed over the years by way of beingpart of a collaborative team of senior designers We all have both common and specific skills andlearn from each other

process is started Some formulae and theory are presented however, not for the day to day designprocess but more as an aid to understanding some of the things layout designers need to consider morefor mixed technology design than would be the case in a purely digital design One of the main aims

of this guideline is to use plain words wherever possible to present information that is normally

presented with a lot of formulae, numbers and theory and which is, quite frankly, lost on most layoutdesigners What the layout designer needs is information on what to do at the circuit board level whendesigning the physical layout, not the engineering circuit The circuit board layout process is the lastreal design phase in the product development cycle, and it is certainly the phase that is normally

placed under the most pressure in terms of time to complete, because everything that comes before italways takes longer than the time budgeted As a result, the layout designer needs to be as efficient aspossible and make use of proven methods and techniques to complete the task in as timely a manner

as possible while still being technically correct The issues faced when designing circuit boards for

RF and mixed technology applications that are not usually considered so critically in designs for onlydigital applications will be described Techniques and methods will be presented that have been usedconsistently over many years of designing circuit boards for all types of applications, many of whichwere for radar systems, RF modems and satellite payload systems

Some of these methods and techniques may be considered technically unnecessary or may well

conflict with what some designers currently do or are advised to do by their peers, but everythingpresented in this guideline has been used very successfully over a long period of time designing

mixed technology circuit boards There is no ‘one size fits all’ solution to the challenge of mixedtechnology design There are many different views and approaches to the problem Electrical

engineers, layout designers, actual designs, constraints and CAD tools each differ greatly and yet weare still able to produce designs that work well despite all these variations, so there are clearly manymethods that do work well Although this guideline is much more for layout designers rather than theelectrical engineers, there is also much useful information for electrical engineers which will helpthem to understand some of the real world design, fabrication and assembly issues that layout

designers face in the process of producing the layout and that they themselves would rarely consider

So What’s The Difference Between Analog And

Digital?

Understanding the main differences between these two design types is a key part of understandingwhy some things the layout designer does will have a more significant effect in one design type versusthe other In truth, the more challenging design is still the analog one, because the big difference is that

in analog design some things need to be considered a lot more carefully than they would be whendoing a purely digital design A layout designer still needs to consider the same things in digital

design, but often to a significantly lesser degree because digital designs can be reasonably tolerant tomany of these issues Having said that, as operating frequencies increase and logic voltage levelsdecrease in digital circuits, layout designers are finding that issues traditionally more important inanalog circuits are becoming just as important in digital circuit layouts The differences betweendigital and analog domains are, with respect to circuit board layout, becoming less and less obvious

Information Integrity.

Just as in a digital design, the critical issue in an analog design can be thought of as being ‘information integrity’ In a digital design the information is being conveyed by means of ‘ones and zeros’, the circuits generate and respond to discrete voltage levels representing a binary 1 or 0 Typically a high voltage represents a 1, and a low or zero voltage represents a 0 There is usually no information conveyed by voltage levels other than those In an analog design, information is conveyed, in different ways, by voltage levels continuously variable from microvolts to tens or even hundreds of volts Similarly, the frequency in a digital system, with few exceptions, simply controls how fast the data is conveyed or processed, while in an analog system the frequency of a signal often IS the information content of the signal The phase of an analog signal and its relationship to the phase of another signal is often the information content of an analog system as well.

Amplitude, frequency and phase are also extremely important in a digital design, but digital systemsare usually more tolerant to some degradation in all of these, some to a lesser extent than others

However, in an analog system, there can be very little tolerance to degradation in any of these

parameters because they ARE the information being processed

Placement and routing of RF circuits is far more critical than with digital circuits Placement is

critical because inputs and outputs need to be physically separated, discrete component placement(especially inductive components) is very critical and the circuit needs to ‘flow’ in a sensible

manner The main criterion for digital circuit placement is usually easiest routing before anythingelse Even though there are far fewer signals involved, routing is also more critical in RF designsbecause the copper connections, while performing the normal connectivity function of a trace, arealso now functional circuit elements in their own right Traces and component pads have resistive,capacitive and inductive properties At extremely high frequencies these trace and pad propertiescontribute significantly to the overall circuit behavior All metal on an RF circuit board should beconsidered RF-functional

Do We Still Use Analog?

While we may be living in the digital age, analog circuits are still prevalent, and we use them everyday Equipment with significant analog circuit content includes things like cell phones, audio

amplifiers, instrumentation amplifiers, radio receivers, data acquisition and measurement circuits,medical imaging, monitoring and treatment equipment, power supplies and, of course, RF and

microwave circuits used in satellite and radar systems Most equipment using analog circuits todayalso includes some digital circuitry For example, an audio amplifier/receiver contains a lot of

sensitive and critical analog circuitry for audio processing, both at extremely low levels at the inputsand very high levels at the outputs It also contains increasing amounts of digital circuitry for suchfunctions as digital tuning, volume and tone controls, analog to digital conversion and processing toadd predefined effects to the sounds and then conversion back to analog for output to the speakers.There is also storage and retrieval of the analog data on digital media because it is far more reliable,portable, lower cost and much faster than analog storage media like disc records and tapes

What’s The Frequency?

With analog and RF systems, signals tend to consist of a single or small number of fundamental

frequencies There are usually multiple signals of interest, but it is a smaller number of differentfrequencies or a specific range of frequencies that the layout designer is concerned with All otherfrequencies present would be considered as noise or interference signals which need to be controlled

or filtered out so that only the frequencies of interest are processed as effectively as possible Therewill, of course, be some harmonics of these intended frequencies present but typical RF designs

utilize many filters in the signal path to ensure that only signals of the frequencies of interest are

passed to or from circuit blocks In digital designs, signals are what we call square waves A squarewave is actually the sum of a sine wave of the same (fundamental) frequency, plus all the odd

harmonics of that frequency at diminishing amplitudes A faster rise time of a digital signal indicatesthat there are more high frequency harmonics present So in any digital system you will have signalspresent of much higher frequency that you might think Hence the term ‘it’s not the frequency thatmatters, it’s the edge rate’, because a faster edge rate (rise time) indicates the presence of much

higher frequency content than the actual ‘clock frequency’ Many layout designers simply look at theclock frequency and think that this is the frequency that they are ‘designing for’ when, in reality, thereare much higher frequencies present that should be considered

When Does Analog Become RF?

Traditionally, analog circuits were low frequency systems for supply of power and for voice andaudio signal processing, because that’s what we developed electronics for first – the telephone forexample RF circuits were developed for long distance real time communication, where we couldnow transmit our voices over long distance through Radio Frequency waves rather than having tohave a solid wire between two or more points These systems produced, transmitted and receivedradio frequency signals ranging from hundreds of KHz to hundreds of MHz

It has become normal to think of RF as being in the 3 MHz – 300 MHz range Analog circuits

operating in the 300 MHz – 300 GHz range were traditionally referred to as microwave circuits.There are many opinions on when an RF signal becomes microwave, with above 300 MHz is thegenerally accepted point Between 30 GHz and 300 GHz is often referred to as Millimeter Wavebecause the wavelength in this band ranges from 10mm to 1mm, but generally microwave refers toeverything above 300 MHz

Given these frequency ranges, it is clear that most digital circuits today are operating well into whatare traditionally known as the RF and microwave frequency ranges In this guideline we do not focus

on the difference between frequency ranges, but more on what a layout designer can do to help thesefundamentally different circuit types operate in harmony together on a single circuit board and at awide range of frequencies

Converging Domains

Much of what is presented in this guideline will use terms most layout designers have already heard

in reference to digital designs Impedance matching, transmission lines, return loss, coupling, noiseand interference, crosstalk, delay tuning, signal integrity etc are all terms layout designers have

become familiar with over the last decades That is because these are predominantly high frequencyrelated terms describing phenomena that layout designers need to be aware of, and are becomingmore prevalent because digital designs are operating at higher and higher frequencies all the time.Well, it is not new terminology by any means These are things that have been the concern of RF andanalog electrical engineers and layout designers for the last 50 years or more In the early days ofdigital systems, voltage levels were 5 Volts, 10 Volts or even higher Frequencies were in the

hundreds of KHz and very low MHz ranges with much longer rise times than is the case today Atthese low frequencies, and with these voltage levels (the voltage levels required to cause a changefrom a 0 to a 1 were in the order of 3 volts or more) there was an inherent immunity to noise virtuallybuilt in There was much less noise to consider anyway, because such slow circuits did not causemuch significant radiation Today, some digital circuits are operating at sub 1 Volt levels, with thelogic thresholds diving into the hundreds of millivolts range, and with frequencies into the GHz

ranges with sub-nanosecond edge rates, so the high frequency content and EMI radiation are muchincreased Today’s high speed digital designs really do need to be treated as low level high

frequency analog designs

Analog / RF Issues To Consider

selection issues are potentially detrimental to the functioning of the circuit Some losses are

unavoidable, there is no such thing as a perfect signal environment There are losses inherent in thecircuit board materials and there are losses as a result of design parameters and techniques

Dielectric Loss

Dielectric loss, specified as dissipation factor (Df) on a vendor’s datasheet, (which will never bezero), is inherent in the laminate and prepreg materials used to fabricate the board It is the loss ofenergy that goes to heating a dielectric material in a changing electromagnetic field and, in circuitboard laminates, is a function of the materials’ molecular structure and resin type and content Thereare a very wide range of materials available, some of which exhibit dielectric loss orders of

magnitude lower than others Dielectric loss is proportional to frequency, and is therefore morecritical to consider with higher frequency lower power designs

The following table lists some commonly used printed circuit materials and their correspondingdielectric loss values

Hydrocarbon/Ceramic/Woven

UltraLowLossNELCO

PerformanceARLON

4-CLTE XT PTFE/Ceramic/Woven Glass 0.0012 2.94 230

PerformanceTACONIC

Table 1 Common Circuit Board Materials Of Different Compositions With Loss And Dielectric Constant.

Formulae and equations can be found that will translate this information into dB loss values at

particular frequencies That level of detail is not presented here because, as a layout designer, themain concern is, “What am I contributing to loss?” Dielectric loss is beyond the control of a layoutdesigner unless the layout designer is also entirely responsible for material selection Lower lossmaterials are more expensive, so, in many cases, they are not even a consideration The layout

designer needs to be aware of the phenomena and which materials are better for a particular design,

in order to make valid recommendations regarding material selection

In an analog design, when a signal is injected into a transmission line, the frequency of the propagatedwave will be unchanged, but the amplitude will be decreased due to dielectric loss The amount ofloss will be dependent on the length of the transmission line, and the frequency of the signal (becausedielectric loss is proportional to frequency) This is one of the reasons we always strive to keep

higher frequency connections as short as possible Extremely low level analog circuits, such as

instrumentation amplifiers or low power receiver front ends, require consideration of dielectric lossbecause of the intolerance of these circuits to amplitude loss

Digital signals are square waves, which consist of the fundamental frequency plus an infinite number

of embedded sine waves at odd harmonics (odd multiples of the fundamental frequency) and at

diminishing amplitudes Digital signals generally have very strong amplitude at the fundamental andlower harmonic frequencies up to an approximate frequency as determined by the equation:

where f = frequency in GHz and T r = Signal Rise Time in nanoseconds.

Digital signals contain a bandwidth of frequencies, from the fundamental frequency to the frequencydetermined by the above equation, which are particularly affected by dielectric loss Most digitalcircuits will operate quite well on the ‘standard’, higher loss materials, but material selection must beconsidered when digital circuits are operating above 3 - 5 GHz Evolving device technologies alsomeans that edge rates are becoming faster, therefore overall frequency content is increasing, even ifthe ‘clock frequency’ is kept the same, so it may well be that using a low loss material becomes anecessary consideration for a design where it may not have normally been considered

Smooth surface is better.

Copper surface roughness contributes to increased loss due to skin effect because the overall resistance of the path is a function of the path length At higher frequencies, the skin effect causes the current to flow in a much thinner region of the trace, at or near the surface The rougher the surface is, the longer and therefore more resistive will be the signal path.

The approximate skin depth of copper is:

It is also known that there will be considerably more current flow in the surface closest to the

reference plane So, when designing the stackup, try to make the reference plane the layer above thetrace rather than the layer below the trace This will concentrate the current in the top of the trace,which is smoother and therefore shorter The surface of the copper bonded to the laminate can beextremely rough, and this makes the signal path a lot longer Use of rolled copper laminates wouldalso help to mitigate the loss due to skin effect, because the bonded edge of the copper is smoother.Many laminate manufacturers are now also offering materials with very much smoother surfaces at thejunction between the copper and the base material in an effort to mitigate the skin affect as much aspossible Because material selection is often driven by the RF electrical engineer, or by cost factors,

it is something the layout designer does not always control However, understanding the differentmaterials and when to utilize them can allow the layout designer to make valuable recommendations

Figure 1 Cross Section Of Current Flow At low And High Frequencies Showing Skin Effect.

Return Loss Or VSWR

A full discussion of return loss and Voltage Standing Wave Ratio (VSWR) would easily be the

subject of an entire book by itself A detailed examination would involve a large amount of very

complex mathematics to explain what becomes quite a dynamic issue, when changing signal

frequencies and amplitudes, along with transmission line characteristics, variable source and loadimpedances and skin effect are all combined Such a discussion is beyond the scope of this guideline,and is actually more in the engineering domain than in the circuit board design domain Usually themost significant contributor to loss in an RF design is return loss This is the loss caused by mismatchbetween the output impedance of a driving source, the characteristic impedance of the connectingtransmission line, and the input impedance of the receiving load This discussion assumes a voltagesource with a purely resistive output impedance providing a single frequency sine wave into a purelyresistive line and load There are a limited number of things that a layout designer can do to eithercause or help resolve return loss and VSWR issues

Impedance is a frequency dependent quantity This means the characteristic impedance of the

transmission line and the source and load impedances will vary with frequency When a signal travelsalong a transmission line and then arrives at the load, if there is a mismatch between the characteristicimpedance of the transmission line and the impedance of the load, then a portion of the signal will bereflected back along the transmission line towards the source The polarity and magnitude of the

reflected signal depends on whether the load impedance is higher or lower than the line impedance:(assume that the source and line impedances are perfectly matched.)

If the load impedance exactly matches the line impedance then there is maximum power transfer to theload and there is zero reflection (Ideal situation that virtually never happens)

If the load is an open circuit, there will be a voltage reflection of equal amplitude from the open

circuit end of the line reflected back towards the source, and this voltage will be in phase with theincident wave This reflected voltage will add to the incident wave originally propagated on the line,effectively doubling the voltage on the line When the reflected voltage reaches the source it will beabsorbed by the source impedance and the whole line will settle at the source voltage

If the load is a short circuit there will be a voltage reflection of equal amplitude from the short circuitend of the line reflected back towards the source, and this voltage will be opposite phase to the

incident wave This reflected voltage will subtract from the incident wave originally propagated onthe line and, when the reflected wave reaches the source, the voltage at the output of the source will

be zero (and the source generator device will likely be broken!)

If the load impedance is higher than the line impedance then there will be a voltage reflection backtowards the source which will be in phase with the incident wave and the amplitude of the reflection

will be a function of the ratio of the line impedance to the load impedance Because the reflectedwave is in phase with the incident wave it will add to the incident wave originally propagated on theline When the reflected voltage reaches the source, it will be absorbed by the source impedance.

Figure 2 Voltage Reflection Where Load Impedance Is Higher Than Line Impedance.

If the load impedance is lower than the line impedance then there will be a voltage reflection backtowards the source which will be opposite phase to the original source signal and the amplitude ofthe reflection will be a function of the ratio of the line impedance to the load impedance Thisreflected voltage will subtract from the incident wave originally propagated on the line

Figure 3 Voltage Reflection Where Load Impedance Is Lower Than Line Impedance.

The amplitude of the reflected wave relative to the incident wave is known as the Reflection

Where = load impedance and = transmission line characteristic impedance.

Now, assume a transmission line with non-matched load impedance is being driven with a continuoussingle frequency sine wave and the line is of such length that the signal takes many full cycles to reachthe end of the line:

Since any transmission line has an associated propagation delay, the phase of the reflected wave withrespect to the incident wave is continually changing The total amount of initial phase change relative

to the incident wave will be dependent on the length of the transmission line and the frequency of thewave Because of this, there will be some points along the line where the incident wave and the

reflected wave will be exactly in phase and the amplitude of the two waves will add There will also

be points where the two waves are exactly 180 degrees out of phase, at which point the reflected

wave will subtract from the incident wave The points where the incident and reflected waves are inphase and opposite phase are the points where maximum and minimum amplitude will appear on theline The maximum and minimum amplitude points will alternate along the line If the frequency staysconstant, then this condition will become stable and the combined wave, the incident wave plus thereflected wave, will appear to be stationary on the line This is known as a Standing Wave.

Of course, in the real world the frequency and amplitude of the incident wave and the reflected wave

is continuously changing, as is the phase relationship between them The resulting incident plus/minusreflected wave at any given point along the line is still known as the standing wave The relationshipbetween the standing wave and the incident wave is known as the Standing Wave Ratio (SWR), orcommonly the Voltage Standing Wave Ratio (VSWR), given as:

Where = reflection coefficient.

If the source impedance and the line impedance are not matched, then the reflected wave will not becompletely absorbed by the source impedance and there will be another reflection generated in theforward direction from the source towards the load This is essentially what causes ringing

There are two issues of major significance caused by high return loss

The reflections, and likely ringing, add noise to the system This degrades the quality of the originalsignals and can make it harder for the receiving device to distinguish the intended signal from thenoise This can significantly reduce system performance while at the same time increasing systemEMI issues

Reflected power does not get absorbed in the load This loss in power reduces system efficiency andperformance If the load is an antenna then the output power delivered to the antenna will be less thanintended

Where does the lost energy go.

The reflected power does not simply disappear, it has to go somewhere The energy is most often lost in the form of heat or radiated emissions Energy lost in the form of heat can cause damage to components Energy lost in the form of radiated emissions can easily cause the system to either fail completely, or fail to meet relevant emissions standards.

For RF design, return loss is likely the most significant issue a layout designer will face From thelayout designer’s perspective, the goal is to minimize or completely remove impedance mismatchesthat occur as the result of layout decisions or incorrect impedance models being used There are anumber of very significant ways you can do this, which are shown later in the guideline.

Noise / Coupling / EMI / Shielding

Analog and RF circuitry is particularly sensitive to noise and this needs to be managed by controllingcoupling and EMI as much as possible Within the RF circuit, keeping the physical loop areas of bothsignal and power circuitry as small as possible will certainly help with this Large loop areas areantennae and will radiate much more than small loop area circuits This is usually fairly easy to

control with a number of methods: giving more attention to component orientation and placement inthe signal path, carefully and deliberately dividing the analog circuit into separate functional blocks,keeping power supply bypassing as close as possible to the device, and using wider, lower

inductance traces for power connections One of the most effective ways to reduce EMI and EMCissues is by adding shields around sensitive circuits to help keep noise out, or around noisy circuits tohelp contain radiated noise emissions

With digital designs, the faster the rise time of the digital signals, the more harmonic frequencies arepresent If noise at these frequencies finds its way into analog and RF circuits on the same board, or

in the same system, then the results can be disastrous for the RF circuits Digital noise can be induced

in an analog circuit either by conductive coupling or electromagnetic coupling

Conductive coupling occurs most often by way of shared power supplies where digital noise is

present on the power rail, and then that same power is used to supply an analog circuit without thenecessary amount of filtering or isolation Digital noise can also be conductively coupled by means ofdigital signals that are used to control some of the RF devices These signals, often derived fromFPGA and other high speed digital processing devices, will often have unnecessarily fast edge rates Such signals, (Enable, Select, MUX Addresses, etc.) are for mode and configuration changes and arefairly static in nature, and the RF device does not normally need these to be fast edge rate signals It isalways good to isolate these with opto-electronics or buffers with the RF device side having as slow

a rise time as allowed by the RF device Another method of slowing the edge rate on otherwise staticsignals is to add a very high value resistor to the driver output (hundreds of Ohms up to 1k Ohm)

Electromagnetic coupling is usually in the form of radiated emissions from the high speed digitalcircuits which finds its way into the analog circuits by way of proximity This is most easily

controlled by maximizing the distance between the two circuit domains, and the use of grounded

shielding boxes around the sensitive analog circuitry

An analog circuit typically contains many stages of amplification, some of which may have high gain.Any level of noise seen on the amplifier inputs, in the operating frequency range of the amplifier, will

be amplified and will exist at much higher levels at the device output A higher level of noise like thiscan wreak havoc in the RF design, causing it to completely fail Higher levels of noise will also

radiate a lot more and that can cause EMC issues.

Layout designers need to be aware of these issues and take every possible precaution to keep the digital and RF circuits isolated from each other as much as possible, and there are many ways to achieve this goal.

Clean Power Delivery

Providing clean power to an RF circuit is extremely important because noise on the power supplies

of an amplifier, for example, may be amplified and appear at a considerably higher level at theoutput It may also cause circuits to resonate if the noise is of just the right frequency Clean powerincludes clean ground, and in analog designs this is particularly important Many analog and RFcircuits are very sensitive to the absolute voltage of a signal relative to zero, and if ground is offsetdue to noise or excessive inductance in the ground path then circuits may behave in an incorrectmanner as a result

Most designs today will have one or more main switching regulators very near the power inputconnectors, and these regulators will provide the main, board-wide input voltage to other regulatorsand usually the global digital power supply For example, the main input power may be 24 Volts usually filtered right at the input connector There may be a high current switching regulator toprovide maybe 12 Volts for distribution around the board, where it is used as the input to multipleregulators providing various voltages for use at each specific circuit Also located near the powerinput there will often be another high current switching regulator to provide the global digital voltagefor the board, typically 3.3 Volts or 5.0 Volts The outputs of both these, and possibly other globalvoltage regulators located at the power input area, need to be thoroughly filtered before thesevoltages are distributed around the board There should be a range of different value capacitors at theoutputs of these power supply circuits to remove any switching spikes caused by the regulatorsthemselves Then these clean global voltages can be safely distributed around the board to localregulators and filters

Switching regulators can easily generate a large amount of electromagnetic noise when the layout isnot done correctly, so it is important for both layout designers and electrical engineers to have a goodunderstanding of the circuit involved and where the energy resides in the circuit in order to ensurethere is minimum noise generated due to poor layout implementation The first point of reference isusually the manufacturer’s datasheet for the device Layout designers need to be careful whenapplying these manufacturer guidelines however, and not just blindly implement what is done in theexample layout from the datasheet Most component manufacturers do not have their reference designsEMI tested, and these reference designs, while they may well function as intended in isolation, may

also be the source of serious EMI issues either by themselves or when included on a circuit boardwith many other circuits of different technologies Complete understanding of the circuit and thecritical current paths allows layout designers to produce at least as good, usually better results, both

in terms of individual circuit functionality and the entire design which may be made up of manydifferent circuits operating together on the same board

It is also unlikely that the manufacturer’s recommended layout will fit in a particular design exactlythe same way it appears in the layout guideline, typically due to physical area constraints or differentcomponent selections, or both This is not usually an issue as long as the key principles and writtenrecommendations are followed Layout designers would be better served by reading and

understanding the device functional descriptions in the manufacturer’s datasheets and then applying

that knowledge, along with the understanding of where the energy in the circuit is, and referencing thesample layout in the guidelines, when implementing the printed circuit board layout Most any circuitcan be placed in a different manner and still meet all the specified guidelines

There may very well be other high current low voltage switching regulators in the design, typicallyfor FPGA and microprocessor core voltages of around 0.9 Volts – 1.2 Volts and maybe for DDRmemory at 1.2 Volts or 1.8 Volts It is best to locate these device specific switching regulators asclose to the load circuits as reasonable, making it less likely you will be carrying switching regulatornoise over larger areas of the design unnecessarily It also makes the plane areas for these voltagessmaller and therefore less resistive and less inductive The design of split planes is also simplified,because these localized individual planes use less space, leaving more usable space for other voltageplanes on the same layer(s) Care must be taken in doing this though, it is much more important tokeep these switching regulators for digital circuitry physically away from analog circuits than it is tohave them close to the digital circuit that uses them

A typical RF design will likely be broken up into separate sections, often in separate shielded

‘rooms’ within the RF area of the board It is quite common for each of these RF sub circuits to bepowered by local linear regulators Linear regulators are used for these circuits because they are a lotless noisy than switching regulators These regulators would be placed as near to the circuit they areproviding power to as possible, often on the bottom of the board right behind the circuit The input tothese local regulators may be the distributed 12 Volts generated by the main switching power supplylocated near the power input When connecting the output of this local regulator to the load circuit,even though it may be tempting to use planes, the layout designer needs to be aware that a coppershape used as a small local power plane may well act as a patch antenna, if it happens to be just the

right size and shape This small plane shape could easily resonate and cause significant EMIradiation When there is a global or reasonably large power plane this is not an issue because theplane area is too large Very small plane shapes used for a single device though, may be of a smallenough size to be an issue The presence of a large global ground plane on the adjacent layer canmake the patch antenna issue even worse, as the size of the ground plane relative to the small powershape (patch area) will considerably alter the effective resonant frequency and gain of the patchantenna When a local regulator is used to supply power to a single device in an RF circuit ‘room’, it

is usually better to use a wide, low inductance trace to route the power rather than a very small shape

on a plane layer

In reality, power planes are simply not often necessary for analog and RF designs This is becausethere is usually a pi filter, which includes several values of capacitors, which should be placed asclosely as possible to the power pins of the device This filter is designed to provide clean powerthrough a low impedance path at the frequency of operation of the circuit It is only necessary to getpower to the filter circuit and all the high frequency noise should be filtered and clean powerdelivered to the actual device The connection to the input side of the filter can be made using a plane

if the input is a global voltage, or with a trace of sufficient width to provide the necessary currentwithout introducing voltage drop or temperature rise if the supply voltage is local to only one or afew circuits The connection from the output of the filter to the device pin or pins should be a trace aswide as practicable and preferably on the same layer as the device If that cannot be achieved due todensity on the surface layers, then the power trace can be created on an internal layer and connected

to the device power pins with vias as close to the pins as possible, preferably using multiple vias tostitch to the internal layer trace Connecting power to RF circuits using surface or internal layer traces

in this manner will also have the advantage of leaving more internal plane space for Ground or evenreducing the overall number of layers in the design

Figure 4 Power Implemented As A Wide Trace.

Figure 5 Power Implemented As A Local Plane - Potential Patch Antenna.

This is quite different to the situation in a digital design where power/ground plane pairs withincreased inter-plane capacitance, along with a good distribution of multiple values of decouplingcapacitors, are required to deliver energy across the broad range of harmonic frequencies commonlyfound in digital circuits.

Individual electrical engineers, or even ‘company policy’ may dictate the use of planes for all powerconnections This is definitely not preferred in analog and RF circuits, and can even be the cause ofsome serious issues, so layout designers should discuss the issue with the relevant engineeringpersonnel and arrive at a solution best for the design

A Few things Before Starting The Design

The Schematic And Mechanical Drawings

The design process usually starts with a detailed review of the engineering schematic and themechanical specification for the board This is done so the layout designer has a good understanding

of the ‘flow’ of the design It is much easier to see this with analog and RF circuits than with digitalcircuits, because of the way the schematic is normally drawn It is usually a quite linear flow withfew connections going between schematic sheets, which tend to be the RF signals into and out of thecircuit block, Local Oscillator (LO) and Intermediate Frequency (IF) signals to mixers, and oftensome digital control signals A digital schematic usually has multiple large, high pin count symbols onthe same sheet with often hundreds of connections going into and out of the sheet, making a circuitflow very difficult to see The mechanical drawing and constraints are vital to seeing the flow of thedesign before a single part is placed You need to know where the signals are coming into and out ofthe board, where all the input and output connectors, the main power input connectors and anyswitches and indicators need to be These will all have a significant effect on your placementstrategy Is there a combination of switching regulators and linear regulators in the design? If so,place the main switching regulator near the power connector, keeping the input power to the board asshort as possible In most systems the mechanical design is quite sensible and proximity of input andoutput connectors has been carefully considered For example, the main RF signal input which isusually from an antenna is not likely to be placed near the main power input This RF input signal isextremely low voltage and is very sensitive to any noise Placing the main power input filters, or ahigher level RF output driver, anywhere near this sensitive input circuit would create somesignificant isolation problems for layout

The Circuit Blocks

The next step, and a very important one, is to group all the parts based on schematic circuit blocks.This is done on all design types, but for RF designs it can be even more useful Some of the parts in

an RF circuit can be very large, devices such as filters, splitters, mixers etc can often be inches insize The RF part of the design is very likely going to be broken into multiple smaller circuit blockswith each one placed in an isolated room with shield walls around them, so the layout designer needs

to see just what components are in each circuit block to have a good appreciation of how much spacethat block is going to require

Using blocks to visualize circuit flow.

Remember, any given block will need to take input from and provide output to other associated blocks so it is important to be able to visualize this signal flow as clearly as possible before starting the component placement.

During this stage the layout designer should also be doing a mental review of the schematic Forexample, one useful technique is to color unconnected pins and nets in the CAD tool white, becausethis makes it very obvious when some errors or omissions exist in the schematic If there is a largewhite copper area under one of the RF filter parts, or the large thermal pad of a QFP device, or one

of the pins of a resistor, capacitor, inductor or diode for example, then it is immediately obvious thatthis is a schematic omission which should reported back to the electrical engineer

By the time this pre-layout review process is completed, the layout designer should have a good idea

of what the completed design will look like, now it is simply a process of placing the parts and routeswhere it is already pretty much known they will be