EDCS 8210 INSTRUCTION MANUAL v1 10 130313

DC power：220V or 110V（please indicate when ordering） AC voltage：100 / 3V（Rated phase voltage Un）； AC current：5A or 1A（Rated phase current In，please indicate when ordering）； Rated frequen

EDCS-8000 SERIES OF POWER SYSTEM INTEGRATED AUTOMATIC-EQUIPMENT

EDCS-8210 High-voltage Transmission

Line Protect Equipment

INSTRUCTION MANUAL

V1.10

Chongqing New Century Electrical Co., Ltd

Copyright： Chongqing New Century Electrical Co., Ltd

This instruction is applicable to the protection program of the following version： EDCS-82101 High-voltage transmission line Protect Equipment V1 **

EDCS-82102 High-voltage transmission line Protect Equipment V1.**

EDCS-82103 High-voltage transmission line Protect Equipment V1.**

UPDATING RECORD OF INSTRUCTION’S VERSION

Version

 Technical support：023-68694458 Fax：023-68626689

 The first version prints in 10.2010.10

 More information please access http://www.cqnec.com.cn

IMPORTANT INSTRUCT Thank you for purchased production made by Chongqing New Century Electrical Co., Ltd For safe, correct and effective usage of

these devices, please read the important information below

 Please read the instruction carefully, and adjust, test or manipulate under the instruction‟s prescript

 To protect the device, do not insert or withdraw the module, do not touch Chip and element when the power on

 Please use dependable, high accuracy test instrument and equipment for test and measure to device

 If there is any abnormal or need repaired, please make contact with us

 Debugging Password: factory default setting is 8200, provided for technical management personnel, such as the delay protection personnel, station master, to set the operation value, communication parameters, variable ratio, the print parameters etc

 Running Password: factory default setting is 0000, provided for front-line staff to change value area, realize the soft platen on/off and so on

CONTENTS

PART ONE TECHNICAL INSTRUCTION 1

1 SUMMARIZE 1

1.1 APPLICATION 1

1.2 CHARACTERISTIC 1

1.3 FUNCTION DEPLOYMENT 1

2 TECHNICAL PARAMETERS 3

2.1 ENVIROMENTAL PARAMETER 3

2.2 RATED PARAMETERS 3

2.3 PERFORMANCE INDEX 3

2.4 COMMUNICATION INTERFACE 6

2.5 INSULATION PERFORMACE 6

2.6 ELECTROMAGNETIC COMPATIBILITYCHARACTERISTICS 7

2.7 MECHANICAL PROPERTIES 7

3 FUNCTION PRINCIPLE 8

3.1 FUNCTION PRINCIPLE 8

3.2 SELF-CHECKING PRINCIPLE 38

4 EDCS-82101 HIGH VOLTAGE LINE PROTECT EQUIPMENT 42

4.1 DEVICE SETTING 42

4.2 DEVICE HARDWARE 59

5 EDCS-82102 HIGH VOLTAGE LINE PROTECT EQUIPMENT 64

5.1 DEVICE VALUE 64

5.2 DEVICE HARDWARE 81

6 EDCS-82103 HIGH VOLTAGE PROTECTION EQUIPMENT 89

6.1 DEVICE SETTING 89

6.2 DEVICE HARDWARE 107

PART TWO INSTRUCTION FOR USE 114

1 OPERATION INSTRUCTION 114

1.1 THE KEYS 114

1.2 THE MUNU 114

2 DEVICE OPERATIONS 117

2.1 NORMAL OPERATIONAL MODE STATUS 117

2.2 ABNORMAL INFORMATION DISPOSAL 118

3 INSTALLATION INSTRUCTIONS 121

3.1 BOX OPENING CHECK 121

3.2 INSTALLATION NOTICE 121

4 CIRCUIT DEBUG SYLLABUS 122

4.1 TEST NOTICE 122

4.2 AC LOOP CHECK 122

4.3 INPUT CONTACT CHECK 122

4.4 OUTPUT CONTACT CHECK 123

4.5 FIBER CHANNEL CHECK 123

4.6 OPTICAL AND OPTICAL CONNECTION NOTICE 124

4.7 UNIT TEST DEVICE 126

5 PRINT ACTION REPORT 131

6 TRANSPORTATION AND STORAGE 131

7 APPENDIX 132

7.1 CHASSIS STRUCTURE 132

7.2 COMMUNICATION CONNECTION 134

7.3 ORDER NOTICE 137

7.4 PROTECTION VALUE SETTING LIST 137

PART ONE TECHNICAL INSTRUCTION

1.1 APPLICATION

EDCS-8210 high-voltage transmission line protection device is implemented by a high-performance microprocessor, suitable for 110kV voltage and below transmission lines

4) Using the CAN net as the intercom network, the data message passes in and out smoothly Adopt dual Ethernet communication

5) Advanced protection principle provides sufficient basis for the rapid action and reliability theory of the protection

6) The aluminum alloy DOS has strong immunity to electromagnetic interference, impact, and adapts the badly electric environment well

7) Record every element‟s action behavior and action‟s calculated values of the internal part

8) The excellent function of self-inspection meets the requirements of examination and repairing

High-Voltage Protection Device

FUNCTION

87L

Fiber Split-phase Current differential Protection

√

87LN

Fiber Zero Sequence Current differential Protection

√

21P

Three sections phase-to-phase distance protection

21G

Three sections earthing distance protection

67NT

Four sections zero-sequence current protection

（with direction interlock）

50

Overcurrent protection（TV disconnection valid）

Hardware configuration

Ethernet

CAN、485、

Ethernet

CAN、485、 Ethernet

DC power：220V or 110V（please indicate when ordering）

AC voltage：100 / 3V（Rated phase voltage Un）；

AC current：5A or 1A（Rated phase current In，please indicate when ordering）； Rated frequency：50Hz

Overload capacity：

Current loop：2 times of rated current, continuous working

50 times of rated current, Allow 1 second

Voltage loop：1.5 times of rated voltage, continuous working

Power dissipation：

Current loop：Not more than 0.5 VA /Phase (when Rated value is 5A)

Not more than 0.5 VA /Phase (when Rated value is 1A) Voltage loop：Not more than 0.5 VA /Phase (when Rated value is 100V)

Not more than 0.5 VA /Phase (when Rated value is 100/ V)

DC loop：Normal, not more than 10 W

Trip, not more than 15 W

2.3 PERFORMANCE INDEX

2.3.1 Differential Protection

Differential current high value： 0.02～20.00In（In：TA Secondary rated current, the following is same）

Differential current low value： 0.02～20.00In

Zero-sequence differential current value： 0.02～5.00In

Differential action time： ≤25ms (1.5 times of fixed value)

Current value error： ±3% or 0.02In

2.3.2 Distance protection

Phase-to-phase distance impedance setting range ：0.05～125.00Ω

Phase-to-phase distance Ⅱ, III section action time： 0.01～10s

3

Distance protection value error： ±5％or0.05Ω

Phase-to-phase distanceⅠsection action time： ≤30ms (0.7 times of fixed value) Phase-to-phase distanceⅡ、III section delay error： ±1％or30ms

2.3.3 Zero-sequence overcurrent protection

Delay value error： ±1％or35ms

Current value error： ±3%or0.01In

Zero-sequence overcurrent Ⅰsection action time： ≤25ms (1.2 times fixed value)

2.3.4 Overcurrent protection

Delay value error： ±1％or35ms

Current value error： ±3%or0.01In

2.3.5 Overload protection

Overload Delay value： 0.10～10.00s

Overload value error： ±3%or 0.01In

Overload Delay value error： ±1％ or 35ms

2.3.6 Reclosing

Reclosing synchronization angle： 5.0°～90.0°

Reclosing delay value： 0.20～14.00s

Reclosing synchronization angle value error： ±3°

Reclosing delay value error： ±1％or±45ms

2.3.7 After-acceleration protection

Phase current value： 0.10～20.00In

Zero sequence current value： 0.10～20.00In

Distance after-acceleration impedance setting range： 0.05～125.00Ω

Low voltage setting： 10.00～80.00V

Phase after-acceleration action time： ≤60ms (1.2 times fixed value)

Zero sequence after-acceleration action time： +60ms (0.10s delay)

Distance after-acceleration action time： ≤60ms (0.7 times fixed value)

Distance after-acceleration protection value error： ±3％or0.05Ω

2.3.8 Failure protection

Failure starting value： 0.10～20.00In

Failure starting value error： ±3%or0.01In

2.3.9 Low-Cycle Load dropping

Low-Cycle Load dropping value： 45.10～49.90Hz

Low voltage clocking value： 20.00～100.00V

Frequency change rate value： 0.30～10.00Hz/s

Low-Cycle Load dropping delay value： 0.10～100.00s

Low-Cycle Load dropping value error： ≤0.01Hz

Low voltage clocking value error： ±3%

Frequency change rate value error： ±5%or 0.1Hz/s

Low-Cycle Load dropping delay value error： ±1%or35ms

2.3.10 Low Voltage Splitting

Low Voltage Splitting value： 20.00～100.00V

Voltage change rate value： 5.00～50.00V/s

Low Voltage Splitting delay value： 0.10～100.00s

Low Voltage Splitting value error： ±3%

Voltage change rate value error： ±5%or0.5V/s

Low Voltage Splitting delay value error： ±1%or35ms

2.3.11 Directional overcurrent protection

Under voltage setting: 2.00～100.00V

Negative sequence voltage setting: 2.00～57.00V

Current setting: 0.10～100.00A

Delay setting: 0.00～10.00s

Action time error of directional overcurrent protection : ±1％ or ±40ms

Under voltage setting error of directional overcurrent protection: ±2.5％

Negative sequence voltage setting error of directional overcurrent protection:

±2.5％ or ±0.10V

Current setting error of directional overcurrent protection: ±2.5％or ±0.10A

2.3.12 Output node capacity

Signal node capacity：

Allowable long-term utilize current 5A

Sever current 0.3A（DC220V，V/R 1ms）

Protection output Relay node capacity：

Allowable long-term utilize current 5A

Sever current 0.2A（DC220V，V/R 1ms）

Trip output node capacity：

Allowable long-term utilize current 8A

Sever current 0.3A（DC220V，V/R 1ms）

2.4 COMMUNICATION INTERFACE

Provide CAN communication interface, RS-485 communication interface, Ethemet Interface, communication protocol may choose the power industry standard DL/T667-1999（IEC60870-5-103）protocol, XSJ-7000DH protocol or Modbus protocol, the communication ratio may setting up

A group of optical interface (EDCS-82103 valid)

In normal testing ambient atmosphere, the device is robust enough to withstand an

AC voltage-endurance test at 2000V 、 50Hz(rated insulation voltage>63V), 0.5kV 、50Hz(rated insulation voltage≤63V)， and lasting for 1min, yet without breakdown or flashover phenomenon In the course of trial, when a test loop is powered on the others are connected to ground with equal potential

2.5.3 Impulse voltage

In normal atmosphere environment, insulation resistances between energized and non-energized sections as well as between those circuits with no electric connections, the device is able to withstand a short-time inrush voltage test with 1.2/50μs standard lightning surge, for the circuit of which voltage is less than 60 V the test voltage is 1kV, and for that more then 60 V the test voltage is 5kV

2.6 ELECTROMAGNETIC COMPATIBILITY CHARACTERISTICS

Oscillating wave anti-interference ： under the protocol of GB/T 14598.13 （ IEC 60255-22-1）; The harsh classification: III stage

Electrostatic Discharge Disturbance Test：in line with the protocol of GB/T 14598.14

（IEC 60255-22-2）; The harsh classification: IV stage

RF electromagnetic field radiation anti-interference：in line with the protocol of GB/T 14598.9（IEC 60255-22-3）The harsh classification: III stage

Fast Transient Interference and Pulse Group Interference Test：in line with the protocol of GB/T 14598.10（IEC 60255-22-4）; The harsh classification: A stage

Surge Immunity Test：in line with r the protocol of GB/T 14598.18（IEC 60255-22-5）; The harsh classification: IV stage

Radiofrequency field inductive conduction disturbance：in line with the protocol of GB/T 14598.17（IEC 60255-22-6）; The harsh classification: III stage

Power current interference ： in line with the protocol of GB/T 14598.19 （IEC 60255-22-7） The harsh classification: A stage

Conducted emission limit value: in line with the protocol of GB/T 14598.16（IEC 60255-25）

Radiated emission limit value : in line with the protocol of GB/T 14598.16（IEC 60255-25）

2) Zero sequence overcurrent starting component

When zero sequence current is larger than setting ，and no TA disconnection，open exit relay positive power supply Starting criterion：

3) Negative sequence overcurrent starting component

When negative sequence current is larger than the setting value，the 40ms delay，open exit relay positive power supply Starting criterion：：

3.1.2.1 Optical interface

Optical interface locates CPU module back， ray joint adopts FC type；Sending device is 1310nm InGaAsP/InPMQW-FP diode laser (for short LD); ray receiving device adopt InGaAs diode laser (for short PIN)

The device channel adopts dedicated fiber ， when the device leaves factory,

transmitted power default value is -4.4dBm When adopting dedicated fiber，only the transmitted distance is longer than 10km，received power is not enough，need to increase transmitted power，making received power larger than receiving sensitivity，and has definite margin(6-10dBm)

Optical type： Single mode CCITT Rec.G652

Receiving sensitivity： -22dBm (2Mb/s)

Transmitted distance： <10kM (2Mb/s)

Interface standard：2Mb/s E1 interface

Delay requirement：Single transmission delay<15ms

3.1.2.2 Protection connection type

The CPU module of the device provides 2Mb/s high speed data channel，optical channel only can use dedicated fiber

When adopting dedicated fiber，the line two sides devices are directly connected through optical channel ，seen as follows：

3.1.2.3 Asynchronous sampling and data exchange

Make protection each side as main computer，the other side as follow computer；main and follow computer go on sampling based on respective sampling frequency，adjust sampling point interval based on respective current power grid frequency ， after sampling ,go on fundamental wave Fourier transform for current, voltage，then et the sampling vector，send offside three-phase current real part and imaginary part、TA disconnection symbol、protection action symbol on the optical channel, main computer

Chart 3-1 Dedicated optical connection way

Optical send

EDCS-82103

Optical receive

Optical send

EDCS-82103

Optical receive

△ 从

主

△ 从

3.1.2.4 Communication delay monitor and alarm

Under normal state，main computer calculates the time error Tm between receiving information and sending information，seen in the following chart；When the difference absolute value between current Tm detected from generator terminal and revised error memory Tm0 is larger than certain value，immediately start sampling error calculated command，if smaller than the value, think that sampling delay is under normal range， correct parameter based on previous error

If adjacent three times calculation value Tm，phase difference is larger than half of fixed time sending cycle, immediately set sampling channel fault symbol, both send sampling channel fault information，at the same time start sampling channel correction program

3.1.2.5 Sampling error calculation

When follow computer voltage time or synchronizing time error reaches or exceeds internal value，follow computer immediately send sampling error calculation starting report，the report includes send time code T0；main computer receives this report at T1 moment，until the next fixed send time T2，calculate out Tm0，send T2、Tm0、T0 time information to follow computer，at T3 moment follow computer receives the report sent by main computer at T2 moment, n this way get channel delay、sampling delay error based

on follow computer clock time T0、T3 and main computer clock time T2 and time error Tm under private channel、fixed route condition

Follow computer calculate out and save sampling delay error, and send it to main computer， follow computer achieve sampling delay error calculation，immediately make the three-phase current analog quantity that sends to offside as initial number 1，after

main computer receive the sampling delay error time sent by offside，indicate that sampling delay error calculation is over， also make analog quantity as initial number 1，

at the same time the two sides both make sampling delay error △T as the compensation constant

3.1.2.6 Vector revised method

From the chart，make this side receive phase current real part and imaginary part sent by offside，according to two sides of vector sampling delay error △T and current power grid frequency etc ，compensate sampling data

3.1.2.7 Communication interface

The key of data differential protection is the exchange of current data between two sides of differential protection，the device data interface adopts 2Mb/s synchrony data interface standard of ITU-G.703

3.1.2.8 Weak line side fault state distinguish

＜60V or Uca＜60V，continuously meets the above conditions，set A phase weak line starting symbol，protection not meets action condition and delay by 200ms and return，protection meets action condition，send tripping command and return

If receiving offside B phase differential protection allowable signal，this moment this side voltage power frequency variation component、phase current power frequency variation component 、 zero sequence overcurrent component 、 negative sequence overcurrent component not start，under TV no disconnection conditions，Ub＜35V or Uab

＜60V or Ubc＜60V，continuously meets the above conditions，set B phase weak line

θ

Vector before modifying Modified vector

Modified vector Vector before modifying

starting symbol，protection not meets action condition and delay by 200ms and return，protection meets action condition，send tripping command and return

If receiving offside B phase differential protection allowable signal，this moment this side voltage power frequency variation component、phase current power frequency variation component 、 zero sequence overcurrent component 、 negative sequence overcurrent component not start，under TV no disconnection conditions，Uc＜35V or Ubc

＜60V or Uca＜60V，continuously meets the above conditions，set C phase weak line starting symbol，protection not meets action condition and delay by 200ms and return，protection meets action condition，send tripping command and return

If receiving offside zero sequence differential protection allowable signal，this moment this side voltage power frequency variation component、phase current power frequency variation component 、 zero sequence overcurrent component 、 negative sequence overcurrent component not start，under TV no disconnection conditions，，Min（Ua、Ub、Uc）＜35V or Min（Uab、Ubc、Uca）＜60V，continuously meets the above conditions，set A、B、C phase weak line starting symbol，protection not meets action condition and delay by 200ms and return，protection meets action condition，send tripping command and return

Zero sequence overcurrent component start

Negative sequence overcurrent component start

Weak feed back A phase start

Weak feed back C phase start

Weak feed back A phase start

≥1

Interphase current power frequency variation

component start

Zero sequence overcurrent component start

Negative sequence overcurrent component start

3.1.2.9 Power frequency variation phase differential protection

Make this side current as subscript 1，offside current as subscript 2，zero sequence current as subscript 0 ， TA ratio compensation coefficient k=In2/In1 ， respectively calculate differential and braking current according to phase difference

Differential current ： Icd   I 1   I 2

Braking current： Izd   I 1  I 2

Illustration： 1 1 ) 2 1 ( ) 1 ( 2 )

T t T t

T t T

1 t T

I   、

) 2 (

2 t T

I   、

) 2 (

2 t T

I   respectively is offside current

variation vector of t moment、t-T moment、t-2T moment T is 20ms。

Action  Icd  0 75   Izd

equation：  Icd   DIT  DIc d z d1

Illustration： is A、B、C；

 I1 is this side current power frequency variation ；

 I2 is this side current power frequency variation；

DIcdzd1 is differential current starting fixed threshold ， is calculated by differential current high value Icdzd1；

 DIT is differential current starting float threshold

3.1.2.10 Steady state Ⅰ section differential protection

Icdzd1 is differential current high value；

3.1.2.11 Steady state II section differential protection

Differential current：Icd  I 1  I 2

Braking current：Izd  I 1  I 2

Equation： Icd  0 75  Izd

Icd  Icdzd2

Illustration： is A、B、C；

Icdzd2 is differential current low value；

Note ：Steady state Ⅱ section differential protection act by 40ms delay

3.1.2.12 Zero sequence differential protection

Differential current：Icd0  I 10 I 20

Braking current：Izd0  I 10 I 20

Equation： Icd0  0 75  Izd0

Icd0  Icdzd0

Illustration：Icdzd0 is zero sequence differential current value；

3.1.2.13 Offside differential allowable signal

1) Logic illustration

Tripping location：TWJ external state is 1 When auxiliary value“ input 1 is TWJ” is set

as 0，tripping location gets from the power supply panel TWJ state；When auxiliary value input 1 is TWJ” is set as 1，tripping location gets from IO panel input 1 state; 2) Logic diagram

Note ：power frequency variation B，C phase differential allowable signal is the same

as A phase logic diagram

A phase TA disconnection

&

TA disconnection interlock diff

Power freq variation A phase Channel abnormal

Diff protection hard platen input

Power freq variation diff soft platen input

diff allowable signal

Note： steady stateⅠ section B，C phase differential allowable signal is the same as

A phase logic diagram

Note： steady state II section B，C phase differential allowable signal is the same as

A phase logic diagram

A phase TA disconnection

&

TA disconnection interlock diff.

Steady stateⅠ section A phase diff allowable signal

A phase steady state Ⅰ section diff component act

Diff protection hard platen input

Steady state Ⅰsection diff soft platen input

A phase TA disconnection

&

TA disconnection interlock diff.

Steady state Ⅱ section A phase diff allowable signal

A phase steady state Ⅱ section diff component act

Diff protection hard platen input

Steady state Ⅱ section diff soft platen input

TA disconnection

&

ZS diff.l protection soft platen input

TA disconnection interlock diff.

Zero sequence diff allowable signal Channel abnormal

Note ：Differential component action value that is mentioned by differential allowable logic and differential action logic is affected by“TA disconnection interlocks” control word When the control word is set as 0，happening TA disconnection fault，disconnection phase differential component act according to TA disconnection differential value ， no disconnection phase still act according to differential protection value When “TA disconnection interlock” control word is set as 1，interlock differential protection act after happening TA disconnection

3.1.2.14 Power frequency variation phase differential protection action logic

1） A phase power frequency variation differential protection logic description

After each phase power frequency variation current component ΔI meets conditions,go

on braking current and differential current distinguish，whne differential current meets conditions，and braking current meets action conditions，protection and action output Note ：

 Other two phase‟s protection action logic is the same as A phase protection action logic

 Return after power frequency differential protection act：after action steady state differential current is smaller than 0.5 times of steady stateⅠ section differential protection value and return

2） A phase power frequency variation differential protection logic diagram

Note ：power frequency variation B，C phase differential action logic is the same as

A phase logic diagram

TA disconnection interlock diff.

Power freq variation diff act

&

≥1

&

This side protection starting component act

Offside A phase diff allowable signal

Diff.protection hard platen input

Power freq variation diff soft platen input

A phase power freq variation diff component act

allowable signal is 1， or steady state Ⅰ section A phase differential allowable signal

is 1， or steady state Ⅱ section A phase differential allowable signal is 1，or zero sequence differential allowable signal is 1，or weak side A phase allowable signal The same as below

 B phase differential allowable signal：power frequency variation B phase differential allowable signal is 1，or steady stateⅠsection B phase differential allowable signal is 1，or steady state Ⅱ section B phase differential allowable signal is 1，or zero sequence differential allowable signal is 1，or weak side B phase allowable signal The same as below

 C phase differential allowable signal：power frequency variation C phase differential allowable signal is 1，or steady stateⅠsection C phase differential allowable signal is 1，or steady stateⅡsection C phase differential allowable signal is 1，or zero sequence differential allowable signal is 1，or weak side A phase allowable signal The same as below

3.1.2.15 Steady stateⅠ section phase differential protection logic diagram

1） A phase steady state Ⅰ section phase differential protection logic description

After each phase starting components continuous distinguish meets conditions,go on steady state current component distinguish，when meeting conditions，go on braking current and differential current distinguish，and braking current meets action conditions, protection and action output

2） A phase steady state Ⅰ section phase differential protection logic diagram

&

TA disconnection interlock diff.

Steady stateⅠ section diff act

&

≥1

&

This side protection starting component act

Offside A phase diff allowable signal

Diff protection hard platen input

Steady state Ⅰ section diff soft platen input

A phase steady stateⅠ section diff component act

TA disconnection interlock diff.

Steady state Ⅱ section diff act

&

≥1

&

This side protection starting component act

Offside A phase diff allowable signal

Diff protection hard platen input

Steady state Ⅱ section diff.l soft platen input

A phase steady state Ⅱ section diff.component act

Illustration：

This side protection starting component action includes power frequency variation phase current start、zero sequence current start and negative sequence current start

3.1.2.16 Steady state II section phase differential protection logic diagram

1） A phase steady state II section phase differential protection logic description

After each phase starting components continuous distinguish meets conditions,go on steady state current component distinguish，when meeting conditions，go on braking current and differential current distinguish，and braking current meets action conditions, protection and action output

2） A phase steady state II section phase differential protection logic diagram

Illustration：

This side protection starting component action includes power frequency variation phase current start、zero sequence current start and negative sequence current start

3.1.2.17 Zero sequence differential protection action logic

3.1.3 Distance protecton

This unit has three-stage circular features phase-to-phase, earth distance protection and two for the far backup of the quadrilateral phase-to-phase, earth distance protection This protection is polarized by the positive sequence voltage, thus it has larger ability of measuring transition resistance For better used in short circuit protection, expanding the ability of measuring transition resistance, it also is equipped with the impedance offset angle, which could offset the impedance fromⅠ, Ⅱ section to the first quadrant

&

TA disconnection interlock diff.

Zero sequence diff.l act

&

≥1

&

This side protection starting component act

Diff protection hard platen input

Zero sequence diff soft platen input

Zero sequence diff component act

Offside B phase diff allowable signal

Offside C phase diff allowable signal

≥1

Trip control word by the side control is 1

Trip allowable control word is 1

Negative sequence overcurrent start

Distant place start trip

Receive offside tripping signal

Zero sequence overcurrent start

Interphase current power freq.variation start

When the positive sequence polarized voltage is much higher, the positive sequence voltage-polarized distance protection has a very good directionality When the positive sequence voltage came down to below the Ten percent of the Un , it enters the three-phase low-pressure procedures, is polarized by positive sequence voltage memory quantity, set the positive gateway beforeⅠ,Ⅱ section distance protection being in action,

to ensuring relays not lose direction when the bus occurred three-phase fault After the relay acts, the gateway become inverse, and guarantee it from three-phase fault in the positive direction act to the fault resection III section distance protection always adopts the reverse gateway, thus the steady-state characteristics of three-phase short-circuit III section contains origin, while not existing electricity squished area

3.1.3.1 Phase-selection components

The device goes on phase selection by using the combined of phase-to-phase current mutation phase selection component and low voltage selection component

3.1.3.2 Oscillation interlock component

The oscillation interlock of device has three parts; any element action makes the protection open

1) Starting open components

During the 160ms after any start element acts, if the positive sequence over-current components, which are setted pressing escaped the maximum load, don't act or the action time still less than 10ms, the oscillation interlock will open 160ms

2) Asymmetric fault open components

When the system occurs oscillates, voltage and current are symmetrical, so the zero sequence current I0, negative sequence current I2 are 0 (actually because the system don't completely symmetrical, I0, I2 is small), however, when the asymmetric fault occurs, it will produce larger zero sequence current and negative sequence current Therefore, the sizes of zero sequence and negative sequence current component are used to distinguish asymmetric short-circuit fault occurred in oscillations The distinguish formula is:

I0+I2≥mI1 Illustration: I2 + I0 for the movement quantity to start up distance protection, I1 for the positive sequence component of current, which is a brake quantity m for braking coefficient

3) Symmetrical fault open components

During the 160ms after starting component open or system's oscillation process, for example the three-phase fault occurred , the above two open measures couldn't open oscillation interlock, this device set specialized oscillation-differentiation components, namely measuring oscillation center voltage:

1

1cos 

U

Uos

n os

Among them: 1is positive sequence voltage current Angle, U1is ahead of the Angle

ofI1, U1 for positive sequence voltage,Un for rated phase voltage (57.7 V)

4) Oscillation interlock logic diagram

3.1.3.3 Low voltage distance protection principle

Measuring methods of distance relay have two kinds, with positive sequence voltage size to distinguish, when positive sequence voltage is lesser, import a measurement program to measure low-pressure distance components, for only three-phase short-circuit and system oscillation exist

When the three-phase short-circuit occurred, three phase impedances are same, but

to ensure that the fault still swiftly remove while the bus fault transited into the three-phase circuit constituted failure, three phase impedances are calculated

3.1.3.4 Phase-to-phase distance Ⅰ、Ⅱ protection

1) Phase-to-phase distance Ⅰ、Ⅱ protection principle

Three phase-to-phase relays compare the phase of working voltage and polarized voltage：

Working voltage：    j

e Z I U

U OP     zd

polarized voltage：   j

e U

U P  1

Among them: φ φ for AB, BC, CA, Subscript op for working voltage, Subscript P for polarized voltage, Zzd is setting impedance, U1 is positive sequence voltages Θ is offset Angle of polarized voltage, φ is positive sequence sensitive horns

The polarized voltage of relay is the positive sequence voltage without memory Therefore, for phase-to-phase fault, the positive sequence voltage retained the phase before fault, the relay of failure phase have very good direction

While the three-phase short-circuit occurred, because the polarized voltage has no

Symmetrical fault open component

Asymmetrical fault open component

Oscillation interlock control word is 1

Distance protection hard

platen input

&

memory function, its action characteristic is the circle which passes the origin Due to the positive sequence voltage is low, by low-pressure distance measurement, therefore, neither dead zone nor the problem of bus fault lose direction exists

General formula of phase comparison type phase-to-phase protection:

e U

e Z I U

2) Phase-to-phase distance Ⅰ、Ⅱ logic diagram

Figure 3-2 Distance protection acting characteristic

The polarized voltage of relay is the positive sequence voltage without memory Because, for earthing fault, the positive sequence voltage mainly is formed by no fault phase, the positive sequence voltage retained the phase before fault So, the character of III section earthing distance relay is the same as the transient characteristics of low voltage, the relay has very good direction

Quadrilateral earthing distance relay：the acting characteristic of the quadrilateral earthing distance relay is shown as ABCD of the picture，ZZD is earthing III section circle impedance value，ZREC is earthing III section quadrilateral value

2) Phase-to-phase distance Ⅲ section logic diagram

Figure 3-3 Quadrilateral phase-to-phase distance protection acting

Interphase distanceⅡ section

soft platen input

Distance protection hard

platen input

TV disconnection interlock

3.1.3.6 Earthing distanceⅠ、Ⅱ protection

1) Earthing distanceⅠ、Ⅱ protection principle

Three earthing distance relays compare the phase of working voltage and polarized voltage：

e Z I K I U

U OP    (   3 0) zd

polarized voltage：   j

e U

U P  1

Among them: φ for A, B, C, Subscript op for working voltage, Subscript P for polarized voltage, Zzd for setting impedance, U1 for positive sequence voltages Θ for offset Angle of polarized voltage, φ for positive sequence sensitive angle

The polarized voltage of relay is the positive sequence voltage without memory Therefore, for earthing fault, the positive sequence voltage retained the phase before fault, the relay of failure phase have very good direction

While the three-phase short-circuit occurred, because the polarized voltage has no memory function, its action characteristic is the circle which passes the origin Due to the positive sequence voltage is low, by low-pressure distance measurement, therefore, neither dead zone nor the problem of bus fault lose direction exists General formula of phase comparison type earthing distance protection:

e Z I K I U

Earthing distance protection transient acting characteristic is the same as

phase-to-phase distance protection transient acting characteristic，is shown in figure 3-1

Interphase distanceⅢsection component act

Interphase distance Ⅲ section act

&

Protection start

&

Interphase distance Ⅲsection soft platen input

Distance protection hard

platen input

TV disconnection interlock

component act

t x3

2) Earthing distance Ⅰ、Ⅱ logic diagram

3.1.3.7 Earthing distance III section protection principle

1) Action characteristic

The same as phase-to-phase distance III section protection principle

2) Earthing distance III section logic diagram

3.1.4 Asymmetric successive instantaneous act

1) Action principle

When the asymmetric fault happens，make use of the disappear of load current when cut off fault，can realize asymmetric fault successive trip Take the picture for example，when line terminal K1 point happen asymmetric fault，N side Ⅰ section act

Oscillation interlock open

soft platen input

Distance protection hard

section component act

Earthing distance Ⅱ section act

Earthing distanceⅡsection soft platen input

Distance protection hard

Earthing distance Ⅲ section soft platen input

Distance protection hard

platen input

TV disconnection interlock

component act

t j3

K1

M

N

N

quickly to cut off fault，because of three phases trip，no fault phase current is cut off at the same time，M side protection measure that any phase load current suddenly disappear，and Ⅱ section distance element continuously act not return，make M side switch trip not

by Ⅱ section delay，cut off the fault

2) Asymmetric fault successive instantaneous act logic diagram

3.1.5 Double-circuit line successive instantaneous act

Take the picture for example，when load side K1 fault，protection 3 impedance Ⅲ section start，after protection 2 trip, protection3 impedance III section return，protection 1 impedanceⅡ section can use this character to go on successive instantaneous act When power supply side K2 faults，for the protection 4，because the fault is negative direction fault，impedance III section do not start，but the impedance auxiliary element with whole impedance characteristic can start, protection 2 impedance Ⅱ section can use this character to accelerate act

1) Action criteria

DistanceⅡ section component start

Three phases all have current

Asymmetrical fault instantaneous action act

Each phase has no current

&

≥ 1

Asymmetrical instantaneous act soft

platen input

When the line III section distance element start and return，or III section distance element do not start but judge the directional element with 90°connection as negative direction，after 5ms the protection delay outputs impedance II section accelerate signal to the adjacent line

The line distance II section accelerate action criterion is：

1)value control word double-circuit line successive instantaneous act input；

2)The line distance Ⅱ section protection start；

3) Receive the accelerate distance II section signal from another line of the same side

in 300 millisecond；

4) After meeting the above three conditions, do not return by short delay 20ms

The line distance section will acceleratory act

Negative direction element criteria：

2) Double-circuit line successive instantaneous act logic diagram

3.1.6 Fault location function

Adopt collected fault parameter after sending out protection action command，work out measured impedance, according to whole line impedance Zxl and line length Lxl ，get fault distance





I

U Z

L LX

Double line successive instantaneous

act soft platen input

Distance Ⅲ section start

Negative direction component act

DistanceⅡ section start

Double line successive instantaneous

act soft platen input

When TV is disconnection，zero-sequence Ⅰ section can choose to whether or not quit zero-sequence I section protection by “TV disconnection with zero-sequenceⅠ section” control word When “TV disconnection with zero-sequence Ⅰ section” control word is 1，if happen TV disconnection，reserve zero-sequence Ⅰ section protection function；when “TV disconnection with zero-sequenceⅠ section” control word is 0，if happen TV disconnection，quit zero-sequence Ⅰ section protection function；

When happening TV disconnection，cancel distinguishing directional element，and judge that directional element meets condition

Another three sections is the same as zero-sequence I section

3.1.7.1 Zero-sequence overcurrent protection

TV disconnection zero sequence

Ⅰ section control word is 1

TV disconnection

≥1

Zero sequence Ⅰsection current

component act

Zero sequence overcurrent

Ⅰsection soft platen input

Zero sequence Ⅰsection protection act

Zero sequence overcurrent

hard platen input

Zero sequence overcurrent

Ⅰsection with direction

Zero sequence positive direction

component act

&

Zero sequence II section current

component act

Zero sequence overcurrent

II section soft platen input

ZS overcurrent Ⅱ section act

Zero sequence overcurrent protection

hard platen input

Zero sequence overcurrent

II section with direction

Zero sequence positive direction

I1 is overcurrentⅠ section value；

2) The logic diagram

3.1.8.2 Overcurrent II section protection

1) Current element

Criterion：Max ( Ia、Ib、Ic)  I2zd

Illustration：

zd

I2 is overcurrent II section value；

Zero sequence III section current

component act

Zero sequence overcurrent

III section soft platen input

ZS overcurrent III section act

Zero sequence overcurrent protection

hard platen input

Zero sequence overcurrent

III section with direction

Zero sequence positive direction

Zero sequence overcurrent

Ⅳ section soft platen input

ZS overcurrentⅣ section act

Zero sequence overcurrent protection

hard platen input

Zero sequence overcurrentⅣ section

OvercurrentⅠsection soft platen input

t 1

2) The logic diagram

When breaker shift is closure state（TWJ=0）immediately start delay，after delaying

to 15 second, be reclosing charging symbol（indicate achieving reclosing charging） During the process of reclosing charging, if having reclosing interlock input signal, immediately latch reclosing，after eliminating blocking signal reset charging delay

If overcurrent protection 、 phase-to-phase distance protection and current instantaneous protection act, making breaker shift as tripping state，immediately start reclosing delay，if having no reclosing interlock input signal, delay to setting delay and reclosing starts

Note：

 Reclosing check synchronism needs to meet frequency difference<1Hz，at the same time requires line voltage>0.7Ux and bus voltage>0.7Uxn Bus voltage can be selected by system value“ synchronizing voltage selection” control word（seen

“system value” setting illustration）

 When manually trip by external control switch KK operational breaker，at the same time need to connect one contact to device “interlock reclosing” input，used for

Max(Ia、Ib、Ic)＞I2zd

Overcurrent II section soft platen input

t 2

Max(I a ? ￠I b ? ￠I c )￡? I gfhzd

Overload soft platen

input

& t gfh Overload act

interlock reclosing act when manually operating

2) Logic diagram

Illustration：

JWY：present “reclosing check no voltage” control word

JTQ：present “reclosing check synchronism” control word

CH：present “reclosing” soft platen

Switch trip stealfurtively：present that switch not human operation or not protection action switch location signal changes

TWJ state selection：when system value“ input 1 is TWJ” control word is set as 1，This moment reclosing criterion TWJ gets from switch value“ input 1” signal；when system value“ input 1 is TWJ” control word is set as 0，this moment reclosing criterion TWJ gets from device circuit TWJ signal

3.1.11 After-acceleration protection

This device sets four independent setting after-acceleration protection，respectively is phase overcurrent after=acceleration、zero sequence overcurrent after-acceleration、interphase distance after-acceleration and earthing distance after-acceleration

Phase overcurrent after-acceleration protection can go on secondary harmonic braking control by setting“harmonic braking” control word Harmonic braking component distinguish is as follows：

Device not start

Interlock reclosing input is 1

Low-Cycle Load Dropping or low-voltage

load dropping act

Overload act

Remote trip

Control circuits disconnection

T ch Reclosing protection act

Synchronism meet(meet angular difference 、

frequency difference)

TWJ=0

Protection starting reclosing

control word input

Line TV disconnection （when

check no voltage or check synchronism inpu ）

Closure pressure low alarm

K I

I

I

I I

I

c b

a

c b

K is secondary harmonic ratio value

When meeting harmonic braking component distinguish，and “harmonic braking” control word is set as 1，when maximum phase protection current is larger than 2 times of

“phase current value”, protection acts

After-acceleration has two ways of starting way ， is divided into hand close acceleration and reclosing after-acceleration，logic is as follows：

1) Hand close acceleration protection logic description

Hand close acceleration protection starting condition：when the time breaker remains tripping location exceed 30s；the time having no current exceed 30s；the time reclosing no charging fully exceed 30s；during the 3s when the breaker changes from tripping location

to closure location（TWJ is from 1 to 0），start hand close after-acceleration protection Hand close after-acceleration protection is selected among phase-to-phase impedance、earthing impedance、zero-sequence overcurrent and overcurrent protection，once select some kind of after-acceleration protection, if fault location is in the impedance area of the setting acceleration section or the zero-sequence current reach the current value of the acceleration section overcurrent protection ， after-acceleration section protection acts（zero-sequence after-acceleration with 100ms delay）

2) Reclosing after-acceleration protection logic description

During the 3s when the reclosing acts and makes breaker changes from tripping location to closure location（TWJ is from 1 to 0），start after-acceleration protection, after-acceleration protection is selected among phase-to-phase impedance、earthing impedance、zero-sequence overcurrent and overcurrent protection once select some kind

of after-acceleration protection, if fault location is in the impedance area of the setting acceleration section or the zero-sequence current reach the current value of the acceleration section overcurrent protection，after-acceleration section protection acts

（zero-sequence after-acceleration with 100ms delay）

（ exclude earthing selection section ） act successfully, the current reach after-acceleration protection current value（distance protection act condition，and measuring impedance is in the scope of setting acceleration phase-to-phase distance Zzd），immediately start after-acceleration protection output

3) Logic diagram

3.1.12 Low-Cycle Load Dropping

1) Low-Cycle load Dropping logic

 Frequency element action criteria：

Fm <flzd

Illustration，Fm is bus frequency，flzd is low-cycle load dropping frequency value

& Interphase distance after-acceleration

protection act

TWJ is 1→0

Starting component act

TV disconnection interlock component

Interphase distance after-acceleration

component act

Acceleration interphase distance protection

soft platen input

Starting component act

TV disconnection interlock component

Earthing distance after-acceleration

component act

Acceleration earthing distance protection

soft platen input

0" 3"

&

& ZS overcurrent after-acceleration

protection act

Acceleration zero sequence overcurrent

protection soft platen input

100ms

Zero sequence current component act

Low-voltage interlock input

Phase overcurrent component act

Phase current is larger than two

times of value

&

Harmonic braking element not act

Phase current component act

Acceleration phase overcurrent protection

soft platen input

0" 3"

≥1

 Voltage element interlock open criteria：

Min（Uab、Ubc、Uca）>Ulfzd

Illustration，Uab is AB line voltage，Ubc is BC line voltage，Uca is CA line voltage，Ulfzd

is low voltage value

 Slip frequency interlock criteria：

DF/DT>Dfzd

Illustration，DF/DT is frequency slip frequency measured value，Dfzd is frequency slip frequency value

Current interlock criteria：

Max（Ia、Ib、Ic）>0.06In

Illustration，Ia、Ib、Ic is protection A、B、C phase current，In is current secondary rated value of system parameter value

2) Low-Cycle load Dropping logic

Illustration：

Tlf：is low-cycle load dropping delay

3.1.13 Low Voltage Splitting

1) Low voltage splitting logic

 Voltage element action criteria:

Max（Uab、Ubc、Uca）<Ulzd

Illustration，Uab、Ubc、Uca is line voltage，Ulzd is low voltage splitting voltage value

 Slip frequency blocking criteria：

DU/DT>DUzd

Illustration，DU/DT is voltage slip frequency measured value，DUzd is voltage slip frequency value

 Current blocking criteria：

Max（Ia、Ib、Ic）>0.06In

Illustration，Ia、Ib、Ic is protection A、B、C phase current，In is current secondary rated value of system parameter value