The architecture of computer hardware and systems software an information technology approach suplement 2

Little Man Computer Direct, absolute addressing  Direct: data is reached directly from the address in the instruction  Absolute: address in the instruction field is the actual memory

SUPPLEMENTARY CHAPTER 2 Instruction Addressing Modes

The Architecture of Computer Hardware

and Systems Software:

An Information Technology Approach

3rd Edition, Irv Englander John Wiley and Sons 2003

Little Man Computer

 Direct, absolute addressing

 Direct: data is reached directly from the

address in the instruction

 Absolute: address in the instruction field is the actual memory location being

addressed

Supplementary Chapter 2 Instruction

 Alternatives to absolute addressing

address field

 Alternatives to direct addressing

entries in a table or array

Register Addressing

 Does not require a memory access

 Implemented directly as part of the CPU

entirely of register operation instructions

Supplementary Chapter 2 Instruction

Addressing Modes

S2-5

Register Addressing

Fetch-Execute Cycle for Register-to-Register Move

1 PC -> MAR Transfer the address from the PC to the

MAR

2 MDR -> IR Transfer the instruction to the IR

3 contents(IR[add1])

-> contents(IR[add2]) Move contents of source register to destination register

4 PC + 1 -> PC Program Counter incremented*

*Done in parallel with move; only 3 time units required

Additional Addressing Modes

 Programmer-accessible registers

instructions

 Alternative to absolute addressing

 Allow larger range of addressable memory

 While using a reasonable number of bits for the

address field

 Alternative to direct addressing

Supplementary Chapter 2 Instruction

 Local variables

 Conditional

branches

Fig S2.2

2 Alternatives to

Absolute Addressing

 Base register addressing

 Relative addressing

 Both provide starting address and an

offset or displacement from the starting point

Supplementary Chapter 2 Instruction

Addressing Modes

S2-9

Base Register Addressing

 Base register set to initial address

 Hardware design: special, separate

register or general-purpose registers

 Generally large to provide large memory space, frequently gigabytes

 Final address: contents of instruction

address field added to the base address

Supplementary Chapter 2 Instruction

Addressing Modes

S2-11

IBM zSystem

 16 64-bit general-purpose registers

bit 0 7 8 11

12 15 16 19 20 31

IBM zSystem Example: Load

Supplementary Chapter 2 Instruction

Fetch-Execute Cycle

for Relative Address

1 PC -> MAR Transfer the address from the PC

to the MAR

2 MDR -> IR Transfer the instruction to the IR

3 IR[Address] + PC -> MAR Address portion of the instruction

added to the PC and loaded into the MAR

4 MDR + A -> A Value in the MDR added to the

value of the accumulator

5 PC + 1 -> PC Program Counter incremented

Supplementary Chapter 2 Instruction

 Program counter used as the base register

 Similar to base addressing

 Constraint: address field must be able

to store and manipulate positive and

negative numbers

 Complementary representation

Relative Addressing Example

Supplementary Chapter 2 Instruction

Addressing Modes

S2-17

Direct Addressing

 Separates data into location different

from location of instructions

Additional Addressing Modes

 Programmer-accessible registers

instructions

 Alternative to absolute addressing

address field

 Alternative to direct addressing

 Facilitate writing certain types of programs

Supplementary Chapter 2 Instruction

manipulate positive and negative numbers

 Advantage:

Additional memory access not required

Supplementary Chapter 2 Instruction

Addressing Modes

S2-21

Immediate Addressing

 Modified LMC Example

 Constant limited to the size of address field

op code addressing mode address field

Immediate Addressing

 Modified LMC Example

1 PC -> MAR Transfer the address from the PC to

the MAR

2 MDR -> IR Transfer the instruction to the IR

3 IR[Address]-> A Move contents of source register to

Accumulator

4 PC + 1 -> PC Program Counter incremented

Supplementary Chapter 2 Instruction

Memory

Table Subscript

77 136 TABLE(1)

78 554 TABLE(2)

79 302 TABLE(3)

:

Little Man Indirect Addressing

a The Little Man reads in instruction

b ,,, he finds the

address of the data

Supplementary Chapter 2 Instruction

Addressing Modes

S2-25

Little Man Indirect Addressing

c … from that address he retrieves the data

d … with a different address

in location 45, he retrieves

different data (note: In this

step the address of the data

has been incremented).

Incrementing

 Treat the instruction as data

 Modify the address field

 Pure code: does not modify itself during execution

 Incrementing does not modify the

instruction

 Address stored in a separate data region

 Advantage: program can be stored in

Mailbox Instruction Comments

00 LOAD 90 /this actually loads "ADD 60"

01 STORE 07 / into mailbox 07

02 LOAD 91 /initialize the totalizer

03 STORE 99

04 LOAD 92 /initialize the counter to 19

05 STORE 98

06 LOAD 99 /load the total

07 0 /[ADD 60, ADD 61, etc.]

08 STORE 99 /and store the new total

09 LOAD 07 /modify the instruction in 07

10 ADD 93 / by adding 1 as though the

11 STORE 07 / instruction were data

98 /used to hold the current count

99 /used to hold the current total

Mailbox Instruction Comments

00 LOAD 90 /this time just the initial

01 STORE 97 / address is saved

09 LOAD 97 /modify the address in 97 (this is direct)

10 ADD 93 / by adding 1 to it …

Supplementary Chapter 2 Instruction

Addressing Modes

S2-29

Register Indirect Addressing

 Also called register deferred addressing

 Address pointed is stored in a

general-purpose register

 Advantage: efficient

fetch-execute instructions as direct addressing

small instruction word

Register Indirect Addressing

Dual Duty

 Autoincrementing/autodecrementing

 Instruction

instruction executed

 Advantage: simplifies writing program loops

Supplementary Chapter 2 Instruction

Addressing Modes

S2-31

Register Indirect Addressing

Obtaining Data

Motorola 68000 CPU MOVE

Supplementary Chapter 2 Instruction

Indexed vs Base Offset

 Both offset address by amount stored in

another register

 Base offset: primarily to expand addressing range for a given address field size

changed during execution

 Index register: primarily a table offset for

subscripting

Supplementary Chapter 2 Instruction

Addressing Modes

S2-35

Index Register:

Modifying an Address

Using Both Base Offset

and Indexed Addressing

Supplementary Chapter 2 Instruction

Addressing Modes

S2-37

Totalizer Loop

with Indexed Addressing

00 LDA 91 /total is kept in A This sets A to 0 (not indexed).

01 LDX 92 /initialize the counter to 19

02 ADD @ 60 /ADD 79, ADD 78, etc as X is decremented

03 DEC X /Decrement the index–19, 18, etc.

04 BRPX 02 /test if done (when X decrements from 0 to -1)

05 OUT /done; output the result from A

06 HALT

Note: @ symbol indicates indexed instruction LDX: LOAD register

X is the indexed register (offset and counter) LDA: LOAD accumulator