Mode ISR, DCO SMCLK ; ; Description: Toggle P1.0 using software and TA_0 ISR.. SMCLK provides clock source for TACLK.. CPU is normally off and ; used only during TA_ISR.. Dang ; Texas In
Trang 1; MSP430G2xx1 Demo - Timer_A, Toggle P1.0, CCR0 Cont Mode ISR, DCO SMCLK
;
; Description: Toggle P1.0 using software and TA_0 ISR Toggles every
; 50000 SMCLK cycles SMCLK provides clock source for TACLK
; During the TA_0 ISR, P1.0 is toggled and 50000 clock cycles are added to
; CCR0 TA_0 ISR is triggered every 50000 cycles CPU is normally off and
; used only during TA_ISR
; ACLK = n/a, MCLK = SMCLK = TACLK = default DCO
;
; MSP430G2xx1
;
-; /|\|
XIN|-; | | |
; |RST
XOUT|-; | |
; | P1.0| >LED
;
; D Dang
; Texas Instruments Inc
; October 2010
; Built with IAR Embedded Workbench Version: 5.10
;*******************************************************************************
#include "msp430g2231.h"
ORG 0F800h ; Program Reset
; -RESET mov.w #0280h,SP ; Initialize stackpointer
StopWDT mov.w #WDTPW+WDTHOLD,&WDTCTL ; Stop WDT
SetupP1 bis.b #001h,&P1DIR ; P1.0 output
SetupC0 mov.w #CCIE,&CCTL0 ; CCR0 interrupt enabled
mov.w #50000,&CCR0 ;
SetupTA mov.w #TASSEL_2+MC_2,&TACTL ; SMCLK, contmode
;
Mainloop bis.w #CPUOFF+GIE,SR ; CPU off, interrupts enabled
nop ; Required only for debugger
;
; -TA0_ISR; Toggle P1.0
xor.b #001h,&P1OUT ; Toggle P1.0
add.w #50000,&CCR0 ; Add Offset to CCR0
reti ;
;
; -; Interrupt Vectors
ORG 0FFFEh ; MSP430 RESET Vector
DW RESET ;
ORG 0FFF2h ; Timer_A0 Vector
DW TA0_ISR ;
END