FSMD MODELData inputs Data outputs Controller outputs Status signals Control signals Controller inputs Datapath performs the computations on data Controller indicates to the datapath
Trang 1FINITE STATE MACHINE with DATAPATH
SYNTHESIS
Dr Le Dung
Hanoi University of Science and Technology
Trang 2FSMD MODEL
Data inputs
Data outputs Controller outputs
Status signals
Control signals
Controller
inputs
Datapath performs the computations on data
Controller indicates to the datapath which operations have to
be carried out on which data (algorithm)
Trang 3Datapath Design
Temporary storage:
registers, (shift registers), counters, register files, FIFOs, LIFOs
Functional units:
arithmetic units, logical units and (barrel shifter)
Connections:
data busses, multiplexers, tri-state buffers
Shift register (temporary store) Register (temporary store)
Barrel shifter (functional unit)
Trang 4Temporary storage
Register
R L Load
Reset
Inputs
Output
R
L Load Reset
Inputs
Output
U/D Up/Down C Clock
Register Files
2n
RE
WE
Read Enable
Inputs
Output
C Clock
Write Enable
RA(n)
WA(n)
Read Address
(n bits)
Write Address
(n bits)
Trang 5Register Files
Trang 6Functional Units
• Arithmetic units : Adder, Subtractor, Multiplier, Divider
• Logical units : Comparator, AND, OR, XOR …
• Barrel shifter : a digital circuit that can shift a data word
by a specified number of bits in one clock cycle
Trang 7Eight-bit Barrel Shifter
8-bit Barrel shifter
Shift Number (0-7)
8 bits input
8 bits output Sh
Nr
Trang 8Generic structure of the Datapath
Temporary storage
External inputs
External outputs
Result switching network
Functional units Operand switching network
Connections
Connections
Connections
Trang 9Connections in Datapath
ROE
Outputs
Register
R
R
L
Register Files
2n
RE
WE
C RA(n)
WA(n)
MUX
Comparator
F Barrel shifter
Inputs
COE
< = >
Data busses Data
busses
Tri-buffer
S
Trang 10Example 1: Datapath design (1)
Algorithm :
input sum;
FOR i = 1 TO 5
input x;
sum = sum + x;
ENDFOR
outport sum;
Temporary storage:
sum Register
Functional units:
> 5 Comparator
• Each variable and constant corresponds to a register or counter
• Each operator corresponds to a functional unit.
Trang 11Example 1: Datapath design (2)
input sum;
FOR i = 1 TO 5
input x;
sum = sum + x;
ENDFOR
outport sum;
• Connect outputs of registers and counter to input of functional units
• Connect output of functional units to input of registers and counter
Register x
Register sum
Up Counter
i
Register
= 5
L
5
1
Input
1
2 4
3
S
U
5
Trang 12Example 1: Controller design
Input sum;
FOR i = 1 TO 5
input x;
sum = sum + x;
ENDFOR
outport sum;
State A
1 = 0 k0
State B
1 =0 2
State C
1 =1 4
3
State D
1 =1 2
State E
1 =1 5
C 1State F=1 6
0
1
Start=1 Start=0
1 2 3 4 5 6
Start
C
Clk Controller
One-hot FSM
D-FF design
Trang 13Example 2: FSMD Design
Trang 14Thiết kế Datapath cho FSMD thực hiện thuật toán đếm và tính tổng của
các số lớn hơn 10 trong các số x đựơc đưa vào như sau:
cnt=0; sum=0;
Repeat
input x
if (x> 10) then
cnt=cnt + 1; sum=sum + x;
end if;
until x =0;
output sum; output cnt;
Chú ý: 1 0 ≤ x ≤255, 0≤ sum ≤255
Các lệnh viết trên cùng 1 hàng được thực hiện song song
2 Chỉ rõ các thanh ghi trong datapath là bao nhiêu bit