Phase change memory engineering and integration with CMOS technology

Abstract Phase change random access memory PCRAM is one of the strongest contenders to replace the current Flash memory technology, which is reaching its fundamental scaling limits.. Pro

A DVANCED M ATERIALS A ND D EVICE E NGINEERING F OR

2011

A DVANCED M ATERIALS A ND D EVICE E NGINEERING F OR

(B ENG (HONS.)), NATIONAL UNIVERSITY OF SINGAPORE

A THESIS SUBMITTED

FOR THE DEGREE OF DOCTOR OF PHILOSOPHY

DEPARTMENT OF ELECTRICAL AND COMPUTER ENGINEERING

2010

Acknowledgements

First and foremost, I would like to express my appreciation to my research advisors, Dr Yeo Yee Chia, Dr Zhao Rong, and Prof Chong Tow Chong for their support throughout these four years I am thankful to them for sharing their knowledge and experiences, and have benefitted immensely from the valuable insights and guidance from the regular discussions with them In addition, I am especially grateful to Dr Yeo and Dr Zhao, not only in the area of research and academic, but also for their understanding and patience when my mum was seriously ill

Most of my research work was performed at the Data Storage Institute (A*STAR) I would like to thank Dr Li Minghua, for all the discussions we had and help provided during my candidature I would like to highlight the assistance rendered by Cheng Peihwa, Tony Law, Desmond Loke, Toh Yeow Teck, Yang Hongxin and Lim Kian Guan, whom I frequently bugged A special note of thanks goes out to Peihwa, Tony, and Desmond for the friendship and encouragements given

To Dr Sze Jiayin, Dr Lee Hock Koon, and Dr Shi Luping, I would like to acknowledge the helpful pointers they have given

I am also grateful to Zhang Zheng and Dr Pan Jisheng of Institute of Materials Research and Engineering (A*STAR), who have given me a lot of help and provided many useful discussions during the course of my research work Special thanks to Zhang Zheng, who has tirelessly performed my many XPS requests

To the friends I‘ve met in SNDL, Rinus Lee, Koh Shao Ming, Chin Hock Chun, Tan Kian Ming, Andy Lim, Zhang Lu, Liu Fangyue, Ivana, Yang Yue and

many others, I‘m grateful that our paths have crossed In addition, I would also like

to extend my appreciation to the technical staff of SNDL, Mr Yong Yu Fu, Mr O Yan Wai Linn, Mr Patrick Tang, Mr Lau Boon Teck, and Mr Sun Zhiqiang, for their help

in one way or another

Last but not least, I would like to extend my deepest gratitude to my family

To my dad, sisters Amy, Michelle and Sheryl, and Shunfu, thank you for your support throughout this journey Finally to my mum: Even as you‘re no longer here, I still want to tell you ‗Thank you‘, the way you heard it

Table of Contents

Acknowledgements i

Table of Contents iii

Abstract vi

List of Tables viii

List of Figures ix

List of Symbols xix

Chapter 1 Introduction 1.1 Overview for Non-volatile Memory Technology 1

1.2 Phase Change Memory Technology 3

1.2.1 Phase change materials and memory device structures 3

1.2.2 Basic principles of phase change memory 7

1.2.3 Phase change memory integration 9

1.3 Objectives of Research 11

1.4 Thesis Organization 11

1.5 References 14

Chapter 2 Band Alignment of Phase Change and Dielectric Materials 2.1 Introduction 21

2.2 Methodology 23

2.3 Experiment 26

2.4 Results and Discussion 29

2.4.1 Alignment of Ge2Sb2Te5 and various dielectric materials 29

2.4.2 Alignment of nitrogen-doped Ge2Sb2Te5 and SiO2 34

2.4.3 Alignment of GeTe – Sb2Te3 tieline alloys and SiO2 38

2.5 Summary 43

2.6 References 45

Chapter 3 Band Alignment of Phase Change and Metal Contact Materials

3.1 Introduction 52

3.2 Experiment 54

3.3 Results and Discussion 56

3.3.1 Amorphous Nitrogen-doped Ge2Sb2Te5 and Metals 56

3.3.2 Crystalline Ge2Sb2Te5 and Metals 71

3.4 Summary 75

3.5 References 76

Chapter 4 Dependence on the Properties of Ge 2 Sb 2 Te 5 on Nitrogen Doping Concentration and Application in Phase Change Memory 4.1 Introduction 81

4.2 Experiment 82

4.2.1 Material characterization of nitrogen-doped Ge2Sb2Te5 82

4.2.1 Device fabrication and testing setup 83

4.3 Results and Discussion 86

4.3.1 Dependence of material properties on nitrogen concentration 86

4.3.2 Dependence of device performance on nitrogen concentration 93

4.4 Summary 102

4.5 References 103

Chapter 5 Silicide Electrode Contacts for Compact Integration of Phase Change Memory with CMOS Technology 5.1 Introduction 107

5.2 Experiment 109

5.3 Results and Discussion 111

5.3.1 Material Properties and Thermal Analysis 111

5.3.2 Material Interfaces and Band Alignment 116

5.3.3 Device Electrical Characterization 118

5.4 Summary 125

Chapter 6 Silicide Metal Contact and Dielectric Interlayer for Operation

Power Reduction in Phase Change Memory

6.1 Introduction 130

6.2 Simulation of Thermal Properties 131

6.3 Results and Discussion 137

6.3.1 Device Fabrication 137

6.3.2 Device Electrical Characterization 139

6.4 Summary 147

6.5 References 148

Chapter 7 Conclusion and Future Work 7.1 Conclusion 152

7.1.1 Band alignment of phase change and dielectric materials 153

7.1.2 Band alignment of phase change and metal contact materials 153

7.1.3 Dependence on the properties of Ge2Sb2Te5 on nitrogen doping concentration and application in phase change memory 154

7.1.4 Silicide electrode contacts for compact integration of phase change memory with CMOS technology 155

7.1.5 Silicide metal electrode contact and dielectric interlayer for operation power reduction in phase change memory 155

7.2 Future work 156

7.3 References 158

Appendix A List of Publications 161

Abstract

Phase change random access memory (PCRAM) is one of the strongest contenders to replace the current Flash memory technology, which is reaching its fundamental scaling limits PCRAM is an electrically-induced thermally-activated device in which joule heating plays an important role in phase transformation and data storage Not only does PCRAM exhibit fast switching speed and high endurance,

it also has excellent scaling capability and compatibility with complementary oxide-semiconductor (CMOS) technology Materials engineering may be performed

metal-to tailor the properties of the phase-change material for improvement of memory device characteristics This thesis summarizes work on advanced materials and device engineering for PCRAM technology

The energy band alignment between Ge-Sb-Te based phase change materials and common microelectronic materials such as dielectrics and metals was first investigated Significant Fermi level pinning at the interface between phase change materials and metals was discovered The results are useful for calculation of leakage currents between closely spaced cells as well as the contact resistance in PCRAM

Nitrogen-doped Ge2Sb2Te5 PCRAM devices were fabricated and the dependence of the electrical characteristics on nitrogen content in Ge2Sb2Te5 was investigated next Two regimes of the crystallization process were observed, depending on the nitrogen content in Ge2Sb2Te5 Introduction of a small amount of nitrogen in Ge2Sb2Te5 was found to be useful for optimization of device performance The criterion for fast switching and good device performances were evaluated based

on material and device characterization

Energy band alignment studies show that metal silicides could possibly offer better contacts than conventional heater materials Various metal silicides were investigated to assess their suitability as a contact material in PCRAM devices Memory cells with metal silicide contacts and optimized nitrogen-doped Ge2Sb2Te5were fabricated Good device performance was achieved Further improvement to this structure was made by inserting a thin dielectric layer at the interface between the silicide and phase change layer The low thermal conductivity dielectric layer reduces thermal diffusion, thus enabling reduction of the reset current Exploration of advanced materials and device designs opens up new avenues for compact PCRAM device design and integration with CMOS technology

List of Tables

Table 3.1 Effective work function m,eff of Al, W and Pt on the various

nitrogen-doped GST The vacuum work functions m,vac of the respective metals are also shown for comparison .60

Table 3.2 Various material parameters for nitrogen-doped GST The

bandgap (E g ), electron affinity (χ), and charge neutrality level (E CNL ) measured with respect to the vacuum level (E vac) are shown in units of eV The experimentally extracted slope

parameter (Sx) and the dielectric constant (ε∞) are also recorded .63

Table 3.3 Theoretical and experimental conduction and valence band

offsets between GST and materials such as Si, SiO2, HfO2, Ta2O5, and Si3N4 The charge neutrality values ECNL of the respective

materials above the valence band edge used in the calculation are also listed .71

Table 6.1 Electrical resistivity and thermal conductivity values of various

materials used in the simulation .133

List of Figures

Fig 1.1 Ge-Sb-Te ternary phase diagram depicting various phase change alloys

Stoichiometric compositions that reside on the tieline of GeTe and

Sb2Te3 are shown .5Fig 1.2 Typical PCRAM device configurations The programmable phase

change volume is located near the phase change/ heater interface in (a), and located in the confined pore in (b) .6Fig 1.3 The DC current-voltage characteristics of a PCRAM device, featuring

a 160 nm pore diameter, and a 60 nm thick Ge2Sb2Te5 phase change film 8Fig 1.4 Programming of a PCRAM device involves applying electrical pulses

that causes the temperature in the phase change material to reach the melting point during the RESET process, or the crystallization point during the SET process Reading of the device state is performed at low biases .9Fig 1.5 Schematic of a 3 x 3 matrix comprising a MOSFET selection device

and a PCRAM memory element .10Fig 2.1 A generic phase change memory cell with dashed boxes depicting the

various interfaces present in a memory device These include the phase change/metal and phase change/dielectric interfaces .22Fig 2.2 Schematic flatband diagram for the band line-up (a) at the interfaces

between two semiconductor materials, X and Y and (b) at a metal/ semiconductor interface Measurement of both the bulk and interface core level binding energies allows a more precise determination of

ΔE V , ΔE C and ΦB p 25Fig 2.3 The core level and valence band spectra for (a) amorphous GST, (b)

SiO2, (c) HfO2, (d) Ta2O5, and (e) Si3N4 bulk layers The intercept between the base line and the slope of the leading edge gives the VBM

of the sample, where the Fermi level is taken as the reference level Energy differences between the core-level and the VBM is also shown.30

Fig 2.4 Normalized XPS spectra for interface samples Core level spectra of

Te 3d5/2, Si 2p or Hf 4f for the respective materials are shown in (a) GST/SiO2, (b) GST/HfO2, (c) GST/Si3N4, and (d) GST/Ta2O5 samples.31Fig 2.5 O 1s or N 1s energy-loss spectra for thermally grown SiO2, MOCVD

HfO2, sputter-deposited Ta2O5, and LPCVD Si3N4 .33Fig 2.6 Energy band diagrams showing the valence and conduction band

offsets of SiO2, HfO2, Ta2O5, and Si3N4 with respect to Ge2Sb2Te5

(GST) Amorphous GST with a bandgap E g,GST of 0.7 eV is the material on the left of each pair of materials Band offset values shown are in units of eV .33Fig 2.7 The Te 3d5/2 core-level (left) and valence band spectra (right) for 100

nm amorphous N-GST The energy difference between the core-level and the VBM from the undoped sample to that of a doping content of 8.4 at % differ by ~ 0.27 eV .34Fig 2.8 The Te 3d5/2 (square symbols) and Si 2p (circle symbols) core-level

spectra for ultrathin N-GST films on SiO2/Si Energy differences between the two core-levels are also shown .35Fig 2.9 The valence band offset (ΔEV) and conduction band offset (ΔEC)

between NGST and SiO2 With increasing nitrogen concentration,

ΔEV decreases linearly while ΔEC increases linearly .36

Fig 2.10 A schematic energy band diagram of the energy band offsets between

N-GST and SiO2 Energy values shown are in units of eV, and are taken with respect to the valence band of the undoped N-GST Top

and bottom edges of each rectangle represent E C and E V, respectively.37Fig 2.11 The Te 3d5/2 core-level and valence band spectra for 100 nm

amorphous alloys lying along the tieline of GeTe – Sb2Te3 The solid and open symbols represent the core-level (left) and valence band (right) spectra respectively .39Fig 2.12 The Te 3d5/2 (square symbols) and Si 2p (circle symbols) core-level

spectra for ultrathin amorphous alloy films on SiO2/Si Energy differences between the two core levels are also shown .39

Fig 2.13 The (a) absorption coefficient, α, and the (b) bandgap of the various

amorphous phase change alloys lying on the pseudobinary line of GeTe – Sb2Te3 41Fig 2.14 The valence band offset (ΔE V ) and conduction band offset (ΔE C)

between amorphous alloys lying along the tieline of GeTe – Sb2Te3and SiO2 .42Fig 2.15 A schematic energy band diagram of the energy band offsets between

(GeTe)x(Sb2Te3)1-x alloys and SiO2 Energy values shown are in units

of eV Top and bottom edges of each rectangle represent EC and EV,

respectively .43Fig 3.1 (a) The VB spectra for GST with various nitrogen doping

concentrations (0, 3.5, 6.2, 7.7, and 8.4 atomic percent) The reference for the spectra is the Te 3d5/2 core level spectra of the undoped GST sample The Te 3d5/2 core-level spectra for an ultra thin metal of (b) Al, (c) W and (d) Pt deposited on the various N-GST films The spectra have been referenced with respect to the Al 2p3/2, W 4f7/2 and Pt 4f7/2

peak binding energies of bulk Al, W and Pt in (b), (c) and (d) respectively .55Fig 3.2 Measured hole barrier as a function of nitrogen doping concentration

for the contact between various metals and N-GST films A less negative hole barrier results from an increased nitrogen content in N-GST, while a more negative barrier could be achieved by using a metal with a higher work function .57Fig 3.3 (a) Plot of (αhν)1/2 vs photon energy for the amorphous GST samples

with atomic nitrogen concentrations from 0 to 8.4 % For each sample, linear extrapolation of the data to the abscissa obtains the bandgap The extrapolation for the undoped GST is illustrated using a dashed line (b) shows the bandgap of N-GST samples which increases with increasing nitrogen concentration .59

Fig 3.4 The dependence of the real part of the complex dielectric function on

wavelength is plotted for GST films with nitrogen concentrations from

0 to 8.4 % .60Fig 3.5 Effective work function of Al, W, and Pt versus their vacuum work function

on (a) 0 at %, (b) 3.5 at %, (c) 6.2 at %, (d) 7.7 at %, and (e) 8.4 at % nitrogen concentrations The dashed line refers to the metal work functions when there is no Fermi-level pinning of the metals The intercept between the dashed and straight line denotes the charge neutrality level of the phase change material, represented by a shaded circle in the figures 62Fig 3.6 (a) The extracted slope parameter as a function of nitrogen doping

concentration in the phase change films Increasing the nitrogen content does not appear to have a significant impact on the slope parameter of the phase change material (b) Plot of the slope parameter versus the dielectric constant for a wide range of materials The solid data points in the plot show how the properties of the phase change materials compares with well-established values of various semiconductor materials (open symbols) .65Fig 3.7 Schematic energy band diagrams when a metal (Al) and phase change

material (GST) are (a) not in contact, and (b) in contact with each other Φdipole is almost constant as nitrogen content in the phase change material increases, while it increases with the work function of the overlayer metal 67Fig 3.8 Schematic energy band diagrams when a metal (Pt) and phase change

material (GST) are (a) not in contact, and (b) in contact with each other Φdipole is almost constant as nitrogen content in the phase change material increases, while it decreases with the work function of the overlayer metal 68Fig 3.9 The electric dipole contribution between the various metals and GST

as a function of nitrogen doping concentration The larger difference

in electronegativity between N-GST and the metal adjacent to the

phase change film results in a ~ 0.6 eV increase to the electric dipole term .69Fig 3.10 XRD plot depicting the FCC phase of crystalline GST was achieved

after annealing .72Fig 3.11 The VB (line] and Te 3d5/2 core level (solid symbols) spectra of the

undoped crystalline GST The Te 3d5/2 core-level spectra (open symbols) for in situ annealed ultra thin metal of Al, W or Pt deposited

on the GST films .72Fig 3.12 Plot of the measured barrier height of amorphous and crystalline GST

as a function of the metal vacuum workfunction Crystalline GST gives a larger hole barrier height as compared to that in the amorphous state .73Fig 3.13 (a) Comparison of the valence band and core level spectra of bulk

amorphous and crystalline GST (b) Core level spectra of the interfacial samples of GST in the amorphous and crystalline phase Shifts between the amorphous and crystalline phase in the peak binding energy are observed .74Fig 4.1 (a) Schematic diagram of fabricated PCRAM device structure (b)

TEM image of a device investigated in this work The active contact region is 1 μm in diameter .85Fig 4.2 A schematic diagram of the testing circuit used for electrical pulse

measurements .85Fig 4.3 X-ray diffraction plots for atomic nitrogen concentration of (a) 0 % (b)

3.5 % (c) 6.2 % and (d) 8.4 % GST films The films were annealed at temperatures of 150 ºC, 250 ºC and 350 ºC in N2 ambient for 10 min Diffraction peaks appear at higher crystallization temperatures for the nitrogen-doped GST samples .87Fig 4.4 The effect of nitrogen addition as well as annealing temperature on the

grain size of the phase change material Presence of nitrogen suppresses grain growth, while higher annealing temperatures promote

the formation of nucleation sites, both giving rise to smaller grain sizes 90Fig 4.5 Change in resistance as a function of temperature for GST films with

nitrogen concentration from 0 to 8.4 atomic percent The 50 nm thick films were heated from room temperature to 300 °C at a rate of

5 °C/min The change in slope during the crystallization process indicates a change of the crystallization process as nitrogen concentration increases .92Fig 4.6 Sheet resistance measurements as a function of annealing temperature

for various nitrogen doping concentration There appears to be two regimes of crystallization depending on the nitrogen content in the phase change film Direct transformation from the amorphous to the HCP phase occurs for atomic nitrogen concentration greater than 3.5 percent .93Fig 4.7 Plot of (a) normalized resistance against SET current for programming

pulse width of 300 ns and (c) normalized resistance against RESET current at pulse width of 10 ns The resistances were normalized to the SET resistance of 20 kΩ .95Fig 4.8 Contact resistances between amorphous nitrogen-doped GST and TiW

bottom electrode The addition of nitrogen into the GST film increases the contact resistance between the phase change material and the metal contact substantially, which ameliorates the current required to set the PCRAM device .96Fig 4.9 Dependence of (a) SET current and (b) RESET current on various

pulse widths as a function of nitrogen doping concentration As compared to the device with undoped GST, the SET current is generally reduced when the GST is doped with nitrogen .99Fig 4.10 (a) Cell resistances in SET and RESET states on the number of

SET/RESET cycles, with an initial resistance ratio of at least 2 orders

A one order increase in SET/RESET cycles is achieved for the 3.5 atomic percent nitrogen-doped device over the undoped one (b)

Endurance characteristics as a function of nitrogen doping content PCRAM devices with 3.5 atomic percent nitrogen content exhibits the best endurance behaviour, while the endurance capability subsequently degrades on further addition of nitrogen .101Fig 5.1 Schematic of two memory cell designs (a) Conventional 1T-1R

memory cell employing W plug as a heater, and (b) a novel compact cell design exploiting the silicided drain of the transistor as heater and W-based metal as a top electrode .108Fig 5.2 Schematic diagram (left) of a fabricated PCRAM device TEM

images showing various material layers in the contact region The poly-crystalline nature of the phase change material (N-GeSbTe or N-GST) is clearly seen .110Fig 5.3 Plot of the electrical resistivity and thermal conductivity of common

heater materials (W, TiW, TiN), and those of the silicides (NiSi, PtSi) used in this work The heater material should preferably have low thermal conductivity and high electrical resistivity for efficient heating 112Fig 5.4 Simulated temperature distribution of the memory cell structure

fabricated in this work after being pulsed at 0.85 V for 30 ns The pulse is applied from time = 0 to 30 ns Cell structures using (a) TiW, (b) NiSi and (c) PtSi as the bottom contacts were considered, with the temperature profiles at time = 30 ns being shown (d) Temperature changes in the N-GST layer as a function of time The peak temperatures attained in devices with NiSi and PtSi bottom electrodes are comparable with that of a device with TiW bottom electrode This indicates that the silicides could be used as heaters in PCRAM devices.114Fig 5.5 Measured sheet resistance as a function of annealing temperature for

NiSi (open symbols) and PtSi (solid symbols) The sheet resistance does not significantly degrade up for NiSi to an annealing temperature

of 650 oC, while it remains approximately constant for PtSi .115

Fig 5.6 XPS measurements (left) for metallic (a) TiW, (b) NiSi and (c) PtSi

samples The core-level (solid symbols) and VB spectra (solid line) are obtained from the bulk TiW, NiSi, and PtSi samples The measured core-level spectra for a thin layer of N-GST film on the bulk metallic samples are plotted in open symbols Energy band diagrams

in the inset depict the effective band alignment Increasing the electrode workfunction gives a smaller hole barrier with respect to the valence band of N-GST Using NiSi or PtSi as the bottom metal electrode gives a smaller contact resistance in comparison with TiW.117Fig 5.7 R–V characteristics of a typical PCRAM with NiSi or PtSi bottom

electrode using a pulse width (PW) of 800 ns in (a) and 30 ns in (b) The devices were initially programmed to the amorphous state and crystalline states in (a) and (b), respectively .119Fig 5.8 Plot of (a) SET programming current and (b) RESET programming

current as a function of pulse width Low programming currents of less than 0.8 mA is sufficient to program the devices .121Fig 5.9 Distribution plots of the (a) SET current and (b) RESET current of

devices with silicided bottom electrode, at pulse widths of 800 ns and

30 ns in (a) and (b), respectively A mean ISET of 0.26 mA and 0.14

mA is attained for devices with NiSi and PtSi bottom electrodes,

respectively, while mean I RESET values of 0.76 mA and 1.18 mA corresponding to devices with NiSi- and PtSi bottom electrode, respectively, are obtained 122Fig 5.10 Cumulative SET and RESET resistances distribution for PCRAM

devices with (a) NiSi or (b) PtSi bottom electrode The resistances are normalized to the median SET resistances of each group of devices The higher resistances exhibited by PtSi bottom electrode devices is attributed to its higher intrinsic resistivity as compared to NiSi Both types of devices display a median resistance window of at least one order of magnitude (c) The resistance ratio distribution for devices with NiSi and PtSi bottom electrodes .123

Fig 5.11 DC I-V sweep of PCRAM devices with silicided bottom electrode,

displaying threshold switching characteristics A lower threshold voltage was obtained for the PCRAM device with NiSi bottom electrode Multiple snap back events were also observed for both types of devices, implying multi-state storage capability .124Fig 5.12 Threshold switching voltage distribution obtained from DC I-V

measurements Devices with NiSi or PtSi bottom electrode exhibit a

mean V TH of 2.15 V and 2.76 V, respectively .125Fig 6.1 Simulated temperature profile of RESET process of phase change

memory devices fabricated in this work: (a) without and (b) with

Ta2O5 interlayer A 0.65 V 30 ns pulse was applied and the temperature profiles were taken at the end of the pulse The peak temperature located in the phase change (PC) layer, and is higher in a device with the Ta2O5 interlayer .135Fig 6.2 (a) Temperature as a function of time for a 0.65 V pulse with various

pulse widths This device has a Ta2O5 interlayer between GST and NiSi bottom electrode (b) Simulated peak temperature recorded at the end of the voltage pulse as a function of pulse width The magnitude

of the voltage pulse is 0.65 V A longer pulse width leads to a higher peak temperature .136Fig 6.3 Schematics showing the cross-section of devices fabricated in this

work: (a) Control PCRAM device without Ta2O5 interlayer, and (b) PCRAM device with a Ta2O5 interlayer between the phase change (PC) material and the NiSi bottom electrode contact The phase change material is GST with 3.5 atomic percent of nitrogen (c) TEM cross-section images of PCRAM device with a ~2 nm Ta2O5 interlayer .138Fig 6.4 Resistance versus voltage (R–V) characteristics of typical PCRAM

devices for (a) programming pulse width of 30 ns during the RESET process and (b) for programming pulse width of 400 ns during the SET process The resistances have been normalized to the RESET resistances of the corresponding devices .140

Fig 6.5 (a) Dependence of average applied voltage on pulse widths for the

RESET process (b) Distribution plot of the applied RESET voltage for the measured devices Employing a Ta2O5 interlayer enables a lower applied voltage to switch the PCRAM device .141Fig 6.6 Plot of programming RESET current as a function of pulse widths

Lower programming RESET currents can be achieved employing a

Ta2O5 interlayer .144Fig 6.7 Plot of SET programming current as a function of pulse widths A

slight increase in programming set current was observed when a Ta2O5

interlayer was incorporated into the device .144Fig 6.8 Normalized cell resistances in SET (open symbols) and RESET (solid

symbols) states plotted against the number of SET/RESET cycles for PCRAM devices (a) without Ta2O5 interlayer, and (b) with Ta2O5

interlayer on a NiSi bottom electrode .145Fig 6.9 SIMS analysis of (a) as-deposited and (b) annealed samples of

TiW/GeSbTe/Ta2O5/NiSi/substrate structures The sample in (b) was annealed at 400 oC for 10 s in N2 ambient .146

List of Symbols

Q Joule heat per unit volume and time J m-3 s-1

Φdipole Dipole moment eV

Φm,eff Effective workfunction of metal eV

Φm,vac Vacuum workfunction of metal eV

Chapter 1

Introduction

1.1 Overview for Non-volatile Memory Technology

Non-volatile memory is ubiquitous in the electronics market and is commonly found in consumer goods such as computers, cellular phones, mp3 players etc Flash memory technology has dominated the NVM market; however, scaling of conventional floating-gate non-volatile semiconductor memory is impeded by the tunneling oxide thickness set at a practical limit of ~ 8 nm to obviate stress-induced leakage current (SILC) issues which can severely impair device reliability and data retention [1] Advances in Flash memory technology has shifted from the floating-gate configuration to charge-trapping like structures such as the polysilicon-oxide-nitride-oxide-silicon (SONOS), in which its variations include structures integrating high-κ dielectrics and metal gates to eradicate high leakage current and erase saturation issues in addition to achieving low operating voltage and high programming speed [2] – [6] However charge-based memories at nanoscale dimensions suffer from limited number of stored electrons available and low electron loss threshold for acceptable multi-level cell operation [7] For continuous scaling into the nanometer regime, new NVM technology has to be invented to surmount the problems encountered by Flash memory

This therefore presents an opportunity for researchers to come up with disruptive memory technologies, which move away from the practical limits of charge storing Alternative memory technologies such as ferroelectric random access memory (FeRAM), magnetic random access memory (MRAM), and phase-change random access memory (PCRAM) have been poised as potential candidates for the next-generation non-volatile memory

FeRAM exhibits high speed, low power and voltage, as well as integration with complementary-metal-oxide-semiconductor (CMOS) technology [8] However, FeRAM still face issues such as degradation of remnant polarization with time, loss

of polarization as well as the lost of signal with scaling The advantages of MRAM are its fast speed, straightforward integration with CMOS at the back-end-of-line and its high endurance cycles [9] Moreover, a cross-point memory could be enabled by simply passing a current through two wires creating a magnetic field to write a cell

On the other hand, its resistance change between states are smaller than the other memory technologies and electromigration induced damaged on the wires due to high write currents are critical issues that needs to be resolved [9] – [10] Spin-torque transfer MRAM (STT-MRAM) however, is gaining interest due to its simpler cell architecture, and greater scalability as compared to conventional MRAM It requires

a lower write current than a conventional MRAM, exploiting the spin-polarized current induced magnetization switching effect [11]

Among the various next-generation memory technologies, PCRAM has been stipulated to be the memory technology of choice beyond 15 nm They exhibit fast access time, high overwrite cycle capability as well as low cost and power

Table 1.1 Comparison of key parameters for competing non-volatile memory technologies,

where ‗F‘ refers to the feature size [1]

NOR - Flash

Multibit

consumption [12] The main advantage PCRAM has over the other memory technologies is its inherent scaling capability On the other hand the high programming current in a PCRAM device could however be a major obstacle for PCRAM technology, depending on the ability of the access device to provide sufficient current in a dense memory array [13] – [14] Table 1.1 illustrates a comparison of various important parameters of the various emerging memory technologies being researched

1.2.1 Phase change materials and memory device structures

Chalcogenide phase change materials are used in PCRAMs due to their phase reversible switching properties Phase change materials can exist in two stable states,

atoms have short range order and exhibits high electrical resistance values, while in the crystalline state, the atoms are arranged in a periodic fashion with long range order and exhibits low electrical resistance values The difference in electrical resistance between the amorphous and crystalline phases can be a few orders of magnitude This large difference in electronic properties of the different phases of the phase change alloys are exploited for information storage in PCRAMs

Easy glass formers during the melt-quench (or RESET) process are preferably used as phase change materials in PCRAM These materials retain their compositions during crystallization to avoid phase segregation effects As the RESET process determines the minimum current requirement, the melting temperature of the phase change material should be sufficiently low for low switching power but yet high enough to maintain good stability at operating temperatures High crystallization rates are also desirable for fast switching properties

Suitable phase change materials typically comprise of alloys containing group

VI elements such as S, Se and Te, amongst which, compositions based on Ge, Sb and

Te are most common An example of which, is Ge2Sb2Te5 (GST) exhibiting the metastable face-centered cubic (FCC) structure, as well as the stable hexagonal structure in the crystalline phase In the FCC phase, the Te atoms occupy one octahedral lattice site, while the Ge and Sb atoms occupy the second octahedral lattice site, containing 20 % vacancies [15] The presence of these vacancies has been proposed to minimize the energy state in the distorted rocksalt (or FCC) structure, and

is responsible for the high crystallization speed in the phase change alloy [16] On the other hand, a spinel structure has been postulated for the amorphous phase, where

the Ge atoms take up the tetrahedral coordination, while the Sb and Te atoms assume

the octahedral positions [17] Ab-initio density functional theory calculations show

that similar ground state energy was achieved in both the distorted rocksalt and spinel structure, resulting in the existence of these two structures that can be reversibly switched at nanoscale time frames [17]

Fig 1.1 shows the ternary phase diagram where stoichiometric alloys that lie

on the pseudobinary line of GeTe and Sb2Te3 are indicated, i.e (GeTe)x(Sb2Te3)1-x These alloys include Ge1Sb2Te4, Ge2Sb2Te5, and Ge1Sb4Te7 Along the pseudobinary line, the properties change from high crystallization temperature (or high stability) in GeTe, to high crystallization speed (or low stability) in Sb2Te3 [18] A material composition selected from the pseudobinary line may be allowed to achieve both achievements of fast crystallization with reasonable stability in phase change random access memory (PCRAM) devices concurrently

Fig 1.1 Ge-Sb-Te ternary phase diagram depicting various phase change alloys Stoichiometric compositions that reside on the tieline of GeTe and Sb 2 Te 3 are shown

Increasing switching speed Ge

Increasing switching speed

Two of the most commonly employed PCRAM structures are schematically shown in Fig 1.2 In Fig 1.2 (a), the current is forced to pass through the contact area at the interface of the heater and phase change layer The high temperature region is near the heater electrode and hence the programmable phase change volume

is thus determined by the contact area at the interface This therefore sparks interest

to reduce the dimensions of the heater Fig 1.2 (b) depicts another typical cell design where the phase change material is confined within a pore The high temperature region for such a structure is located within the central region of the pore away from the electrode, thereby reducing the dissipation of heat via the electrode A lower RESET operating current is thus expected Besides the above-mentioned cell designs, various innovative structures have also been proposed to improve PCRAM device performances Examples of which are, µ-trench [14], edge contact [19], superlattice-like [20] and phase-change bridge [21] – [22] device structures These designs potentially provide solutions for advanced scaling of phase change memory devices

Fig 1.2 Typical PCRAM device configurations The programmable phase change volume is located near the phase change/ heater interface in (a), and located in the confined pore in (b)

1.2.2 Basic principles of phase change memory

The DC current-voltage (I-V) characteristic of a typical PCRAM device in both the

amorphous and crystalline phase is illustrated in Fig 1.3 The I-V curves depict two regimes

the device can reside in, i.e the ON or OFF state In the amorphous or OFF state, the resistance is high at low biases Upon increasing the bias further until the threshold voltage

(V th) is reached, threshold switching takes place and the electrical conductivity of the materials enhances significantly This causes the current to increase rapidly with a snap-back characteristic, where the material is in the ―amorphous-on‖ (partially crystalline) phase Further increase in the current to values in the ‗SET‘ regime leads to crystallization of the film This unique behaviour of phase change materials has been attributed to the interplay between impact ionization and carrier combination effects [23], without which, a much higher electrical power would be required to operate in the amorphous phase In the

crystalline or ON state, the V curve is almost ohmic (solid symbols), and approaches the

I-V of the amorphous state at high biases The current requirements for the SET, RESET and

READ operations are shown in the circled regions

Fig 1.4 depicts the temperature-time evolution of the SET, RESET and READ operations, respectively In the SET operation, i.e from ‗0‘ to ‗1‘, a phase change material is converted from the amorphous to the crystalline state An electrical pulse of low magnitude is applied to the device to cause the material to be heated to above its crystallization temperature This pulse is applied for a sufficiently long duration to enable the atoms to rearrange themselves into a periodic manner, thus achieving the crystalline or low resistance state The reverse occurs for the RESET operation Conversion of the phase change material from the crystalline to the amorphous state, i.e from ‗1‘ to ‗0‘ bit, requires an electrical pulse of a much

larger magnitude than the SET operation The large magnitude of this pulse causes the temperature in the phase change material to reach its melting point This pulse,

on the other hand, is applied for a very short duration, in the order of tens of nanoseconds Therefore, the material will be quickly quenched, resulting in the random arrangement of the atoms The larger magnitude of the RESET bias therefore sets the minimum current requirement for PCRAM operation Finally, the readout operation is performed at a low enough bias such that the current state of the device will not be disturbed

Fig 1.3 The DC current-voltage characteristics of a PCRAM device, featuring a 160

nm pore diameter, and a 60 nm thick Ge 2 Sb 2 Te 5 phase change film [23]

0.0 0.5 1.0 1.5

READ

V

th

RESET SET

Amorphous

Fig 1.4 Programming of a PCRAM device involves applying electrical pulses that causes the temperature in the phase change material to reach the melting point during the RESET process, or the crystallization point during the SET process Reading of the device state is performed at low biases

1.2.3 Phase change memory integration

Besides optimizing the memory device, integration of the PCRAM component

in the CMOS technology is also important The memory element is usually integrated at the back end-of line processing steps, after formation of the access device A schematic drawing of a simple array is provided in Fig 1.5 In the array, the PCRAM device is usually connected to the drain region of a transistor via a W plug This defines the bit line The source region of the transistor will usually be grounded The gate, which is connected to the word line, will be used to activate the selected device The programming current is hence limited by the current that can be provided by the access device

A major drawback of PCRAM technology is its high RESET current requirement; thus significant amount of work has been focused on reducing the programming current through material engineering Dopants such as bismuth [24],

tin [25], indium [26], oxygen [27], nitrogen [28], antimony [29], silicon [30], silicon oxide [31] have been used to modify the material properties of Ge-Sb-Te Nitrogen doping into Ge-Sb-Te is one of the simplest way to introduce impurities to alter material properties On the other hand, introducing alternative phase change materials such as GeTi [32], InGeTe [33], SbSe [34], SiSb [35], InSe [36], and SnSe [37] and have also shown promising results Further research is still required to assess the merits of these materials in comparison with the well-established Ge-Sb-Te system

In addition, critical aspects for the integration includes, but not limited to, good adhesion of the phase change material on the underlying substrate; suitable electrode material as the heater; material inter-diffusion effects at high temperatures; and low contact resistance properties between the electrode and phase change material, etc Electrical and thermal cross-talk [38], as well as cell efficiency [39] are also potential issues for device integration, especially at the array level

Fig 1.5 Schematic of a 3 x 3 matrix comprising a MOSFET selection device and a

PCRAM memory element

1.3 Objectives of Research

The objective of this thesis aims to explore potential issues accompanying novel material integration into phase change memory devices by examination of the energy band alignment of phase change materials with the surrounding materials contacting it This enables the screening and evaluation of potential material candidates, even before integrating them into electrical devices A thorough investigation on the properties of phase change materials and integration with materials frequently exploited in CMOS transistor technology into phase change memory devices will be furnished in this work The results achieved will provide a systematic guideline in the selection of suitable materials for implementation into future phase change memory devices

1.4 Thesis Organization

The main issues discussed in this report are documented in the following chapters In Chapter 2, a technique to determine the energy band alignment in phase change research was introduced The energy band alignment of phase change material with various dielectric materials was thus investigated Dielectric materials that are prevalently used in the CMOS technology fabrication process were studied The phase change material featured here is the most commonly exploited Ge2Sb2Te5

in PCRAM devices Changes in the band lineups due to nitrogen doping were also examined Finally, the band lineups of (GeTe)x(Sb2Te3)1-x phase change alloys were investigated This work enables a comprehensive understanding of the band

alignment of phase change materials with its surrounding materials for future device integration and optimization

Due to the simple and effective method to improve phase change memory device performances, the electronic properties of nitrogen-doped Ge2Sb2Te5 were extensively investigated in Chapter 3 Their barrier heights with various metals in both the amorphous and crystalline state were studied Intrinsic material properties of the amorphous phase change materials were extracted This work performed the first experimental determination of the charge neutrality levels and slope parameters of phase change materials Finally, the experimentally determined energy band alignment of amorphous Ge2Sb2Te5 with various materials was compared with that obtained from the well-known charge neutrality theoretical model, thereby verifying the applicability of this technique in phase change technology

To further investigate the effect of nitrogen doping, the dependence of the electrical properties of Ge2Sb2Te5 on nitrogen doping concentration was investigated

in Chapter 4 A detailed study on the macroscopic properties of nitrogen doping into

Ge2Sb2Te5 over a range of atomic concentration was examined Although initial addition of nitrogen resulted in improved phase change memory device performances,

we show that there is an optimal amount of nitrogen that can be added to the phase change material before degradation in device performance ensued Approaches for enhancement of thermal stability and reduction of reset current in phase change memory devices were also discussed

In Chapter 5, to explore the possibility of direct integration of PCRAMs with the transistor logic device, PCRAM cells utilizing silicides as the bottom electrode as

well as a heater material was demonstrated Electrical and simulation results demonstrate the feasibility of employing silicides as a bottom electrode/heater in a PCRAM The memory cells fabricated show promising results such as low programming currents and sufficient resistance ratio between the SET and RESET states Since PCRAMs are electrically induced thermally activated devices, the role of silicides as efficient heaters and their impact on the electrical characteristics at the contact interface with the phase change material are examined This work therefore enables the integration of PCRAM directly on the silicided drain regions of metal-oxide-semiconductor field-effect-transistors (MOSFETs), facilitating compact integration with reduced process complexity and cost

Chapter 6 demonstrates an improved PCRAM structure from Chapter 5, which integrates a silicide bottom electrode and a high-κ dielectric interlayer at the interface between the bottom electrode and phase change layer The presence of a low thermal conductivity thin film between the bottom electrode and phase change layer promotes heating efficiency in the device Low programming currents and good device performances were achieved; illustrating the combination of such can lead to a reduction in operation power

Finally, the main contributions of this thesis and suggestions for future work are summarized in Chapter 7

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