You CAN Do Digital Filtering with an MCU!

 Challenge: “More and More Sensors are required by our “Smart” devices and reliable filtering is required to separate the signal from the noise.”  Solution: “This lecture will introduc

You CAN Do Digital Filtering with an MCU!

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 Challenge:

“More and More Sensors are required by our “Smart” devices and reliable filtering is required to separate the signal from the noise.”

 Solution:

“This lecture will introduce you to some of the basic concepts of

‘Enabling The Smart Society’

Wireless Module

Doctor, your patient is in distress

Inphase Filter Frequency Response

-80 -60 -40 -20 0 20

 Fixed point and floating point principles

 Fixed point vs floating point benchmark

Example Filter Applications

MCU

ADC Voice Recorder

Microphone

Filter Applications – The Boxcar Filter

 Very common to perform a “running” average

 Sum n samples, scale the output (usually divide by n)

 Recalculate each time one new sample comes in

 Very simple FIR called boxcar

 All coefficients equal to 1

 Example of 8 kHz sampling rate, 8 tap FIR

Filter Types - FIR

 Typically the gain = 1

 Does not always have Decimation

 Decimation can be on front or back end

X[n] – Input samples

Filter Types - IIR

 In addition to a forward path there is a feedback path

+

Z-1-ak

X[n] – Input samples

Y k [n] – Output

b k [n] – Feed forward Coefficients (multiplies)

FIR versus IIR*

 FIR

 Phase-linear

 Simple instructions, single loop

 Suited for Multi-rate (decimation or interpolation allows some calculations

to be omitted)

 Desirable Numeric properties (finite-precision can usually be implemented using lower number of bits)

 Possible to implement with coefficients less then 1.0

 May require more memory and calculations than the IIR

 Some responses are just impractical to implement in FIR

 IIR

 Less memory and calculations for a given filtering characteristic

 Arithmetic errors compounded by feedback

 Harder to implement using fixed point

 Not as easy to do multi-rate (decimation and interpolation) Not phase-linear

Designing the Filter

 Programs like ScopeFIR, ScopeIIR or WinFilter simplify the task of designing a filter

Identifying the Noise

 Programs like ScopeDSP allows inputting ADC data and running FFT

Identifying the Noise

 The FFT clearly identifies a 1k,2K,4K and 8K component

Sampling Theorem

Nyquist-Shannon Sampling Theorem

“If a function x(t) contains no frequencies higher than B hertz, it is

completely determined by giving its ordinates at a series of points

spaced 1/(2B) seconds apart.”1

Sometimes this is incorrectly stated:

To not lose information you must sample at twice the highest frequency you are concerned with in a signal

Simply stated:

A signal can only be properly sampled if it contains no frequencies greater than one-half the sampling frequency

Aliasing Problem

 Record voice data and store

 Limit voice bandwidth to 4 kHz

Anti-aliasing filter

+

-12

Actual Response of 2nd Order 4 kHz Filter

Frequency Response of 8 Tap 4 kHz Filter

-12dB line

Improved 4 kHz Filter

Oversampling and digital filtering

 Sample at 32 kHz instead of 8 kHz

 Only signals 16 kHz or greater will alias

 Could use simple RC or no anti-aliasing filter

Oversampling and digital filtering

 Decimate results

 Store every 4 th sample

 Only calculate filter at 8 kHz

S1 S2 S3 S4 S5 S6 S7 S8 S9 S10 S11

Signal to Sample

Sampling at 32 kHz rate

Data Point1 = X1*S1+X2*S2… +X8*S8 Data Point2 = X1*S5+X2*S6… +X*S12

S12

X1,X2… are filter coefficients

Multi-rate and Decimation

 Temp cannot change more than 1 degree/ hour

 Required sampling rate for 1 degree logging

 Noise with 1 second period, averages out in 4 readings

 Sampling rate for noise

x

x

x x

x

x

x x

x

x

x x

x

x

x x

Temperature

x

x x x

ADC Considerations - Skew

 Problems:

 Interrupt Skew

– 32 kHz requires sampling every 31.25 uS

 Software start ADC possibility of sample skew

 Other interrupts in the system

 Long instructions required to complete

 Solutions:

 Possible - Make the start interrupt highest system priority

 Preferred - Use ADC system that can be triggered by timer

– Some devices may have to loop a timer to ADC trigger

ADC Considerations - Overhead

 Problem:

 Interrupt Overhead Storing ADC Data

– Assume ADC ISR takes 40 cycles

• context save + data save and pointer adjust + context restore

 Sampling at 32 kHz BW to store data = 1.28 million cycles

 Solutions:

 Use a DMA controller

 4-5 cycles or less per transfer

 CPU BW to store data <200 thousand cycles

ADC Considerations - Benchmark Example

 RX allows triggering ADC from GPT/MTU2/MTU3 (timer)

 DMAC transfers data to buffer

 HW assist to acquire/transfer data to buffer saves*

 ~3% at 200kHz rate / 5K samples

 ~13% at 400kHz rate / 5K samples

~26% at 500kHz rate / 5K samples

MTU2 Channel 0

ADC0

AD Trigger (160kHz)

DMAC Channel

Memory PING/PONG Buffer

AN7

AD Complete

Complete Intr (PING/PONG Rdy)*

Data to Filter Task

Calculating the Filter

 Design 4 kHz, 8 tap , lowpass filter

 Sampling rate 32 kHz

 Passband 4 kHz

 Stopband 8 kHz

 Stopband attenuation 12 dB – actual 20 dB

 Passband ripple = 2 dB - actual 0.76

Implementing the Filter

 Could calculate the filter as:

Options to Calculate the Filter

 Use an MCU with an FPU

 RH850 – 32 Bit RISC High Performance RISC

 RX600 – High Performance CISC

 SH2A like SH7269 – High Performance RISC

 Use Floating Point Libraries

 Can be very slow

 Use Fixed Point Math

 A little more complicated than floating point

Floating Point Numbers

 Floating point value =

(-1)sb + (1+Fraction) x 2 (exponent – bias)

 The exponent is expressed in

biased form:

 e = E + bias

 Precision is function of fraction bits

 Floating supports a very large

dynamic range

Parameter Single

Precision Double Precision Total bit

Exponent

Floating Point Hardware

Fixed Point

 Fraction value is shifted (multiplied) by a value to make an integer

 Example – Represent 19 78 using 16 bit fixed point

– 1 bit for the sign– 19 requires 5 bits in binary– 10 bits left to represent fraction– Multiply the value by 1024 (shift left 10)– Could allocate more bits for integer and less for fraction

 Example :

 Calculate a 4 tap box filter using fixed point

 Assume ADC samples are

Precision Requirements

 How many bits of coefficient are required?

 Do not want round-off error to cause an LSB error

 For 10 bit ADC need 10 bits coefficient

 Each tap could accumulate error

– Additional bits depends on number taps– 8 taps – add 3 LSB

– 16 taps – add 4 LSB – Etc…

Pop Quiz:

 Assuming: 12 bit ADC, 7 tap FIR filter

QUESTION: Is 16 bit Fixed Point enough resolution?

8 taps – add 3 LSB, for a total of 15 bits

Don’t forget the sign bit!

16 bit total

Some Benchmark Results

 Using RL78/G14 (16 bit, 32 MHz MCU )

 8 Tap Filter – 216 cycles (27 cycles per tap)

 22 Tap Filer – 594 cycles (27 cycles per tap)

 8 taps at 8 kHz = ~1.73 million cycles (approximately 5.4% BW @ 32 MHz)

 Each tap calculation requires

 Multiply

 Sum

 Two Pointer Increments

A MAC Really Helps

 Really need a MAC

 RX has RMPA (software MAC), RL78 has MACH Unit

– RL78 200 samples/64 Tap Filter – 354,000 cycles– RX 200 samples/64 Tap Filter – 33,000 cycles

 RX average 2.6 cycles per tap*

 RL78 average 27.6 cycles per tap*

Circular Buffer Bottleneck

 Most DSPs can handle circular buffers, MCUs typically do not

 Inefficient to put pointer check in loop

Double Coefficient Loops

IIR Filters

 Since round-off error in output feeds back IIR requires greater precision

 16 bit precision typically sufficient for FIR

 IIR requires 32 bit precision1

 Floating point simplifies math

Why use IIR

 FIR filter requires 59 taps:

 IIR filter only requires 17 taps (13 non-zero)

 Forward coefficients

– 1,0,-4,0,6,0,-4,0,1

 Feedback coefficients

-0.9027953874, 5.5279871696 , -16.3895992764 29.9415524963, -36.6655508659 , 30.7172057969

Inphase Filter Frequency Response

Some Benchmark Results

 Calculating the previous filter

 Using RX 59 tap FIR

– 645 Cycles (6.45 uS @ 100 MHz) – 28% BW if run @ 44 kHz

 RX 17 tap IIR

– 353 cycles (3.53 uSec @ 100 MHz)– 15% BW if run @ 44 kHz

 Tools like the RX DSP Library and RL78 DSC Library help simplify the calculations / implementation.

 Fixed point and floating point principles

 Fixed point vs floating point benchmark

Questions?

 Challenge:

“More and More Sensors are required by our “Smart” devices and reliable filtering is required to separate the signal from the noise.”

 “This lecture will introduce them to some of the basic

concepts of Digital Filtering, low-cost Filter tools and help

you avoid some of the more common pitfalls when

implementing on the Renesas processor of their choice.”

 Do you agree that we accomplished the above statement?

‘Enabling The Smart Society’ in Review…

Appendix: Additional Information

information visit the book's website at: www.DSPguide.com

 C E Shannon , "Communication in the presence of noise",

Proc Institute of Radio Engineers, vol 37, no 1, pp 10–21, Jan 1949 Reprint as classic paper in: Proc IEEE, vol 86,

no 2, (Feb 1998)

 http://www.winfilter.20m.com

 Signal Processing tfor Communications

A visual look at Aliasing