VWorks Virtual Platforms for Renesas Processors... Overview of VLAB Virtual PlatformsFor embedded software and system developers who use Renesas processors… VLAB virtual prototyping sol
Trang 1VWorks Virtual Platforms for Renesas Processors
Trang 2Renesas Technology & Solution Portfolio
Trang 3 Overview of VLAB Virtual Platforms
Why Use Virtual Platforms?
Getting Started With VLAB
Trang 4Overview of VLAB Virtual Platforms
For embedded software and system developers
who use Renesas processors…
VLAB virtual prototyping solutions can accelerate
development!
Develop and debug software on the VWorks VLAB virtual platform for
Renesas processors:
Learn advanced techniques using software-based virtual platforms
for hardware, embedded software and system simulation
Build a simple virtual ECU, and experience the capability of virtual
platform technology for development, test and debug with
hands-on use of SystemC based, timed processor models
Use VWorks virtual prototype models for Renesas Fx4/V850E2
Leverage capabilities and advanced techniques:
Rapidly and interactively prototype different on- and off-chip
architectures and system configurations
Debug and analyze embedded software: deeply embedded
software, driver software, base software and other ECU software
Benefit from observability, controllability, repeatability, and
Trang 5Why Use Virtual Platforms?
Trang 6Before Hardware Availability
Design capture, executable specification
Architecture exploration, “what if”
Performance analysis
Early verification and validation, test creation
Early start to software development
Pre-Spec Spec RTL and Physical Design FPGA SamplesSi
Initial VP Developed VP updates to support Hw design and verification and Sw development
Trang 7After Hardware Availability
No hardware test-bench devices and real estate
Easy to modify and re-configure
Trang 8Killer Feature: System-Level Debug
Trang 9What is VLAB?
VLAB is an interactive and programmable environment for:
Rich Electronic System Simulation applications
Virtual Hardware Platforms
Trang 10VLAB Simulation Applications
Seamless integration of
VLAB
Simulation models and objects
User scripts and customizations
Test scenarios and test infrastructure
Target software
Trang 11Benefits for Virtual Platform Creators
Ease of Adoption
Native standard SystemC support
No model code changes
Trang 12VP as a Model of a Hardware Board
Benefits of using a virtual platform
May be available prior to hardware availability
It is (usually) just software: easy to source and deploy in large numbers
Better controllability, visibility, and instrumentation
Easy to modify, reconfigure and experiment
May offer faster than real-time performance: good for regressions
May offer a lower cost solution
Not all peripherals may be modeled
Some aspects of hardware behavior may be simplified
The timing behavior of a VP may be different
Trang 13What can VLAB do?
Import and integrate into a platform ASTC supplied, or your own, or 3rd party SystemC models
Load a pre-assembled Virtual Platform, e.g Fx4
Develop, assemble and configure your own new Virtual
Run (simulate) a Virtual Platform
Debug and analyze target software running on a VP
Trang 14Where is SystemC in VLAB
SystemC is at the heart of VLAB
VLAB runs native SystemC simulations, no proprietary API
Any SystemC model can be used in VLAB with no modifications
Any VLAB model can be built and used in another SystemC simulation e.g OSCI
VLAB provides Python scripting interfaces for ease of use and simplicity
Complete SystemC API is accessible from Python
Value-added features not present in other SystemC-based simulation tools
Trang 15Do I need to know Python?
All VLAB commands are in Python
Most of VLAB is implemented in Python
You do not have to know Python:
– all VLAB features are designed to require only basic Python
You can choose to implement simulator features in C++ just as you would in the OSCI environment
Would I benefit by learning a bit more about Python? Why would I make that investment?
Yes, you can benefit
– this will unlock many possibilities and flexibilities in the tool
Python is known to be about 3x more expressive than C++
Trang 16Software and Hardware Requirements
VLAB runs on the following host Operating Systems
Microsoft Windows XP SP3, Windows 7 (32-bit)
RedHat Enterprise Linux 4.x, 5.x (32-bit, x86 architecture)
Ubuntu 8.x, 9.x, 10.04 (32-bit, x86 architecture)
Models have to be built using the following toolchains
Microsoft Visual Studio C++ 2008 SP1 or 2010 on Windows
Minimum of 2GB of RAM (4GB recommended)
1 GB of free disk space for VLAB and toolbox installation
At least 5GB of free disk space for advanced instrumentation log files
Trang 17 VLAB User Manual (PDF)
OCE User Manual (PDF)
On Windows, the above is accessible via
– Start->Programs->VWorks->VLAB->doc
Documentation for ASTC provided content toolboxes (e.g Fx4) is also available in $VLAB_HOME/toolbox/<toolbox- name>/doc
On Windows, one can use Start->Programs->VWorks->Fx4 Toolbox->doc
In the rest of this material, all references to the VLAB User Manual refer to version 1.7.5, and may change with future VLAB versions.
Trang 18 Throughout this training and exercises, the following
terminology has been adopted:
Anything following ‘VLAB>’ is a command to be typed into VLAB and will appear in the following font Note: ‘VLAB>’ should be omitted
• VLAB>
In exercises, text preceded by a ‘#’ is a comment
Text preceded by a ‘>’ should be typed on the Windows command prompt Note: ‘>’ should be omitted
Trang 19Getting Started with VLAB
Trang 20Starting VLAB
Text Mode
– > %VLAB_HOME%\vlab– VLAB> exit()
Trang 21Starting VLAB
Trang 22Loading a Simulator
Let’s load the VLAB Fx4 Toolbox and poke around a bit
From the command prompt (in an example test directory)
Trang 24The VLAB GUI Window
Trang 25Graphical Mode in VLAB
The VLAB "graphical mode" (GUI) is designed to complement the VLAB command interface
All actions available via the GUI have their command counterparts
It is possible to automate the manual steps performed via the GUI by using scripts (sequences of commands)
The GUI is the preferred mode of learning VLAB
Presents information in a logical manner
Familiarize yourself with the available menus, panes, and toolbars
Discover new functionality
Learn new commands by merely interacting with the GUI
Trang 26VLAB Sessions
VLAB’s graphical mode supports multiple simulation sessions
Sessions can be started using the Session Toolbar or the
File->New Session menu item
New sessions can be started in parallel with an existing session
to execute concurrent simulations
An existing session can be reloaded using the initial session launch parameters
Trang 27The Dashboard: Workspace Pane
The workspace pane presents itself upon VLAB GUI startup, and offers quick convenient access to items, including:
Favorite scripts, trace files, and VLAB commands
Pre-installed toolboxes with related documentation and scripts
File system access to VLAB_PATH and local directories
Trang 28The Dashboard: System Pane
System Pane presents a tree view
of the simulated hardware
structure to
Explore the simulation object
hierarchy
View and select display format of
ports, attributes, and register values
Change values of ports and
registers
Navigate port connectivity
Access to advanced feature via
context sensitive menus available via a right-click
Trang 29The Dashboard: Breakpoints Pane
Breakpoints Pane displays the
state of the hardware
breakpoints in the current
More details on use of
breakpoint will be provided
later in the training
Trang 30The Dashboard: History Pane
History pane contains
previously executed commands
Separate entry for each session
Can select one or many commands
Commands can be executed through the console, making repetitive tasks easier to
manage
Trang 31Console and Output Panes
Output pane reflect all user
Very fast scrolling
Console pane is located directly under the output pane
Supports syntax highlighting
Grows as needed (e.g line input)
Trang 32multi-Working with Port and Register Values
Once SystemC elaboration is complete, VLAB provides a mechanism to query the values of ports and registers
Trang 33Accessing Simulation Objects
So far, we have always provided hierarchical object names
to identify which simulation objects we want to operate on
It is often convenient to use scripting variables as
“references” to objects
Access a single instance (sc_module object)
– VLAB> inst1 = get_instance(‘example.core0’)
Access a group of instances
– VLAB> insts1 = get_instances(‘example’,recurse=True)
Access a single port by name
– VLAB> port1 = get_port(‘example.core0.INT’)
Access a group of ports, as a list
– VLAB> ports1 = get_ports(‘example.core0’)
Trang 34Tracing port or instance connectivity
It is often required to review/verify the connections of a port
or instance in the simulation
This feature is available via the System Pane, via
right-click > Destinations
This is also available via the get_connections command
inst = get_instance(‘example.core0’)
conn = get_connections(inst)
for c in conn: print c
However, there is a more direct and user friendly way to
inspect connections on the console:
show_connections(inst)
Trang 35Lab 1: VLAB Quick Overview
Trang 36ASTC Virtual Platform Technology and Solutions: Fx4 Toolbox - Introduction
Trang 37Fx4 Toolbox - Introductions
The Fx4 Toolbox is a “content toolbox” for VLAB that
provides components for simulation of Renesas Fx4 family microcontrollers.
The components include peripheral models, cores,
memories, buses.
Load software images onto core for execution.
Hardware analysis and debugging with VLAB tools.
Software debugging with Green Hills Multi IDE
Supports attachment of external connections via testbenches for:
Connection of loopbacks between pins
Connection of external stimulus
Connection of routers, can buses etc
Trang 38Fx4 Toolbox includes the following components:
Real Time Clock
CSIG & CSIH
Trang 39Toolbox Architecture
Trang 40Modes of Operation
Uses cycle accurate CPU sub system (ISS, memories, buses)
High accuracy timing simulation
Most complete CPU model (protection units etc.)
Slower execution speed (~0.17 MIPS), but good for low-level analysis
FastISS Mode ( fastiss)
High performance ISS model
Functional model with most necessary components
Simplified memory and bus models
Execution speed (400+ MIPS), for fast loading of complex applications
In both modes, peripheral models (e.g CAN, timers) have the same accuracy.
Trang 41What can you do with the VP?
Almost everything you can do with a HW board:
Load compiled software
Execute applications
Connect a software debugger
Analyze and inspect software behavior, use SW breakpoints etc
A lot that that you can’t do with a HW board:
Inspect internal state of the simulation: ports, registers, buses
Pause and manipulate time
Use hardware breakpoints (ports, buses, register, state changes)
Trace detailed logs of execution behavior
Inject faults and errors
Get warnings on incorrect module usage and info about internal
Trang 42Lab 2: FX4/V850E2 Simulation
Trang 43Exploring connections
Run the timera_timerj test with testbench
Trang 45 Connection communication lines a loop
# Connect CSIG0 to CSIG1for i in range (0, 32):
#CONTROLconnect(("FX4","CSIG0_CONTROL%i"%i),("FX4","CSIG1_CONTROL%i"%i))
#DATAconnect(("FX4","CSIG0_SDO%i"%i),("FX4","CSIG1_SDI%i"%i))
Trang 46# Instantiate the CAN bit bus router
can_bus_component = component(name="can_bit_bus_router_logic",
library="PF3Utils") CAN_BUS = instantiate(can_bus_component, "CAN_BUS")
# Connect CAN bus to CAN instances 0~4 through GPIOs
Trang 47use run() at the vlab prompt.
(Do not use -n with the gui)
file Requires the MULTI_ROOT environment variable to
be set.
Command Line Parameters
Trang 48Software Debugging
Software debugging is supported with Green Hills Multi IDE
Compile an elf file (not srecord/hex) In the example this is
*.out
Set env variable MULTI_ROOT=<path to multi install>
Requires a license for the rteserv2 component on Multi
Execute with –m option show in previous slide
VLAB has limited updates and accessibility during debugging
Hardware breakpoints will trigger software breaks in Multi
Software breakpoints will update VLAB state
Hardware breakpoints and pauses/stop will occur at end of qunatum
Trang 49Lab 3: Debugging
Trang 50Tracing HW State
"ODA": OSCAR Data Analyzer
Right-click TAUA0 to trace all TimerA trace points:
Trang 51Events
Tracing HW State
Use a command to add more trace points:
VLAB> add_trace(”FX4.TAUA0", sink=trace.sink.oda)
Run the simulation:
VLAB> run()
Use view->trace
to show ODA:
Trang 52Tracing HW State with VCD
to VCD trace the
TAUA0:
Run the simulation:
VLAB> run()
Wait for the example
to complete, then exit
and view VCD
VLAB> exit()
Trang 53Lab 4: Working with Virtual Platform Netlists
Trang 54Some Terminology
A VLAB virtual platform description is the equivalent of an IC integration topsheet
It specifies what is in the platform, and how it is connected
It also specifies what is the external interface of the VP
It may provide mechanisms for configuring the platform in different ways
A virtual platform is composed of a hierarchy
of component instances A component may be a composite component (a subsystem) or a leaf component (an individual model)
The Python language is used to assemble and configure a
virtual platform.
The following slide shows an example virtual platform.
Trang 55Example Virtual Platform
Trang 57 An instance contains simulation state, and may be connected
to other instances to create a full simulation
A communicative link between endpoints In hardware terms, a connection is a signal, wire or net A connection may be one-to-one, one-to-many, many-to-one or many-to-many
A connection is created using vlab.connect()
Trang 59Assembling a Virtual Platform
The following slides show example VLAB Assembly API code
Trang 60TIMER ROUTER
The Python module
shown here is the description of a fictitious component
called SimpleSOC, which
is composed of
an ARMCore, BusRouterand
timer subcomponents
Trang 61VLAB "Example Toolbox" Description
Toolbox
The Python
module shown here
is the description
of the VLAB Example Toolbox
Trang 62Summary: VLAB Virtual Platforms
For embedded software and system developers
who use Renesas processors…
VLAB virtual prototyping solutions can accelerate
development!
Develop and debug software on the VWorks VLAB virtual platform for
Renesas processors:
Learn advanced techniques using software-based virtual platforms
for hardware, embedded software and system simulation
Build a simple virtual ECU, and experience the capability of virtual
platform technology for development, test and debug with
hands-on use of SystemC based, timed processor models
Use VWorks virtual prototype models for Renesas Fx4/V850E2
Leverage capabilities and advanced techniques:
Rapidly and interactively prototype different on- and off-chip
architectures and system configurations
Debug and analyze embedded software: deeply embedded
software, driver software, base software and other ECU software
Benefit from observability, controllability, repeatability, and