Sơ đồ Mainboard M61 PMX

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LEADTEK RESEARCH INC ASSUMES NO RESPONSIBILITY FOR ANY ERRORS IN DRAWING THESE SCHEMATICS.

THESE SCHEMATICS ARE SUBJECT TO CHANGE AT ANY TIME WITHOUT NOTICE.

1 2 3 4 5 6 7 8 9 10

11 DDRII SDRAM DIMM1-2

12 DDRII SDRAM DIMM3-4

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FRONT PANEL Header * 2 => 4 Port

64-BIT 200/266/333/400MHZ

DDRII SDRAM CONN 0

LPC BUS V1.0 / 33MHZ

692 Ball BGA SOCKET M2

HDA

BACK PANEL CONN => 4 Port

VREG -> ISL6566 => 3 phase

C51GM06 Block Diagram

PCI V2.3 / 33MHZ

PS2/KB CONN

FLOPPY CONN

PCI EXPRESS Lane * 16

X8 USB ( V2.0 EHCI / V1.1 OHCI )

Azalia / ALC861 (7.1 Audio)

DDRII SDRAM CONN 1 DDRII Memory CH:A

DDRII Memory CH:B 2*2 = 4 pin (12V)

PCI SLOT 1 PCI Express X1

PCI EXPRESS Lane * 1

60 Amp

RGB Output

DDRII SDRAM CONN 2

DDRII SDRAM CONN 3

SW PANSWHJ

SLP_S3*

SLP_S5*

ATX POWER PWRGD_PS

S I/O PWRBTN#

PCI_RESET0*

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Reset Map

Title

FOXCONN PCEG MCP61M01

AC

Reset Map

Title

FOXCONN PCEG MCP61M01

AC

Reset Map

MCP61 K8 Socket M2

PWRGD

RESET*

AUDIO_PHYRESET*

VT6307PRI IDEFLASHSIO

PGOOD (8)

(37)

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25 MHZ

LPCHEADERFLASH

PEX X16

DIMM 0

DIMM 1

XTAL_OUT32.768 KHZ

HT_CPU_TXCLK1

XTAL_IN

HT_CPU_RXCLK1HT_CPU_TXCLK1*

BUF_SIOSUSCLK

K8 M2 CPU

PE0_REFCLKPE0_REFCLK*

CLKOUT_200MHZ*

PE1_REFCLKPE1_REFCLK*

PE2_REFCLK*

PE2_REFCLK

PCI_CLK_FBPCI_CLK3PCI_CLK0

SIOLPC_CLK0

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PCI INTERRUPT/IDSEL MAP

1/1P_INTZ*

01PCI 2VT6308

00

FUNCTION

X1

0PCI BUS 0PCI BUS#

PCI SLOTPCI SLOTINTC*

INTB*

INTA*

SOT89-5 PCI DEVICE MAP

MCP51 LOGICAL

0

X4MCP 61

?

1010 010 = 0X52 ADDRESS

1.100VVDD

0.950V

0.875V

0.825V0.900V

0X10000

0X10010

VDD1.550V

1.475V1.525V

1.425V

1.350V1.400V

1.325V

OFF

0X00000

0X00010VID [4 0]

0X00100

0X00110

0X01010

0X011100X011000X010010X00111

1394

0

ARPARP DIMM 2

DDC BUS

0X101100X10100

1.150V

4 5

3

4 SOT223 4

0

0X1

?X1

?

0X0050/510X005E0X005A0X00590X00540X005C

1PCI SLOT 1

PCI SLOT 4

2 1 2

?

DEVICE#

0X01-0X0FXAX9

0

SOT23-60

?

0X005B0X00530X56/57DEVICE ID

0.975V1.025V1.125V

BACK PANELVID [4 0]

CPU VID TABLE

0.800V0X01111

1PCI SLOT 1

1ARP

0101 101 = 0X2D

1010 000 = 0X50 SMBUS # SMBUS ADDRESS MAP

MAC /MAC PCI-PCI BRIDGE

23

3/3

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HT_CPU_RC_CAD_L4HT_CPU_RC_CAD_L5HT_CPU_RC_CAD_L6HT_CPU_RC_CAD_L7HT_CPU_RC_CAD_L15

HT_CPU_RC_CAD_L2HT_CPU_RC_CAD_L3

HT_CPU_RC_CAD_L12HT_CPU_RC_CAD_L13HT_CPU_RC_CAD_L14

HT_CPU_RC_CAD_L1

HT_CPU_RC_CAD_H8HT_CPU_RC_CAD_H9

HT_CPU_RC_CAD_L0

HT_CPU_RC_CAD_H4HT_CPU_RC_CAD_H5HT_CPU_RC_CAD_H6HT_CPU_RC_CAD_H7HT_CPU_RC_CAD_H15

HT_CPU_RC_CAD_H12HT_CPU_RC_CAD_H13HT_CPU_RC_CAD_H14

HT_CPU_RC_CAD_H1

HT_RC_CPU_CAD_H1

HT_RC_CPU_CAD_H5HT_RC_CPU_CAD_H4HT_RC_CPU_CAD_H3HT_RC_CPU_CAD_H2

HT_RC_CPU_CAD_H8

HT_RC_CPU_CAD_H7HT_RC_CPU_CAD_H6

HT_RC_CPU_CAD_H11HT_RC_CPU_CAD_H10HT_RC_CPU_CAD_H9

HT_RC_CPU_CAD_H14HT_RC_CPU_CAD_H13HT_RC_CPU_CAD_H12

HT_RC_CPU_CAD_L1HT_RC_CPU_CAD_L0

HT_RC_CPU_CAD_H15

HT_RC_CPU_CAD_L5HT_RC_CPU_CAD_L4HT_RC_CPU_CAD_L3HT_RC_CPU_CAD_L2

HT_RC_CPU_CAD_L8

HT_RC_CPU_CAD_L11HT_RC_CPU_CAD_L10HT_RC_CPU_CAD_L9

HT_RC_CPU_CAD_L14HT_RC_CPU_CAD_L13HT_RC_CPU_CAD_L12HT_RC_CPU_CAD_L15

HT_CPU_CTLIN_H1

+1.2V_HT

HT_CPU_RC_CLK_H1 14 HT_RC_CPU_CLK_H1

14 HT_RC_CPU_CLK_L1 14

HT_RC_CPU_CLK_H0 14

HT_RC_CPU_CLK_L0 14

HT_RC_CPU_CTL_H0 14

HT_RC_CPU_CTL_L0 14

HT_CPU_RC_CLK_L1 14 HT_CPU_RC_CLK_H0 14 HT_CPU_RC_CLK_L0 14

HT_CPU_RC_CTL_H0 14 HT_CPU_RC_CTL_L0 14

HT_CPU_RC_CAD_H[15 0] 14 HT_CPU_RC_CAD_L[15 0] 14 HT_RC_CPU_CAD_H[15 0]

14 HT_RC_CPU_CAD_L[15 0]

A31

AL1

A1

HT_"link driver"_"link receiver"_"function"_"polarity"_"number"

HyperTransport Net Naming Convention Layout: Add stitching caps if crossing plane split

HYPERTRANSPORTU52AHYPERTRANSPORTU52A

L0_CADOUT_L(5) AA1

L0_CADOUT_H(4) AC2 L0_CADOUT_L(4) AC3 L0_CADOUT_H(3) AE2 L0_CADOUT_L(3) AE3

L0_CADOUT_H(2) AF1

L0_CADOUT_L(2) AE1

L0_CADOUT_H(1) AG2 L0_CADOUT_L(1) AG3 L0_CADOUT_H(0) AH1 L0_CADOUT_L(0) AG1

L0_CADOUT_H(15) Y5 L0_CADOUT_L(15) Y4 L0_CADOUT_H(14) AB6

L0_CADOUT_L(14) AA6

L0_CADOUT_H(13) AB5

L0_CADOUT_L(13) AB4

L0_CADOUT_H(12) AD6 L0_CADOUT_L(12) AC6 L0_CADOUT_H(11) AF6

L0_CADOUT_L(11) AE6

L0_CADOUT_H(10) AF5

L0_CADOUT_L(10) AF4 L0_CADOUT_H(9) AH6 L0_CADOUT_L(9) AG6 L0_CADOUT_H(8) AH5 L0_CADOUT_L(8) AH4

L0_CTLOUT_H(1) Y6 L0_CTLOUT_L(1) W6

L0_CTLOUT_H(0) W2

L0_CTLOUT_L(0) W3

L0_CLKOUT_H(1) AD5 L0_CLKOUT_L(1) AD4

R626 49.9 r0603h6 +/-1%

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MEM_MA_CHECK0MEM_MA_CHECK2MEM_MA_CHECK4MEM_MA_CHECK6MEM_MA_DATA0

MEM_MA_DATA10MEM_MA_DATA12MEM_MA_DATA14MEM_MA_DATA16MEM_MA_DATA18

MEM_MA_DATA2

MEM_MA_DATA3

MEM_MA_DATA4

MEM_MA_DATA5

MEM_MA_DATA6

MEM_MA_DATA60MEM_MA_DATA62

MEM_MA_DM0MEM_MA_DM2MEM_MA_DM4MEM_MA_DM6MEM_MA_DQS_L0MEM_MA_DQS_H0MEM_MA_DQS_L1MEM_MA_DQS_H1MEM_MA_DQS_L2MEM_MA_DQS_H2MEM_MA_DQS_L3MEM_MA_DQS_H3MEM_MA_DQS_L4MEM_MA_DQS_H4MEM_MA_DQS_L5MEM_MA_DQS_H5MEM_MA_DQS_L6MEM_MA_DQS_H6MEM_MA_DQS_L7MEM_MA_DQS_H7

MEM_MA0_CLK_H211,13

MEM_MA0_CLK_L211,13

MEM_MA0_CLK_H111,13

MEM_MA0_CLK_L111,13

MEM_MA0_CLK_H011,13

MEM_MA0_CLK_L011,13

MEM_MA0_CS_L111,13MEM_MA0_CS_L011,13MEM_MA0_ODT011,13MEM_MA1_CLK_H212,13

MEM_MA1_CLK_L212,13

MEM_MA1_CLK_H112,13

MEM_MA1_CLK_L112,13

MEM_MA1_CLK_H012,13

MEM_MA1_CLK_L012,13

MEM_MA1_CS_L112,13MEM_MA1_CS_L012,13MEM_MA1_ODT012,13

MEM_MA_CAS_L11,12,13MEM_MA_WE_L11,12,13MEM_MA_RAS_L11,12,13MEM_MA_BANK211,12,13MEM_MA_BANK111,12,13MEM_MA_BANK011,12,13MEM_MA_CKE112,13MEM_MA_CKE011,13MEM_MA_ADD[15 0]

MA0_CLK_H(2)AG21MA0_CLK_L(2)AG20MA0_CLK_H(1)G19MA0_CLK_L(1)H19MA0_CLK_H(0)U27MA0_CLK_L(0)U26MA0_CS_L(1)AC25MA0_CS_L(0)AA24MA0_ODT(0)AC28MA1_CLK_H(2)AE20MA1_CLK_L(2)AE19MA1_CLK_H(1)G20MA1_CLK_L(1)G21MA1_CLK_H(0)V27MA1_CLK_L(0)W27MA1_CS_L(1)AD27MA1_CS_L(0)AA25MA1_ODT(0)AC27

MA_CAS_LAB25MA_WE_LAB27MA_RAS_LAA26MA_BANK(2)N25MA_BANK(1)Y27MA_BANK(0)AA27MA_CKE(1)L27MA_CKE(0)M25MA_ADD(15)M27MA_ADD(14)N24MA_ADD(13)AC26MA_ADD(12)N26MA_ADD(11)P25MA_ADD(10)Y25MA_ADD(9)N27MA_ADD(8)R24MA_ADD(7)P27MA_ADD(6)R25MA_ADD(5)R26MA_ADD(4)R27MA_ADD(3)T25MA_ADD(2)U25MA_ADD(1)T27MA_ADD(0)W24MA_DQS_H(7)AD15MA_DQS_L(7)AE15MA_DQS_H(6)AG18MA_DQS_L(6)AG19MA_DQS_H(5)AG24MA_DQS_L(5)AG25MA_DQS_H(4)AG27MA_DQS_L(4)AG28MA_DQS_H(3)D29MA_DQS_L(3)C29MA_DQS_H(2)C25MA_DQS_L(2)D25MA_DQS_H(1)E19MA_DQS_L(1)F19MA_DQS_H(0)F15MA_DQS_L(0)G15MA_DM(7)AF15MA_DM(6)AF19MA_DM(5)AJ25MA_DM(4)AH29MA_DM(3)B29MA_DM(2)E24MA_DM(1)E18MA_DM(0)H15

MA_DQS_H(8) J28MA_DQS_L(8) J27MA_DM(8) J25MA_CHECK(7) K25MA_CHECK(6) J26MA_CHECK(5) G28MA_CHECK(4) G27MA_CHECK(3) L24MA_CHECK(2) K27MA_CHECK(1) H29MA_CHECK(0) H27

MA_DATA(63) AE14MA_DATA(62) AG14MA_DATA(61) AG16MA_DATA(60) AD17MA_DATA(59) AD13MA_DATA(58) AE13MA_DATA(57) AG15MA_DATA(56) AE16MA_DATA(55) AG17MA_DATA(54) AE18MA_DATA(53) AD21MA_DATA(52) AG22MA_DATA(51) AE17MA_DATA(50) AF17MA_DATA(49) AF21MA_DATA(48) AE21MA_DATA(47) AF23MA_DATA(46) AE23MA_DATA(45) AJ26MA_DATA(44) AG26MA_DATA(43) AE22MA_DATA(42) AG23MA_DATA(41) AH25MA_DATA(40) AF25MA_DATA(39) AJ28MA_DATA(38) AJ29MA_DATA(37) AF29MA_DATA(36) AE26MA_DATA(35) AJ27MA_DATA(34) AH27MA_DATA(33) AG29MA_DATA(32) AF27MA_DATA(31) E29MA_DATA(30) E28MA_DATA(29) D27MA_DATA(28) C27MA_DATA(27) G26MA_DATA(26) F27MA_DATA(25) C28MA_DATA(24) E27MA_DATA(23) F25MA_DATA(22) E25MA_DATA(21) E23MA_DATA(20) D23MA_DATA(19) E26MA_DATA(18) C26MA_DATA(17) G23MA_DATA(16) F23MA_DATA(15) E22MA_DATA(14) E21MA_DATA(13) F17MA_DATA(12) G17MA_DATA(11) G22MA_DATA(10) F21MA_DATA(9) G18MA_DATA(8) E17MA_DATA(7) G16MA_DATA(6) E15MA_DATA(5) G13MA_DATA(4) H13MA_DATA(3) H17MA_DATA(2) E16MA_DATA(1) E14MA_DATA(0) G14

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MEM_MB_DM1MEM_MB_ADD15

MEM_MB_DM3MEM_MB_DM5MEM_MB_DM7

MEM_MB_CHECK0MEM_MB_CHECK3MEM_MB_CHECK5MEM_MB_CHECK7MEM_MB_DATA0MEM_MB_DATA11

MEM_MB_DATA1

MEM_MB_DATA10MEM_MB_DATA14

MEM_MB_DATA2

MEM_MB_DATA20

MEM_MB_DATA18MEM_MB_DATA22MEM_MB_DATA26

MEM_MB_DATA4

MEM_MB_DATA5

MEM_MB_DATA49

MEM_MB_DATA53

MEM_MB_DATA58

MEM_MB_DATA7

MEM_MB_DM0

MEM_MB_DATA9

MEM_MB_DM2MEM_MB_DM4MEM_MB_DM6MEM_MB_DQS_L0MEM_MB_DQS_L1MEM_MB_DQS_L2MEM_MB_DQS_L3MEM_MB_DQS_L5MEM_MB_DQS_L6

MEM_MB_DQS_H0MEM_MB_DQS_H1MEM_MB_DQS_H2MEM_MB_DQS_H4MEM_MB_DQS_H5MEM_MB_DQS_H6MEM_MB_ADD0MEM_MB_ADD2

MEM_MB0_CLK_H211,13MEM_MB0_CLK_L211,13MEM_MB0_CLK_H111,13MEM_MB0_CLK_L111,13MEM_MB0_CLK_H011,13MEM_MB0_CLK_L011,13MEM_MB0_CS_L111,13MEM_MB0_CS_L011,13MEM_MB0_ODT011,13MEM_MB1_CLK_H212,13MEM_MB1_CLK_L212,13MEM_MB1_CLK_H112,13MEM_MB1_CLK_L112,13MEM_MB1_CLK_H012,13MEM_MB1_CLK_L012,13MEM_MB1_CS_L112,13MEM_MB1_CS_L012,13MEM_MB1_ODT012,13

MEM_MB_CAS_L11,12,13MEM_MB_WE_L11,12,13MEM_MB_RAS_L11,12,13MEM_MB_BANK211,12,13MEM_MB_BANK111,12,13MEM_MB_BANK011,12,13MEM_MB_CKE112,13MEM_MB_CKE011,13MEM_MB_ADD[15 0]

MB0_CLK_H(2)AJ19MB0_CLK_L(2)AK19MB0_CLK_H(1)A18MB0_CLK_L(1)A19MB0_CLK_H(0)U31MB0_CLK_L(0)U30MB0_CS_L(1)AE30MB0_CS_L(0)AC31MB0_ODT(0)AD29MB1_CLK_H(2)AL19MB1_CLK_L(2)AL18MB1_CLK_H(1)C19MB1_CLK_L(1)D19MB1_CLK_H(0)W29MB1_CLK_L(0)W28MB1_CS_L(1)AE29MB1_CS_L(0)AB31MB1_ODT(0)AD31

MB_CAS_LAC29MB_WE_LAC30MB_RAS_LAB29MB_BANK(2)N31MB_BANK(1)AA31MB_BANK(0)AA28MB_CKE(1)M31MB_CKE(0)M29MB_ADD(15)N28MB_ADD(14)N29MB_ADD(13)AE31MB_ADD(12)N30MB_ADD(11)P29MB_ADD(10)AA29MB_ADD(9)P31MB_ADD(8)R29MB_ADD(7)R28MB_ADD(6)R31MB_ADD(5)R30MB_ADD(4)T31MB_ADD(3)T29MB_ADD(2)U29MB_ADD(1)U28MB_ADD(0)AA30MB_DQS_H(7)AK13MB_DQS_L(7)AJ13MB_DQS_H(6)AK17MB_DQS_L(6)AJ17MB_DQS_H(5)AK23MB_DQS_L(5)AL23MB_DQS_H(4)AL28MB_DQS_L(4)AL29MB_DQS_H(3)D31MB_DQS_L(3)C31MB_DQS_H(2)C24MB_DQS_L(2)C23MB_DQS_H(1)D17MB_DQS_L(1)C17MB_DQS_H(0)C14MB_DQS_L(0)C13MB_DM(7)AJ14MB_DM(6)AH17MB_DM(5)AJ23MB_DM(4)AK29MB_DM(3)C30MB_DM(2)A23MB_DM(1)B17MB_DM(0)B13

MB_DATA(63) AH13MB_DATA(62) AL13MB_DATA(61) AL15MB_DATA(60) AJ15MB_DATA(59) AF13MB_DATA(58) AG13MB_DATA(57) AL14MB_DATA(56) AK15MB_DATA(55) AL16MB_DATA(54) AL17MB_DATA(53) AK21MB_DATA(52) AL21MB_DATA(51) AH15MB_DATA(50) AJ16MB_DATA(49) AH19MB_DATA(48) AL20MB_DATA(47) AJ22MB_DATA(46) AL22MB_DATA(45) AL24MB_DATA(44) AK25MB_DATA(43) AJ21MB_DATA(42) AH21MB_DATA(41) AH23MB_DATA(40) AJ24MB_DATA(39) AL27MB_DATA(38) AK27MB_DATA(37) AH31MB_DATA(36) AG30MB_DATA(35) AL25MB_DATA(34) AL26MB_DATA(33) AJ30MB_DATA(32) AJ31MB_DATA(31) E31MB_DATA(30) E30MB_DATA(29) B27MB_DATA(28) A27MB_DATA(27) F29MB_DATA(26) F31MB_DATA(25) A29MB_DATA(24) A28MB_DATA(23) A25MB_DATA(22) A24MB_DATA(21) C22MB_DATA(20) D21MB_DATA(19) A26MB_DATA(18) B25MB_DATA(17) B23MB_DATA(16) A22MB_DATA(15) B21MB_DATA(14) A20MB_DATA(13) C16MB_DATA(12) D15MB_DATA(11) C21MB_DATA(10) A21MB_DATA(9)A17MB_DATA(8)A16MB_DATA(7)B15MB_DATA(6)A14MB_DATA(5)E13MB_DATA(4)F13MB_DATA(3)C15MB_DATA(2)A15MB_DATA(1)A13MB_DATA(0)D13MB_DQS_H(8)J31MB_DQS_L(8) J30

MB_DM(8)J29

MB_CHECK(7) K29MB_CHECK(6) K31MB_CHECK(5) G30MB_CHECK(4) G29MB_CHECK(3) L29MB_CHECK(2) L28MB_CHECK(1) H31MB_CHECK(0) G31

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CPU_TEST25_HCPU_TEST25_L

CPU_TEST25_LCPU_PRESENT_L

CPU_PRESENT_L

CPU_CLKIN_H

CPU_VDD_RUN_FB_LCPU_VDD_RUN_FB_HCPU_TEST29_L

CPU_TEST29_LCPU_TEST29_H

CPU_TEST29_H

CPU_VDDIO_SUS_FB_HCPU_VDDIO_SUS_FB_L

CPU_VDDIO_SUS_FB_LCPU_ALL_PWROK

CPU_ALL_PWROKCPU_LDTSTOP_L

CPU_LDTSTOP_LCPU_HT_RESET_L

CPU_HT_RESET_LCPU_THERMTRIP_L

CPU_TMSCPU_TCK

CPU_TCKCPU_TDI

CPU_SID

M_ZP

CPU_HTREF1CPU_DBREQ_L

CPU_DBREQ_L

CPU_CLKIN_SC_H

CPU_PSI_LCPU_VTT_SUS_SENSE

CPU_VID1

CPU_TEST20CPU_TEST23CPU_TEST17

+1.8V_SUS

+2.5V

+1.8V_SUSCPU_VDDA_RUN

CPU_VDDA_RUN

CPU_M_VREF_SUS

CPU_VDD_RUN_FB_H32

CPU_CLKIN_H14

CPU_CLKIN_L14

CPU_VDD_RUN_FB_L32

CPU_VDDIO_SUS_FB_H

VREG_VID023,32VREG_VID123,32VREG_VID223,32VREG_VID323,32VREG_VID423,32

CPU_THERMTRIP* 14

CPU_THERMDC26CPU_THERMDA26

CPU_SIC19,23CPU_SID19,23

CPU_PROCHOT_L_1.814

CPU_ALL_PWROK14CPU_LDTSTOP_L14CPU_HT_RESET_L14

less than 1.5" from CPU pin

Keep trace to resistor

Level translation buffers Assuming system devices

Do not provide VDDIO

Required for compatibility

less than 600mils from CPU pin and

Keep trace to resistor less than 1" from CPU pin

Layout: Place near CPU socket

with future processors

Route as 80-Ohm differential impedance Keep trace to resistors compatible voltage levels

C898 *3.9nF C060350V, X7R, +/-10%

C898 3.9nF C060350V, X7R, +/-10%

R613300r0603h6

+/-5%

dummy

R613300r0603h6

CP17X_COPPERdummy

TP711

R62316.9r0603h6

+/-1%

R62316.9r0603h6

+/-1%

R616300r0603h6

+/-5%

R616300r0603h6

+/-5%

TP771

R614300r0603h6

+/-5%

R614300r0603h6

+/-5%

TP751

R62416.9r0603h6

+/-1%

R62416.9r0603h6

+/-1%

TP671

TP461TP56 1

R612300r0603h6

+/-5%

R612300r0603h6

+/-5%

TP651TP52 1

R610300r0603h6

+/-5%

R610300r0603h6

+/-5%

L18X_FB L0805 200 Ohmdummy

L18X_FB L0805 200 Ohmdummy21

R634169R0603

+/-1%

R634169R0603

TP721

TP621

TP781

+/-5%

R617300r0603h6

+/-5%

R671300r0603h6

+/-5%

dummy

R671300r0603h6

TP491

TP761

TP481

INTERNAL MISCU52E

TP471

TP57 1TP55 1

TP431

TP811

+/-5%

R611300r0603h6

+/-5%

R615300r0603h6

+/-5%

R615300r0603h6

+/-5%

R36180.6r0603h6

+/-1%

R36180.6r0603h6

+/-1%

TP641

TP731

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Place as close to processor as possible.

Processor Power & Ground

AL1

A31

Top View

Bottomside Decoupling

Decoupling Between Processor and DIMMs

Place near processor on VLDT pour.

M2 A1

VLDT_RUN_B is connected to the VLDT_RUN power supply through the package or on the die It is only connected

on the board to decoupling near the CPU package.

Decoupling Between Processor and DIMMs

Trang 11

MEM_MA_CHECK0MEM_MA_ADD9

MEM_MA_CHECK2MEM_MA_CHECK5

MEM_MA_DATA0MEM_MA_CHECK7

MEM_MA_DATA10

MEM_MA_DATA1

MEM_MA_DATA12MEM_MA_DATA16MEM_MA_DATA20

MEM_MA_DATA2

MEM_MA_DATA19MEM_MA_DATA23MEM_MA_DATA26MEM_MA_DATA29

MEM_MA_DATA3

MEM_MA_DATA4

MEM_MA_DATA5

MEM_MA_DATA9MEM_MA_DQS_L0

MEM_MA_DQS_L7

MEM_MA_DQS_H2

MEM_MA_DQS_H0MEM_MA_DQS_H3MEM_MA_DQS_H5MEM_MA_DQS_H7

MEM_MB_DM0

MEM_MB_DQS_L6MEM_MB_DQS_H7MEM_MB_DQS_L7

MEM_MB_DQS_L5MEM_MB_DQS_H6

MEM_MB_DQS_L3MEM_MB_DQS_H4MEM_MB_DQS_L4MEM_MB_DQS_H3

MEM_MB_DQS_L1MEM_MB_DQS_H2MEM_MB_DQS_L2MEM_MB_DQS_H1

MEM_MB_DM7

MEM_MB_DM5

MEM_MB_DM2

MEM_MB_DQS_L0MEM_MB_DM1

MEM_MB_DATA0MEM_MB_CHECK7

MEM_MB_CHECK4

MEM_MB_CHECK1

MEM_MB_ADD8

MEM_MB_ADD5MEM_MB_ADD15

8,12

MEM_MB_DQS_H88,12MEM_MB_DQS_L88,12MEM_MB_DQS_H[7 0]

8,12MEM_MB_DQS_L[7 0]

8,12

MEM_MB_BANK28,12,13MEM_MB_BANK18,12,13MEM_MB_BANK08,12,13MEM_MB_ADD[15 0]

8,12,13

MEM_MB_CHECK[7 0]

8,12

MEM_MB0_CLK_H08,13MEM_MB0_CLK_L08,13MEM_MB0_CLK_H18,13MEM_MB0_CLK_L18,13MEM_MB0_CLK_H28,13MEM_MB0_CLK_L28,13

MEM_MB_CKE08,13MEM_MB_RAS_L8,12,13MEM_MB_CAS_L8,12,13MEM_MB0_CS_L08,13MEM_MB0_CS_L18,13

MEM_MB_DATA[63 0]8,12

MEM_MB0_ODT08,13MEM_MB_WE_L8,12,13

SMB_MEM_SDA12,19SMB_MEM_SCL12,19SMB_MEM_SCL

1010 001DIMM 3SMB_MEM BUS ADDRESS

DIMM 2

DIMMB0 DIMMA0

Layout: Place near DIMM sockets

First Logical DDR2 DIMM

+/-1%

R62259R0603

+/-1%

R62159R0603

+/-1%

R62159R0603

Trang 12

MEM_MA_CHECK0MEM_MA_CHECK3MEM_MA_CHECK6

MEM_MA_DATA0

MEM_MA_DATA2

MEM_MA_DATA3

MEM_MA_DATA4

MEM_MA_DATA5

MEM_MA_DATA6

MEM_MA_DATA7

MEM_MA_DQS_H0MEM_MA_DQS_L0

MEM_MA_DM1MEM_MA_DM3MEM_MA_DM5MEM_MA_DM7

MEM_MA_DQS_H1MEM_MA_DQS_L1MEM_MA_DQS_H2MEM_MA_DQS_L2MEM_MA_DQS_H3MEM_MA_DQS_L3MEM_MA_DQS_H4MEM_MA_DQS_L4MEM_MA_DQS_H5MEM_MA_DQS_L5MEM_MA_DQS_H6MEM_MA_DQS_L6MEM_MA_DQS_H7MEM_MA_DQS_L7MEM_MA_DM0

MEM_MB_ADD0

MEM_MB_ADD2MEM_MB_ADD5MEM_MB_ADD8

MEM_MB_CHECK0MEM_MB_CHECK3MEM_MB_CHECK6

MEM_MB_DQS_H0MEM_MB_DQS_L0

MEM_MB_DM1MEM_MB_DM3MEM_MB_DM5MEM_MB_DM7

MEM_MB_DQS_H1MEM_MB_DQS_L1MEM_MB_DQS_H2MEM_MB_DQS_L2MEM_MB_DQS_H3MEM_MB_DQS_L3MEM_MB_DQS_H4MEM_MB_DQS_L4MEM_MB_DQS_H5MEM_MB_DQS_L5MEM_MB_DQS_H6MEM_MB_DQS_L6MEM_MB_DQS_H7MEM_MB_DQS_L7MEM_MB_DM0

MEM_MB_DATA0MEM_MB_DATA3MEM_MB_DATA6MEM_MB_DATA9MEM_MB_DATA10MEM_MB_DATA13MEM_MB_DATA16MEM_MB_DATA19MEM_MB_DATA22MEM_MB_DATA25MEM_MB_DATA28MEM_MB_DATA31MEM_MB_DATA34MEM_MB_DATA37MEM_MB_DATA40MEM_MB_DATA43MEM_MB_DATA46MEM_MB_DATA49MEM_MB_DATA52MEM_MB_DATA55MEM_MB_DATA58MEM_MB_DATA61

8,11

MEM_MB_DQS_H88,11MEM_MB_DQS_L88,11MEM_MB_DQS_H[7 0]

8,11MEM_MB_DQS_L[7 0]

8,11

MEM_MB_BANK28,11,13MEM_MB_BANK18,11,13MEM_MB_BANK08,11,13MEM_MB_ADD[15 0]

8,11,13

MEM_MB_CHECK[7 0]

8,11

MEM_MB1_CLK_H08,13MEM_MB1_CLK_L08,13MEM_MB1_CLK_H18,13MEM_MB1_CLK_L18,13MEM_MB1_CLK_H28,13MEM_MB1_CLK_L28,13

MEM_MB_CKE18,13MEM_MB_RAS_L8,11,13MEM_MB_CAS_L8,11,13MEM_MB1_CS_L08,13MEM_MB1_CS_L18,13

DIMM 3

1010 000

120 240

Trang 13

MEM_MA_ADD9MEM_MA_ADD10

MEM_MA_ADD10MEM_MA_ADD8MEM_MA_ADD8

MEM_MA_ADD4

MEM_MA_ADD14

MEM_MA_ADD2MEM_MA_ADD15MEM_MA_ADD2

MEM_MB_ADD2MEM_MA_ADD15

MEM_MA_WE_L

MEM_MB_ADD2

MEM_MB_RAS_L

MEM_MA_BANK2

MEM_MA_ADD[15 0]

MEM_MB_WE_L

MEM_MA_BANK1MEM_MA_RAS_L

MEM_MA0_CLK_L27,11

MEM_MA0_CLK_L17,11

MEM_MA0_CLK_H17,11

MEM_MA0_CLK_H07,11

MEM_MA0_CLK_L07,11

MEM_MB0_CLK_H28,11

MEM_MB0_CLK_L28,11

MEM_MB0_CLK_H18,11

MEM_MB0_CLK_L18,11

MEM_MB0_CLK_H08,11

MEM_MB0_CLK_L08,11

MEM_MB_ADD[15 0]

8,11,12

MEM_MB_CAS_L8,11,12MEM_MB_WE_L8,11,12MEM_MB_RAS_L8,11,12MEM_MB_BANK28,11,12MEM_MB_BANK18,11,12MEM_MB_BANK08,11,12MEM_MB_CKE18,12MEM_MB_CKE08,11MEM_MB0_CS_L18,11MEM_MB0_CS_L08,11MEM_MB0_ODT08,11MEM_MB1_CS_L18,12MEM_MB1_CS_L08,12MEM_MB1_ODT08,12

MEM_MA1_CLK_H27,12

MEM_MA1_CLK_L27,12

MEM_MA1_CLK_H17,12

MEM_MA1_CLK_L17,12

MEM_MA1_CLK_H07,12

MEM_MA1_CLK_L07,12

MEM_MB1_CLK_H28,12

MEM_MB1_CLK_L28,12

MEM_MB1_CLK_H18,12

MEM_MB1_CLK_L18,12

MEM_MB1_CLK_H08,12

MEM_MB1_CLK_L08,12

PCI Express Slot x16 & X1

Layout: Spread out on VTT pour

DDR2 Termination

*

RN17A* 478p4r0402h5RN17A1 2478p4r0402h5

*

RN20A 8p4r0402h547

*

RN22B* 478p4r0402h5RN22B3 4478p4r0402h5

*

RN20B* 478p4r0402h5RN20B3 4478p4r0402h5

*

RN17C 8p4r0402h547

*

RN129B* 478p4r0402h5RN129B3 4478p4r0402h5

*

RN129C 8p4r0402h547

*

RN13B 8p4r0402h547

*

RN13B 8p4r0402h547

*

RN18C 8p4r0402h547

*

RN18C 8p4r0402h547

*

RN16C* 478p4r0402h5RN16C5 6478p4r0402h5

*

RN20D 8p4r0402h547

*

RN20D 8p4r0402h547

*

RN15A 8p4r0402h547

*

RN22A* 478p4r0402h5RN22A1 2478p4r0402h5

*

RN21A* 478p4r0402h5RN21A1 2478p4r0402h5

*

RN16B 8p4r0402h547

*

RN10A 8p4r0402h547

*

RN10A 8p4r0402h547

*

RN15B* 478p4r0402h5RN15B3 4478p4r0402h5

*

RN129A 8p4r0402h547

*

RN15D* 478p4r0402h5RN15D7 8478p4r0402h5

*

RN15C 8p4r0402h547

*

RN11D* 478p4r0402h5RN11D7 8478p4r0402h5

*

RN12C* 478p4r0402h5RN12C5 6478p4r0402h5

*

RN21D 8p4r0402h547

*

RN14A 8p4r0402h547

*

RN19C* 478p4r0402h5RN19C5 6478p4r0402h5

*

RN14D 8p4r0402h547

*

RN14D 8p4r0402h547

*

RN10B 8p4r0402h547

*

RN18D 8p4r0402h547

*

RN13D* 478p4r0402h5RN13D7 8478p4r0402h5

*

RN10C* 478p4r0402h5RN10C5 6478p4r0402h5

*

RN12A 8p4r0402h547

*

RN11B 8p4r0402h547

*

RN12B 8p4r0402h547

*

RN12B 8p4r0402h547

*

RN21B 8p4r0402h547

*

RN21B 8p4r0402h547

*

RN23B 8p4r0402h547

Trang 14

HT_CPU_RC_CAD_L13

HTCPUCAL_1P2VHTCPUCAL_GND

HT_RC_CPU_CAD_H15

HT_RC_CPU_CAD_H1

HT_RC_CPU_CAD_H4

HT_RC_CPU_CAD_H13

HT_RC_CPU_CAD_L15HT_RC_CPU_CAD_L12HT_RC_CPU_CAD_L8HT_RC_CPU_CAD_L10HT_RC_CPU_CAD_L9

HT_RC_CPU_CAD_L14HT_RC_CPU_CAD_L7HT_RC_CPU_CAD_L4

HT_RC_CPU_CAD_L13

HT_CPU_RC_CTL_H06HT_CPU_RC_CTL_L06

HT_RC_CPU_CAD_H[15 0] 6

HT_RC_CPU_CAD_L[15 0] 6

HT_RC_CPU_CLK_H0 6

CPU_CLKIN_H 9CPU_CLKIN_L 9

HT_RC_CPU_CLK_L0 6HT_RC_CPU_CLK_H1 6HT_RC_CPU_CLK_L1 6

HT_RC_CPU_CTL_H0 6HT_RC_CPU_CTL_L0 6

THERM_OVT*23,29CPU_THERMTRIP*9

CPU_PROCHOT_L_1.89

CPU_ALL_PWROK9CPU_LDTSTOP_L9CPU_HT_RESET_L9

R213

R4954.7Kr0603h6

+/-5%

dummy

R4954.7Kr0603h6

I115

SEC 1 OF 8

U15H

MCP61BGA-692

I115AB15 +3.3V_PLL_CPUAC15 +1.2V_PLL_CPU_HTAE8 THERMTRIP*/GPIO58AD8 PROCHOT*/GPIO20AB8 HT_MCP_COMP_GNDAB9 HT_MCP_COMP_VDDAC14 RESERVEDAB14 RESERVEDAH15 HT_MCP_RXCTL0_NAJ15 HT_MCP_RXCTL0_PAF12 HT_MCP_RX_CLK1_NAE12 HT_MCP_RX_CLK1_PAH11 HT_MCP_RX_CLK0_NAJ11 HT_MCP_RX_CLK0_PAD14 HT_MCP_RXD15_NAG14 HT_MCP_RXD14_NAB12 HT_MCP_RXD13_NAC11 HT_MCP_RXD12_NAD12 HT_MCP_RXD11_NAG10 HT_MCP_RXD10_NAE10 HT_MCP_RXD9_NAC10 HT_MCP_RXD8_NAH14 HT_MCP_RXD7_NAJ13 HT_MCP_RXD6_NAH13 HT_MCP_RXD5_NAH12 HT_MCP_RXD4_NAH10AJ9 HT_MCP_RXD3_NHT_MCP_RXD2_NAH9 HT_MCP_RXD1_NAH8 HT_MCP_RXD0_NAE14 HT_MCP_RXD15_PAF14 HT_MCP_RXD14_PAB13 HT_MCP_RXD13_PAB11 HT_MCP_RXD12_PAC12AF10 HT_MCP_RXD11_PHT_MCP_RXD10_PAD10 HT_MCP_RXD9_PAB10 HT_MCP_RXD8_PAJ14 HT_MCP_RXD7_PAK13 HT_MCP_RXD6_PAG13 HT_MCP_RXD5_PAG12 HT_MCP_RXD4_PAJ10 HT_MCP_RXD3_PAK9 HT_MCP_RXD2_PAG9 HT_MCP_RXD1_PAG8 HT_MCP_RXD0_P

AJ26CLK200_TERM_GNDAK26CLKOUT_25MHZAF24CPU_SBVREF

AJ25CLKOUT_200MHZ_NAK25CLKOUT_200MHZ_PAG24HT_MCP_PWRGDAG23HT_MCP_RST* AH24HT_MCP_STOP*

AH25HT_MCP_REQ*

AF16RESERVEDAE16RESERVEDAG16HT_MCP_TXCTL0_NAH16HT_MCP_TXCTL0_PAB18HT_MCP_TX_CLK1_NHT_MCP_TX_CLK1_P AC18AG20HT_MCP_TX_CLK0_NAH20HT_MCP_TX_CLK0_PAD16HT_MCP_TXD15_N AB16HT_MCP_TXD14_NAG18HT_MCP_TXD13_NAE18HT_MCP_TXD12_N AF20HT_MCP_TXD11_NAD20HT_MCP_TXD10_NAB19HT_MCP_TXD9_N AG22HT_MCP_TXD8_NAG17HT_MCP_TXD7_NAK17HT_MCP_TXD6_N AJ18HT_MCP_TXD5_NAJ19HT_MCP_TXD4_NAG21HT_MCP_TXD3_N AK21HT_MCP_TXD2_NAJ22HT_MCP_TXD1_NAJ23HT_MCP_TXD0_NAC16HT_MCP_TXD15_PAB17HT_MCP_TXD14_P AF18HT_MCP_TXD13_PAD18HT_MCP_TXD12_PAE20HT_MCP_TXD11_P AC20HT_MCP_TXD10_PAB20HT_MCP_TXD9_PAF22HT_MCP_TXD8_P AH17HT_MCP_TXD7_PAJ17HT_MCP_TXD6_PAH18HT_MCP_TXD5_P AH19HT_MCP_TXD4_PAH21HT_MCP_TXD3_PAJ21HT_MCP_TXD2_P AH22HT_MCP_TXD1_PAH23HT_MCP_TXD0_P

+/-5%

dummyR3680R0603

+/-5%

dummy

R5004.7Kr0603h6

Q47 MMBT3904SOT23_BECQ47 MMBT3904SOT23_BEC

R7302.37K Ohmr0603h6

+/-1%

R7302.37K Ohmr0603h6

+/-1%

R4961Kr0603h6

+/-5%

R4961Kr0603h6

+/-5%

R3650R0603

+/-5%

R3650R0603

+/-5%

R3710R0603

+/-5%

R3710R0603

+/-5%

R73110Kr0603h6

+/-5%

Trang 15

PE0_IN*10 PE0_IN11

PE0_IN*11 PE0_IN12

PE0_IN*12 PE0_IN13

PE0_IN*13 PE0_IN14

PE0_IN*2 PE0_IN3

PE0_IN*3 PE0_IN4

PE0_IN*4 PE0_IN5

PE0_IN*5 PE0_IN6

PE0_IN*6 PE0_IN7

PE0_IN*7 PE0_IN8

PE0_IN*8 PE0_IN9

PE0_IN*9

PE0_OUT0

PE0_OUT*0 PE0_OUT10

PE0_OUT*10 PE0_OUT11

PE0_OUT*2 PE0_OUT3

PE0_OUT*3 PE0_OUT4

PE0_OUT*4 PE0_OUT5

PE0_OUT*5 PE0_OUT6

PE0_OUT*6 PE0_OUT7

PE0_OUT*7 PE0_OUT8

PE0_OUT*8 PE0_OUT9

PE_COMPPE_RESET*

+3.3V_PLL_MAC_DUAL

MCP61_TCKMII_COMP_3P3V

PE_B_TSTCLK_N

TP_MCP61_TDITP_MCP61_TDOTP_MCP61_TRST*

DAC_REDDAC_GREENDAC_BLUE

XTALIN_RTCXTALOUT_RTCXTALOUTXTALIN

DDC_CLKDDC_DATA

CP-MII_COL

RGMII_TXC_R

RGMII_MCPVREF

RGMII_RXD3RGMII_RXD0

PE_RESET*21,22

PE1_PRSNT*

22

PE1_IN22PE1_IN*

PE1_REFCLK22PE1_OUT22

PE1_REFCLK* 22

DAC_RED20DAC_GREEN20DAC_BLUE20

DAC_HSYNC20DAC_VSYNC20

RGMII_TXCTL34RGMII_TXD[3 0]34

RGMII_RXD[3 0]

34RGMII_RXCLK34RGMII_RXCTL34

RGMII_TXCLK34

RGMII_25MHZ34

RGMII_MDC 34RGMII_MDIO 34

DDC_CLK20DDC_DATA20RGMII_RESET*34

PE2_IN21PE2_IN*

21

PE2_PRSNT*

21

PE2_OUT*21PE2_OUT21

PE2_REFCLK21PE2_REFCLK* 21

1512963015129630

PLACE NEAR MCP61

BYPASS CAPS

CP35 X_COPPERdummyCP35 X_COPPERdummy

*

L17 FB L0603 47 Ohmdummy

*

TP591R732

10Kr0603h6

+/-5%

R732

10Kr0603h6

TP94 1

* C4450.1uF

+/-1%

R171124R0603

*

X5_1

Crystal RetainerX5_1

Crystal Retainer

R160 100R0603

+/-5%

dummyR160 100R0603

dummyCP16 X_COPPERdummy

50V, NPO, +/-5%

dummy

* C438C0603

X5XTAL-32.768kHz

X2ML+/-20PPM

X5XTAL-32.768kHz

X2ML+/-20PPM

12

X4XTAL-25MHzX2O+/-50PPMX4XTAL-25MHzX2O+/-50PPM

12

R740 49.9r0603h6

+/-1%

R740 49.9r0603h6

+/-1%

R739 49.9r0603h6

+/-1%

R739 49.9r0603h6

*R32210KR0603

+/-5%

dummy

*R32210KR0603

+/-1%

R2991.47KR0603

+/-1%

R152 100R0603

+/-5%

dummyR152 100R0603

JTAG_TCK

A6DDC_DATA/GPIO19

B6DDC_CLK/GPIO17

C27MII_VREFC25MII_RESET*/GPIO12

C24BUF_25MHZF24RGMII/MII_PWRDWN*/GPIO37

A25RGMII/MII_MDIORGMII/MII_MDC B25E28RGMII_TXCTL/MII_TXEN

D27RGMII_TXC/MII_TXCLK

E27RGMII_TXD3/MII_TXD3

D28RGMII_TXD2/MII_TXD2 B28RGMII_TXD1/MII_TXD1

A28RGMII_TXD0/MII_TXD0

TP601

SEC 2 OF 8

U15A

I99

MCP61BGA-692

SEC 2 OF 8

U15A

I99

MCP61BGA-692

V22 +1.2V_PLL_PEU22 +1.2V_PLL_PE

Y22 +1.2V_PLL_PE_SSW22 +1.2V_PLL_PE_SSAF29 PE0_PRSNTX16*

AE26 PE0_PRSNTX8*

AF28 PE0_PRSNTX4*/SDVO_SDAAF27 PE0_PRSNTX1*/SDVO_SCLB22 PE_WAKE*/GPIO21V26 PE0_RX15_NV25 PE0_RX14_NV23 PE0_RX13_NT25 PE0_RX12_NT24 PE0_RX11_NP24 PE0_RX10_NP27 PE0_RX9_NP23 PE0_RX8_NM25 PE0_RX7_NM24L22 PE0_RX6_NPE0_RX5_NK27 PE0_RX4_NK25 PE0_RX3_NK23 PE0_RX2_NH26 PE0_RX1_NH24 PE0_RX0_NV27 PE0_RX15_PV24 PE0_RX14_PU23 PE0_RX13_PT26 PE0_RX12_PT23 PE0_RX11_PP25 PE0_RX10_PP26 PE0_RX9_PP22 PE0_RX8_PM26 PE0_RX7_PM23 PE0_RX6_PM22K26 PE0_RX5_PPE0_RX4_PK24 PE0_RX3_PK22 PE0_RX2_PH25 PE0_RX1_PH23 PE0_RX0_P

T22+3.3V_PLL_PE_SS R22+3.3V_PLL_PE_SSAJ30PE_CLK_COMPAH29PE_RESET*

AC25PE_A_TSTCLK_PAC24PE_A_TSTCLK_NY23PE0_REFCLK_NY24PE0_REFCLK_PW28PE0_TX15_N V28PE0_TX14_NU29PE0_TX13_NU28PE0_TX12_N T28PE0_TX11_NR28PE0_TX10_NP28PE0_TX9_N N29PE0_TX8_NN28PE0_TX7_NM28PE0_TX6_N L28PE0_TX5_NK28PE0_TX4_NJ29PE0_TX3_N J28PE0_TX2_NH28PE0_TX1_NG28PE0_TX0_NW29PE0_TX15_PV29PE0_TX14_PU30PE0_TX13_PU27PE0_TX12_PT27PE0_TX11_P R29PE0_TX10_PP29PE0_TX9_PN30PE0_TX8_P N27PE0_TX7_PM27PE0_TX6_PL29PE0_TX5_P K29PE0_TX4_PJ30PE0_TX3_PJ27PE0_TX2_P H27PE0_TX1_PG29PE0_TX0_P

R7281.47K Ohmr0603h6

+/-1%

R7281.47K Ohmr0603h6

dummy

CP28 X_COPPER

dummy

Trang 16

FB L0603 47 Ohmdummy

*C544

0.1uF

C0603dummy

+/-1%

dummy

R3891KR0603

W83310DSdummy

6.3V, Y5V, +80%/-20%

*

C286C0805

*C3044.7uF

C0805dummy

+/-1%

dummy

R4631KR0603

6.3V, Y5V, +80%/-20%

@back

*

C645C0805

F27+1.2V_DUAL F26+1.2V_DUAL

U9+1.2V_SP_AV9+1.2V_SP_AV8+1.2V_SP_A W8+1.2V_SP_AW9+1.2V_SP_AW12+1.2V_SP_D V14+1.2V_SP_DW13+1.2V_SP_DV13+1.2V_SP_D

AC23+1.2V_PEAAD24+1.2V_PEA AE25+1.2V_PEAAF26+1.2V_PEAAG27+1.2V_PEA AH28+1.2V_PEAAJ28+1.2V_PEAAK28+1.2V_PEAW17+1.2V_HTW16+1.2V_HT W15+1.2V_HT

+/-1%

dummy

*R741

562 Ohmr0603h6

6.3V, Y5V, +80%/-20%

dummy

*

C469C0805

6.3V, Y5V, +80%/-20%

@back

*

C422C0805

6.3V, Y5V, +80%/-20%

*

C646C0805

U15GBGA-692MCP61I18

CP18X_COPPERdummyCP18X_COPPERdummy

Trang 17

PCI_AD23

PCI_AD26

PCI_AD29 PCI_AD2

LPC_CLK1PCI_RESET3*

LPCPWRDWN*

PCI_C/BE*0

PCI_C/BE*3

PCI_CLK1PCI_CLK2

+3.3V+3.3V

22PCI_PME*

22,33

PCI_FRAME*

22,33PCI_IRDY*

22,33PCI_TRDY*

22,33PCI_STOP*

22,33PCI_DEVSEL*

22,33PCI_PAR22,33

PCI_GNT*2 22PCI_GNT*1 33PCI_GNT*3 22

PCI_INTW* 22PCI_INTX*22PCI_INTY* 22PCI_INTZ*22,33

PCI_CLKSLOT222PCI_CLK_139433PCI_CLKSLOT122

LPC_SERIRQ23

LPC_AD[3 0]23,28

LPC_FRAME*23,28LPC_DRQ0*23

01 = PCI BIOS

00 = LPC BIOS*

DEFAULT*

STRAPHDA_SDOUT

31282522191613109630

30

SEC 4 OF 8

U15CBGA-692

MCP61

I134

SEC 4 OF 8

U15CBGA-692

MCP61

I134D9 LPC_RESET*

G18J18 PCI_PERR*/GPIO43/RS232_DCD*PCI_PARE18 PCI_DEVSEL*

D8LPC_CLK1E8LPC_CLK0

J10LPC_SERIRQB9LPC_DRQ1*/GPIO15/FANRPM1

C9LPC_DRQ0*/GPIO50LPC_FRAME* H10C8LPC_PWRDWN*/GPIO54/EXT_NMI*

E10LPC_AD3D10LPC_AD2F10LPC_AD1G10LPC_AD0

J12PCI_CLKINH12PCI_CLK4 E12PCI_CLK3D12PCI_CLK2F14PCI_CLK1 B13PCI_CLK0A21PCI_INTZ*

A22PCI_INTY*

D22PCI_INTX*

C22PCI_INTW*

C12PCI_GNT4*/GPIO53/RS232_SOUT*

J14PCI_GNT3*/GPIO39/RS232_RTS*B10PCI_GNT2*/GPIO41/RS232_DTR*

C10PCI_GNT1*

A9PCI_GNT0*

D13PCI_REQ4*/GPIO52/RS232_SIN*

H14PCI_REQ3*/GPIO38/RS232_CTS*

C11PCI_REQ2*/GPIO40/RS232_DSR*PCI_REQ1* A10

G12PCI_REQ0*

+/-5%

R302 22R0603

+/-5%

R387 33r0603h6

+/-5%

R387 33r0603h6

R734

10Kr0603h6

+/-5%

R734

10Kr0603h6

+/-5%

TP541

R360 * 33+/-5%R0603R360 33+/-5%R0603

*R3848.2K

+/-5%

R0603dummy

*R3848.2K

+/-5%

R0603dummyTP871

*CN10

*R3818.2K

+/-5%

R0603dummy

*R3818.2K

+/-5%

R0603dummy

*

C477C0603

50V, NPO, +/-5%

dummy

*

C477C0603

50V, NPO, +/-5%

dummy

R301 22R0603

+/-5%

R301 22R0603

R377 33r0603h6

+/-5%

R377 33r0603h6

+/-5%

R733

10Kr0603h6

+/-5%

dummyR733

10Kr0603h6

+/-5%

dummy

*

C503C0603

50V, NPO, +/-5%

dummy

*

C503C0603

50V, NPO, +/-5%

dummyTP961

Trang 18

SP_TX1MSP_TX0M

SP_TX2P

SP_TX3MSP_TX2M

IDE_IOR_P* 24IDE_IORDY_P 24

PLACE CAPS AT CONN

PLACE CAPS AT CONNPLACE CAPS AT CONN

15129630

Only MPC61 Premium support 4 SATA.

I87

SEC 5 OF 8

U15D

MCP61BGA-692

I87M12 +3.3V_PLL_DISPV12 +3.3V_PLL_LEGU12 +3.3V_PLL_SP_SSU13 +1.2V_PLL_SP_SSY9 +1.2V_PLL_SP_VDDAE2 RESERVED

AA3 SATA_B0_RX_PAA4 SATA_B0_RX_NY3 SATA_B0_TX_NY4 SATA_B0_TX_P

Y6 SATA_A1_RX_PY5 SATA_A1_RX_NY7 SATA_A1_TX_NY8 SATA_A1_TX_P

W2 SATA_A0_RX_PW3 SATA_A0_RX_NV1 SATA_A0_TX_NV2 SATA_A0_TX_P

AB5SATA_TERMPAB6SATA_TSTCLK_NAA6SATA_TSTCLK_P

A5SATA_LED*/GPIO57

AD6IDE_COMP_GNDIDE_COMP_3P3 AD5

AF6CABLE_DET_P/GPIO63AK4IDE_RDY_PAJ4IDE_IOR_P* AK3IDE_DREQ_PAH5IDE_INTR_PAH4IDE_IOW_P* AG5IDE_DACK_P*

AJ6IDE_CS3_P*

AK6IDE_CS1_P*

AH6IDE_ADDR_P2AJ5IDE_ADDR_P1AG6IDE_ADDR_P0AK2IDE_DATA_P15AJ1IDE_DATA_P14 AH2IDE_DATA_P13AG3IDE_DATA_P12AG1IDE_DATA_P11 AF3IDE_DATA_P10AF5IDE_DATA_P9AE5IDE_DATA_P8 AE6IDE_DATA_P7AF4IDE_DATA_P6AF2IDE_DATA_P5 AG2IDE_DATA_P4AH1IDE_DATA_P3AH3IDE_DATA_P2 AJ2IDE_DATA_P1AJ3IDE_DATA_P0

478

*L25

478

*

R4732.49KR0603

+/-1%*

R4732.49KR0603

+/-5%

R454 0R0603

+/-5%

SATA_3SATASATA_3

478

Định dạng
Số trang	37
Dung lượng	1,09 MB