It is seen that in a first stage the frequency error is quite large QT s 0.10, the CPRU has no way to lock in, and the lock metrics initialized at l0 1.75have a short acquisition and set
Trang 120 10
0
Normalized Time (Symbols)
L=64, K=32 C/I=-6 dB, P/C=6 dB
10
10 8 6 4 2 0
Eb/N0 (dB)
L=64, K=32 C/I=-6 dB, P/C=6 dB
J BAID =2-15
Figure 3-38 Accuracy of CPRU phase estimates
Trang 22 3 4 5
0.01
2 3 4 5
0.1
2 3 4 5
1
10 8 6 4 2 0
Eb/N0 (dB)
L=64, K=32 C/I=-6 dB, P/C=6 dB
J BAID =2-15
AFC, PLL on ideal
Figure 3-39 BER performance in the presence of frequency and phase errors
where 'T( )k T( )k Tˆ( )k is the residual phase error at step k, and
{±1±j}
k
c is the kth transmitted QPSK symbol on the useful traffic
channel If we look at ( ) as a function of 'T( )k we easily find that it is
not dependent on the particular value of c , and it is periodic with period k
(recall that A ! by definition) As is seen from the plot of (3.99) in Figure 0
3-40, ( ) attains its maximum value 2A when the phase error is a multiple
of S/ 2, i.e., when the phase loop is in lock Re-considering noise and MAI,
( )
needs filtering to yield a reliable lock metrics as in (3.97)
Before the AFCU and the CPRU have attained lock ( ) is affected by a
frequency offset In such a condition 'T( )k has a linear evolution with time,
and therefore the oscillating plot in Figure 3.40 is in a sense ‘swept’ on the
phase x-axis If the forgetting factor is small, i.e., J , the lock metrics 1
Trang 3Figure 3-40 z k vs the phase error 'T k .
Our lock detection criterion will be a comparison of l k with a suited ( )
threshold ranging between 1.8A and 2A If the threshold is crossed, the phase
error should be stable and close to one of the four lock point multiples of
ʌ/2
Figures 3-41 and 3-42 show the evolution of the lock metrics and of the
AFCU frequency estimate starting from receiver switch on in the following
J , QT s 0.1 The frequency step size is intentionally
set from the very start to its steady state value This has the effect of
lengthening the frequency acquisition time to show better the two
different DC levels attained by l k in the two different out of lock and ( )
in lock conditions;
2
J U ;
Trang 4300 200
100 0
Normalized Time (Symbols)
L=64, K=32 C/I=-6 dB, P/C=6 dB
300 200
100 0
Normalized Time (Symbols)
L=64, K=32 C/I=-6 dB, P/C=6 dB
E b /N 0 =0 dB
QT s =0.1
Figure 3-42 Frequency acquisition @ E b/N dB 0 0
Joint evaluation of Figures 3-41 and 3-42 is quite instructive It is seen that in a first stage the frequency error is quite large (QT s 0.10), the CPRU has no way to lock in, and the lock metrics (initialized at l(0) 1.75)have a short acquisition and settles at the expected out of lock value 1.8 As soon as the AFCU acquisition is over, and thus the frequency error is small
Trang 5(roughly k 2 105), the CPRU starts acquiring lock, and in parallel (after a
short CPRU acquisition time) the lock metrics rapidly attains the lock value
1.82 Unfortunately this value is substantially smaller than the theoretical
peak value of 2 in Figure 3-40 owed to noise induced biasing We can
therefore use a strategy of comparison with hysteresis to detect “out of
lockoin lock” and “in lockoout of lock” transitions based on the two
threshold values O L 1.8 and O H 1.815 This prevents the circuit to detect
false events like the one we would find in Figure 3-43 at 5
4.2 10
k # ushould we use a single threshold at O with no hysteresis H
300 200
100 0
Normalized Time (Symbols)
L=64, K=32 C/I=-6 dB, P/C=6 dB
E b /N 0 =4 dB
O H
O L
lock det.
Figure 3-43 Lock metrics evolution @ E b/N dB 0 0
Concerning the bias phenomenon for the out of lock and in lock values of
( )
l k mentioned above, we found that the out of lock value 1.8 is very
marginally affected by the operating condition in terms of SNIR, probably
owing to the implicit time averaging effect on ( ) we have discussed
Instead, the in lock value tends to grow when the SNIR improves Thus, the
same threshold values determined for the worst case in Figure 3-43 can be
safely re-used in conditions of better SNIR
MITIGATION
Implementation of a single-channel interference mitigating CDMA
detector represents the main novelty of the MUSIC project In this Section
we present the interference mitigating feature of the MUSIC receiver which
is based on the EC-BAID algorithm to be detailed hereafter
Trang 63.1 EC-BAID Architecture
We start with the analytical description of the signal at the receiver input,
assuming that K user traffic channels in DS/SS format are code multiplexed
in A-CDMA mode (see Chapter 2) The generic kth CDMA user transmits a
stream of complex-valued information bearing symbols, denoted as
( ) ( ) j ( )
k k p k q
a u a u a u The symbols, which belong to a QPSK alphabet
(i.e., a k p, ( ),u a k q, ( ) { 1}u r ) and run at symbol rate R s 1/T s, are spread
over the frequency spectrum by multiplication with a binary signature code,
denoted as ( ) { 1}c k A r , with period L and running at chip rate R c 1/T c
The signature is actually a short code as its repetition period L spans exactly
one symbol interval: T s L T c Chip rate symbols are eventually shaped by
a transmit filter with SRRC impulse response g t At the receiver side, T( )
after baseband conversion, the overall signal, denoted as r t , is made of K( )
CDMA channels plus additive noise n t as follows ( )
where P is the RF power of the kth channel and ( ) k s t is the relevant k
spreading signature defined as
In (3.101) W ,k I and k Q are the time delay, the carrier phase shift, and k
the frequency offset of the generic k-th traffic channel w.r.t the useful traffic
signal, which, without loss of generality is assumed to be channel 1 We
assume for now that the carrier frequency error relevant to channel 1 is
perfectly compensated for by means of an ideal AFC subsystem (i.e.,
f
' ) and that perfect chip timing recovery is performed (i.e., W ).1 0
The signal r t is then sent through a baseband filter with impulse response ( )
( )
R
g t performing Nyquist’s SRRC chip matched filtering, followed by chip
time sampling (or interpolation in the case of a digital implementation) The
signal samples taken at time t m m T at the output of the CMF are thus c
R |t mT c
The chip time signal y m is then input to the EC-BAID data detector
that was introduced in Section 2-5 We will described here the detector in
Trang 7more detail, starting back from the very fundamentals, just to make this
section as much self-contained as possible As detailed in [Rom97], the
EC-BAID uses a three-symbol observation window to detect one information
bearing symbol In the subsequent analytical description we will use the
superscript e to denote a 3L-dimensional vector (also termed ‘extended
vector’ as opposed to ‘non-extended’ L-dimensional vectors), the superscript
T
to denote transposition, and the asterisk *
to denote complex conjugation
The 3L-dimensional array of CMF samples observed by the detector is given
c c
with 1,0,1w The EC-BAID is a linear detector operating on the chip rate
sampled received signal y(m) to yield the symbol rate signal b(r) as follows
1 e T e
where ( )he r is the 3L-dimensional array of the complex-valued detector
coefficients It is apparent that detection of each symbol calls for observation
of three symbol periods (i.e., the current, the leading, and the trailing ones)
which represent the so called observation window (W LEN) This suggests the
three-fold parallel implementation of the detector sketched in Figure 2-20,
and repetead here in Figure 3-44, wherein the first detector unit processes the
(r th, the r th and the (1) r th symbol periods for the detection of the 1)
rth symbol, the second unit processes the rth, the (r th and the 1)
(r 2)th periods, for the detection of the (r th symbol, and the third unit 1)
processes the (r th, the (1) r 2)th and the (r th periods, for the 3)
detection of the (r 2)th symbol The structure of the detector units will be
outlined in the sequel Also, in the algorithm description we will assume a
Trang 8normalized observation window W LEN , whilst further considerations 3
about the selection of the optimum value of W LEN will be reported later in
Section 4.1
Figure 3-44 EC-BAID top level functional block
The output stream of soft values for data detection is obtained by
sequentially selecting the three detector unit outputs at rate 1/T s by means of
a multiplexer We need thus a further clock reference ticking at the so called
Super-Symbol rate RSS 1/(3 )T s , i.e., once every three symbols Taking this
into account, the sample at the output of the n-th detector unit (n 1, 2, 3) is
with s running at super-symbol rate To achieve blind adaptation the
complex coefficients he n, of each detector are anchored to the user signature
sequence, represented by the L–dimensional array c containing the chips
1( )
c A of the useful signal 1 The anchoring condition is obtained as follows
[Rom97] First, we decompose he n, in two parts
Trang 9L
c c
,
,
0 ,
e n n
e n n
e n n L
with 1,0,1w , and the optimum MMOE configuration of the detector is
found through application of a recursive update rule for the detector
coefficients As is detailed in [Rom97], the error signal in the recursion for
detector n is given by
1 e r T e r with e r e r e
e is orthogonal to c by construction (i.e., e
e c ), whilst the same consideration does not apply to the
quantization term ǻee( ) r In particular, taking into account that the LSB of
the term (ye*( ) 2r 7) in (3.119) is necessarily zero, ǻ ( ) ee r can be expressed
Trang 16w has components with values +1 or –1 The product with D(r) then
gives two different possible results: if D(r) is even, 1 bit truncation does not
introduce any error and we have
if D( )r is odd, 1 bit truncation is equivalent, considering a 2’s complement
representation, to subtracting 1 to each non-zero vector element, thus
The vector ǻee( )r is made of a component which is orthogonal to ce
and of a component de which is not The first will have no effect on the e
overall performance, whilst the second, being characterized by elements all
of the same sign, will build up an accumulation error This will impair
algorithm convergence In particular, de is given by e
ǻ >111 1@
T T
c A So de is zero only if the sequence e c is balanced, that is, it contains an
equal number of 1 and 1 As previously stated, the MUSIC receiver
supports the use of extended PN sequences overlaid to WH signatures This
superposition generates unbalanced codes for almost all of the possible
combinations Thus it is very likely, in the case of 1 bit truncation, to have
d ( ) 0ee r z
Figure 3-49 shows the estimated BER performance of the EC-BAID
obtained with L 128, K 64, E N b/ 0 5 dB, C I / 6 dB and on a
simulation run of 20 Msymbols The lower (almost horizontal) curve was
obtained with no truncation in the evaluation of e
e , whilst the upper one was
obtained with just 1 bit error in the internal word length dimensioning In the
latter case, the term >111 1" @Tc of (3.125) is equal to 16, and so every time
... xe maydrift and indefinitely increase, thus causing in the long run saturation and
failure of the detector To prevent this, it is mandatory to calculate the error
signal...
threshold ranging between 1.8A and 2A If the threshold is crossed, the phase
error should be stable and close to one of the four lock point multiples of
ʌ/2
Figures 3-41 and. .. ye and b, the processing
relevant to e (and so e xe) has to be performed with an internal word length