The heat transfer coefficient for natural convection can be related to the temperature difference between the surface and the ambient fluid, along with the fluid’s thermal and fluid properti
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the lateral conductivity and the transverse (through the thickness) conductivity is sufficient to achieve the desired accuracy As in all discretized thermal models, the error inherent in this technique is inversely proportional to the volume represented
by each resistor
Because the copper and dielectric layers in the board may not be continuous, due
to the presence of traces and vias, it is very difficult to model the conduction in this layerin full detail Ifn cis the numberof cutouts (holes forinterconnection and etched
copper) in the copper layers andd cis the diameterof each cutout, a conduction factor
forconduction normal to the copperlayers may be defined as
κn= WL − n c (πd c2/4)
whereW and L are the width and length of the printed circuit board, respectively.
The factorκnsimply represents the fraction of the conduction area missing due to the cutouts
Similarly, a conduction factorforthe in-plane direction may be defined as
κp =W − n W c d c (13.55) The thermal resistance of each of the layers making up the printed circuit board in the normal direction can be written as
R n
x = κ δx
whereδxandk x are the thickness and thermal conductivity of layerx Similarly, the
thermal resistance of each of the layers in the in-plane direction can be written as
R p
x = L
The thermal resistances of the various layers are in series in the normal direction and
in parallel in the in-plane direction Using the law of electrical resistances, the total resistanceR n
t in the normal direction can be written as
R n
t = δt
k en LW =
whereδt is the total thickness of the interposer or motherboard andk enis the equiv-alent normal thermal conductivity Similarly, the total resistanceR t p in the in-plane direction can be written as
1
R t p =
k epδt W
L =
k xδx W
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Equations (13.56) and (13.57) can be used to estimate the equivalent in-plane and normal thermal conductivities for the motherboard and interposer layers
Thermal Vias Existing electrical vias, or plated through holes, as well as “thermal
vias” embedded in the board, enhance the transverse thermal conductivity of a PCB and help to reduce the resistance to heat flow in the direction perpendicular to the plane of the PCB Thermal vias are also used in chip scale packages (CSPs) and ball grid array (BGA) packages to provide thermal paths of reduced resistance from the chip directly to the PCB Due to the geometric complexity of most PCBs, a combination of analytical and experimental approaches is usually needed to estimate
Figure 13.21 Temperature distribution in an epoxy–glass substrate with and without copper planes (From Howard et al., 1984.)
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the thermal conductivity of a particular board, but much can be learned from the analysis of a PCB with a relatively simple wiring pattern
When a large number of vias are present, it is possible to determine the thermal conductivity in the normal direction by assuming that the higher-conductivity vias provide the dominant thermal conduction path for heat The thermal conductivity of the dielectric can therefore be neglected and the thermal conductivity of the dielectric layer in the normal direction can be computed using
where the factork nis computed using the via diameterand eq (13.54) The conduc-tivity in the in-plane direction for the dielectric layers can still be assumed to be that
of the dielectric alone
Effect of Trace Layers Use of additional in-plane (orartificially thickened) cop-per layers can serve to substantially increase the effective lateral thermal conductivity
of a PCB, as achieved by Hewlett-Packard in the “finstrate” technology of the mid-1980s The reduced in-plane thermal resistance can help transport heat to the edges
of the board and/or dramatically reduce the local temperature rise of a high-power component mounted to the PCB The beneficial effect of such trace layers can best
be illustrated with a specific example using a finite-element model and numerical simulation to generate the temperature distributions (Lewis et al., 1996)
The following results were obtained with a 7.47-mm-square chip size, dissipat-ing 1 W, mounted on various PCBs (Howard et al., 1984) The results for case 1,
using an epoxy–glass substrate without any copper, are shown in Fig 13.21a in the
form of a three-dimensional plot of the temperature distribution in the substrate The poorthermal conductivity of the epoxy glass is seen to yield a 160°C maximum temperature rise under the center of the chip With a 1-oz copper trace, maximum temperature rise under the center of the chip is reduced to 21.8°C, whereas with 2-oz
copperit is 13.9°C and with 4-oz copperit is 8.9°C, as shown in Fig 13.21b, c, and
d, respectively.
13.4 CONVECTIVE PHENOMENA IN PACKAGING 13.4.1 Printed Circuit Boards in Natural Convection
Despite increasing performance demands and advances in thermal management tech-nology, natural convection air cooling of electronic equipment continues to command substantial attention The simplicity, reliability, and low cost of air natural convec-tion make this cooling mode a popularchoice forindividual IC packages, populated printed circuit boards, and the heat sinks attached to modules, power supplies, and chip packages The heat transfer coefficient for natural convection can be related to the temperature difference between the surface and the ambient fluid, along with the fluid’s thermal and fluid properties, as seen in the correlations listed in Tables 13.4 and 13.5, respectively
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Figure 13.22 Composite correlation for parallel isothermal plates
Vertical heated channels formed by parallel PCBs are a frequently encountered configuration in natural convection cooling of electronic equipment The historical work of Elenbaas (1942) provides the foundation for much of the effort dealing with natural convection in such smooth, isothermal, parallel-plate channels His exper-imental results for isothermal plates were confirmed via numerical simulation by Bodoia and Osterle (1964), who showed that the results could also be used for the constant heat flux condition Other researchers have extended this pioneering work
to include asymmetrically heated channels, including the case of the single insulated wall (Aung, 1972; Aung et al., 1972; Miyatake et al., 1973; Miyatake and Fujii, 1972)
These many studies revealed that the value of the convective heat transfer coefficient lies between two extremes associated with the separation distance between the plates orthe channel width
Forwide spacing, the plates appearto have little influence upon one another, and the heat transfer coefficient in this case achieves its isolated plate limit On the other hand, forclosely spaced plates orforrelatively long channels, the fluid attains the fully developed velocity profile and the heat transfer rate reaches its fully developed value Intermediate values of the heat transfer coefficient can be obtained from a judi-cious superposition of these two limiting phenomena, as presented in the composite expressions proposed by Bar-Cohen and Rohsenow (1984) Figure 13.22 shows one such correlation for natural convection heat transfer from isothermal parallel plates
Composite correlation for other situations such as symmetrically heated isothermal
or isoflux surfaces are available in the literature (Kraus and Bar-Cohen, 1983)
A compilation of these natural convection heat transfer correlations for an array of vertically heated channels is listed in Table 13.8 The heat transfer from isothermal plates is expressed in terms of the Elenbaas number, defined as
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TABLE 13.8 Natural Convection Heat Transfer Correlations for an Array of Heated Vertical Channels
Condition Fully Developed Limit Composite Correlation Symmetric isothermal plates Nu0= El
576
El2 +2√.873
El
−1/2
Asymmetric isothermal plates Nu0= El
144
El2 +2√.873
El
−1/2
Symmetric isoflux plates Nu0=
El 48
Asymmetric isoflux plates Nu0=
El 24
Symmetric isoflux plates based
on midheight temperature
Nu0=
El
El+(El)1.882/5
−1/2
Asymmetric isoflux plates based
on midheight temperature
Nu0=
El
El+ 1.88
(El)2/5
−1/2
El= C pρ2gβ(T w − Tamb)b4
In eq (13.61),b is the channel spacing, L the channel length, and (T w − Tamb) the
temperature difference between the channel wall and the ambient or channel inlet
The equations for the uniform heat flux boundary condition are defined in terms of the modified Elenbaas number, which is defined as
El= C pρ2gβqb5
µk2
In eq (13.62),qis the heat flux leaving the channel wall(s).
A different type of asymmetry can occur if adjacent channel walls are isothermal but at different temperatures or isoflux but dissipating different heat fluxes For the case where the walls are isothermal but at different wall temperaturesT w1andT w2, Aung (1972) defined an asymmetry parameter as
r T = T w1 − T0
T w2 − T0
(13.63)
in whichT0is the air temperature at the channel inlet Then the heat transfer could be calculated using the parameters listed in Table 13.9 In the case of symmetric isoflux plates, if the heat flux on the adjacent walls is not identical, the equations in Table 13.8 can be used with an average value of the heat flux on the two walls
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TABLE 13.9 Nusselt Number for Symmetric Isothermal Walls at Different Temperatures
Source: Aung (1972).
13.4.2 Optimum Spacing
The composite relations presented in Section 13.4.1 may be used in optimizing the spacing between PCBs For isothermal arrays, the optimum spacing maximizes the total heat transfer from a given base area or the volume assigned to an array of PCBs
Figure 13.23 shows the maximum power dissipation from a PCB card cage as a function of the PCB spacing It is clear from the figure that there is an optimum PCB spacing at which maximum powercan be dissipated in the PCBs forthe same PCB-to-ambient temperature difference
In the case of isoflux parallel-plate arrays, the power dissipation may be maxi-mized by increasing the number of plates indefinitely Thus, it is more practical to define the optimum channel spacing for an array of isoflux plates as the spacing that will yield the maximum volumetric heat dissipation rate per unit temperature differ-ence Despite this distinction, the optimum spacing is found in the same manner
Figure 13.23 Variation of total power dissipation from a PCB array with PCB spacing
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TABLE 13.10 Optimum Spacing for Natural Convection Cooled Arrays of Vertical Plates or Printed Circuit Boards
Symmetric isothermal plates bopt= 2.714
P1/4
Asymmetric isothermal plates bopt= 2.154
P1/4
Symmetric isoflux plates bopt= 1.472R −0.2
Asymmetric isoflux plates bopt= 1.169R −0.2
Source: Kraus and Bar-Cohen (1983).
The optimal spacings for different conditions are tabulated in Table 13.10 The parameterbopt in Table 13.10 represents the optimal spacing, and the plate to air parameterP is given as
P = C p (ρ f )2gβ ∆T0
where∆T0 is the temperature difference between the PCB and the ambient The parameterR in Table 13.10 is given by
R = C p (ρ f )2gβq
These smooth-plate relations have proved useful in a wide variety of applications and have been shown to yield very good agreement with measured empirical results for heat transfer from arrays of PCBs However, when applied to closely spaced PCBs, these equations tend to underpredict heat transfer in the channel due to the presence
of between-package wall flow and the nonsmooth nature of the channel surfaces
13.4.3 Printed Circuit Boards in Forced Convection
The thermal analysis for PCB arrays exposed to forced airflow can be performed in
a mannersimilarto that described fornatural convection If the PCB spacing is large enough that the boundary layers developing on adjacent boards are not expected to interfere with each other, the heat transfer correlations developed for the isolated flat plate in Table 13.4 can be used Note that in doing so, it is implicitly assumed that the PCBs are densely populated and that the gap between adjacent components on the PCB is small enough such that the developing boundary layers are not interrupted
Additionally, for such cases, even though heat is generated within discrete compo-nents on the board, it is possible to assume that there is a uniform heat flux condition
on the surface of the components because the component spacing is very small When
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TABLE 13.11 Nusselt Number for Developing Laminar Flow in Isoflux Channels
x+= 2
x/D h
Re· Pr
Nu
Source: Heaton et al (1964).
the spacing between the PCBs is small, the boundary layers from the adjacent boards are expected to merge In such cases the heat transfer coefficient can be estimated using the channel flow correlations discussed later in this section
The channels formed by PCBs are generally relatively short and the ratio of chan-nel length to the spacing between the boards is rarely larger than 100 In such cases, distinct velocity and temperature boundary layers are expected to develop over much
of the length of the PCB Consequently, correlations or tables for developing flow solutions must be used to correctly estimate the heat transfer from the PCBs Heaton
et al (1964) determined the local Nusselt numbers expected during developing lam-inarflow between isoflux walls These are listed in Table 13.11 It is clearfrom the tabulated values that the heat transfer coefficient in the developing region can be two
to three times higher than that obtained using the fully developed flow correlations
Similar data for a variety of flow geometries have been summarized by Kays and Crawford (1993)
It is often necessary in the thermal analysis of electronics equipment to evaluate the heat transfer coefficient for a discrete component located on a poorly conducting PCB, positioned at a downstream location in a channel Thermal performance of such
a discrete component can be assessed by assuming a uniform heat flux condition on the component surface and assuming that the boundary layer development begins at the leading edge of the component The Nusselt numbervalues tabulated in Table 13.11 can now be used to evaluate the heat transfer coefficient
For forced laminar flow in long or very narrow parallel-plate channels, the heat transfercoefficient attains an asymptotic value underfully developed conditions (the fully developed limit), which for symmetrically heated channel surfaces is approxi-mately equal to
h = 4D k f
whereD his the hydraulic diameter defined in terms of the flow areaA and the wetted
perimeter of the channelP w:
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TABLE 13.12 Nusselt Numbers for Fully Developed Laminar Flow in Channels
Cross Section Aspect Ratio Nu for T Constant qConstant
wall heated
Source: Kays and Crawford (1993).
D h=4P A
Table 13.12 provides the values of the fully developed Nusselt numbers Nu and heat transfer coefficienth for several channel geometries and for both isoflux (qconst)
and isothermal (T const) conditions.
For the case where adjacent channel walls each have a different uniform value of heat flux, Kays and Crawford (1993) also provide
Nu1= 5.385
1− 0.346(q
2/q
In the inlet zones of such parallel-plate channels and along isolated plates, the heat transfer coefficient varies with the distance from the leading edge and can be com-puted using the flat plate correlations provided in Tables 13.4 and 13.5
For calculation of the junction temperatures of components mounted on PCBs and cooled by forced convection, Witzman (1998) proposed
T j − T a = ∆T a + ∆T jc + ∆T ca (13.69) where∆T a is the rise in the temperature of air as it flows over the PCB,∆T jc is the temperature drop between the silicon junction and the outer surface of the PCB-mounted component, and∆T cais the temperature drop between the component sur-face and the local ambient temperature With increasing component power dissipation and more densely populated PCBs, it is important to determine the heat transfer co-efficient on the component surface accurately in order to compute∆T ca Witzman (1998) and Graham and Witzman (1988) obtained the local heat transfer coefficients through careful empirical measurements They found that in most cases the temper-ature varied axially, as well as laterally, along the surface of the PCB, creating a high-temperature area in the center of the PCB rack Based on their measurements for 20-mm board spacing and uniform component power dissipation ranging from 10
to 30 W, Witzman (1998) proposed
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T j − T a = 76.1q0.8
1+ 0.23(n − 2)0.62
(13.70) wheren is the position of the component (n = 1 is the bottom row), T j − T a the
average temperature rise of the nth component above the ambient temperature, and q
the component powerdissipation
Moffat and Ortega (1988) recommended that a heat transfer coefficienth adbased
on the adiabatic temperature of the heated element be used when utilizing correlations for heat transfer determined from actual measurements of simulated electronic cool-ing systems This recommendation is based on the fact thath adis independent of the geometry and flow and does not depend on the upstream flow pattern Additionally,
h ad can be measured by heating up only one element on the PCB and allows for superposition of solutions The superposition formulation for computing the junction
temperature of the ith component on a PCB can be written as
T j − Tin =h q i
i A i +
j
j=1
θij q j
whereTinis the inlet coolant temperature andθijis the thermal wake function, defined as
θij = T i − Tin
T j − Tin
(13.72)
In eq (13.71),j represents the components upstream from component i The first
term in eq (13.71) calculates the temperature rise of the component above its own adiabatic temperature and the second term adds the difference between the adiabatic temperature of the component and the inlet temperature of the coolant Moffat and Ortega (1988) have also summarized an extensive set of experimental data for several geometric arrangements in a channel
The convective resistance in the fluid region adjacent to the wall in turbulent flow
is nearly independent of the exact thermal boundary condition on the channel wall or
on any discrete component Consequently, the correlations listed in Table 13.4 can be used to obtain a fairly accurate estimate of the heat transfer coefficient in turbulent flow for both isothermal and isoflux wall boundary conditions The constants and eigenvalues required to estimate a heat transfer coefficient in developing turbulent flow have been summarized by Kays and Crawford (1993)
13.5 JET IMPINGEMENT COOLING 13.5.1 Introduction
In recent years the use of impinging fluid jets for thermal management of electronic components has received extensive attention The high heat transfer coefficients that can be attained in this cooling mode, the ability to vary and control the heat transfer