Model-Based Design for Embedded Systems- P25 docx

One of the possible solu-tions for MEMS design is the extension of the use of an integrated circuit design methodology to obtain a top-down design methodology that is pos-sible thanks to

Smart Sensors Modeling Using VHDL-AMS for Microinstrument Implementation with a Distributed Architecture

Carles Ferrer, Laura Barrachina-Saralegui, and Bibiana Lorente-Alvarez

CONTENTS

21.1 Introduction 697

21.2 Architecture 698

21.3 Design Methodology for MEMS Design 700

21.4 Application 702

21.5 Accelerometer 704

21.5.1 Description of the Accelerometer 704

21.5.2 Output Circuitry 706

21.5.3 IBIS Drivers 708

21.5.4 Interface of the Accelerometer 711

21.6 Gyroscope 711

21.7 Smart Sensor Simulation 714

21.7.1 IBIS Drivers in Sensors 714

21.7.2 Interface of the Gyroscope 715

21.8 Simulation and Validation 717

21.9 Conclusions 717

Acknowledgments 717

References 718

21.1 Introduction

The growing importance of microelectromechanical systems (MEMS) in a wide range of applications, which combine extreme sensitivity, accuracy, and compactness, has evidenced the need to simplify the design process

in order to reduce the design time and cost One of the possible solu-tions for MEMS design is the extension of the use of an integrated circuit design methodology to obtain a top-down design methodology that is pos-sible thanks to the new available mixed-signal modeling languages, such

as VHDL-AMS [1], analog and mixed-signal extension of VHDL language,

698 Model-Based Design for Embedded Systems

which allows developing models that combine not only digital and analogsignals, but also thermal, mechanical, and optical signals

The main step in the process of designing for MEMS integration is to bine VHDL models with VHDL-AMS models to obtain a complete descrip-tion of the multitechnological system Considering a simplified design flowfor mixed-signal models, the first step will be to define initial specifica-tions including environment and technical characteristics The next step is todefine interfaces and partitioning into basic components (including sensors,actuators, analog, and digital circuitry) to design an abstract structure thatmeets the initial requirements Each component modeling is realized withthe most appropriate language and could be described at different represen-tation levels (behavioral, structural, circuit, device, and physical) [2,3] Themodeling of each component becomes a complex task because of the differ-ent languages and abstraction levels required Finally, after the fabricationand/or assembly of all the components, a test and qualification phase must

com-be carried out in order to guaranty the expected quality levels for the targetapplication In one approach, the digital elements have been developed byusing VHDL, while the nonelectronic (transducers) parts and the analog andmixed-signal circuitry models have been elaborated in VHDL-AMS

The microinstrument that is modeled and to which this methodology isapplied is an inertial measurement unit (IMU) An IMU is the main com-ponent of inertial guidance systems used in air-, space-, and watercraft AnIMU works by sensing motion including the type, rate, and direction of thatmotion, and it will be composed of three accelerometers and three gyro-scopes with all these transducers based on MEMS technology Additionally,the necessary processing circuitry and modules for digital communicationhave to be treated and modeled with the most suitable language depending

on the nature of the element

This chapter is structured in the following manner: Section 21.2 presentsthe distributed architecture; Section 21.3 deals with the design methodologyfor MEMS; Section 21.4 provides an example of an application case based on

an IMU; Sections 21.5 and 21.6 present accelerometer and gyroscope sensormodeling, respectively; Section 21.7 describes the modeling of a completesmart sensor including the sensor and their associated electronic circuitry;Section 21.8 presents simulation and validation results; and Section 21.9concludes the chapter

21.2 Architecture

The associated electronic circuitry that measures a sensor must beconsidered, and it adds different and necessary functions, such as correctingoffsets, temperature compensations, AD conversions, etc All these functions

is classified into master or slave and has its own logic address [5].

This bus is based on a distributed architecture (see Figure 21.1) The mainadvantage of the distributed architecture is that when it has to be extendedbecause of the increasing number of smart sensors or actuators in a microsys-tem, additional smart sensors or actuators can easily be connected withoutthe need to rearchitect So, one of the solutions found was to specify a dis-tributed architecture in which a bus sensor was implemented, and this way

a specific interconnection was developed [6]

The distributed architecture introduces the advantage of modularity andinterchangeability as it enables an easy communication applicable to differ-ent sets of microsystems Its main characteristic is to own two buses Thesensor bus is used for relatively short distances, a few centimeters, and forconnecting sensors and actuators on the same subsystem through a dedi-cated microcontroller The use of miniature sensors in high numbers raisesthe problem of the size and mass of the interfacing cables and connectors,which are currently much higher than those of the sensors themselves Thisincreases the necessity to address the problem of whether it is possible toreduce, or even eliminate, the mass and volume of the interfacing devices

An evolution of this second architecture can be seen in Figure 21.2

It is shown how the master is combined with several elements such as

700 Model-Based Design for Embedded Systems

Application level Micro instrument level

Several interfaces

Processor

Memory SoC bus

Master

SoC level

FIGURE 21.2

Enlarging the architecture

memory, processor, and interfaces, forming a system on chip (SoC) thatcould be implemented with an ASIC or an FPGA, and how they can be inte-grated in the distributed architecture, combined with a higher lever (appli-cation level) and the lower level (sensor level) to built up the instrument

As it is said, IBIS was designed for the better integration of the sensors in

a system We have decided to create a two-wire low rate synchronous master bus This bus can address up to 31 slaves, using the 32nd address toaddress all the slaves at the same time, when it is necessary to send a generalreset, to do a self-test, or to initialize the sensors and actuators at the sametime specially However, any new necessary command that will affect theentire system could be implemented The speed of an IBIS is about 1 MHz,and it has a bus-shaped topology

mono-21.3 Design Methodology for MEMS Design

The design of MEMS can often become a task more complex than ing an electronic circuit This is because MEMS behavior cannot be consid-ered a simple addition of separate mixed (fluidic, optical, thermal, etc.) andelectrical behavior, but it is a simultaneous combination This fact motivatesthe extension of the existent design methodology for integrated circuits toobtain a top-down design methodology for MEMS design [7] It is based on

design-a hierdesign-archicdesign-al design method with both design-abstrdesign-act behdesign-aviordesign-al design-and functiondesign-almodels in device-analog-digital domain (see Figure 21.3) The development

of a design hierarchy allows the designer to mix levels of abstraction toobserve and evaluate interactions between interdependent subsystems

Sensor/ actuator

702 Model-Based Design for Embedded Systems

In this design flow, the functionality can be easily verified and analyzed

at the top level The specifications and characteristics of each stage (sensor/actuator, analog, digital) can be fixed at a lower level, using specific simu-lators (such as SPICE for analog circuits) to optimize design at the lowestlevel blocks This phase is very close to the convectional methods used inMEMS design The following phases of the design include effects because

of the extension of a top-down “digital” methodology: (a) The verification

of the whole simulation system can be obtained, although it is not possible

to directly synthesize the complete design with VHDL-AMS (b) Rapid andeasy design process from the top-down We take physical characterizationinto consideration at the final design to validate abstract models developed

in early design stages (c) Evaluation of the entire system at any design stage.This is of greater importance in the analog and MEMS design, especially con-sidering the multitechnolgical nature of MEMS

In order to obtain the necessary models of the MEMS, there are eral possible approaches Generalized networks can be considered in MEMSmodeling because many physical quantities are compared to flow or differ-ence quantities and generalized Kirchhoff’s laws can be applied To obtain

sev-a genersev-alized network, lsev-arge systems csev-an be interpreted sev-as decompositionsinto basic network elements This network concept is valid in many differentdomains, such as electrical, fluidic, mechanical, etc

Another way to obtain the model is using order reduction Modelingstrategy with the real system can be described using partial differentialequations for the entire system; producing reduced system matrices thatsimplify the simulation effort required comparing with the complexity ofthe equations that describes the MEMS device functionality The last way

is to obtain behavioral models as black-box models, derived from tion results in the time or frequency domain Once the model is developedand included in the complete system, the simulation process must consider

simula-a tuning phsimula-ase through the optimizsimula-ation of psimula-arsimula-ameter settings

The available modeling tools as well as available multidomain librariesare usually incomplete However, many system simulators can support stan-dardized modeling languages, like VHDL-AMS, and therefore any others inthe near future

21.4 Application

The case example presented in this work focuses on the development of

a complete behavioral model of an IMU in VHDL-AMS This IMU bines MEMS sensing technology with analog and digital signal processingcircuitry, all interconnected in a distributed architecture through the busIBIS The system is composed of three accelerometers and three gyroscopes,one for each direction of space, its conditioning signal circuitry, and the

com-corresponding interfaces to connect them to the communication bus Thecomplete system model covers mixed-technology sensors and mixed-signalcircuitry, so it has been developed in VHDL-AMS for the analog and mixed-technology modules, and VHDL for the digital ones All these modelshave been cosimulated within the same environment following the designmethodology design flow described in Figure 21.3 In this approach, a behav-ioral description of sensor/actuator and analog circuitry has been chosen incombination with a more structural description of the digital circuitry parts.

By employing an IMU, it is possible to know the position of an object inmotion, so it has many applications in remote control systems and navigationsystems An IMU may have many architectures and designs, with differentcomposing elements, depending on the technology and algorithm employed

In our case, the IMU is composed of three accelerometers and three scopes, each one with its own processing signal circuitry, although it could

gyro-be designed using a Kalman filter and gyroscopes Both designs have gyro-beencorrected from early conception to provide an adequate response for theanalog-to-digital converter (ADC) They are basically composed of an ampli-fier stage and filtering modules to reduce the electrical noise Finally, to con-nect each sensor to the communication bus, it has been necessary to develop

an interface to synchronize and make the data types compatible The IMUstructure is shown in Figure 21.4

Interface Interface Interface Interface Interface Interface

IBIS

SoC bus

Master

Communication interfaces Processor

Memory

Output circuitry

FIGURE 21.4

IMU structure

704 Model-Based Design for Embedded Systems

Different models have been elaborated for each element of the system,trying to develop behavioral and functional models to be employed in largesimulations, and structural models that allow descending to lower levels ofabstraction In this way, we obtain a complete description of the system, and

it is thus possible to compare the results of both models in order to improvethem and use the most suitable model in each simulation

21.5 Accelerometer

The accelerometer that has been assembled as a part of the IMU can be sidered a smart sensor, since it contains the necessary additional circuitry toconnect it to a main controller digital system The smart sensor is composed

of the acceleration sensor, its output circuitry with an analog-to-digital version, and an interface to adapt the system to a digital device Its internalstructure is shown in Figure 21.5

con-21.5.1 Description of the Accelerometer

The accelerometer is based on the piezoresistive effect, and was built into anSOI (silicon-on-insulator) wafer packaged on an MCM [8] It is a Wheatstonebridge with four piezoresistances placed on a cantilever design, whose valuewill depend on the direction of the applied acceleration We have devel-oped three different representations of this accelerometer, which will be useddepending on the level of abstraction and the features that we want to study.The three models are a behavioral model, a physical model, and a mathemat-ical model

• The behavioral model of the accelerometer is a simple model thatshows a linear relation between the applied acceleration and theoutput voltage The equation used has been obtained based on theexperimental measurement This simple model is useful to test other

Accelerometer

Output circuitry Amplifier stage CHS

S&H + ADC

elements of the sensor, and also to perform simulations that involve several accelerometers These simulations could take much time and resources of the simulator The model with its simulation can be seen in Figures 21.6 and 21.7

• The physical model of the accelerometer takes care of the piezoresistive effect in the Wheatstone bridge Given an acceleration, it first calculates all of the stress applied to the resistances because of this acceleration, depending on the direction that each resistance is placed The relation between the acceleration and the stress is modeled as a linear relation, whose constants can be obtained through experimental measurement Considering the stress applied to each resistance, the next step is calcu-lating the change in the resistive value This computation is performed

by applying the known constants for the piezoresistive material of sili-con for 100 wafers With this data, the output voltage of the Wheatstone bridge is easily obtained by applying the characteristic equations of the system

entity acc 2_5 v1 is

generic

( -Default values for the generics are from D

ZU-25g -

-Static

characteristics -Z_in

Z_out

Offset

S_sens

Vdd

N_lin

Hyst

Repet

C_sens_x:real

:real :real :real

:real

:real

:real

:real

:real

=

=

=

=

=

=

=

=

=

1888e3;

1882e3;

0.00510;

0.00046;

5.0;

037;

0.12;

0.14;

693;

[Input impedance] = Ohms [Output impedance] = Ohms

[Offset] = V/V

[Sensitivity] = V/(V.G) [Voltage supply] = V

[Non-linearity] = %PSO

[Hysteresis] = %PSO

[Repetibility] = %PSO [X axis cross sensitivity] = %

FIGURE 21.6

Behavioral model for the accelerometer

706 Model-Based Design for Embedded Systems

Simulation of the accelerometer behavioral model

• The mathematical model describes the accelerometer as a mass-springsystem It applies the Newton’s second law, which also deals with thedamping force Again, the constants used have been obtained throughexperimental measurement and known physical values This modelshows the possibilities of VHDL-AMS of solving differential equations

21.5.2 Output Circuitry

The output circuitry of the accelerometer can be treated separately in twoparts The first one is the signal conditioning circuitry based on Chopperstabilization (CHS), so it amplifies the signal and eliminates the noise Thesecond part consists of a sample and hold (SH) device and an ADC, andmakes possible the connection of the sensor to a digital device The entiresystem scheme can be seen in Figure 21.8

First, we address the signal conditioning circuitry The operation ple in CHS is to avoid low level noise by moving the signal to higher fre-quencies and restoring it to its original frequency once amplified The outputvoltage of the accelerometer reaches the first modulator, so it is transferred tothe frequency imposed by the oscillator The next step is to amplify the signaland pass through a band-pass filter, in order to eliminate undesirable signals

Low pass filter

hold

CHS

× 1

FIGURE 21.8

Accelerometer output circuitry

Finally, the second modulator and the low-pass filter restore the original quency signal

fre-The signal conditioning circuitry is composed of two modulators(input/output, which are controlled by an oscillator signal), a preamplifi-cation, a band-pass filter, an oscillator, a low-pass filter (40 dB/decade and

10 kHz Butterworth filter), and a frequency divider

The oscillator is composed of an astable multivibrator (square-wavegenerator) and a comparator It was designed to obtain the filter resonancefrequency and oscillator frequency as closely as possible The frequency of

oscillation is defined by the relation between R0and R1(see Figure 21.9) andpresents a value of 110 kHz In spite of developing this model according to itsschematic, its simulation has not been successful because it is impossible todefine initial conditions on the simulator For the global system simulation,

a behavioral model of the oscillator has been used (Figure 21.10)

The modulator is composed of different logic gates (see Figure 21.11) andprovides two square signals with the frequency of the oscillator, with a delay

But-The pass filter is a differential filter based on a narrow band’s pass filter (see Figure 21.13) The most important characteristics are the res-onance frequency of 110 kHz, which is the frequency of the oscillator, and

band-a 40 kHz bband-andwidth These feband-atures cband-an be seen in the results shown inFigure 21.14

For this simulation, the behavioral description of the accelerometer hasbeen used as excitation signal As can be seen in Figure 21.15, the outputsignal has a linear relation with the input signal, and amplifies it in twoorders of magnitude

708 Model-Based Design for Embedded Systems

+ 3

– 2

– 2

V+

8

V–

4 Out 1

Schematic corresponding to the low-pass filter

Next step is to model the second part of the output circuitry, which sists of an SH circuit and an ADC Between these elements and the amplifieroutput circuitry simulated before, a simple buffer had to be added to makethe offset levels compatible The SH circuitry is based on a simple designwith only one capacitor, where the sample is controlled by a switch and itsclock signal The converter operation is controlled also by a clock signal,which is the clock signal used by the IBIS bus Its simulation can be seen

con-in Figure 21.16, where the transformation of analog data to digital data isshown The synchronization between the IBIS and these elements is achievedthrough an interface, which allows the connection between the digital andthe analog parts of this smart sensor

In Figure 21.16 the first signal shown is the excitation signal, followed

by the same signal sampled, and finally intermediate signals that nize both elements The command signal governs the beginning of the data

synchro-capture, which finishes when the doutsignal takes a value

21.5.3 IBIS Drivers

All the developed IBIS drivers have a similar inside structure The bus fication is done in Manchester encoding, this allows a better transmissionand its synchronization, but has the drawback of making the driver slightlymore difficult to develop The drivers are necessary to connect the slaveswith the master of the bus, and they all are formed by different modules that

710 Model-Based Design for Embedded Systems

NOR2

1 2

3

NOR2

1 2

Schematic corresponding to the preamplifier

comprise different functions, as for example, a fragmentation module, aManchester encoding module, a Manchester decoding module, a module offrame formation, and all the involved mechanisms for the appropriate businteraction Examples of the later are the frequency divider or the internbuffers, to ensure that the data is not lost Furthermore, the bus, because ofits drivers, allows hot plugging and plug and play mode [9,10]