Interfacing PIC Microcontrollers 19 doc

This allows the output switching voltage to be different from the comparator supply voltage, which is useful for interfacing circuits operating at, say, ⫹/⫺ 15 V or with a 24 V sin-gle s

A specific type of op-amp is normally used for this type of application, which has an open collector output The output transistor switching circuit has

to be completed by an external pull-up (load) resistor This allows the output switching voltage to be different from the comparator supply voltage, which is useful for interfacing circuits operating at, say, ⫹/⫺ 15 V or with a 24 V sin-gle supply, which must be connected to a TTL MCU input or output The switching speed can be increased by using a lower value pull-up resistor, at the cost of higher power consumption Some MCUs have comparator inputs built

in, as a simple form of analogue input

Three types of comparator circuit are shown in Figure 7.13 The default chip type used here is the TLC339, a quad comparator

Simple Comparator

The comparator detects whether the input is above or below the reference volt-age The circuit shown (Figure 7.13 (a)) has a reference voltage of 2.5 V ap-plied to the - terminal As the input changes, the output switches at this volt-age The transfer characteristic shows the effect by plotting the output against the input voltage The reference voltage can be changed as required, giving a different switching level The output of the comparator is connected to an LED indicator in the load circuit, which is useful, but not essential The open col-lector output provides sufficient output current to drive an LED (~10 mA), without any additional driver stage

Trigger Comparator

The output voltage in this circuit (Figure 7.13 (b)) is fed back to the ⫹ termi-nal to set the reference level, which changes depending on whether the output

is high or low The switching level therefore depends on the previous setting of

the output This gives two switching levels: the output switches at a higher voltage when increasing from low to high and at a lower voltage when de-creasing from high to low In the circuit shown, the LED circuit affects the switching level, and may be omitted Notice that the input is applied to the − terminal, so the transfer characteristic is inverted When identifying circuits, positive feedback indicates a comparator, or an oscillator

The trigger circuit is often incorporated into digital signal paths as it helps

to reduce noise (unwanted high frequencies) In a simple TTL gate, noise on a slowly changing input signal might cause multiple transitions at the output; with a schmitt trigger input (as it is known), once the gate has changed state,

it does not change back unless there is a relatively large change in the input in the opposite direction The PIC MCU has schmitt trigger inputs on the port input buffers for improved noise immunity

(b)

(c)

0 2.5 5.0

Input Voltage

Output Voltage

5

0 2.5 5.0

Input Voltage

Output Voltage

5

0 2.5 5.0

Input Voltage

Output Voltage

5

Figure 7.13 Comparators: (a) simple comparator; (b) trigger comparator; (c) window

com-parator

Window Comparator

In this circuit, two comparators give a range of input voltages between which the output is high, and low when outside this range (or vice versa) Comparator

C output is low when the voltage is below about 1.6 V, and comparator B out-put is low above about 3.3 V Between these voltages, neither is low, allowing the output to rise to 5 V The open collectors allow this connection, while it is not allowed with the complementary output drivers in standard op-amps The circuit is used to detect when a voltage is within or outside a given range, which could be used, for example, in a simple voltage tester giving a pass/fail output

Op-amp Selection

There are three main types of op-amp for linear applications, plus the open col-lector comparator type for switching applications,

• Bipolar (e.g LM324, LM741)

• CMOS (e.g CA3140)

• BiFet (e.g TL074) The 741 is the original, standard, general purpose single op-amp in an 8-pin package It is based on bipolar transistor technology, with internal compensa-tion (feedback capacitance) to provide a stable, low bandwidth device for DC and audio range applications The LM324 is a similar type of quad device, designed for single 5 V supply operation The CMOS type uses FETs (field effect transistors), which have very low input current requirements, and there-fore provide low power, high input impedance amplifiers The BiFet type com-bines advantages of the bipolar and FET types in one chip FET inputs provide high input impedance and low input currents (but not necessarily low offset voltages), while bipolar outputs are more robust (specifically, less vulnerable

to high-voltage static electricity in the environment)

Op-amps are available which offer high precision, low noise, low power con-sumption, high bandwidth, high output current, and low input currents in vari-ous combinations When designing analogue signal conditioning for specific applications, an op-amp with the optimum combination of features should be selected

Analogue Output

Analogue output from microcontrollers is less commonly required than input, because many output loads can be driven by a digital signal Relays

and solenoids only need a slow switching current driver, while heaters and motors can be controlled using PWM, because the switched output current is effectively averaged by the inductive load

The Digital to Analogue Converter (DAC) is, however, commonly found in digital signal processors, where an analogue signal is converted to digital form for processing and storage, and then back to analogue, as in a digital audio system

DAC Types

A range of techniques are available to convert a binary output to a corre-sponding voltage The typical DAC uses a ladder network of precision resis-tors to produce a bit-weighted output voltage A summing amplifier can also

be used, with the input resistor values in a power-of-two series: 1k, 2k, 4k, 8k, 16k, 32k, 64k and 128k for example In all cases, an output sum voltage is produced as follows: the bit connected to the most significant bit input, if set, provides half the output voltage, the second bit a quarter, the third bit an eighth and so on

In the general DAC shown in Figure 7.14, the output step size and maximum level are set by a reference input, as in the ADC A reference voltage of 2.56

V, for example, would give a bit step of 0.01 V in an 8-bit DAC, since there are

256 (28) output levels That is, the least significant bit will produce a change

of 10 mV; this is the resolution of the converter Some converters, such the standard DAC0808 shown in Figure 7.15, use a current reference input, and a current output, which can be converted to voltage by precision resistors These resistors need to be at least as accurate as the DAC itself For an 8-bit DAC, the resolution is 1 part in 256, or slightly better than 0.5% at full scale, or 1%

at mid-range A 10-bit DAC has a resolution of 1/1024, about 0.1%, at full scale and 1/512, and about 0.2%, at the mid-value The resolution increases with the output level, since the step size is fixed

In the schematic of the test circuit (Figure 7.15), two DACS are demon-strated, a standard 8-bit DAC0808 and a more recent device, the 12-bit MCP4921 from Microchip, which uses the SPI serial interface

Parallel DAC

The parallel converter (PDAC) has an 8-bit digital input The reference level must be provided as a calibrated current, derived from the supply (⫹5 V) via

a pre-set pot, which allows the maximum output to be adjusted to 2.55 V For greater accuracy, a stable reference voltage should be used in the current source The PDAC is then set to operate at 10 mV/bit It also has a current out-put, so that a current loop output can be easily implemented for onward signal

transmission In this case, a general purpose JFET (high impedance) input TL074 converts the output current into a voltage of 0–2.55 V A precision resistor must be used in the feedback path if necessary A –5 V supply allows operation down to 0 V

The output in the test circuit can be controlled manually from the UP/DOWN push buttons, and monitored on the voltmeter When the run but-ton is pressed, the PDAC is driven with an incrementing output at maximum possible frequency, as determined by the MCU clock rate Each output step takes three instruction cycles (INCF ⫹ GOTO) A sawtooth waveform is pro-duced (Figure 7.16); if this is viewed on the oscilloscope, significant overshoot (ringing) can be seen on each step, and a large overshoot occurs on the falling edge This overshoot could cause problems in subsequent stages of the system,

so suitable filtering should always be considered on a digitally generated wave-form Here, the amplifier is damped with the 100 pF across the feedback-resistance On the other hand, too much damping causes the waveform to lose its sharpness

(a)

(b)

8-bit DAC

Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Reference Voltage or Current

Output Voltage

or Current

Vref

Bit 7 on

Bit 6 on Bit 5 on

Vref/2

Vref/4

etc Vref/8

Contribution of each bit to output voltage

All bits on

Figure 7.14 Basic digital to analogue converter: (a) general DAC hardware; (b) output voltage

steps

Figure 7.15 DACS schematic

Figure 7.16 Screenshot of PDAC waveform

;

; Test program for parallel and serial D/A Converters

; DAC0808 & MCP4921 Proteus simulation DACS.DSN

;

;************************************************************

PROCESSOR 16F877 INCLUDE "P16F877.INC"

Hibyte EQU 020 ; SPI data high byte Lobyte EQU 021 ; SPI data low byte

ORG 0 ; Load at default range

; Initialise parallel and serial ports

CLRF SSPSTAT ; default SPI mode

MOVLW B'00111001' ; Initial SDAC data

; Check buttons

; Send 16-bit data to SDAC via SPI port -spi BSF SSPCON,SSPEN ; Enable SPI port

BCF PORTC,0 ; Enable SDAC chip

waithi BTFSS PIR1,SSPIF ; Wait for

waitlo BTFSS PIR1,SSPIF ; Wait for

BSF PORTC,0 ; Disable SDAC chip

; Run output loop until reset

-BTFSC PORTB,0 ; Test run button

END

; -Program 7.3 DACS test program source code

Other standard waveforms can be generated in a similar way A square wave simply requires the output to be switched between maximum and minimum output values, with a controlled delay A triangular wave is similar to the saw-tooth, except that the falling edge is decremented rather than rolling over to zero A sine wave can be generated from a program data table, which holds pre-calculated instantaneous voltage values In fact, any arbitrary waveform can be generated in digital mode

The test program is listed in Program 7.3 The software and initialisation re-quired to drive the PDAC is relatively simple

Serial DAC

Many transducers are now provided with signal input and output using a standard serial data transfer protocol, such as SPI and I2C The serial con-verter (SDAC) used here uses the SPI interface, which allows 12-bit output

to be transferred on two lines (clock and data) The SPI interface is de-scribed in detail later in Chapter 9 It is easy to use, since the transfer is trig-gered by simply writing the data to the serial port buffer register (SSPBUF) The serial port interrupt flag is polled until it indicates that the data has been sent

The SDAC needs 2 bytes for each data transmission The most significant

4 bits of the first byte are used for control functions (0011) The low nibble contains the high 4 bits of the data, and the second byte the remaining 8 These are simply written one after the other to the output buffer The chip se-lect must then be taken high to trigger the transfer of the data to the output

of the SDAC More details are given in the device data sheet of the MCP4921

The output voltage range is set in the usual way by a voltage reference input The output has 212 steps (4096), so a reference voltage of 4.096 V gives a conversion factor of 1 mV/bit The resolution is 16 times better than the 8-bit PDAC The SDAC output can also reach 0 V without a negative supply The serial interface is inherently slower than the parallel, but fewer MCU I/O pins are needed

SUMMARY 7

• The PIC analogue to digital converter input provides 8-bit or 10-bit con-version

• One of eight analogue inputs in the 16F877 connects to the A/D module

• The conversion result is found in FSRs ADRESH and ADRESL

• A suitable reference voltage is used to set the maximum input voltage

• Linear amplifier stages may be needed to provide input signal condition-ing

• Analogue sensors need interfacing for correcting gain and offset

• A comparator converts voltage levels to a switched input

• A digital to analogue converter converts parallel or serial data into a voltage

1 Calculate the percentage accuracy per bit of a 12-bit ADC at full scale (3)

2 Explain why a 2.56 V reference voltage is convenient for an 8-bit ADC input (3)

4 Calculate the maximum sampling frequency for a 10-bit input if 2 µs per bit is

5 Explain the difference between left and right justified ADC results (3)

6 State the gain, input resistance and output resistance of an ideal amplifier (3)

7 State the device number of a single supply op-amp, and one advantage and one

8 Calculate the gain of a simple non-inverting IC amplifier, if the input resistor is

9 Calculate the output voltages of (a) a summing amplifier and (b) a difference

amplifier if the input voltages are 1.0 V and 0.5 V, and the gain of both is 2

10 Describe the general effect of a capacitor across the feedback resistor in an IC

11 Design an IC amplifier stage to give an output which changes from

0 V to ⫹2.0 V when the input changes from ⫹1.5 V to ⫹1.00 V, assuming the

12 The trigger comparator in Figure 7.10 (b) is fed with a triangular wave Sketch

the input and output on the same time axis, and show how output changes over one cycle of the input Add some (⬍1 V) noise to the input and show the effect on

the output Label the drawing to indicate the benefits of the circuit (5)

ASSIGNMENTS 7

7.1 Analogue Input

Modify the 8-bit conversion program so that the input measures from 0.00 to 0.64 V, by right justifying the result and processing ADRESL When the input

is 0.5 V, the display should show 0.500 V What is the resolution of the voltage measurement What is displayed when the input voltage is above 0.64 V, and why? Provide a program outline in suitable form

7.2 Amplifier Test

Run the simulation of the basic amplifier interfaces By suitable adjustment of the input voltages, record a set of values for each amplifier input and output, and demonstrate that the expressions given for the gain of each type is valid Evaluate the accuracy of the outputs obtained in simulation mode, as a per-centage Construct the equivalent physical circuits, compare the performance with the simulated and ideal performance, and account for any discrepancies

7.3 Summing DAC

Construct an IC summing amplifier in the circuit simulator with eight input resistors with the values 1k, 2k, 4k, 8k, 16k, 32k, 64k and 128k, and feedback resistor of 1k, using the LM324 (select a part with a simulation model at-tached) Connect each input to ⫹5 V via a toggle switch, and the reference (⫹) input to 2.5 V derived from a voltage divider across the supply Run the simu-lation and close the switches in reverse order (128k first) Record the output voltages obtained, and demonstrate that the circuit acts as a DAC Compare its performance, ease of use and other relevant factors with the DACs as shown in Figure 7.15