Embedded System Design Chapter 3 Hardware Design For An Embedded System.pdf

ĐẠI HỌC QUỐC GIA TP.HỒ CHÍ MINHTRƯỜNG ĐẠI HỌC BÁCH KHOA KHOA ĐIỆN-ĐIỆN TỬ BỘ MÔN KỸ THUẬT ĐIỆN TỬ Embedded System Design Chapter 3: Hardware design for an embedded system... Bộ môn Kỹ

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ĐẠI HỌC QUỐC GIA TP.HỒ CHÍ MINH

TRƯỜNG ĐẠI HỌC BÁCH KHOA

KHOA ĐIỆN-ĐIỆN TỬ

BỘ MÔN KỸ THUẬT ĐIỆN TỬ

Embedded System Design

Chapter 3: Hardware design for an embedded

system

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1

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– Sensors: temperature, humidity, light, motion

– Actuators: motor, solenoid, relay, FET, triac, SCR

– Interfaces: UART, USB, I2C, SPI, Ethernet, Wifi, Bluetooth, Zigbee

3 Clock / reset circuits

4 Power supply

– AC/DC adapters

– Battery

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Bộ môn Kỹ Thuật Điện Tử Chapter 4 2

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1 Hardware components

• Microprocessors/Microcontrollers

– Is a center processing unit

– Control input devices, sensors, actuators, display devices

– Process tasks, functions, and algorithms

– Interface other systems

microprocessor

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Bộ môn Kỹ Thuật Điện Tử Example of an embedded system 3

Chapter 4

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• Microprocessors/Microcontrollers

– The Intel MCS-51 (commonly referred to as 8051) is a Harvardarchitecture, CISC instruction set, single chip microcontroller (µC) series

– PIC is a family of modified Harvard architecture microcontrollers made

byMicrochip Technology

– ARM is a family of instruction set architectures for computer processors

instruction set computing (RISC) architecture

PIC

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Bộ môn Kỹ Thuật Điện Tử 4

Chapter 4

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• Peripherals

– Input devices: button, switch, keyboard, mouse, touch-screen

– Display devices: LED, text LCD, graphic LCD

– Sensors: temperature, humidity, light, motion

– Actuators: motor, solenoid, relay, FET, triac, SCR

– Interfaces: UART, USB, I2C, SPI, Ethernet, Wifi, Bluetooth, Zigbee

Display device: LCD

Input device: keypad

Interface: UART

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Actuator: relay

Chapter 4

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2 Design block diagram

• Block diagram

– Is a diagram of a system in which the principal parts or functions are represented by blocks connected by lines that show the relationships of the blocks

– Use to model the system graphically and show the

relationships in the process

– presents a quick overview of major process steps and key process participants, as well as the relationships and

interfaces.

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• Hardware block diagram

– Use a rectangle for a hardware block

– Use an arrow for a connection

Single connection Multiple connections

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• Hardware block diagram

– Use a symbol for a special block

computer Network

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• Block diagram features:

– Block diagram name

– Physical blocks

• Block name

• Have at least one connection

– Connections

• One direction / two directions/ multiple directions

• Single / multiple connections

• Data type of connections

– Special block

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Bộ môn Kỹ Thuật Điện Tử

• Block name

• Extra information

9

Chapter 4

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• Recommendations

1 CPU block is at the center

2 Sensor/input blocks are at the left side

3 Actuator blocks are at the right side

4 User interface blocks are at the top

5 Memory/ database/ blocks are at the bottom

6 Use different colors for differently functional blocks

7 Use symbols for special blocks

• Exceptions

– Not enough space

– Special systems such as SoC, NoC

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– Complex systems

10

Chapter 4

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Sabre lite board

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Sabre lite board

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DE2 board

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Hardware block diagram – Example 1

• Poor example

– No block diagram name

– Wrong direction of connection

– Problem of single / multiple connections

– No data type of connections

PIC Microcontroller

Temperature

Heater

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Hardware block diagram – Example 2

MOTOR CONTROL BLOCK DIAGRAM

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Hardware block diagram – Example

Temperature monitor board

=> Make this block diagram better!

PIC Microcontroller

LCD16x2

Temperature

sensor

SIM900

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Team work

• Draw the hardware block diagram of your project

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Embedded system hardware

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Micro controller selection

• Step1 Make a list of required hardware interfaces

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• Examine the software architecture

– the algorithms require floating point

mathematics?

– Do we need special hardware like FPU, DMA – Are there any high frequency control loops or sensors?

– how long and how often each task will need to run?

– What interrupts will we need?

– How many timer will we need?

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• Select the architecture

– Do we need to process 16/32 bit data often? – Can the application get by with 8/16 bit

architectures?

– Are there libraries that support the architecture

we chose?

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• Identify Memory Needs

– What is the largest data structure?

– How much is the size of the RTOS/libraries we will use?

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• Start searching for microcontrollers

– Supplier like Digikey, Arrow or other trusty

website.

– Chip manufacturer website (microchip, ST,TI,

Atmel, etc)

– https://en.wikipedia.org/wiki/List_of_common_m icrocontrollers

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• Examine Costs and Power Constraints

– If the device will be powered from a battery and mobile, low-power feature is absolutely necessary – Price is very important with large quantity project

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• Check part availability

– Are they kept in stock at multiple distributors or is there 6 – 12 week lead time?

– What are your requirements for availability?

– When will this part be obsolete? (life cycle)

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• Step 8: Select a development kit

– Is there any development kit available?

• Step 9: Investigate compilers and tools,

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Yes, with a device programmer

Entire Chip

Limited (consult datasheet)

Moderate Fast

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Max Erase Cycles

Cost (per

Expensive

Fast to read, slow

to erase/writ e

Moderate

Fast to read, slow

to erase/writ e

Expensive

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battery) Fast

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Memory mapped bus

/WR /RD

/CS 1

/PSEN

CS2

27C256

/CS A<0 14> D<0 7> /OE

P0 P2 Q ALE /RD

Adr 7 0 Adr 15…8 Adr 7…0

Data

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Memory mapped bus with 8051

VCC

U101

AT89C52

EA/VP 31

X1 19 X2 18

RESET 9

INT0 12 INT1 13 T0 14 T1 15

P1.0 1 P1.1 2 P1.2 3 P1.3 4 P1.4 5 P1.5 6 P1.6 7 P1.7 8

P0.0 39P0.1 38P0.2 37P0.3 36P0.4 35P0.5 34P0.6 33P0.7 32

P2.0 21P2.1 22P2.2 23P2.3 24P2.4 25P2.5 26P2.6 27P2.7 28

RD 17

WR 16PSEN 29

ALE/P 30

TXD

11 RXD 10

VCC

U102

74HC573

D0 2 D1 3 D2 4 D3 5 D4 6 D5 7 D6 8 D7 9 LE 11 OE 1

Q0 19Q1 18Q2 17Q3 16Q4 15Q5 14Q6 13Q7 12nEA

Y101 11.059MHz X1 X2

C102 30p C103 30p

P0.7

SW101

RESET

U106B 74HC00

4 5

6

P2.0 P2.2 P2.4 P2.6 ALE

RAM: 0x2000 - 0x3FFF

Dung de ZIF

A.0 A.2 A.4 A.6

A.13

nCS.3 A.15

MAIN

A.7

nCS.5

A.15 A.13

U106A 74HC00

1 2

3

VCC

A.12 GND

A.7 A.5 P0.[0 7]

P3.7 nRD

P1.0 P1.2

P3.7

P1.[0 7]

P1.3 P1.5 P1.7 P3.[0 7]

XTAL_OUT

P3.2 P3.4 P3.0

nCS.1 VCC

D0 11D1 12D2 13D3 15D4 16D5 17D6 18D7 19

OE 22 WE 27 CS1 20 CS2 26 NC1 1D.0

nPSEN D.1

nPSEN

D.2

R104 10k VCC

D.4 D.6

D.0 D.2 D.6

A 1 B 2 C 3 Y0 15Y1 14Y2 13Y3 12Y4 11Y5 109 G1 6 G2A 4 5

nWR nRD

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nCS.7 74LS138 Y7 7

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DDR_A10

VCCDR

DDR_A7 DDR_A1

DDR_A8 DDR_A11

DDR_A6 DDR_A4

DDR_A13

DDR_A5 DDR_A9

DDR_A0 DDR_A2

DDR_BA1

DDR_RASN DDR_CS0N

DDR_WEN DDR_CKE0 DDR_ODT0 DDR_CLKN

DDR_CASN

DDR_BA0 DDR_CLK

VREF_DDR

VREF_DDR DDR_ODT0

VREF_DDR

DDR_A2

DDR_RASN

DDR_DM0 DDR_A5

DDR_DM2

DDR_A6 DDR_A3 DDR_A7

DDR_WEN

DDR_A8 DDR_A11

DDR_DQS0M DDR_DQS0P

DDR_A14

DDR_DQS2P DDR_DQS2M DDR_BA2

U16 DDR3-512MB DQ0 E3 DQ1 F7 DQ2 F2 DQ3 F8 DQ4 H3 DQ5 H8 DQ6 G2 DQ7 H7 DQ8 D7 DQ9 C3 DQ10 C8 DQ11 C2 DQ12 A7 DQ13 A2 DQ14 B8 DQ15 A3 CKE K9 CS#

L2 ODT K1 RAS#

J3 CAS#

K3 WE#

L3 VDD1 B2 VDD2 D9 VDD3 G7 VDD4 K2 VDD5 K8

VDDQ1 A1 VDDQ2 A8

NC1 J1 J9

A0 N3A1 P7A2 P3A3 N2A4 P8A5 P2A6 R8A7 R2A8 T8A9 R3A10/AP L7A11 R7A12/BC# N7A13 T3BA0 M2BA1 N8BA2 M3

CK J7CK# K7LDM E7UDM D3LDQS F3LDQS# G3UDQS C7UDQS# B7VSSQ1 B1VSSQ2 B9

VSS1 A9VSS2 B3VREFDQ H1 VSS4 G8VSS5 J2VSS3 E1VSS6 J8VSS7 M1VSS8 M9VSS9 P1P9

VSSQ3 D1VSSQ4 D8VSSQ5 E2VSSQ6 E8VSSQ7 F9VSSQ8 G1VSSQ9 G9

VDDQ3 C1 VDDQ4 C9 VDDQ5 D2 VDDQ6 E9 VDDQ7 F1

VDD6 N1 VDD7 N9 VDD8 R1 VDD9 R9

ZQ L8 VREFCA M8 RESET#

T2

A14 T7

VDDQ8 H2 VDDQ9 H9

DDR_BA0

DDR_D14 DDR_D12

DDR_CKE0 U12K

DDR_ODT0 D17DDR_ODT1 C17

DDR_BA0 D11DDR_BA1 C11DDR_BA2 B11

DDR_RASn A10DDR_CASn B10DDR_WEn C10

DDR_CS0 A8DDR_CS1 B9

DDR_VREF G13

DDR_PZQ

G15

DDR_CKE0 C9DDR_CKE1 B8

DDR_RESET E11

MVDD1 F7MVDD2 F8MVDD3 F10MVDD4 F11MVDD5 F13MVDD6 F14MVDD7 F16MVDD8 F17

DDR_A15 A16

DDR_VREFAO G12

MVDDAO G11DDR_RETEN

DDR_CS0N

DDR_D15 DDR_A1

DDR_CLKN DDR_CLK

R84

DDR_ODT0 DDR_A14

DDR_A5

DDR_DM3

DDR_A6 DDR_A8 DDR_A10

DDR_DQS1M DDR_DQS1P

DDR_A11

DDR_BA2 DDR_A12

DDR_RST

DDR_A14 DDR_D16

DDR_D0

DDR_BA0

DDR_D1

U11 DDR3-512MB DQ0 E3 DQ1 F7 DQ2 F2 DQ3 F8 DQ4 H3 DQ5 H8 DQ6 G2 DQ7 H7 DQ8 D7 DQ9 C3 DQ10 C8 DQ11 C2 DQ12 A7 DQ13 A2 DQ14 B8 DQ15 A3 CKE K9 CS#

L2 ODT K1 RAS#

J3 CAS#

K3 WE#

L3 VDD1 B2 VDD2 D9 VDD3 G7 VDD4 K2 VDD5 K8

VDDQ1 A1 VDDQ2 A8

NC1 J1 NC2 J9

A0 N3A1 P7A2 P3A3 N2A4 P8A5 P2A6 R8A7 R2A8 T8A9 R3A10/AP L7A11 R7A12/BC# N7A13 T3BA0 M2BA1 N8BA2 M3

CK J7CK# K7LDM E7UDM D3LDQS F3LDQS# G3UDQS C7UDQS# B7VSSQ1 B1VSSQ2 B9

VSS1 A9VSS2 B3VREFDQ H1 VSS4 G8VSS5 J2VSS3 E1VSS6 J8VSS7 M1VSS8 M9VSS9 P1VSS10 P9T1

VSSQ3 D1VSSQ4 D8VSSQ5 E2VSSQ6 E8VSSQ7 F9VSSQ8 G1VSSQ9 G9

VDDQ3 C1 VDDQ4 C9 VDDQ5 D2 VDDQ6 E9 VDDQ7 F1

VDD6 N1 VDD7 N9 VDD8 R1 VDD9 R9

L1 ZQ L8 VREFCA M8 RESET#

T2

A14 T7

VDDQ8 H2 VDDQ9 H9

DDR_D21 DDR_D23

DDR_D2

DDR_D18 DDR_D20 DDR_D7 DDR_D4 DDR_D6

DDR_DQS3P DDR_DQS3M DDR_RST

DDR_CKE0

DDR_A0

DDR_CS0N

DDR_CLKN DDR_CLK DDR_A1

R58 240R%1

DDR_D28 DDR_D31

DDR_D24 DDR_D26 DDR_D29

VCCDR

DDR_A15

DDR_ODT1 DDR_CS1N

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VSS12 T9NC3 L9 NC5 M7 M7 NC4 VSS12 T9DDR_A15 DDR_A15

DDR3

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Basic protocol concepts

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A strobe/handshake compromise

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Parallel communication

• Multiple data, control, and possibly power wires

– One bit per wire

• High data throughput with short distances

• Typically used when connecting devices on same IC or same circuit board

– Bus must be kept short

• long parallel wires result in high capacitance values which requires more time to charge/discharge

• Data misalignment between wires increases as length increases

• Higher cost, bulky

Question:

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List some parallel communications and peripherals you know?

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Serial communication

• Single data wire, possibly also control and power wires

• Words transmitted one bit at a time

• Higher data throughput with long distances

– Less average capacitance, so more bits per unit of time

• Cheaper, less bulky

• More complex interfacing logic and communication protocol

– Sender needs to decompose word into bits

– Receiver needs to recompose bits into word

– Control signals often sent on same wire as data increasing protocol complexity

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Bộ môn 42

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– 3.4 Mbits/s and 10-bit addressing in fast-mode

• EPROMS, Flash, and some RAM memory, real-time clocks, watchdog timers, and microcontrollers

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Bộ môn Kỹ Thuật 45

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I2C bus structure

SDA

SCL

SDA SCL

SDA SCL Start

A 6

A 5

A 0

R / w

A C K

D 8

D 7

D 0

A C K

S T

O P

From Servant

From receiver

Typical read/write cycle

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SPI bus

speeds– 0-50 MHz clock speeds not uncommon

characters

Bus wires

• Master-Out, Slave-In (MOSI)

• Master-In, Slave-Out (MISO)

• System Clock (SCLK)

• Slave Select/Chip Select (SS1#, …,

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SS#n or CS1, …, CSn)

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Bus configuration

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SPI clocking

• Four clocking “modes”

– Two phases

– Two polarities

• Master and selected slave must be in the same mode

• During transfers with slaves A and B, Master must

– Configure clock to Slave A’s clock mode

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• Master reconfigures clock mode on-the-fly!

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SPI clock modes

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SPI pros and cons

• Pros

– Fast for point-to-point connections

– Easily allows streaming/constant data inflow

– No addressing in protocol, so it’s simple to implement – Broadly supported

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– No flow control (must know slave speed)

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Other board bus

• One wire

• USB

• PCI

• LVDS

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Định dạng
Số trang	104
Dung lượng	31,83 MB

Tiêu đề	Hardware design for an embedded system
Trường học	ĐẠI HỌC QUỐC GIA TP.HỒ CHÍ MINH
Chuyên ngành	Embedded System Design
Thể loại	Chapter
Thành phố	TP.HỒ CHÍ MINH