raising standards worldwide™NO COPYING WITHOUT BSI PERMISSION EXCEPT AS PERMITTED BY COPYRIGHT LAW BSI Standards Publication Mechanical standardization of semiconductor devices Part 6-18
Trang 1raising standards worldwide™
NO COPYING WITHOUT BSI PERMISSION EXCEPT AS PERMITTED BY COPYRIGHT LAW
BSI Standards Publication
Mechanical standardization of semiconductor devices
Part 6-18: General rules for the preparation of outline drawings of surface mounted semiconductor device packages — Design guide for ball grid array (BGA)
BS EN 60191-6-18:2010
Incorporating corrigendum May 2010
Trang 2Compliance with a British Standard cannot confer immunity from legal obligations.
This British Standard was published under the authority of the Standards Policy and Strategy Committee on 30 April 2010
Date Text affected
BRITISH STANDARD
BS EN 60191-6-18:2010
corrigendum incorporating
The start and finish of introduced or altered by corrigendum is indicated
in the by tags altered by is indicated in
Implementation of IEC corrigendum May 2010
IEC corrigendum May 2010 text
text Text
May 2010
Trang 3Central Secretariat: Avenue Marnix 17, B - 1000 Brussels
© 2010 CENELEC - All rights of exploitation in any form and by any means reserved worldwide for CENELEC members
Ref No EN 60191-6-18:2010 E
ICS 31.080.01
English version
Mechanical standardization of semiconductor devices - Part 6-18: General rules for the preparation of outline drawings
of surface mounted semiconductor device packages -
Design guide for ball grid array (BGA)
(IEC 60191-6-18:2010)
Normalisation mécanique
des dispositifs à semiconducteurs -
Partie 6-18: Règles générales
pour la préparation des dessins
d'encombrement des dispositifs
à semiconducteurs
pour montage en surface -
Guide de conception pour les boîtiers
matriciels à billes (BGA)
(CEI 60191-6-18:2010)
Mechanische Normung von Halbleiterbauelementen - Teil 6-18: Allgemeine Regeln für die Erstellung
von Gehäusezeichnungen von SMD-Halbleitergehäusen - Konstruktionsleitfaden
für Ball-Grid-Array (BGA) (IEC 60191-6-18:2010)
This European Standard was approved by CENELEC on 2010-02-01 CENELEC members are bound to comply with the CEN/CENELEC Internal Regulations which stipulate the conditions for giving this European Standard the status of a national standard without any alteration
Up-to-date lists and bibliographical references concerning such national standards may be obtained on application to the Central Secretariat or to any CENELEC member
This European Standard exists in three official versions (English, French, German) A version in any other language made by translation under the responsibility of a CENELEC member into its own language and notified
to the Central Secretariat has the same status as the official versions
CENELEC members are the national electrotechnical committees of Austria, Belgium, Bulgaria, Croatia, Cyprus, the Czech Republic, Denmark, Estonia, Finland, France, Germany, Greece, Hungary, Iceland, Ireland, Italy, Latvia, Lithuania, Luxembourg, Malta, the Netherlands, Norway, Poland, Portugal, Romania, Slovakia, Slovenia, Spain, Sweden, Switzerland and the United Kingdom
Trang 4- 2 -
Foreword
The text of document 47D/753A/FDIS, future edition 1 of IEC 60191-6-18, prepared by SC 47D, Mechanical standardization for semiconductor devices, of IEC TC 47, Semiconductor devices, was submitted to the IEC-CENELEC parallel vote and was approved by CENELEC as EN 60191-6-18 on 2010-02-01
Attention is drawn to the possibility that some of the elements of this document may be the subject of patent rights CEN and CENELEC shall not be held responsible for identifying any or all such patent rights
The following dates were fixed:
– latest date by which the EN has to be implemented
at national level by publication of an identical national standard or by endorsement (dop) 2010-11-01 – latest date by which the national standards conflicting
with the EN have to be withdrawn (dow) 2013-02-01 Annex ZA has been added by CENELEC
Endorsement notice
The text of the International Standard IEC 60191-9-18:2010 was approved by CENELEC as a European Standard without any modification
In the official version, for Bibliography, the following notes have to be added for the standards indicated:
IEC 60191-6-2 NOTE Harmonized as EN 60191-6-2
IEC 60191-6-4 NOTE Harmonized as EN 60191-6-4
IEC 60191-6-5 NOTE Harmonized as EN 60191-6-5
Trang 5- 3 -
Annex ZA
(normative)
Normative references to international publications with their corresponding European publications
The following referenced documents are indispensable for the application of this document For dated references, only the edition cited applies For undated references, the latest edition of the referenced document (including any amendments) applies
of outline drawings of surface mounted semiconductor device packages
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CONTENTS
1 Scope 5
2 Normative references 5
3 Terms and definitions 5
4 Terminal position numbering 6
5 Nominal package dimension 6
6 Symbols and drawings 7
7 Dimensions 10
8 Recommended BGA variations 16
Bibliography 20
Figure 1 – Cavity down type 7
Figure 2 – Cavity up type 8
Figure 3 – Pattern of terminal position areas 9
Figure 4 – Example of the terminal depopulations 15
Table 1 – Group 1: Dimensions appropriate to mounting and interchangeability 10
Table 2 – Group 2: Dimensions appropriate to mounting and gauging 13
Table 3 – Combinations of D, E, e, MD, ME, and n 14
Table 4 – P-BGA (Cavity up) 1,27 mm pitch 16
Table 5 – P-BGA (Cavity up) 1,0 mm pitch 16
Table 6 – P-BGA (Cavity down) 1,27 mm pitch 18
Table 7 – T-BGA 1,27 mm pitch 18
Table 8 – T-BGA 1,0 mm pitch 19
Table 9 – P-BGA and C-BGA (Flip-chip interconnection) 1,0 mm pitch 19
BS EN 60191-6-18:2010
EN 60191-6-18:2010 (E)
Trang 7– 5 –
MECHANICAL STANDARDIZATION OF SEMICONDUCTOR DEVICES – Part 6-18: General rules for the preparation of outline drawings
of surface mounted semiconductor device packages –
Design guide for ball grid array (BGA)
1 Scope
This part of IEC 60191 provides standard outline drawings, dimensions, and recommended variations for all square ball grid array packages (BGA), whose terminal pitch is 1 mm or larger
2 Normative references
The following referenced documents are indispensable for the application of this document For dated references, only the edition cited applies For undated references, the latest edition
of the referenced document applies
IEC 60191-6, Mechanical standardization of semiconductor devices – Part 6: General rules for
the preparation of outline drawings of surface mounted semiconductor device packages
3 Terms and definitions
For the purposes of this document, the terms and definitions given IEC 60191 (series) and the following apply
P-BGA (Flip chip interconnection)
BGA with an organic substrate and a die bonded to a substrate through metal bumps
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3.6
recommended BGA variation
BGA variation with the specific dimensions and ball counts as the first choice for production packages other than recommended BGA variations are the least choice for production to avoid endless proliferation of BGA outlines
4 Terminal position numbering
When a package is viewed from the terminal side with the index corner in the bottom left corner position, terminal rows are lettered from bottom to top starting with A, then B, C,,,, AA,
AB, etc., while terminal columns are numbered from left to right starting with 1 Terminal positions are designated by a row-column grid system and shown as alphanumeric identification, e.g., A1, B1, or AC34 The letters I, O, Q, S, X and Z are not used for naming the terminal rows
5 Nominal package dimension
A nominal package dimension is defined as “the package width (E) × length (D)”, which is expressed in the tenths place in millimetre
BS EN 60191-6-18:2010
EN 60191-6-18:2010 (E)
Trang 9– 7 –
6 Symbols and drawings
BGA outline is shown in the Figure 1 and 2
The symbols in this figure are explained in IEC 60191-6
Figure 1 – Cavity down type
BS EN 60191-6-18:2010
EN 60191-6-18:2010 (E)
Trang 10The symbols in this figure are explained in IEC 60191-6
Figure 2 – Cavity up type
BS EN 60191-6-18:2010
EN 60191-6-18:2010 (E)
Trang 11– 9 – Notes relating to Figure 1 and Figure 2:
(1) Datum S is defined as the seating plane on which a package free stands by contact of the balls
(2) The distance between the centrelines of any two adjacent rows or columns of balls
(3) The hatched zone indicates the index-marking area where whole index mark will be contained (4) The profile tolerance that controls of package size and orientation is applied to all four sides of the package outline
(5) The tolerance of position that controls the relationship of the balls applies to all balls
(6) The terminal diameter “bp” is the maximum diameter of individual balls as measured in the plane parallel to the seating plane
(7) It shows the lid made of mould compound, glob top resin, metal cap, ceramics, etc It may be flat, convex, or concave shape
(8) The primary stand-off height is defined by the height from the seating plane to the package substrate
(9) The secondary stand-off height is defined by the height from the seating plane to the lid that is the lowest surface on the cavity-down configuration
(10) SD and SE are the dimensions that define the positions of balls next to the datum A and B
NOTE An array pattern of permissible terminal-existing zones including true position tolerance is shown in Figure
The symbols in this figure are explained in IEC 60191-6
Figure 3 – Pattern of terminal position areas
BS EN 60191-6-18:2010
EN 60191-6-18:2010 (E)
Trang 12E × D (1) A nominal package dimension is defined as “the
package width (E) × length (D)”, which is expressed in the tenths place in millimetre
(2) Variations on nominal package dimensions are:
10,0 ×10,0 31,0 ×31,0 11,0 ×11,0 33,0 ×33,0 12,0 ×12,0 35,0 ×35,0 13,0 ×13,0 37,5 ×37,5 14,0 ×14,0 40,0 ×40,0 15,0 ×15,0 42,5 ×42,5 16,0 ×16,0 45,0 ×45,0 17,0 ×17,0 47,5 ×47,5 18,0 ×18,0 50,0 ×50,0 19,0 ×19,0 52,5 ×52,5 20,0 ×20,0 55,0 ×55,0 21,0 ×21,0 57,5 ×57,5 23,0 ×23,0 60,0 ×60,0
Refer to Table 4 through 9
Package length D (1) Package length D
BS EN 60191-6-18:2010
EN 60191-6-18:2010 (E)
Trang 13– 11 –
Table 1 (continued)
Unit:mm
Term Symbol Specification Recommended value
Package width E (1) Package width E
Profile tolerance of package body
”A” includes heat slug thickness, package warpage and tilt errors
“A” does not include the height of external heat sink or chip capacitors
-
Primary off height A1
e A1 min A1 nom A1 max1,27
1,00
0,5 0,4
0,6 0,5
0,7 0,6
Trang 14Terminal grid
1,27 1,00
−
Terminal diameter
bp
1,27 1,00
0,60 0,50
0,75 0,60
0,90 0,70
−
Positional tolerance with respect to the body datum
x1
1,27 1,00
0,30 0,25
−
terminal positional tolerance
Terminal-to-x2
1,27 1,00
0,15 0,10
1,27 1,00
0,20 0,20
−
Parallelism tolerance of the top surface
Center terminal(s) position in length
SD When MD is an odd number, SD = 0
When MD is an even number, SD = e /2
−
Center terminal(s) position in width
SE When ME is an odd number, SE = 0
When ME is even number, SE = e /2
Trang 15position SD and SE Any terminal balls may be omitted from the terminal matrix
–
Number of terminals
through 9 Maximum
matrix size in length
MD
Maximum matrix size in width
Overhang dimension in width
Trang 17– 15 –
Full grid 4 rows in perimeter
matrix
5 rows in perimeter matrix
6 rows in perimeter matrix
7 rows in perimeter
Index marking is in the left bottom corner
Figure 4 – Example of the terminal depopulations
BS EN 60191-6-18:2010
EN 60191-6-18:2010 (E)
Trang 18– 16 –
8 Recommended BGA variations
Table 4 – P-BGA (cavity up) 1,27 mm pitch
Number of rows in centre matrix
Number of terminals
Number of rows in centre matrix
Number of terminals
Trang 21Number of terminals
Number of terminals
Trang 22– 20 –
Bibliography
IEC 60191-6-2, Mechanical standardization of semiconductor devices – Part 6-2: General
rules for the preparation of outline drawings of surface mounted semiconductor device packages – Design guide for 1,50 mm, 1,27 mm and 1,00 mm pitch ball and column terminal packages
IEC 60191-6-4, Mechanical standardization of semiconductor devices – Part 6-4: General
rules for the preparation of outline drawings of surface mounted semiconductor device packages – Measuring methods for package dimensions of ball grid array (BGA)
IEC 60191-6-5, Mechanical standardization of semiconductor devices – Part 6-5: General
rules for the preparation of outline drawings of surface mounted semiconductor device packages – Design guide for fine-pitch ball grid array (FBGA)
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